xref: /openbmc/linux/sound/soc/codecs/cs42l51.h (revision 4a075bd4)
1 /*
2  * cs42l51.h
3  *
4  * ASoC Driver for Cirrus Logic CS42L51 codecs
5  *
6  * Copyright (c) 2010 Arnaud Patard <apatard@mandriva.com>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2 of the License, or
11  * (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  */
18 #ifndef _CS42L51_H
19 #define _CS42L51_H
20 
21 struct device;
22 
23 extern const struct regmap_config cs42l51_regmap;
24 int cs42l51_probe(struct device *dev, struct regmap *regmap);
25 int cs42l51_remove(struct device *dev);
26 int __maybe_unused cs42l51_suspend(struct device *dev);
27 int __maybe_unused cs42l51_resume(struct device *dev);
28 extern const struct of_device_id cs42l51_of_match[];
29 
30 #define CS42L51_CHIP_ID			0x1B
31 #define CS42L51_CHIP_REV_A		0x00
32 #define CS42L51_CHIP_REV_B		0x01
33 #define CS42L51_CHIP_REV_MASK		0x07
34 
35 #define CS42L51_CHIP_REV_ID		0x01
36 #define CS42L51_MK_CHIP_REV(a, b)	((a)<<3|(b))
37 
38 #define CS42L51_POWER_CTL1		0x02
39 #define CS42L51_POWER_CTL1_PDN_DACB	(1<<6)
40 #define CS42L51_POWER_CTL1_PDN_DACA	(1<<5)
41 #define CS42L51_POWER_CTL1_PDN_PGAB	(1<<4)
42 #define CS42L51_POWER_CTL1_PDN_PGAA	(1<<3)
43 #define CS42L51_POWER_CTL1_PDN_ADCB	(1<<2)
44 #define CS42L51_POWER_CTL1_PDN_ADCA	(1<<1)
45 #define CS42L51_POWER_CTL1_PDN		(1<<0)
46 
47 #define CS42L51_MIC_POWER_CTL		0x03
48 #define CS42L51_MIC_POWER_CTL_AUTO	(1<<7)
49 #define CS42L51_MIC_POWER_CTL_SPEED(x)	(((x)&3)<<5)
50 #define CS42L51_QSM_MODE		3
51 #define CS42L51_HSM_MODE		2
52 #define	CS42L51_SSM_MODE		1
53 #define CS42L51_DSM_MODE		0
54 #define CS42L51_MIC_POWER_CTL_3ST_SP	(1<<4)
55 #define CS42L51_MIC_POWER_CTL_PDN_MICB	(1<<3)
56 #define CS42L51_MIC_POWER_CTL_PDN_MICA	(1<<2)
57 #define CS42L51_MIC_POWER_CTL_PDN_BIAS	(1<<1)
58 #define CS42L51_MIC_POWER_CTL_MCLK_DIV2	(1<<0)
59 
60 #define CS42L51_INTF_CTL		0x04
61 #define CS42L51_INTF_CTL_LOOPBACK	(1<<7)
62 #define CS42L51_INTF_CTL_MASTER		(1<<6)
63 #define CS42L51_INTF_CTL_DAC_FORMAT(x)	(((x)&7)<<3)
64 #define CS42L51_DAC_DIF_LJ24		0x00
65 #define CS42L51_DAC_DIF_I2S		0x01
66 #define CS42L51_DAC_DIF_RJ24		0x02
67 #define CS42L51_DAC_DIF_RJ20		0x03
68 #define CS42L51_DAC_DIF_RJ18		0x04
69 #define CS42L51_DAC_DIF_RJ16		0x05
70 #define CS42L51_INTF_CTL_ADC_I2S	(1<<2)
71 #define CS42L51_INTF_CTL_DIGMIX		(1<<1)
72 #define CS42L51_INTF_CTL_MICMIX		(1<<0)
73 
74 #define CS42L51_MIC_CTL			0x05
75 #define CS42L51_MIC_CTL_ADC_SNGVOL	(1<<7)
76 #define CS42L51_MIC_CTL_ADCD_DBOOST	(1<<6)
77 #define CS42L51_MIC_CTL_ADCA_DBOOST	(1<<5)
78 #define CS42L51_MIC_CTL_MICBIAS_SEL	(1<<4)
79 #define CS42L51_MIC_CTL_MICBIAS_LVL(x)	(((x)&3)<<2)
80 #define CS42L51_MIC_CTL_MICB_BOOST	(1<<1)
81 #define CS42L51_MIC_CTL_MICA_BOOST	(1<<0)
82 
83 #define CS42L51_ADC_CTL			0x06
84 #define CS42L51_ADC_CTL_ADCB_HPFEN	(1<<7)
85 #define CS42L51_ADC_CTL_ADCB_HPFRZ	(1<<6)
86 #define CS42L51_ADC_CTL_ADCA_HPFEN	(1<<5)
87 #define CS42L51_ADC_CTL_ADCA_HPFRZ	(1<<4)
88 #define CS42L51_ADC_CTL_SOFTB		(1<<3)
89 #define CS42L51_ADC_CTL_ZCROSSB		(1<<2)
90 #define CS42L51_ADC_CTL_SOFTA		(1<<1)
91 #define CS42L51_ADC_CTL_ZCROSSA		(1<<0)
92 
93 #define CS42L51_ADC_INPUT		0x07
94 #define CS42L51_ADC_INPUT_AINB_MUX(x)	(((x)&3)<<6)
95 #define CS42L51_ADC_INPUT_AINA_MUX(x)	(((x)&3)<<4)
96 #define CS42L51_ADC_INPUT_INV_ADCB	(1<<3)
97 #define CS42L51_ADC_INPUT_INV_ADCA	(1<<2)
98 #define CS42L51_ADC_INPUT_ADCB_MUTE	(1<<1)
99 #define CS42L51_ADC_INPUT_ADCA_MUTE	(1<<0)
100 
101 #define CS42L51_DAC_OUT_CTL		0x08
102 #define CS42L51_DAC_OUT_CTL_HP_GAIN(x)	(((x)&7)<<5)
103 #define CS42L51_DAC_OUT_CTL_DAC_SNGVOL	(1<<4)
104 #define CS42L51_DAC_OUT_CTL_INV_PCMB	(1<<3)
105 #define CS42L51_DAC_OUT_CTL_INV_PCMA	(1<<2)
106 #define CS42L51_DAC_OUT_CTL_DACB_MUTE	(1<<1)
107 #define CS42L51_DAC_OUT_CTL_DACA_MUTE	(1<<0)
108 
109 #define CS42L51_DAC_CTL			0x09
110 #define CS42L51_DAC_CTL_DATA_SEL(x)	(((x)&3)<<6)
111 #define CS42L51_DAC_CTL_FREEZE		(1<<5)
112 #define CS42L51_DAC_CTL_DEEMPH		(1<<3)
113 #define CS42L51_DAC_CTL_AMUTE		(1<<2)
114 #define CS42L51_DAC_CTL_DACSZ(x)	(((x)&3)<<0)
115 
116 #define CS42L51_ALC_PGA_CTL		0x0A
117 #define CS42L51_ALC_PGB_CTL		0x0B
118 #define CS42L51_ALC_PGX_ALCX_SRDIS	(1<<7)
119 #define CS42L51_ALC_PGX_ALCX_ZCDIS	(1<<6)
120 #define CS42L51_ALC_PGX_PGX_VOL(x)	(((x)&0x1f)<<0)
121 
122 #define CS42L51_ADCA_ATT		0x0C
123 #define CS42L51_ADCB_ATT		0x0D
124 
125 #define CS42L51_ADCA_VOL		0x0E
126 #define CS42L51_ADCB_VOL		0x0F
127 #define CS42L51_PCMA_VOL		0x10
128 #define CS42L51_PCMB_VOL		0x11
129 #define CS42L51_MIX_MUTE_ADCMIX		(1<<7)
130 #define CS42L51_MIX_VOLUME(x)		(((x)&0x7f)<<0)
131 
132 #define CS42L51_BEEP_FREQ		0x12
133 #define CS42L51_BEEP_VOL		0x13
134 #define CS42L51_BEEP_CONF		0x14
135 
136 #define CS42L51_TONE_CTL		0x15
137 #define CS42L51_TONE_CTL_TREB(x)	(((x)&0xf)<<4)
138 #define CS42L51_TONE_CTL_BASS(x)	(((x)&0xf)<<0)
139 
140 #define CS42L51_AOUTA_VOL		0x16
141 #define CS42L51_AOUTB_VOL		0x17
142 #define CS42L51_PCM_MIXER		0x18
143 #define CS42L51_LIMIT_THRES_DIS		0x19
144 #define CS42L51_LIMIT_REL		0x1A
145 #define CS42L51_LIMIT_ATT		0x1B
146 #define CS42L51_ALC_EN			0x1C
147 #define CS42L51_ALC_REL			0x1D
148 #define CS42L51_ALC_THRES		0x1E
149 #define CS42L51_NOISE_CONF		0x1F
150 
151 #define CS42L51_STATUS			0x20
152 #define CS42L51_STATUS_SP_CLKERR	(1<<6)
153 #define CS42L51_STATUS_SPEA_OVFL	(1<<5)
154 #define CS42L51_STATUS_SPEB_OVFL	(1<<4)
155 #define CS42L51_STATUS_PCMA_OVFL	(1<<3)
156 #define CS42L51_STATUS_PCMB_OVFL	(1<<2)
157 #define CS42L51_STATUS_ADCA_OVFL	(1<<1)
158 #define CS42L51_STATUS_ADCB_OVFL	(1<<0)
159 
160 #define CS42L51_CHARGE_FREQ		0x21
161 
162 #define CS42L51_FIRSTREG	0x01
163 /*
164  * Hack: with register 0x21, it makes 33 registers. Looks like someone in the
165  * i2c layer doesn't like i2c smbus block read of 33 regs. Workaround by using
166  * 32 regs
167  */
168 #define CS42L51_LASTREG		0x20
169 #define CS42L51_NUMREGS		(CS42L51_LASTREG - CS42L51_FIRSTREG + 1)
170 
171 #endif
172