167b22517SAlexander Sverdlin /* 267b22517SAlexander Sverdlin * CS4271 ASoC codec driver 367b22517SAlexander Sverdlin * 467b22517SAlexander Sverdlin * Copyright (c) 2010 Alexander Sverdlin <subaparts@yandex.ru> 567b22517SAlexander Sverdlin * 667b22517SAlexander Sverdlin * This program is free software; you can redistribute it and/or 767b22517SAlexander Sverdlin * modify it under the terms of the GNU General Public License 867b22517SAlexander Sverdlin * as published by the Free Software Foundation; either version 2 967b22517SAlexander Sverdlin * of the License, or (at your option) any later version. 1067b22517SAlexander Sverdlin * 1167b22517SAlexander Sverdlin * This program is distributed in the hope that it will be useful, 1267b22517SAlexander Sverdlin * but WITHOUT ANY WARRANTY; without even the implied warranty of 1367b22517SAlexander Sverdlin * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1467b22517SAlexander Sverdlin * GNU General Public License for more details. 1567b22517SAlexander Sverdlin * 1667b22517SAlexander Sverdlin * This driver support CS4271 codec being master or slave, working 1767b22517SAlexander Sverdlin * in control port mode, connected either via SPI or I2C. 1867b22517SAlexander Sverdlin * The data format accepted is I2S or left-justified. 1967b22517SAlexander Sverdlin * DAPM support not implemented. 2067b22517SAlexander Sverdlin */ 2167b22517SAlexander Sverdlin 2267b22517SAlexander Sverdlin #include <linux/module.h> 2367b22517SAlexander Sverdlin #include <linux/slab.h> 2467b22517SAlexander Sverdlin #include <linux/delay.h> 2567b22517SAlexander Sverdlin #include <linux/gpio.h> 26a7ea1b72SSachin Kamat #include <linux/of.h> 27a31ebc34SDaniel Mack #include <linux/of_device.h> 28a31ebc34SDaniel Mack #include <linux/of_gpio.h> 299a397f47SPascal Huerst #include <linux/regulator/consumer.h> 30a31ebc34SDaniel Mack #include <sound/pcm.h> 31a31ebc34SDaniel Mack #include <sound/soc.h> 32a31ebc34SDaniel Mack #include <sound/tlv.h> 3367b22517SAlexander Sverdlin #include <sound/cs4271.h> 34c973b8a7SAxel Lin #include "cs4271.h" 3567b22517SAlexander Sverdlin 3667b22517SAlexander Sverdlin #define CS4271_PCM_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \ 3767b22517SAlexander Sverdlin SNDRV_PCM_FMTBIT_S24_LE | \ 3867b22517SAlexander Sverdlin SNDRV_PCM_FMTBIT_S32_LE) 39383f8465SAlexander Sverdlin #define CS4271_PCM_RATES SNDRV_PCM_RATE_8000_192000 4067b22517SAlexander Sverdlin 4167b22517SAlexander Sverdlin /* 4267b22517SAlexander Sverdlin * CS4271 registers 4367b22517SAlexander Sverdlin */ 441b1861eaSDaniel Mack #define CS4271_MODE1 0x01 /* Mode Control 1 */ 451b1861eaSDaniel Mack #define CS4271_DACCTL 0x02 /* DAC Control */ 461b1861eaSDaniel Mack #define CS4271_DACVOL 0x03 /* DAC Volume & Mixing Control */ 471b1861eaSDaniel Mack #define CS4271_VOLA 0x04 /* DAC Channel A Volume Control */ 481b1861eaSDaniel Mack #define CS4271_VOLB 0x05 /* DAC Channel B Volume Control */ 491b1861eaSDaniel Mack #define CS4271_ADCCTL 0x06 /* ADC Control */ 501b1861eaSDaniel Mack #define CS4271_MODE2 0x07 /* Mode Control 2 */ 511b1861eaSDaniel Mack #define CS4271_CHIPID 0x08 /* Chip ID */ 5267b22517SAlexander Sverdlin 5367b22517SAlexander Sverdlin #define CS4271_FIRSTREG CS4271_MODE1 5467b22517SAlexander Sverdlin #define CS4271_LASTREG CS4271_MODE2 5567b22517SAlexander Sverdlin #define CS4271_NR_REGS ((CS4271_LASTREG & 0xFF) + 1) 5667b22517SAlexander Sverdlin 5767b22517SAlexander Sverdlin /* Bit masks for the CS4271 registers */ 5867b22517SAlexander Sverdlin #define CS4271_MODE1_MODE_MASK 0xC0 5967b22517SAlexander Sverdlin #define CS4271_MODE1_MODE_1X 0x00 6067b22517SAlexander Sverdlin #define CS4271_MODE1_MODE_2X 0x80 6167b22517SAlexander Sverdlin #define CS4271_MODE1_MODE_4X 0xC0 6267b22517SAlexander Sverdlin 6367b22517SAlexander Sverdlin #define CS4271_MODE1_DIV_MASK 0x30 6467b22517SAlexander Sverdlin #define CS4271_MODE1_DIV_1 0x00 6567b22517SAlexander Sverdlin #define CS4271_MODE1_DIV_15 0x10 6667b22517SAlexander Sverdlin #define CS4271_MODE1_DIV_2 0x20 6767b22517SAlexander Sverdlin #define CS4271_MODE1_DIV_3 0x30 6867b22517SAlexander Sverdlin 6967b22517SAlexander Sverdlin #define CS4271_MODE1_MASTER 0x08 7067b22517SAlexander Sverdlin 7167b22517SAlexander Sverdlin #define CS4271_MODE1_DAC_DIF_MASK 0x07 7267b22517SAlexander Sverdlin #define CS4271_MODE1_DAC_DIF_LJ 0x00 7367b22517SAlexander Sverdlin #define CS4271_MODE1_DAC_DIF_I2S 0x01 7467b22517SAlexander Sverdlin #define CS4271_MODE1_DAC_DIF_RJ16 0x02 7567b22517SAlexander Sverdlin #define CS4271_MODE1_DAC_DIF_RJ24 0x03 7667b22517SAlexander Sverdlin #define CS4271_MODE1_DAC_DIF_RJ20 0x04 7767b22517SAlexander Sverdlin #define CS4271_MODE1_DAC_DIF_RJ18 0x05 7867b22517SAlexander Sverdlin 7967b22517SAlexander Sverdlin #define CS4271_DACCTL_AMUTE 0x80 8067b22517SAlexander Sverdlin #define CS4271_DACCTL_IF_SLOW 0x40 8167b22517SAlexander Sverdlin 8267b22517SAlexander Sverdlin #define CS4271_DACCTL_DEM_MASK 0x30 8367b22517SAlexander Sverdlin #define CS4271_DACCTL_DEM_DIS 0x00 8467b22517SAlexander Sverdlin #define CS4271_DACCTL_DEM_441 0x10 8567b22517SAlexander Sverdlin #define CS4271_DACCTL_DEM_48 0x20 8667b22517SAlexander Sverdlin #define CS4271_DACCTL_DEM_32 0x30 8767b22517SAlexander Sverdlin 8867b22517SAlexander Sverdlin #define CS4271_DACCTL_SVRU 0x08 8967b22517SAlexander Sverdlin #define CS4271_DACCTL_SRD 0x04 9067b22517SAlexander Sverdlin #define CS4271_DACCTL_INVA 0x02 9167b22517SAlexander Sverdlin #define CS4271_DACCTL_INVB 0x01 9267b22517SAlexander Sverdlin 9367b22517SAlexander Sverdlin #define CS4271_DACVOL_BEQUA 0x40 9467b22517SAlexander Sverdlin #define CS4271_DACVOL_SOFT 0x20 9567b22517SAlexander Sverdlin #define CS4271_DACVOL_ZEROC 0x10 9667b22517SAlexander Sverdlin 9767b22517SAlexander Sverdlin #define CS4271_DACVOL_ATAPI_MASK 0x0F 9867b22517SAlexander Sverdlin #define CS4271_DACVOL_ATAPI_M_M 0x00 9967b22517SAlexander Sverdlin #define CS4271_DACVOL_ATAPI_M_BR 0x01 10067b22517SAlexander Sverdlin #define CS4271_DACVOL_ATAPI_M_BL 0x02 10167b22517SAlexander Sverdlin #define CS4271_DACVOL_ATAPI_M_BLR2 0x03 10267b22517SAlexander Sverdlin #define CS4271_DACVOL_ATAPI_AR_M 0x04 10367b22517SAlexander Sverdlin #define CS4271_DACVOL_ATAPI_AR_BR 0x05 10467b22517SAlexander Sverdlin #define CS4271_DACVOL_ATAPI_AR_BL 0x06 10567b22517SAlexander Sverdlin #define CS4271_DACVOL_ATAPI_AR_BLR2 0x07 10667b22517SAlexander Sverdlin #define CS4271_DACVOL_ATAPI_AL_M 0x08 10767b22517SAlexander Sverdlin #define CS4271_DACVOL_ATAPI_AL_BR 0x09 10867b22517SAlexander Sverdlin #define CS4271_DACVOL_ATAPI_AL_BL 0x0A 10967b22517SAlexander Sverdlin #define CS4271_DACVOL_ATAPI_AL_BLR2 0x0B 11067b22517SAlexander Sverdlin #define CS4271_DACVOL_ATAPI_ALR2_M 0x0C 11167b22517SAlexander Sverdlin #define CS4271_DACVOL_ATAPI_ALR2_BR 0x0D 11267b22517SAlexander Sverdlin #define CS4271_DACVOL_ATAPI_ALR2_BL 0x0E 11367b22517SAlexander Sverdlin #define CS4271_DACVOL_ATAPI_ALR2_BLR2 0x0F 11467b22517SAlexander Sverdlin 11567b22517SAlexander Sverdlin #define CS4271_VOLA_MUTE 0x80 11667b22517SAlexander Sverdlin #define CS4271_VOLA_VOL_MASK 0x7F 11767b22517SAlexander Sverdlin #define CS4271_VOLB_MUTE 0x80 11867b22517SAlexander Sverdlin #define CS4271_VOLB_VOL_MASK 0x7F 11967b22517SAlexander Sverdlin 12067b22517SAlexander Sverdlin #define CS4271_ADCCTL_DITHER16 0x20 12167b22517SAlexander Sverdlin 12267b22517SAlexander Sverdlin #define CS4271_ADCCTL_ADC_DIF_MASK 0x10 12367b22517SAlexander Sverdlin #define CS4271_ADCCTL_ADC_DIF_LJ 0x00 12467b22517SAlexander Sverdlin #define CS4271_ADCCTL_ADC_DIF_I2S 0x10 12567b22517SAlexander Sverdlin 12667b22517SAlexander Sverdlin #define CS4271_ADCCTL_MUTEA 0x08 12767b22517SAlexander Sverdlin #define CS4271_ADCCTL_MUTEB 0x04 12867b22517SAlexander Sverdlin #define CS4271_ADCCTL_HPFDA 0x02 12967b22517SAlexander Sverdlin #define CS4271_ADCCTL_HPFDB 0x01 13067b22517SAlexander Sverdlin 13167b22517SAlexander Sverdlin #define CS4271_MODE2_LOOP 0x10 13267b22517SAlexander Sverdlin #define CS4271_MODE2_MUTECAEQUB 0x08 13367b22517SAlexander Sverdlin #define CS4271_MODE2_FREEZE 0x04 13467b22517SAlexander Sverdlin #define CS4271_MODE2_CPEN 0x02 13567b22517SAlexander Sverdlin #define CS4271_MODE2_PDN 0x01 13667b22517SAlexander Sverdlin 13767b22517SAlexander Sverdlin #define CS4271_CHIPID_PART_MASK 0xF0 13867b22517SAlexander Sverdlin #define CS4271_CHIPID_REV_MASK 0x0F 13967b22517SAlexander Sverdlin 14067b22517SAlexander Sverdlin /* 14167b22517SAlexander Sverdlin * Default CS4271 power-up configuration 14267b22517SAlexander Sverdlin * Array contains non-existing in hw register at address 0 14367b22517SAlexander Sverdlin * Array do not include Chip ID, as codec driver does not use 14467b22517SAlexander Sverdlin * registers read operations at all 14567b22517SAlexander Sverdlin */ 1461b1861eaSDaniel Mack static const struct reg_default cs4271_reg_defaults[] = { 1471b1861eaSDaniel Mack { CS4271_MODE1, 0, }, 1481b1861eaSDaniel Mack { CS4271_DACCTL, CS4271_DACCTL_AMUTE, }, 1491b1861eaSDaniel Mack { CS4271_DACVOL, CS4271_DACVOL_SOFT | CS4271_DACVOL_ATAPI_AL_BR, }, 1501b1861eaSDaniel Mack { CS4271_VOLA, 0, }, 1511b1861eaSDaniel Mack { CS4271_VOLB, 0, }, 1521b1861eaSDaniel Mack { CS4271_ADCCTL, 0, }, 1531b1861eaSDaniel Mack { CS4271_MODE2, 0, }, 15467b22517SAlexander Sverdlin }; 15567b22517SAlexander Sverdlin 1561b1861eaSDaniel Mack static bool cs4271_volatile_reg(struct device *dev, unsigned int reg) 1571b1861eaSDaniel Mack { 1581b1861eaSDaniel Mack return reg == CS4271_CHIPID; 1591b1861eaSDaniel Mack } 1601b1861eaSDaniel Mack 1619a397f47SPascal Huerst static const char * const supply_names[] = { 1629a397f47SPascal Huerst "vd", "vl", "va" 1639a397f47SPascal Huerst }; 1649a397f47SPascal Huerst 16567b22517SAlexander Sverdlin struct cs4271_private { 16667b22517SAlexander Sverdlin unsigned int mclk; 16767b22517SAlexander Sverdlin bool master; 16867b22517SAlexander Sverdlin bool deemph; 1691b1861eaSDaniel Mack struct regmap *regmap; 17067b22517SAlexander Sverdlin /* Current sample rate for de-emphasis control */ 17167b22517SAlexander Sverdlin int rate; 17267b22517SAlexander Sverdlin /* GPIO driving Reset pin, if any */ 17367b22517SAlexander Sverdlin int gpio_nreset; 17467b22517SAlexander Sverdlin /* GPIO that disable serial bus, if any */ 17567b22517SAlexander Sverdlin int gpio_disable; 176fd23fb9fSDaniel Mack /* enable soft reset workaround */ 177fd23fb9fSDaniel Mack bool enable_soft_reset; 1789a397f47SPascal Huerst struct regulator_bulk_data supplies[ARRAY_SIZE(supply_names)]; 17967b22517SAlexander Sverdlin }; 18067b22517SAlexander Sverdlin 1812e7fb942SMark Brown static const struct snd_soc_dapm_widget cs4271_dapm_widgets[] = { 1822e7fb942SMark Brown SND_SOC_DAPM_INPUT("AINA"), 1832e7fb942SMark Brown SND_SOC_DAPM_INPUT("AINB"), 1842e7fb942SMark Brown 1852e7fb942SMark Brown SND_SOC_DAPM_OUTPUT("AOUTA+"), 1862e7fb942SMark Brown SND_SOC_DAPM_OUTPUT("AOUTA-"), 1872e7fb942SMark Brown SND_SOC_DAPM_OUTPUT("AOUTB+"), 1882e7fb942SMark Brown SND_SOC_DAPM_OUTPUT("AOUTB-"), 1892e7fb942SMark Brown }; 1902e7fb942SMark Brown 1912e7fb942SMark Brown static const struct snd_soc_dapm_route cs4271_dapm_routes[] = { 1922e7fb942SMark Brown { "Capture", NULL, "AINA" }, 1932e7fb942SMark Brown { "Capture", NULL, "AINB" }, 1942e7fb942SMark Brown 1952e7fb942SMark Brown { "AOUTA+", NULL, "Playback" }, 1962e7fb942SMark Brown { "AOUTA-", NULL, "Playback" }, 1972e7fb942SMark Brown { "AOUTB+", NULL, "Playback" }, 1982e7fb942SMark Brown { "AOUTB-", NULL, "Playback" }, 1992e7fb942SMark Brown }; 2002e7fb942SMark Brown 20167b22517SAlexander Sverdlin /* 20267b22517SAlexander Sverdlin * @freq is the desired MCLK rate 20367b22517SAlexander Sverdlin * MCLK rate should (c) be the sample rate, multiplied by one of the 20467b22517SAlexander Sverdlin * ratios listed in cs4271_mclk_fs_ratios table 20567b22517SAlexander Sverdlin */ 20667b22517SAlexander Sverdlin static int cs4271_set_dai_sysclk(struct snd_soc_dai *codec_dai, 20767b22517SAlexander Sverdlin int clk_id, unsigned int freq, int dir) 20867b22517SAlexander Sverdlin { 20967b22517SAlexander Sverdlin struct snd_soc_codec *codec = codec_dai->codec; 21067b22517SAlexander Sverdlin struct cs4271_private *cs4271 = snd_soc_codec_get_drvdata(codec); 21167b22517SAlexander Sverdlin 21267b22517SAlexander Sverdlin cs4271->mclk = freq; 21367b22517SAlexander Sverdlin return 0; 21467b22517SAlexander Sverdlin } 21567b22517SAlexander Sverdlin 21667b22517SAlexander Sverdlin static int cs4271_set_dai_fmt(struct snd_soc_dai *codec_dai, 21767b22517SAlexander Sverdlin unsigned int format) 21867b22517SAlexander Sverdlin { 21967b22517SAlexander Sverdlin struct snd_soc_codec *codec = codec_dai->codec; 22067b22517SAlexander Sverdlin struct cs4271_private *cs4271 = snd_soc_codec_get_drvdata(codec); 22167b22517SAlexander Sverdlin unsigned int val = 0; 2220d42e6e7SAlexander Sverdlin int ret; 22367b22517SAlexander Sverdlin 22467b22517SAlexander Sverdlin switch (format & SND_SOC_DAIFMT_MASTER_MASK) { 22567b22517SAlexander Sverdlin case SND_SOC_DAIFMT_CBS_CFS: 22667b22517SAlexander Sverdlin cs4271->master = 0; 22767b22517SAlexander Sverdlin break; 22867b22517SAlexander Sverdlin case SND_SOC_DAIFMT_CBM_CFM: 22967b22517SAlexander Sverdlin cs4271->master = 1; 23067b22517SAlexander Sverdlin val |= CS4271_MODE1_MASTER; 23167b22517SAlexander Sverdlin break; 23267b22517SAlexander Sverdlin default: 23367b22517SAlexander Sverdlin dev_err(codec->dev, "Invalid DAI format\n"); 23467b22517SAlexander Sverdlin return -EINVAL; 23567b22517SAlexander Sverdlin } 23667b22517SAlexander Sverdlin 23767b22517SAlexander Sverdlin switch (format & SND_SOC_DAIFMT_FORMAT_MASK) { 23867b22517SAlexander Sverdlin case SND_SOC_DAIFMT_LEFT_J: 23967b22517SAlexander Sverdlin val |= CS4271_MODE1_DAC_DIF_LJ; 2401b1861eaSDaniel Mack ret = regmap_update_bits(cs4271->regmap, CS4271_ADCCTL, 24167b22517SAlexander Sverdlin CS4271_ADCCTL_ADC_DIF_MASK, CS4271_ADCCTL_ADC_DIF_LJ); 2420d42e6e7SAlexander Sverdlin if (ret < 0) 2430d42e6e7SAlexander Sverdlin return ret; 24467b22517SAlexander Sverdlin break; 24567b22517SAlexander Sverdlin case SND_SOC_DAIFMT_I2S: 24667b22517SAlexander Sverdlin val |= CS4271_MODE1_DAC_DIF_I2S; 2471b1861eaSDaniel Mack ret = regmap_update_bits(cs4271->regmap, CS4271_ADCCTL, 24867b22517SAlexander Sverdlin CS4271_ADCCTL_ADC_DIF_MASK, CS4271_ADCCTL_ADC_DIF_I2S); 2490d42e6e7SAlexander Sverdlin if (ret < 0) 2500d42e6e7SAlexander Sverdlin return ret; 25167b22517SAlexander Sverdlin break; 25267b22517SAlexander Sverdlin default: 25367b22517SAlexander Sverdlin dev_err(codec->dev, "Invalid DAI format\n"); 25467b22517SAlexander Sverdlin return -EINVAL; 25567b22517SAlexander Sverdlin } 25667b22517SAlexander Sverdlin 2571b1861eaSDaniel Mack ret = regmap_update_bits(cs4271->regmap, CS4271_MODE1, 25867b22517SAlexander Sverdlin CS4271_MODE1_DAC_DIF_MASK | CS4271_MODE1_MASTER, val); 2590d42e6e7SAlexander Sverdlin if (ret < 0) 2600d42e6e7SAlexander Sverdlin return ret; 26167b22517SAlexander Sverdlin return 0; 26267b22517SAlexander Sverdlin } 26367b22517SAlexander Sverdlin 26467b22517SAlexander Sverdlin static int cs4271_deemph[] = {0, 44100, 48000, 32000}; 26567b22517SAlexander Sverdlin 26667b22517SAlexander Sverdlin static int cs4271_set_deemph(struct snd_soc_codec *codec) 26767b22517SAlexander Sverdlin { 26867b22517SAlexander Sverdlin struct cs4271_private *cs4271 = snd_soc_codec_get_drvdata(codec); 2690d42e6e7SAlexander Sverdlin int i, ret; 27067b22517SAlexander Sverdlin int val = CS4271_DACCTL_DEM_DIS; 27167b22517SAlexander Sverdlin 27267b22517SAlexander Sverdlin if (cs4271->deemph) { 27367b22517SAlexander Sverdlin /* Find closest de-emphasis freq */ 27467b22517SAlexander Sverdlin val = 1; 27567b22517SAlexander Sverdlin for (i = 2; i < ARRAY_SIZE(cs4271_deemph); i++) 27667b22517SAlexander Sverdlin if (abs(cs4271_deemph[i] - cs4271->rate) < 27767b22517SAlexander Sverdlin abs(cs4271_deemph[val] - cs4271->rate)) 27867b22517SAlexander Sverdlin val = i; 27967b22517SAlexander Sverdlin val <<= 4; 28067b22517SAlexander Sverdlin } 28167b22517SAlexander Sverdlin 2821b1861eaSDaniel Mack ret = regmap_update_bits(cs4271->regmap, CS4271_DACCTL, 28367b22517SAlexander Sverdlin CS4271_DACCTL_DEM_MASK, val); 2840d42e6e7SAlexander Sverdlin if (ret < 0) 2850d42e6e7SAlexander Sverdlin return ret; 2860d42e6e7SAlexander Sverdlin return 0; 28767b22517SAlexander Sverdlin } 28867b22517SAlexander Sverdlin 28967b22517SAlexander Sverdlin static int cs4271_get_deemph(struct snd_kcontrol *kcontrol, 29067b22517SAlexander Sverdlin struct snd_ctl_elem_value *ucontrol) 29167b22517SAlexander Sverdlin { 292ea53bf77SLars-Peter Clausen struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 29367b22517SAlexander Sverdlin struct cs4271_private *cs4271 = snd_soc_codec_get_drvdata(codec); 29467b22517SAlexander Sverdlin 295e8371aa0STakashi Iwai ucontrol->value.integer.value[0] = cs4271->deemph; 29667b22517SAlexander Sverdlin return 0; 29767b22517SAlexander Sverdlin } 29867b22517SAlexander Sverdlin 29967b22517SAlexander Sverdlin static int cs4271_put_deemph(struct snd_kcontrol *kcontrol, 30067b22517SAlexander Sverdlin struct snd_ctl_elem_value *ucontrol) 30167b22517SAlexander Sverdlin { 302ea53bf77SLars-Peter Clausen struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 30367b22517SAlexander Sverdlin struct cs4271_private *cs4271 = snd_soc_codec_get_drvdata(codec); 30467b22517SAlexander Sverdlin 305e8371aa0STakashi Iwai cs4271->deemph = ucontrol->value.integer.value[0]; 30667b22517SAlexander Sverdlin return cs4271_set_deemph(codec); 30767b22517SAlexander Sverdlin } 30867b22517SAlexander Sverdlin 3095c3a12e9SAlexander Sverdlin struct cs4271_clk_cfg { 3105c3a12e9SAlexander Sverdlin bool master; /* codec mode */ 3115c3a12e9SAlexander Sverdlin u8 speed_mode; /* codec speed mode: 1x, 2x, 4x */ 3125c3a12e9SAlexander Sverdlin unsigned short ratio; /* MCLK / sample rate */ 3135c3a12e9SAlexander Sverdlin u8 ratio_mask; /* ratio bit mask for Master mode */ 3145c3a12e9SAlexander Sverdlin }; 3155c3a12e9SAlexander Sverdlin 3165c3a12e9SAlexander Sverdlin static struct cs4271_clk_cfg cs4271_clk_tab[] = { 3175c3a12e9SAlexander Sverdlin {1, CS4271_MODE1_MODE_1X, 256, CS4271_MODE1_DIV_1}, 3185c3a12e9SAlexander Sverdlin {1, CS4271_MODE1_MODE_1X, 384, CS4271_MODE1_DIV_15}, 3195c3a12e9SAlexander Sverdlin {1, CS4271_MODE1_MODE_1X, 512, CS4271_MODE1_DIV_2}, 3205c3a12e9SAlexander Sverdlin {1, CS4271_MODE1_MODE_1X, 768, CS4271_MODE1_DIV_3}, 3215c3a12e9SAlexander Sverdlin {1, CS4271_MODE1_MODE_2X, 128, CS4271_MODE1_DIV_1}, 3225c3a12e9SAlexander Sverdlin {1, CS4271_MODE1_MODE_2X, 192, CS4271_MODE1_DIV_15}, 3235c3a12e9SAlexander Sverdlin {1, CS4271_MODE1_MODE_2X, 256, CS4271_MODE1_DIV_2}, 3245c3a12e9SAlexander Sverdlin {1, CS4271_MODE1_MODE_2X, 384, CS4271_MODE1_DIV_3}, 3255c3a12e9SAlexander Sverdlin {1, CS4271_MODE1_MODE_4X, 64, CS4271_MODE1_DIV_1}, 3265c3a12e9SAlexander Sverdlin {1, CS4271_MODE1_MODE_4X, 96, CS4271_MODE1_DIV_15}, 3275c3a12e9SAlexander Sverdlin {1, CS4271_MODE1_MODE_4X, 128, CS4271_MODE1_DIV_2}, 3285c3a12e9SAlexander Sverdlin {1, CS4271_MODE1_MODE_4X, 192, CS4271_MODE1_DIV_3}, 3295c3a12e9SAlexander Sverdlin {0, CS4271_MODE1_MODE_1X, 256, CS4271_MODE1_DIV_1}, 3305c3a12e9SAlexander Sverdlin {0, CS4271_MODE1_MODE_1X, 384, CS4271_MODE1_DIV_1}, 3315c3a12e9SAlexander Sverdlin {0, CS4271_MODE1_MODE_1X, 512, CS4271_MODE1_DIV_1}, 3325c3a12e9SAlexander Sverdlin {0, CS4271_MODE1_MODE_1X, 768, CS4271_MODE1_DIV_2}, 3335c3a12e9SAlexander Sverdlin {0, CS4271_MODE1_MODE_1X, 1024, CS4271_MODE1_DIV_2}, 3345c3a12e9SAlexander Sverdlin {0, CS4271_MODE1_MODE_2X, 128, CS4271_MODE1_DIV_1}, 3355c3a12e9SAlexander Sverdlin {0, CS4271_MODE1_MODE_2X, 192, CS4271_MODE1_DIV_1}, 3365c3a12e9SAlexander Sverdlin {0, CS4271_MODE1_MODE_2X, 256, CS4271_MODE1_DIV_1}, 3375c3a12e9SAlexander Sverdlin {0, CS4271_MODE1_MODE_2X, 384, CS4271_MODE1_DIV_2}, 3385c3a12e9SAlexander Sverdlin {0, CS4271_MODE1_MODE_2X, 512, CS4271_MODE1_DIV_2}, 3395c3a12e9SAlexander Sverdlin {0, CS4271_MODE1_MODE_4X, 64, CS4271_MODE1_DIV_1}, 3405c3a12e9SAlexander Sverdlin {0, CS4271_MODE1_MODE_4X, 96, CS4271_MODE1_DIV_1}, 3415c3a12e9SAlexander Sverdlin {0, CS4271_MODE1_MODE_4X, 128, CS4271_MODE1_DIV_1}, 3425c3a12e9SAlexander Sverdlin {0, CS4271_MODE1_MODE_4X, 192, CS4271_MODE1_DIV_2}, 3435c3a12e9SAlexander Sverdlin {0, CS4271_MODE1_MODE_4X, 256, CS4271_MODE1_DIV_2}, 3445c3a12e9SAlexander Sverdlin }; 3455c3a12e9SAlexander Sverdlin 3465c3a12e9SAlexander Sverdlin #define CS4171_NR_RATIOS ARRAY_SIZE(cs4271_clk_tab) 3475c3a12e9SAlexander Sverdlin 34867b22517SAlexander Sverdlin static int cs4271_hw_params(struct snd_pcm_substream *substream, 34967b22517SAlexander Sverdlin struct snd_pcm_hw_params *params, 35067b22517SAlexander Sverdlin struct snd_soc_dai *dai) 35167b22517SAlexander Sverdlin { 352e6968a17SMark Brown struct snd_soc_codec *codec = dai->codec; 35367b22517SAlexander Sverdlin struct cs4271_private *cs4271 = snd_soc_codec_get_drvdata(codec); 3540d42e6e7SAlexander Sverdlin int i, ret; 3550d42e6e7SAlexander Sverdlin unsigned int ratio, val; 35667b22517SAlexander Sverdlin 357fd23fb9fSDaniel Mack if (cs4271->enable_soft_reset) { 358fd23fb9fSDaniel Mack /* 359fd23fb9fSDaniel Mack * Put the codec in soft reset and back again in case it's not 360fd23fb9fSDaniel Mack * currently streaming data. This way of bringing the codec in 361fd23fb9fSDaniel Mack * sync to the current clocks is not explicitly documented in 362fd23fb9fSDaniel Mack * the data sheet, but it seems to work fine, and in contrast 363fd23fb9fSDaniel Mack * to a read hardware reset, we don't have to sync back all 364fd23fb9fSDaniel Mack * registers every time. 365fd23fb9fSDaniel Mack */ 366fd23fb9fSDaniel Mack 367fd23fb9fSDaniel Mack if ((substream->stream == SNDRV_PCM_STREAM_PLAYBACK && 368fd23fb9fSDaniel Mack !dai->capture_active) || 369fd23fb9fSDaniel Mack (substream->stream == SNDRV_PCM_STREAM_CAPTURE && 370fd23fb9fSDaniel Mack !dai->playback_active)) { 3711b1861eaSDaniel Mack ret = regmap_update_bits(cs4271->regmap, CS4271_MODE2, 372fd23fb9fSDaniel Mack CS4271_MODE2_PDN, 373fd23fb9fSDaniel Mack CS4271_MODE2_PDN); 374fd23fb9fSDaniel Mack if (ret < 0) 375fd23fb9fSDaniel Mack return ret; 376fd23fb9fSDaniel Mack 3771b1861eaSDaniel Mack ret = regmap_update_bits(cs4271->regmap, CS4271_MODE2, 378fd23fb9fSDaniel Mack CS4271_MODE2_PDN, 0); 379fd23fb9fSDaniel Mack if (ret < 0) 380fd23fb9fSDaniel Mack return ret; 381fd23fb9fSDaniel Mack } 382fd23fb9fSDaniel Mack } 383fd23fb9fSDaniel Mack 38467b22517SAlexander Sverdlin cs4271->rate = params_rate(params); 3855c3a12e9SAlexander Sverdlin 3865c3a12e9SAlexander Sverdlin /* Configure DAC */ 3875c3a12e9SAlexander Sverdlin if (cs4271->rate < 50000) 3885c3a12e9SAlexander Sverdlin val = CS4271_MODE1_MODE_1X; 3895c3a12e9SAlexander Sverdlin else if (cs4271->rate < 100000) 3905c3a12e9SAlexander Sverdlin val = CS4271_MODE1_MODE_2X; 3915c3a12e9SAlexander Sverdlin else 3925c3a12e9SAlexander Sverdlin val = CS4271_MODE1_MODE_4X; 3935c3a12e9SAlexander Sverdlin 39467b22517SAlexander Sverdlin ratio = cs4271->mclk / cs4271->rate; 39567b22517SAlexander Sverdlin for (i = 0; i < CS4171_NR_RATIOS; i++) 3965c3a12e9SAlexander Sverdlin if ((cs4271_clk_tab[i].master == cs4271->master) && 3975c3a12e9SAlexander Sverdlin (cs4271_clk_tab[i].speed_mode == val) && 3985c3a12e9SAlexander Sverdlin (cs4271_clk_tab[i].ratio == ratio)) 39967b22517SAlexander Sverdlin break; 40067b22517SAlexander Sverdlin 4015c3a12e9SAlexander Sverdlin if (i == CS4171_NR_RATIOS) { 40267b22517SAlexander Sverdlin dev_err(codec->dev, "Invalid sample rate\n"); 40367b22517SAlexander Sverdlin return -EINVAL; 40467b22517SAlexander Sverdlin } 40567b22517SAlexander Sverdlin 4065c3a12e9SAlexander Sverdlin val |= cs4271_clk_tab[i].ratio_mask; 40767b22517SAlexander Sverdlin 4081b1861eaSDaniel Mack ret = regmap_update_bits(cs4271->regmap, CS4271_MODE1, 40967b22517SAlexander Sverdlin CS4271_MODE1_MODE_MASK | CS4271_MODE1_DIV_MASK, val); 4100d42e6e7SAlexander Sverdlin if (ret < 0) 4110d42e6e7SAlexander Sverdlin return ret; 41267b22517SAlexander Sverdlin 41367b22517SAlexander Sverdlin return cs4271_set_deemph(codec); 41467b22517SAlexander Sverdlin } 41567b22517SAlexander Sverdlin 416c24a34dbSDaniel Mack static int cs4271_mute_stream(struct snd_soc_dai *dai, int mute, int stream) 41767b22517SAlexander Sverdlin { 41867b22517SAlexander Sverdlin struct snd_soc_codec *codec = dai->codec; 4191b1861eaSDaniel Mack struct cs4271_private *cs4271 = snd_soc_codec_get_drvdata(codec); 4200d42e6e7SAlexander Sverdlin int ret; 42167b22517SAlexander Sverdlin int val_a = 0; 42267b22517SAlexander Sverdlin int val_b = 0; 42367b22517SAlexander Sverdlin 424c24a34dbSDaniel Mack if (stream != SNDRV_PCM_STREAM_PLAYBACK) 425c24a34dbSDaniel Mack return 0; 426c24a34dbSDaniel Mack 42767b22517SAlexander Sverdlin if (mute) { 42867b22517SAlexander Sverdlin val_a = CS4271_VOLA_MUTE; 42967b22517SAlexander Sverdlin val_b = CS4271_VOLB_MUTE; 43067b22517SAlexander Sverdlin } 43167b22517SAlexander Sverdlin 4321b1861eaSDaniel Mack ret = regmap_update_bits(cs4271->regmap, CS4271_VOLA, 4331b1861eaSDaniel Mack CS4271_VOLA_MUTE, val_a); 4340d42e6e7SAlexander Sverdlin if (ret < 0) 4350d42e6e7SAlexander Sverdlin return ret; 4361b1861eaSDaniel Mack 4371b1861eaSDaniel Mack ret = regmap_update_bits(cs4271->regmap, CS4271_VOLB, 4381b1861eaSDaniel Mack CS4271_VOLB_MUTE, val_b); 4390d42e6e7SAlexander Sverdlin if (ret < 0) 4400d42e6e7SAlexander Sverdlin return ret; 44167b22517SAlexander Sverdlin 44267b22517SAlexander Sverdlin return 0; 44367b22517SAlexander Sverdlin } 44467b22517SAlexander Sverdlin 44567b22517SAlexander Sverdlin /* CS4271 controls */ 44667b22517SAlexander Sverdlin static DECLARE_TLV_DB_SCALE(cs4271_dac_tlv, -12700, 100, 0); 44767b22517SAlexander Sverdlin 44867b22517SAlexander Sverdlin static const struct snd_kcontrol_new cs4271_snd_controls[] = { 44967b22517SAlexander Sverdlin SOC_DOUBLE_R_TLV("Master Playback Volume", CS4271_VOLA, CS4271_VOLB, 45067b22517SAlexander Sverdlin 0, 0x7F, 1, cs4271_dac_tlv), 45167b22517SAlexander Sverdlin SOC_SINGLE("Digital Loopback Switch", CS4271_MODE2, 4, 1, 0), 45267b22517SAlexander Sverdlin SOC_SINGLE("Soft Ramp Switch", CS4271_DACVOL, 5, 1, 0), 45367b22517SAlexander Sverdlin SOC_SINGLE("Zero Cross Switch", CS4271_DACVOL, 4, 1, 0), 45467b22517SAlexander Sverdlin SOC_SINGLE_BOOL_EXT("De-emphasis Switch", 0, 45567b22517SAlexander Sverdlin cs4271_get_deemph, cs4271_put_deemph), 45667b22517SAlexander Sverdlin SOC_SINGLE("Auto-Mute Switch", CS4271_DACCTL, 7, 1, 0), 45767b22517SAlexander Sverdlin SOC_SINGLE("Slow Roll Off Filter Switch", CS4271_DACCTL, 6, 1, 0), 45867b22517SAlexander Sverdlin SOC_SINGLE("Soft Volume Ramp-Up Switch", CS4271_DACCTL, 3, 1, 0), 45967b22517SAlexander Sverdlin SOC_SINGLE("Soft Ramp-Down Switch", CS4271_DACCTL, 2, 1, 0), 46067b22517SAlexander Sverdlin SOC_SINGLE("Left Channel Inversion Switch", CS4271_DACCTL, 1, 1, 0), 46167b22517SAlexander Sverdlin SOC_SINGLE("Right Channel Inversion Switch", CS4271_DACCTL, 0, 1, 0), 46267b22517SAlexander Sverdlin SOC_DOUBLE("Master Capture Switch", CS4271_ADCCTL, 3, 2, 1, 1), 46367b22517SAlexander Sverdlin SOC_SINGLE("Dither 16-Bit Data Switch", CS4271_ADCCTL, 5, 1, 0), 46467b22517SAlexander Sverdlin SOC_DOUBLE("High Pass Filter Switch", CS4271_ADCCTL, 1, 0, 1, 1), 46567b22517SAlexander Sverdlin SOC_DOUBLE_R("Master Playback Switch", CS4271_VOLA, CS4271_VOLB, 46667b22517SAlexander Sverdlin 7, 1, 1), 46767b22517SAlexander Sverdlin }; 46867b22517SAlexander Sverdlin 46985e7652dSLars-Peter Clausen static const struct snd_soc_dai_ops cs4271_dai_ops = { 47067b22517SAlexander Sverdlin .hw_params = cs4271_hw_params, 47167b22517SAlexander Sverdlin .set_sysclk = cs4271_set_dai_sysclk, 47267b22517SAlexander Sverdlin .set_fmt = cs4271_set_dai_fmt, 473c24a34dbSDaniel Mack .mute_stream = cs4271_mute_stream, 47467b22517SAlexander Sverdlin }; 47567b22517SAlexander Sverdlin 47616af7d60SMark Brown static struct snd_soc_dai_driver cs4271_dai = { 47767b22517SAlexander Sverdlin .name = "cs4271-hifi", 47867b22517SAlexander Sverdlin .playback = { 47967b22517SAlexander Sverdlin .stream_name = "Playback", 48067b22517SAlexander Sverdlin .channels_min = 2, 48167b22517SAlexander Sverdlin .channels_max = 2, 482383f8465SAlexander Sverdlin .rates = CS4271_PCM_RATES, 48367b22517SAlexander Sverdlin .formats = CS4271_PCM_FORMATS, 48467b22517SAlexander Sverdlin }, 48567b22517SAlexander Sverdlin .capture = { 48667b22517SAlexander Sverdlin .stream_name = "Capture", 48767b22517SAlexander Sverdlin .channels_min = 2, 48867b22517SAlexander Sverdlin .channels_max = 2, 489383f8465SAlexander Sverdlin .rates = CS4271_PCM_RATES, 49067b22517SAlexander Sverdlin .formats = CS4271_PCM_FORMATS, 49167b22517SAlexander Sverdlin }, 49267b22517SAlexander Sverdlin .ops = &cs4271_dai_ops, 49367b22517SAlexander Sverdlin .symmetric_rates = 1, 49467b22517SAlexander Sverdlin }; 49567b22517SAlexander Sverdlin 4969a397f47SPascal Huerst static int cs4271_reset(struct snd_soc_codec *codec) 4979a397f47SPascal Huerst { 4989a397f47SPascal Huerst struct cs4271_private *cs4271 = snd_soc_codec_get_drvdata(codec); 4999a397f47SPascal Huerst 5009a397f47SPascal Huerst if (gpio_is_valid(cs4271->gpio_nreset)) { 5019a397f47SPascal Huerst gpio_set_value(cs4271->gpio_nreset, 0); 5029a397f47SPascal Huerst mdelay(1); 5039a397f47SPascal Huerst gpio_set_value(cs4271->gpio_nreset, 1); 5049a397f47SPascal Huerst mdelay(1); 5059a397f47SPascal Huerst } 5069a397f47SPascal Huerst 5079a397f47SPascal Huerst return 0; 5089a397f47SPascal Huerst } 5099a397f47SPascal Huerst 51067b22517SAlexander Sverdlin #ifdef CONFIG_PM 51184b315eeSLars-Peter Clausen static int cs4271_soc_suspend(struct snd_soc_codec *codec) 51267b22517SAlexander Sverdlin { 5130d42e6e7SAlexander Sverdlin int ret; 5141b1861eaSDaniel Mack struct cs4271_private *cs4271 = snd_soc_codec_get_drvdata(codec); 5151b1861eaSDaniel Mack 51667b22517SAlexander Sverdlin /* Set power-down bit */ 5171b1861eaSDaniel Mack ret = regmap_update_bits(cs4271->regmap, CS4271_MODE2, 5181b1861eaSDaniel Mack CS4271_MODE2_PDN, CS4271_MODE2_PDN); 5190d42e6e7SAlexander Sverdlin if (ret < 0) 5200d42e6e7SAlexander Sverdlin return ret; 5211b1861eaSDaniel Mack 5229a397f47SPascal Huerst regcache_mark_dirty(cs4271->regmap); 5239a397f47SPascal Huerst regulator_bulk_disable(ARRAY_SIZE(cs4271->supplies), cs4271->supplies); 5249a397f47SPascal Huerst 52567b22517SAlexander Sverdlin return 0; 52667b22517SAlexander Sverdlin } 52767b22517SAlexander Sverdlin 52867b22517SAlexander Sverdlin static int cs4271_soc_resume(struct snd_soc_codec *codec) 52967b22517SAlexander Sverdlin { 5300d42e6e7SAlexander Sverdlin int ret; 5311b1861eaSDaniel Mack struct cs4271_private *cs4271 = snd_soc_codec_get_drvdata(codec); 5321b1861eaSDaniel Mack 5339a397f47SPascal Huerst ret = regulator_bulk_enable(ARRAY_SIZE(cs4271->supplies), 5349a397f47SPascal Huerst cs4271->supplies); 5359a397f47SPascal Huerst if (ret < 0) { 5369a397f47SPascal Huerst dev_err(codec->dev, "Failed to enable regulators: %d\n", ret); 5379a397f47SPascal Huerst return ret; 5389a397f47SPascal Huerst } 5399a397f47SPascal Huerst 5409a397f47SPascal Huerst /* Do a proper reset after power up */ 5419a397f47SPascal Huerst cs4271_reset(codec); 5429a397f47SPascal Huerst 54367b22517SAlexander Sverdlin /* Restore codec state */ 5441b1861eaSDaniel Mack ret = regcache_sync(cs4271->regmap); 5450d42e6e7SAlexander Sverdlin if (ret < 0) 5460d42e6e7SAlexander Sverdlin return ret; 5471b1861eaSDaniel Mack 54867b22517SAlexander Sverdlin /* then disable the power-down bit */ 5491b1861eaSDaniel Mack ret = regmap_update_bits(cs4271->regmap, CS4271_MODE2, 5501b1861eaSDaniel Mack CS4271_MODE2_PDN, 0); 5510d42e6e7SAlexander Sverdlin if (ret < 0) 5520d42e6e7SAlexander Sverdlin return ret; 5531b1861eaSDaniel Mack 55467b22517SAlexander Sverdlin return 0; 55567b22517SAlexander Sverdlin } 55667b22517SAlexander Sverdlin #else 55767b22517SAlexander Sverdlin #define cs4271_soc_suspend NULL 55867b22517SAlexander Sverdlin #define cs4271_soc_resume NULL 55967b22517SAlexander Sverdlin #endif /* CONFIG_PM */ 56067b22517SAlexander Sverdlin 561a31ebc34SDaniel Mack #ifdef CONFIG_OF 562c973b8a7SAxel Lin const struct of_device_id cs4271_dt_ids[] = { 563a31ebc34SDaniel Mack { .compatible = "cirrus,cs4271", }, 564a31ebc34SDaniel Mack { } 565a31ebc34SDaniel Mack }; 566a31ebc34SDaniel Mack MODULE_DEVICE_TABLE(of, cs4271_dt_ids); 567c973b8a7SAxel Lin EXPORT_SYMBOL_GPL(cs4271_dt_ids); 568a31ebc34SDaniel Mack #endif 569a31ebc34SDaniel Mack 570c973b8a7SAxel Lin static int cs4271_codec_probe(struct snd_soc_codec *codec) 57167b22517SAlexander Sverdlin { 57267b22517SAlexander Sverdlin struct cs4271_private *cs4271 = snd_soc_codec_get_drvdata(codec); 57367b22517SAlexander Sverdlin struct cs4271_platform_data *cs4271plat = codec->dev->platform_data; 57467b22517SAlexander Sverdlin int ret; 57526047e2dSDaniel Mack bool amutec_eq_bmutec = false; 57667b22517SAlexander Sverdlin 577a31ebc34SDaniel Mack #ifdef CONFIG_OF 578293750f9SDaniel Mack if (of_match_device(cs4271_dt_ids, codec->dev)) { 579b8455c9fSDaniel Mack if (of_get_property(codec->dev->of_node, 580293750f9SDaniel Mack "cirrus,amutec-eq-bmutec", NULL)) 58126047e2dSDaniel Mack amutec_eq_bmutec = true; 582fd23fb9fSDaniel Mack 583fd23fb9fSDaniel Mack if (of_get_property(codec->dev->of_node, 584fd23fb9fSDaniel Mack "cirrus,enable-soft-reset", NULL)) 585fd23fb9fSDaniel Mack cs4271->enable_soft_reset = true; 586293750f9SDaniel Mack } 587a31ebc34SDaniel Mack #endif 588a31ebc34SDaniel Mack 5899a397f47SPascal Huerst ret = regulator_bulk_enable(ARRAY_SIZE(cs4271->supplies), 5909a397f47SPascal Huerst cs4271->supplies); 5919a397f47SPascal Huerst if (ret < 0) { 5929a397f47SPascal Huerst dev_err(codec->dev, "Failed to enable regulators: %d\n", ret); 5939a397f47SPascal Huerst return ret; 5949a397f47SPascal Huerst } 5959a397f47SPascal Huerst 596293750f9SDaniel Mack if (cs4271plat) { 597293750f9SDaniel Mack amutec_eq_bmutec = cs4271plat->amutec_eq_bmutec; 598fd23fb9fSDaniel Mack cs4271->enable_soft_reset = cs4271plat->enable_soft_reset; 599293750f9SDaniel Mack } 600293750f9SDaniel Mack 60167b22517SAlexander Sverdlin /* Reset codec */ 6029a397f47SPascal Huerst cs4271_reset(codec); 6039a397f47SPascal Huerst 6049a397f47SPascal Huerst ret = regcache_sync(cs4271->regmap); 6059a397f47SPascal Huerst if (ret < 0) 6069a397f47SPascal Huerst return ret; 60767b22517SAlexander Sverdlin 6081b1861eaSDaniel Mack ret = regmap_update_bits(cs4271->regmap, CS4271_MODE2, 609ef0cd470SAxel Lin CS4271_MODE2_PDN | CS4271_MODE2_CPEN, 61067b22517SAlexander Sverdlin CS4271_MODE2_PDN | CS4271_MODE2_CPEN); 6110d42e6e7SAlexander Sverdlin if (ret < 0) 6120d42e6e7SAlexander Sverdlin return ret; 6131b1861eaSDaniel Mack ret = regmap_update_bits(cs4271->regmap, CS4271_MODE2, 6141b1861eaSDaniel Mack CS4271_MODE2_PDN, 0); 6150d42e6e7SAlexander Sverdlin if (ret < 0) 6160d42e6e7SAlexander Sverdlin return ret; 61767b22517SAlexander Sverdlin /* Power-up sequence requires 85 uS */ 61867b22517SAlexander Sverdlin udelay(85); 61967b22517SAlexander Sverdlin 620293750f9SDaniel Mack if (amutec_eq_bmutec) 6211b1861eaSDaniel Mack regmap_update_bits(cs4271->regmap, CS4271_MODE2, 622293750f9SDaniel Mack CS4271_MODE2_MUTECAEQUB, 623293750f9SDaniel Mack CS4271_MODE2_MUTECAEQUB); 624293750f9SDaniel Mack 625bad268f3SMark Brown return 0; 62667b22517SAlexander Sverdlin } 62767b22517SAlexander Sverdlin 628c973b8a7SAxel Lin static int cs4271_codec_remove(struct snd_soc_codec *codec) 62967b22517SAlexander Sverdlin { 63067b22517SAlexander Sverdlin struct cs4271_private *cs4271 = snd_soc_codec_get_drvdata(codec); 63167b22517SAlexander Sverdlin 6325574f774SDaniel Mack if (gpio_is_valid(cs4271->gpio_nreset)) 63367b22517SAlexander Sverdlin /* Set codec to the reset state */ 6345574f774SDaniel Mack gpio_set_value(cs4271->gpio_nreset, 0); 63567b22517SAlexander Sverdlin 6369a397f47SPascal Huerst regcache_mark_dirty(cs4271->regmap); 6379a397f47SPascal Huerst regulator_bulk_disable(ARRAY_SIZE(cs4271->supplies), cs4271->supplies); 6389a397f47SPascal Huerst 63967b22517SAlexander Sverdlin return 0; 64067b22517SAlexander Sverdlin }; 64167b22517SAlexander Sverdlin 64216af7d60SMark Brown static struct snd_soc_codec_driver soc_codec_dev_cs4271 = { 643c973b8a7SAxel Lin .probe = cs4271_codec_probe, 644c973b8a7SAxel Lin .remove = cs4271_codec_remove, 64567b22517SAlexander Sverdlin .suspend = cs4271_soc_suspend, 64667b22517SAlexander Sverdlin .resume = cs4271_soc_resume, 647bad268f3SMark Brown 648bad268f3SMark Brown .controls = cs4271_snd_controls, 649bad268f3SMark Brown .num_controls = ARRAY_SIZE(cs4271_snd_controls), 6502e7fb942SMark Brown .dapm_widgets = cs4271_dapm_widgets, 6512e7fb942SMark Brown .num_dapm_widgets = ARRAY_SIZE(cs4271_dapm_widgets), 6522e7fb942SMark Brown .dapm_routes = cs4271_dapm_routes, 6532e7fb942SMark Brown .num_dapm_routes = ARRAY_SIZE(cs4271_dapm_routes), 65467b22517SAlexander Sverdlin }; 65567b22517SAlexander Sverdlin 656d6cf89eeSDaniel Mack static int cs4271_common_probe(struct device *dev, 657d6cf89eeSDaniel Mack struct cs4271_private **c) 658d6cf89eeSDaniel Mack { 659d6cf89eeSDaniel Mack struct cs4271_platform_data *cs4271plat = dev->platform_data; 660d6cf89eeSDaniel Mack struct cs4271_private *cs4271; 6619a397f47SPascal Huerst int i, ret; 662d6cf89eeSDaniel Mack 663d6cf89eeSDaniel Mack cs4271 = devm_kzalloc(dev, sizeof(*cs4271), GFP_KERNEL); 664d6cf89eeSDaniel Mack if (!cs4271) 665d6cf89eeSDaniel Mack return -ENOMEM; 666d6cf89eeSDaniel Mack 667d6cf89eeSDaniel Mack if (of_match_device(cs4271_dt_ids, dev)) 668d6cf89eeSDaniel Mack cs4271->gpio_nreset = 669d6cf89eeSDaniel Mack of_get_named_gpio(dev->of_node, "reset-gpio", 0); 670d6cf89eeSDaniel Mack 671d6cf89eeSDaniel Mack if (cs4271plat) 672d6cf89eeSDaniel Mack cs4271->gpio_nreset = cs4271plat->gpio_nreset; 673d6cf89eeSDaniel Mack 674d6cf89eeSDaniel Mack if (gpio_is_valid(cs4271->gpio_nreset)) { 675d6cf89eeSDaniel Mack int ret; 676d6cf89eeSDaniel Mack 677d6cf89eeSDaniel Mack ret = devm_gpio_request(dev, cs4271->gpio_nreset, 678d6cf89eeSDaniel Mack "CS4271 Reset"); 679d6cf89eeSDaniel Mack if (ret < 0) 680d6cf89eeSDaniel Mack return ret; 681d6cf89eeSDaniel Mack } 682d6cf89eeSDaniel Mack 6839a397f47SPascal Huerst for (i = 0; i < ARRAY_SIZE(supply_names); i++) 6849a397f47SPascal Huerst cs4271->supplies[i].supply = supply_names[i]; 6859a397f47SPascal Huerst 6869a397f47SPascal Huerst ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(cs4271->supplies), 6879a397f47SPascal Huerst cs4271->supplies); 6889a397f47SPascal Huerst 6899a397f47SPascal Huerst if (ret < 0) { 6909a397f47SPascal Huerst dev_err(dev, "Failed to get regulators: %d\n", ret); 6919a397f47SPascal Huerst return ret; 6929a397f47SPascal Huerst } 6939a397f47SPascal Huerst 694d6cf89eeSDaniel Mack *c = cs4271; 695d6cf89eeSDaniel Mack return 0; 696d6cf89eeSDaniel Mack } 697d6cf89eeSDaniel Mack 698c973b8a7SAxel Lin const struct regmap_config cs4271_regmap_config = { 6991b1861eaSDaniel Mack .max_register = CS4271_LASTREG, 7001b1861eaSDaniel Mack 7011b1861eaSDaniel Mack .reg_defaults = cs4271_reg_defaults, 7021b1861eaSDaniel Mack .num_reg_defaults = ARRAY_SIZE(cs4271_reg_defaults), 7031b1861eaSDaniel Mack .cache_type = REGCACHE_RBTREE, 7041b1861eaSDaniel Mack 7051b1861eaSDaniel Mack .volatile_reg = cs4271_volatile_reg, 7061b1861eaSDaniel Mack }; 707c973b8a7SAxel Lin EXPORT_SYMBOL_GPL(cs4271_regmap_config); 7081b1861eaSDaniel Mack 709c973b8a7SAxel Lin int cs4271_probe(struct device *dev, struct regmap *regmap) 71067b22517SAlexander Sverdlin { 71167b22517SAlexander Sverdlin struct cs4271_private *cs4271; 712d6cf89eeSDaniel Mack int ret; 71367b22517SAlexander Sverdlin 714c973b8a7SAxel Lin if (IS_ERR(regmap)) 715c973b8a7SAxel Lin return PTR_ERR(regmap); 716c973b8a7SAxel Lin 717c973b8a7SAxel Lin ret = cs4271_common_probe(dev, &cs4271); 718d6cf89eeSDaniel Mack if (ret < 0) 719d6cf89eeSDaniel Mack return ret; 72067b22517SAlexander Sverdlin 721c973b8a7SAxel Lin dev_set_drvdata(dev, cs4271); 722c973b8a7SAxel Lin cs4271->regmap = regmap; 72367b22517SAlexander Sverdlin 724c973b8a7SAxel Lin return snd_soc_register_codec(dev, &soc_codec_dev_cs4271, &cs4271_dai, 725c973b8a7SAxel Lin 1); 72667b22517SAlexander Sverdlin } 727c973b8a7SAxel Lin EXPORT_SYMBOL_GPL(cs4271_probe); 72867b22517SAlexander Sverdlin 72967b22517SAlexander Sverdlin MODULE_AUTHOR("Alexander Sverdlin <subaparts@yandex.ru>"); 73067b22517SAlexander Sverdlin MODULE_DESCRIPTION("Cirrus Logic CS4271 ALSA SoC Codec Driver"); 73167b22517SAlexander Sverdlin MODULE_LICENSE("GPL"); 732