1 /* 2 * CS4270 ALSA SoC (ASoC) codec driver 3 * 4 * Author: Timur Tabi <timur@freescale.com> 5 * 6 * Copyright 2007-2009 Freescale Semiconductor, Inc. This file is licensed 7 * under the terms of the GNU General Public License version 2. This 8 * program is licensed "as is" without any warranty of any kind, whether 9 * express or implied. 10 * 11 * This is an ASoC device driver for the Cirrus Logic CS4270 codec. 12 * 13 * Current features/limitations: 14 * 15 * - Software mode is supported. Stand-alone mode is not supported. 16 * - Only I2C is supported, not SPI 17 * - Support for master and slave mode 18 * - The machine driver's 'startup' function must call 19 * cs4270_set_dai_sysclk() with the value of MCLK. 20 * - Only I2S and left-justified modes are supported 21 * - Power management is supported 22 */ 23 24 #include <linux/module.h> 25 #include <linux/slab.h> 26 #include <sound/core.h> 27 #include <sound/soc.h> 28 #include <sound/initval.h> 29 #include <linux/i2c.h> 30 #include <linux/delay.h> 31 #include <linux/regulator/consumer.h> 32 #include <linux/gpio/consumer.h> 33 #include <linux/of_device.h> 34 35 /* 36 * The codec isn't really big-endian or little-endian, since the I2S 37 * interface requires data to be sent serially with the MSbit first. 38 * However, to support BE and LE I2S devices, we specify both here. That 39 * way, ALSA will always match the bit patterns. 40 */ 41 #define CS4270_FORMATS (SNDRV_PCM_FMTBIT_S8 | \ 42 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE | \ 43 SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S18_3BE | \ 44 SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE | \ 45 SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE | \ 46 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE) 47 48 /* CS4270 registers addresses */ 49 #define CS4270_CHIPID 0x01 /* Chip ID */ 50 #define CS4270_PWRCTL 0x02 /* Power Control */ 51 #define CS4270_MODE 0x03 /* Mode Control */ 52 #define CS4270_FORMAT 0x04 /* Serial Format, ADC/DAC Control */ 53 #define CS4270_TRANS 0x05 /* Transition Control */ 54 #define CS4270_MUTE 0x06 /* Mute Control */ 55 #define CS4270_VOLA 0x07 /* DAC Channel A Volume Control */ 56 #define CS4270_VOLB 0x08 /* DAC Channel B Volume Control */ 57 58 #define CS4270_FIRSTREG 0x01 59 #define CS4270_LASTREG 0x08 60 #define CS4270_NUMREGS (CS4270_LASTREG - CS4270_FIRSTREG + 1) 61 #define CS4270_I2C_INCR 0x80 62 63 /* Bit masks for the CS4270 registers */ 64 #define CS4270_CHIPID_ID 0xF0 65 #define CS4270_CHIPID_REV 0x0F 66 #define CS4270_PWRCTL_FREEZE 0x80 67 #define CS4270_PWRCTL_PDN_ADC 0x20 68 #define CS4270_PWRCTL_PDN_DAC 0x02 69 #define CS4270_PWRCTL_PDN 0x01 70 #define CS4270_PWRCTL_PDN_ALL \ 71 (CS4270_PWRCTL_PDN_ADC | CS4270_PWRCTL_PDN_DAC | CS4270_PWRCTL_PDN) 72 #define CS4270_MODE_SPEED_MASK 0x30 73 #define CS4270_MODE_1X 0x00 74 #define CS4270_MODE_2X 0x10 75 #define CS4270_MODE_4X 0x20 76 #define CS4270_MODE_SLAVE 0x30 77 #define CS4270_MODE_DIV_MASK 0x0E 78 #define CS4270_MODE_DIV1 0x00 79 #define CS4270_MODE_DIV15 0x02 80 #define CS4270_MODE_DIV2 0x04 81 #define CS4270_MODE_DIV3 0x06 82 #define CS4270_MODE_DIV4 0x08 83 #define CS4270_MODE_POPGUARD 0x01 84 #define CS4270_FORMAT_FREEZE_A 0x80 85 #define CS4270_FORMAT_FREEZE_B 0x40 86 #define CS4270_FORMAT_LOOPBACK 0x20 87 #define CS4270_FORMAT_DAC_MASK 0x18 88 #define CS4270_FORMAT_DAC_LJ 0x00 89 #define CS4270_FORMAT_DAC_I2S 0x08 90 #define CS4270_FORMAT_DAC_RJ16 0x18 91 #define CS4270_FORMAT_DAC_RJ24 0x10 92 #define CS4270_FORMAT_ADC_MASK 0x01 93 #define CS4270_FORMAT_ADC_LJ 0x00 94 #define CS4270_FORMAT_ADC_I2S 0x01 95 #define CS4270_TRANS_ONE_VOL 0x80 96 #define CS4270_TRANS_SOFT 0x40 97 #define CS4270_TRANS_ZERO 0x20 98 #define CS4270_TRANS_INV_ADC_A 0x08 99 #define CS4270_TRANS_INV_ADC_B 0x10 100 #define CS4270_TRANS_INV_DAC_A 0x02 101 #define CS4270_TRANS_INV_DAC_B 0x04 102 #define CS4270_TRANS_DEEMPH 0x01 103 #define CS4270_MUTE_AUTO 0x20 104 #define CS4270_MUTE_ADC_A 0x08 105 #define CS4270_MUTE_ADC_B 0x10 106 #define CS4270_MUTE_POLARITY 0x04 107 #define CS4270_MUTE_DAC_A 0x01 108 #define CS4270_MUTE_DAC_B 0x02 109 110 /* Power-on default values for the registers 111 * 112 * This array contains the power-on default values of the registers, with the 113 * exception of the "CHIPID" register (01h). The lower four bits of that 114 * register contain the hardware revision, so it is treated as volatile. 115 */ 116 static const struct reg_default cs4270_reg_defaults[] = { 117 { 2, 0x00 }, 118 { 3, 0x30 }, 119 { 4, 0x00 }, 120 { 5, 0x60 }, 121 { 6, 0x20 }, 122 { 7, 0x00 }, 123 { 8, 0x00 }, 124 }; 125 126 static const char *supply_names[] = { 127 "va", "vd", "vlc" 128 }; 129 130 /* Private data for the CS4270 */ 131 struct cs4270_private { 132 struct regmap *regmap; 133 unsigned int mclk; /* Input frequency of the MCLK pin */ 134 unsigned int mode; /* The mode (I2S or left-justified) */ 135 unsigned int slave_mode; 136 unsigned int manual_mute; 137 138 /* power domain regulators */ 139 struct regulator_bulk_data supplies[ARRAY_SIZE(supply_names)]; 140 141 /* reset gpio */ 142 struct gpio_desc *reset_gpio; 143 }; 144 145 static const struct snd_soc_dapm_widget cs4270_dapm_widgets[] = { 146 SND_SOC_DAPM_INPUT("AINL"), 147 SND_SOC_DAPM_INPUT("AINR"), 148 149 SND_SOC_DAPM_OUTPUT("AOUTL"), 150 SND_SOC_DAPM_OUTPUT("AOUTR"), 151 }; 152 153 static const struct snd_soc_dapm_route cs4270_dapm_routes[] = { 154 { "Capture", NULL, "AINL" }, 155 { "Capture", NULL, "AINR" }, 156 157 { "AOUTL", NULL, "Playback" }, 158 { "AOUTR", NULL, "Playback" }, 159 }; 160 161 /** 162 * struct cs4270_mode_ratios - clock ratio tables 163 * @ratio: the ratio of MCLK to the sample rate 164 * @speed_mode: the Speed Mode bits to set in the Mode Control register for 165 * this ratio 166 * @mclk: the Ratio Select bits to set in the Mode Control register for this 167 * ratio 168 * 169 * The data for this chart is taken from Table 5 of the CS4270 reference 170 * manual. 171 * 172 * This table is used to determine how to program the Mode Control register. 173 * It is also used by cs4270_set_dai_sysclk() to tell ALSA which sampling 174 * rates the CS4270 currently supports. 175 * 176 * @speed_mode is the corresponding bit pattern to be written to the 177 * MODE bits of the Mode Control Register 178 * 179 * @mclk is the corresponding bit pattern to be wirten to the MCLK bits of 180 * the Mode Control Register. 181 * 182 * In situations where a single ratio is represented by multiple speed 183 * modes, we favor the slowest speed. E.g, for a ratio of 128, we pick 184 * double-speed instead of quad-speed. However, the CS4270 errata states 185 * that divide-By-1.5 can cause failures, so we avoid that mode where 186 * possible. 187 * 188 * Errata: There is an errata for the CS4270 where divide-by-1.5 does not 189 * work if Vd is 3.3V. If this effects you, select the 190 * CONFIG_SND_SOC_CS4270_VD33_ERRATA Kconfig option, and the driver will 191 * never select any sample rates that require divide-by-1.5. 192 */ 193 struct cs4270_mode_ratios { 194 unsigned int ratio; 195 u8 speed_mode; 196 u8 mclk; 197 }; 198 199 static struct cs4270_mode_ratios cs4270_mode_ratios[] = { 200 {64, CS4270_MODE_4X, CS4270_MODE_DIV1}, 201 #ifndef CONFIG_SND_SOC_CS4270_VD33_ERRATA 202 {96, CS4270_MODE_4X, CS4270_MODE_DIV15}, 203 #endif 204 {128, CS4270_MODE_2X, CS4270_MODE_DIV1}, 205 {192, CS4270_MODE_4X, CS4270_MODE_DIV3}, 206 {256, CS4270_MODE_1X, CS4270_MODE_DIV1}, 207 {384, CS4270_MODE_2X, CS4270_MODE_DIV3}, 208 {512, CS4270_MODE_1X, CS4270_MODE_DIV2}, 209 {768, CS4270_MODE_1X, CS4270_MODE_DIV3}, 210 {1024, CS4270_MODE_1X, CS4270_MODE_DIV4} 211 }; 212 213 /* The number of MCLK/LRCK ratios supported by the CS4270 */ 214 #define NUM_MCLK_RATIOS ARRAY_SIZE(cs4270_mode_ratios) 215 216 static bool cs4270_reg_is_readable(struct device *dev, unsigned int reg) 217 { 218 return (reg >= CS4270_FIRSTREG) && (reg <= CS4270_LASTREG); 219 } 220 221 static bool cs4270_reg_is_volatile(struct device *dev, unsigned int reg) 222 { 223 /* Unreadable registers are considered volatile */ 224 if ((reg < CS4270_FIRSTREG) || (reg > CS4270_LASTREG)) 225 return true; 226 227 return reg == CS4270_CHIPID; 228 } 229 230 /** 231 * cs4270_set_dai_sysclk - determine the CS4270 samples rates. 232 * @codec_dai: the codec DAI 233 * @clk_id: the clock ID (ignored) 234 * @freq: the MCLK input frequency 235 * @dir: the clock direction (ignored) 236 * 237 * This function is used to tell the codec driver what the input MCLK 238 * frequency is. 239 * 240 * The value of MCLK is used to determine which sample rates are supported 241 * by the CS4270. The ratio of MCLK / Fs must be equal to one of nine 242 * supported values - 64, 96, 128, 192, 256, 384, 512, 768, and 1024. 243 * 244 * This function calculates the nine ratios and determines which ones match 245 * a standard sample rate. If there's a match, then it is added to the list 246 * of supported sample rates. 247 * 248 * This function must be called by the machine driver's 'startup' function, 249 * otherwise the list of supported sample rates will not be available in 250 * time for ALSA. 251 * 252 * For setups with variable MCLKs, pass 0 as 'freq' argument. This will cause 253 * theoretically possible sample rates to be enabled. Call it again with a 254 * proper value set one the external clock is set (most probably you would do 255 * that from a machine's driver 'hw_param' hook. 256 */ 257 static int cs4270_set_dai_sysclk(struct snd_soc_dai *codec_dai, 258 int clk_id, unsigned int freq, int dir) 259 { 260 struct snd_soc_component *component = codec_dai->component; 261 struct cs4270_private *cs4270 = snd_soc_component_get_drvdata(component); 262 263 cs4270->mclk = freq; 264 return 0; 265 } 266 267 /** 268 * cs4270_set_dai_fmt - configure the codec for the selected audio format 269 * @codec_dai: the codec DAI 270 * @format: a SND_SOC_DAIFMT_x value indicating the data format 271 * 272 * This function takes a bitmask of SND_SOC_DAIFMT_x bits and programs the 273 * codec accordingly. 274 * 275 * Currently, this function only supports SND_SOC_DAIFMT_I2S and 276 * SND_SOC_DAIFMT_LEFT_J. The CS4270 codec also supports right-justified 277 * data for playback only, but ASoC currently does not support different 278 * formats for playback vs. record. 279 */ 280 static int cs4270_set_dai_fmt(struct snd_soc_dai *codec_dai, 281 unsigned int format) 282 { 283 struct snd_soc_component *component = codec_dai->component; 284 struct cs4270_private *cs4270 = snd_soc_component_get_drvdata(component); 285 286 /* set DAI format */ 287 switch (format & SND_SOC_DAIFMT_FORMAT_MASK) { 288 case SND_SOC_DAIFMT_I2S: 289 case SND_SOC_DAIFMT_LEFT_J: 290 cs4270->mode = format & SND_SOC_DAIFMT_FORMAT_MASK; 291 break; 292 default: 293 dev_err(component->dev, "invalid dai format\n"); 294 return -EINVAL; 295 } 296 297 /* set master/slave audio interface */ 298 switch (format & SND_SOC_DAIFMT_MASTER_MASK) { 299 case SND_SOC_DAIFMT_CBS_CFS: 300 cs4270->slave_mode = 1; 301 break; 302 case SND_SOC_DAIFMT_CBM_CFM: 303 cs4270->slave_mode = 0; 304 break; 305 default: 306 /* all other modes are unsupported by the hardware */ 307 dev_err(component->dev, "Unknown master/slave configuration\n"); 308 return -EINVAL; 309 } 310 311 return 0; 312 } 313 314 /** 315 * cs4270_hw_params - program the CS4270 with the given hardware parameters. 316 * @substream: the audio stream 317 * @params: the hardware parameters to set 318 * @dai: the SOC DAI (ignored) 319 * 320 * This function programs the hardware with the values provided. 321 * Specifically, the sample rate and the data format. 322 * 323 * The .ops functions are used to provide board-specific data, like input 324 * frequencies, to this driver. This function takes that information, 325 * combines it with the hardware parameters provided, and programs the 326 * hardware accordingly. 327 */ 328 static int cs4270_hw_params(struct snd_pcm_substream *substream, 329 struct snd_pcm_hw_params *params, 330 struct snd_soc_dai *dai) 331 { 332 struct snd_soc_component *component = dai->component; 333 struct cs4270_private *cs4270 = snd_soc_component_get_drvdata(component); 334 int ret; 335 unsigned int i; 336 unsigned int rate; 337 unsigned int ratio; 338 int reg; 339 340 /* Figure out which MCLK/LRCK ratio to use */ 341 342 rate = params_rate(params); /* Sampling rate, in Hz */ 343 ratio = cs4270->mclk / rate; /* MCLK/LRCK ratio */ 344 345 for (i = 0; i < NUM_MCLK_RATIOS; i++) { 346 if (cs4270_mode_ratios[i].ratio == ratio) 347 break; 348 } 349 350 if (i == NUM_MCLK_RATIOS) { 351 /* We did not find a matching ratio */ 352 dev_err(component->dev, "could not find matching ratio\n"); 353 return -EINVAL; 354 } 355 356 /* Set the sample rate */ 357 358 reg = snd_soc_component_read32(component, CS4270_MODE); 359 reg &= ~(CS4270_MODE_SPEED_MASK | CS4270_MODE_DIV_MASK); 360 reg |= cs4270_mode_ratios[i].mclk; 361 362 if (cs4270->slave_mode) 363 reg |= CS4270_MODE_SLAVE; 364 else 365 reg |= cs4270_mode_ratios[i].speed_mode; 366 367 ret = snd_soc_component_write(component, CS4270_MODE, reg); 368 if (ret < 0) { 369 dev_err(component->dev, "i2c write failed\n"); 370 return ret; 371 } 372 373 /* Set the DAI format */ 374 375 reg = snd_soc_component_read32(component, CS4270_FORMAT); 376 reg &= ~(CS4270_FORMAT_DAC_MASK | CS4270_FORMAT_ADC_MASK); 377 378 switch (cs4270->mode) { 379 case SND_SOC_DAIFMT_I2S: 380 reg |= CS4270_FORMAT_DAC_I2S | CS4270_FORMAT_ADC_I2S; 381 break; 382 case SND_SOC_DAIFMT_LEFT_J: 383 reg |= CS4270_FORMAT_DAC_LJ | CS4270_FORMAT_ADC_LJ; 384 break; 385 default: 386 dev_err(component->dev, "unknown dai format\n"); 387 return -EINVAL; 388 } 389 390 ret = snd_soc_component_write(component, CS4270_FORMAT, reg); 391 if (ret < 0) { 392 dev_err(component->dev, "i2c write failed\n"); 393 return ret; 394 } 395 396 return ret; 397 } 398 399 /** 400 * cs4270_dai_mute - enable/disable the CS4270 external mute 401 * @dai: the SOC DAI 402 * @mute: 0 = disable mute, 1 = enable mute 403 * 404 * This function toggles the mute bits in the MUTE register. The CS4270's 405 * mute capability is intended for external muting circuitry, so if the 406 * board does not have the MUTEA or MUTEB pins connected to such circuitry, 407 * then this function will do nothing. 408 */ 409 static int cs4270_dai_mute(struct snd_soc_dai *dai, int mute) 410 { 411 struct snd_soc_component *component = dai->component; 412 struct cs4270_private *cs4270 = snd_soc_component_get_drvdata(component); 413 int reg6; 414 415 reg6 = snd_soc_component_read32(component, CS4270_MUTE); 416 417 if (mute) 418 reg6 |= CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B; 419 else { 420 reg6 &= ~(CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B); 421 reg6 |= cs4270->manual_mute; 422 } 423 424 return snd_soc_component_write(component, CS4270_MUTE, reg6); 425 } 426 427 /** 428 * cs4270_soc_put_mute - put callback for the 'Master Playback switch' 429 * alsa control. 430 * @kcontrol: mixer control 431 * @ucontrol: control element information 432 * 433 * This function basically passes the arguments on to the generic 434 * snd_soc_put_volsw() function and saves the mute information in 435 * our private data structure. This is because we want to prevent 436 * cs4270_dai_mute() neglecting the user's decision to manually 437 * mute the codec's output. 438 * 439 * Returns 0 for success. 440 */ 441 static int cs4270_soc_put_mute(struct snd_kcontrol *kcontrol, 442 struct snd_ctl_elem_value *ucontrol) 443 { 444 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); 445 struct cs4270_private *cs4270 = snd_soc_component_get_drvdata(component); 446 int left = !ucontrol->value.integer.value[0]; 447 int right = !ucontrol->value.integer.value[1]; 448 449 cs4270->manual_mute = (left ? CS4270_MUTE_DAC_A : 0) | 450 (right ? CS4270_MUTE_DAC_B : 0); 451 452 return snd_soc_put_volsw(kcontrol, ucontrol); 453 } 454 455 /* A list of non-DAPM controls that the CS4270 supports */ 456 static const struct snd_kcontrol_new cs4270_snd_controls[] = { 457 SOC_DOUBLE_R("Master Playback Volume", 458 CS4270_VOLA, CS4270_VOLB, 0, 0xFF, 1), 459 SOC_SINGLE("Digital Sidetone Switch", CS4270_FORMAT, 5, 1, 0), 460 SOC_SINGLE("Soft Ramp Switch", CS4270_TRANS, 6, 1, 0), 461 SOC_SINGLE("Zero Cross Switch", CS4270_TRANS, 5, 1, 0), 462 SOC_SINGLE("De-emphasis filter", CS4270_TRANS, 0, 1, 0), 463 SOC_SINGLE("Popguard Switch", CS4270_MODE, 0, 1, 1), 464 SOC_SINGLE("Auto-Mute Switch", CS4270_MUTE, 5, 1, 0), 465 SOC_DOUBLE("Master Capture Switch", CS4270_MUTE, 3, 4, 1, 1), 466 SOC_DOUBLE_EXT("Master Playback Switch", CS4270_MUTE, 0, 1, 1, 1, 467 snd_soc_get_volsw, cs4270_soc_put_mute), 468 }; 469 470 static const struct snd_soc_dai_ops cs4270_dai_ops = { 471 .hw_params = cs4270_hw_params, 472 .set_sysclk = cs4270_set_dai_sysclk, 473 .set_fmt = cs4270_set_dai_fmt, 474 .digital_mute = cs4270_dai_mute, 475 }; 476 477 static struct snd_soc_dai_driver cs4270_dai = { 478 .name = "cs4270-hifi", 479 .playback = { 480 .stream_name = "Playback", 481 .channels_min = 2, 482 .channels_max = 2, 483 .rates = SNDRV_PCM_RATE_CONTINUOUS, 484 .rate_min = 4000, 485 .rate_max = 216000, 486 .formats = CS4270_FORMATS, 487 }, 488 .capture = { 489 .stream_name = "Capture", 490 .channels_min = 2, 491 .channels_max = 2, 492 .rates = SNDRV_PCM_RATE_CONTINUOUS, 493 .rate_min = 4000, 494 .rate_max = 216000, 495 .formats = CS4270_FORMATS, 496 }, 497 .ops = &cs4270_dai_ops, 498 }; 499 500 /** 501 * cs4270_probe - ASoC probe function 502 * @pdev: platform device 503 * 504 * This function is called when ASoC has all the pieces it needs to 505 * instantiate a sound driver. 506 */ 507 static int cs4270_probe(struct snd_soc_component *component) 508 { 509 struct cs4270_private *cs4270 = snd_soc_component_get_drvdata(component); 510 int ret; 511 512 /* Disable auto-mute. This feature appears to be buggy. In some 513 * situations, auto-mute will not deactivate when it should, so we want 514 * this feature disabled by default. An application (e.g. alsactl) can 515 * re-enabled it by using the controls. 516 */ 517 ret = snd_soc_component_update_bits(component, CS4270_MUTE, CS4270_MUTE_AUTO, 0); 518 if (ret < 0) { 519 dev_err(component->dev, "i2c write failed\n"); 520 return ret; 521 } 522 523 /* Disable automatic volume control. The hardware enables, and it 524 * causes volume change commands to be delayed, sometimes until after 525 * playback has started. An application (e.g. alsactl) can 526 * re-enabled it by using the controls. 527 */ 528 ret = snd_soc_component_update_bits(component, CS4270_TRANS, 529 CS4270_TRANS_SOFT | CS4270_TRANS_ZERO, 0); 530 if (ret < 0) { 531 dev_err(component->dev, "i2c write failed\n"); 532 return ret; 533 } 534 535 ret = regulator_bulk_enable(ARRAY_SIZE(cs4270->supplies), 536 cs4270->supplies); 537 538 return ret; 539 } 540 541 /** 542 * cs4270_remove - ASoC remove function 543 * @pdev: platform device 544 * 545 * This function is the counterpart to cs4270_probe(). 546 */ 547 static void cs4270_remove(struct snd_soc_component *component) 548 { 549 struct cs4270_private *cs4270 = snd_soc_component_get_drvdata(component); 550 551 regulator_bulk_disable(ARRAY_SIZE(cs4270->supplies), cs4270->supplies); 552 }; 553 554 #ifdef CONFIG_PM 555 556 /* This suspend/resume implementation can handle both - a simple standby 557 * where the codec remains powered, and a full suspend, where the voltage 558 * domain the codec is connected to is teared down and/or any other hardware 559 * reset condition is asserted. 560 * 561 * The codec's own power saving features are enabled in the suspend callback, 562 * and all registers are written back to the hardware when resuming. 563 */ 564 565 static int cs4270_soc_suspend(struct snd_soc_component *component) 566 { 567 struct cs4270_private *cs4270 = snd_soc_component_get_drvdata(component); 568 int reg, ret; 569 570 reg = snd_soc_component_read32(component, CS4270_PWRCTL) | CS4270_PWRCTL_PDN_ALL; 571 if (reg < 0) 572 return reg; 573 574 ret = snd_soc_component_write(component, CS4270_PWRCTL, reg); 575 if (ret < 0) 576 return ret; 577 578 regulator_bulk_disable(ARRAY_SIZE(cs4270->supplies), 579 cs4270->supplies); 580 581 return 0; 582 } 583 584 static int cs4270_soc_resume(struct snd_soc_component *component) 585 { 586 struct cs4270_private *cs4270 = snd_soc_component_get_drvdata(component); 587 int reg, ret; 588 589 ret = regulator_bulk_enable(ARRAY_SIZE(cs4270->supplies), 590 cs4270->supplies); 591 if (ret != 0) 592 return ret; 593 594 /* In case the device was put to hard reset during sleep, we need to 595 * wait 500ns here before any I2C communication. */ 596 ndelay(500); 597 598 /* first restore the entire register cache ... */ 599 regcache_sync(cs4270->regmap); 600 601 /* ... then disable the power-down bits */ 602 reg = snd_soc_component_read32(component, CS4270_PWRCTL); 603 reg &= ~CS4270_PWRCTL_PDN_ALL; 604 605 return snd_soc_component_write(component, CS4270_PWRCTL, reg); 606 } 607 #else 608 #define cs4270_soc_suspend NULL 609 #define cs4270_soc_resume NULL 610 #endif /* CONFIG_PM */ 611 612 /* 613 * ASoC codec driver structure 614 */ 615 static const struct snd_soc_component_driver soc_component_device_cs4270 = { 616 .probe = cs4270_probe, 617 .remove = cs4270_remove, 618 .suspend = cs4270_soc_suspend, 619 .resume = cs4270_soc_resume, 620 .controls = cs4270_snd_controls, 621 .num_controls = ARRAY_SIZE(cs4270_snd_controls), 622 .dapm_widgets = cs4270_dapm_widgets, 623 .num_dapm_widgets = ARRAY_SIZE(cs4270_dapm_widgets), 624 .dapm_routes = cs4270_dapm_routes, 625 .num_dapm_routes = ARRAY_SIZE(cs4270_dapm_routes), 626 .idle_bias_on = 1, 627 .use_pmdown_time = 1, 628 .endianness = 1, 629 .non_legacy_dai_naming = 1, 630 }; 631 632 /* 633 * cs4270_of_match - the device tree bindings 634 */ 635 static const struct of_device_id cs4270_of_match[] = { 636 { .compatible = "cirrus,cs4270", }, 637 { } 638 }; 639 MODULE_DEVICE_TABLE(of, cs4270_of_match); 640 641 static const struct regmap_config cs4270_regmap = { 642 .reg_bits = 8, 643 .val_bits = 8, 644 .max_register = CS4270_LASTREG, 645 .reg_defaults = cs4270_reg_defaults, 646 .num_reg_defaults = ARRAY_SIZE(cs4270_reg_defaults), 647 .cache_type = REGCACHE_RBTREE, 648 .write_flag_mask = CS4270_I2C_INCR, 649 650 .readable_reg = cs4270_reg_is_readable, 651 .volatile_reg = cs4270_reg_is_volatile, 652 }; 653 654 /** 655 * cs4270_i2c_remove - deinitialize the I2C interface of the CS4270 656 * @i2c_client: the I2C client object 657 * 658 * This function puts the chip into low power mode when the i2c device 659 * is removed. 660 */ 661 static int cs4270_i2c_remove(struct i2c_client *i2c_client) 662 { 663 struct cs4270_private *cs4270 = i2c_get_clientdata(i2c_client); 664 665 gpiod_set_value_cansleep(cs4270->reset_gpio, 0); 666 667 return 0; 668 } 669 670 /** 671 * cs4270_i2c_probe - initialize the I2C interface of the CS4270 672 * @i2c_client: the I2C client object 673 * @id: the I2C device ID (ignored) 674 * 675 * This function is called whenever the I2C subsystem finds a device that 676 * matches the device ID given via a prior call to i2c_add_driver(). 677 */ 678 static int cs4270_i2c_probe(struct i2c_client *i2c_client, 679 const struct i2c_device_id *id) 680 { 681 struct cs4270_private *cs4270; 682 unsigned int val; 683 int ret, i; 684 685 cs4270 = devm_kzalloc(&i2c_client->dev, sizeof(struct cs4270_private), 686 GFP_KERNEL); 687 if (!cs4270) 688 return -ENOMEM; 689 690 /* get the power supply regulators */ 691 for (i = 0; i < ARRAY_SIZE(supply_names); i++) 692 cs4270->supplies[i].supply = supply_names[i]; 693 694 ret = devm_regulator_bulk_get(&i2c_client->dev, 695 ARRAY_SIZE(cs4270->supplies), 696 cs4270->supplies); 697 if (ret < 0) 698 return ret; 699 700 /* reset the device */ 701 cs4270->reset_gpio = devm_gpiod_get_optional(&i2c_client->dev, "reset", 702 GPIOD_OUT_LOW); 703 if (IS_ERR(cs4270->reset_gpio)) { 704 dev_dbg(&i2c_client->dev, "Error getting CS4270 reset GPIO\n"); 705 return PTR_ERR(cs4270->reset_gpio); 706 } 707 708 if (cs4270->reset_gpio) { 709 dev_dbg(&i2c_client->dev, "Found reset GPIO\n"); 710 gpiod_set_value_cansleep(cs4270->reset_gpio, 1); 711 } 712 713 /* Sleep 500ns before i2c communications */ 714 ndelay(500); 715 716 cs4270->regmap = devm_regmap_init_i2c(i2c_client, &cs4270_regmap); 717 if (IS_ERR(cs4270->regmap)) 718 return PTR_ERR(cs4270->regmap); 719 720 /* Verify that we have a CS4270 */ 721 ret = regmap_read(cs4270->regmap, CS4270_CHIPID, &val); 722 if (ret < 0) { 723 dev_err(&i2c_client->dev, "failed to read i2c at addr %X\n", 724 i2c_client->addr); 725 return ret; 726 } 727 /* The top four bits of the chip ID should be 1100. */ 728 if ((val & 0xF0) != 0xC0) { 729 dev_err(&i2c_client->dev, "device at addr %X is not a CS4270\n", 730 i2c_client->addr); 731 return -ENODEV; 732 } 733 734 dev_info(&i2c_client->dev, "found device at i2c address %X\n", 735 i2c_client->addr); 736 dev_info(&i2c_client->dev, "hardware revision %X\n", val & 0xF); 737 738 i2c_set_clientdata(i2c_client, cs4270); 739 740 ret = devm_snd_soc_register_component(&i2c_client->dev, 741 &soc_component_device_cs4270, &cs4270_dai, 1); 742 return ret; 743 } 744 745 /* 746 * cs4270_id - I2C device IDs supported by this driver 747 */ 748 static const struct i2c_device_id cs4270_id[] = { 749 {"cs4270", 0}, 750 {} 751 }; 752 MODULE_DEVICE_TABLE(i2c, cs4270_id); 753 754 /* 755 * cs4270_i2c_driver - I2C device identification 756 * 757 * This structure tells the I2C subsystem how to identify and support a 758 * given I2C device type. 759 */ 760 static struct i2c_driver cs4270_i2c_driver = { 761 .driver = { 762 .name = "cs4270", 763 .of_match_table = cs4270_of_match, 764 }, 765 .id_table = cs4270_id, 766 .probe = cs4270_i2c_probe, 767 .remove = cs4270_i2c_remove, 768 }; 769 770 module_i2c_driver(cs4270_i2c_driver); 771 772 MODULE_AUTHOR("Timur Tabi <timur@freescale.com>"); 773 MODULE_DESCRIPTION("Cirrus Logic CS4270 ALSA SoC Codec Driver"); 774 MODULE_LICENSE("GPL"); 775