xref: /openbmc/linux/sound/soc/codecs/cs35l56.c (revision c4c3c32d)
1 // SPDX-License-Identifier: GPL-2.0-only
2 //
3 // Driver for Cirrus Logic CS35L56 smart amp
4 //
5 // Copyright (C) 2023 Cirrus Logic, Inc. and
6 //                    Cirrus Logic International Semiconductor Ltd.
7 
8 #include <linux/acpi.h>
9 #include <linux/completion.h>
10 #include <linux/debugfs.h>
11 #include <linux/delay.h>
12 #include <linux/err.h>
13 #include <linux/gpio/consumer.h>
14 #include <linux/interrupt.h>
15 #include <linux/math.h>
16 #include <linux/module.h>
17 #include <linux/pm.h>
18 #include <linux/pm_runtime.h>
19 #include <linux/regmap.h>
20 #include <linux/regulator/consumer.h>
21 #include <linux/slab.h>
22 #include <linux/soundwire/sdw.h>
23 #include <linux/types.h>
24 #include <linux/workqueue.h>
25 #include <sound/pcm.h>
26 #include <sound/pcm_params.h>
27 #include <sound/soc.h>
28 #include <sound/soc-dapm.h>
29 #include <sound/tlv.h>
30 
31 #include "wm_adsp.h"
32 #include "cs35l56.h"
33 
34 static int cs35l56_dsp_event(struct snd_soc_dapm_widget *w,
35 			     struct snd_kcontrol *kcontrol, int event);
36 
37 static void cs35l56_wait_dsp_ready(struct cs35l56_private *cs35l56)
38 {
39 	/* Wait for patching to complete */
40 	flush_work(&cs35l56->dsp_work);
41 }
42 
43 static int cs35l56_dspwait_get_volsw(struct snd_kcontrol *kcontrol,
44 				     struct snd_ctl_elem_value *ucontrol)
45 {
46 	struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
47 	struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);
48 
49 	cs35l56_wait_dsp_ready(cs35l56);
50 	return snd_soc_get_volsw(kcontrol, ucontrol);
51 }
52 
53 static int cs35l56_dspwait_put_volsw(struct snd_kcontrol *kcontrol,
54 				     struct snd_ctl_elem_value *ucontrol)
55 {
56 	struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
57 	struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);
58 
59 	cs35l56_wait_dsp_ready(cs35l56);
60 	return snd_soc_put_volsw(kcontrol, ucontrol);
61 }
62 
63 static DECLARE_TLV_DB_SCALE(vol_tlv, -10000, 25, 0);
64 
65 static const struct snd_kcontrol_new cs35l56_controls[] = {
66 	SOC_SINGLE_EXT("Speaker Switch",
67 		       CS35L56_MAIN_RENDER_USER_MUTE, 0, 1, 1,
68 		       cs35l56_dspwait_get_volsw, cs35l56_dspwait_put_volsw),
69 	SOC_SINGLE_S_EXT_TLV("Speaker Volume",
70 			     CS35L56_MAIN_RENDER_USER_VOLUME,
71 			     6, -400, 400, 9, 0,
72 			     cs35l56_dspwait_get_volsw,
73 			     cs35l56_dspwait_put_volsw,
74 			     vol_tlv),
75 	SOC_SINGLE_EXT("Posture Number", CS35L56_MAIN_POSTURE_NUMBER,
76 		       0, 255, 0,
77 		       cs35l56_dspwait_get_volsw, cs35l56_dspwait_put_volsw),
78 };
79 
80 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx1_enum,
81 				  CS35L56_ASP1TX1_INPUT,
82 				  0, CS35L56_ASP_TXn_SRC_MASK,
83 				  cs35l56_tx_input_texts,
84 				  cs35l56_tx_input_values);
85 
86 static const struct snd_kcontrol_new asp1_tx1_mux =
87 	SOC_DAPM_ENUM("ASP1TX1 SRC", cs35l56_asp1tx1_enum);
88 
89 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx2_enum,
90 				  CS35L56_ASP1TX2_INPUT,
91 				  0, CS35L56_ASP_TXn_SRC_MASK,
92 				  cs35l56_tx_input_texts,
93 				  cs35l56_tx_input_values);
94 
95 static const struct snd_kcontrol_new asp1_tx2_mux =
96 	SOC_DAPM_ENUM("ASP1TX2 SRC", cs35l56_asp1tx2_enum);
97 
98 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx3_enum,
99 				  CS35L56_ASP1TX3_INPUT,
100 				  0, CS35L56_ASP_TXn_SRC_MASK,
101 				  cs35l56_tx_input_texts,
102 				  cs35l56_tx_input_values);
103 
104 static const struct snd_kcontrol_new asp1_tx3_mux =
105 	SOC_DAPM_ENUM("ASP1TX3 SRC", cs35l56_asp1tx3_enum);
106 
107 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx4_enum,
108 				  CS35L56_ASP1TX4_INPUT,
109 				  0, CS35L56_ASP_TXn_SRC_MASK,
110 				  cs35l56_tx_input_texts,
111 				  cs35l56_tx_input_values);
112 
113 static const struct snd_kcontrol_new asp1_tx4_mux =
114 	SOC_DAPM_ENUM("ASP1TX4 SRC", cs35l56_asp1tx4_enum);
115 
116 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_sdw1tx1_enum,
117 				CS35L56_SWIRE_DP3_CH1_INPUT,
118 				0, CS35L56_SWIRETXn_SRC_MASK,
119 				cs35l56_tx_input_texts,
120 				cs35l56_tx_input_values);
121 
122 static const struct snd_kcontrol_new sdw1_tx1_mux =
123 	SOC_DAPM_ENUM("SDW1TX1 SRC", cs35l56_sdw1tx1_enum);
124 
125 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_sdw1tx2_enum,
126 				CS35L56_SWIRE_DP3_CH2_INPUT,
127 				0, CS35L56_SWIRETXn_SRC_MASK,
128 				cs35l56_tx_input_texts,
129 				cs35l56_tx_input_values);
130 
131 static const struct snd_kcontrol_new sdw1_tx2_mux =
132 	SOC_DAPM_ENUM("SDW1TX2 SRC", cs35l56_sdw1tx2_enum);
133 
134 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_sdw1tx3_enum,
135 				CS35L56_SWIRE_DP3_CH3_INPUT,
136 				0, CS35L56_SWIRETXn_SRC_MASK,
137 				cs35l56_tx_input_texts,
138 				cs35l56_tx_input_values);
139 
140 static const struct snd_kcontrol_new sdw1_tx3_mux =
141 	SOC_DAPM_ENUM("SDW1TX3 SRC", cs35l56_sdw1tx3_enum);
142 
143 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_sdw1tx4_enum,
144 				CS35L56_SWIRE_DP3_CH4_INPUT,
145 				0, CS35L56_SWIRETXn_SRC_MASK,
146 				cs35l56_tx_input_texts,
147 				cs35l56_tx_input_values);
148 
149 static const struct snd_kcontrol_new sdw1_tx4_mux =
150 	SOC_DAPM_ENUM("SDW1TX4 SRC", cs35l56_sdw1tx4_enum);
151 
152 static int cs35l56_play_event(struct snd_soc_dapm_widget *w,
153 			      struct snd_kcontrol *kcontrol, int event)
154 {
155 	struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
156 	struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);
157 	unsigned int val;
158 	int ret;
159 
160 	dev_dbg(cs35l56->base.dev, "play: %d\n", event);
161 
162 	switch (event) {
163 	case SND_SOC_DAPM_PRE_PMU:
164 		/* Don't wait for ACK, we check in POST_PMU that it completed */
165 		return regmap_write(cs35l56->base.regmap, CS35L56_DSP_VIRTUAL1_MBOX_1,
166 				    CS35L56_MBOX_CMD_AUDIO_PLAY);
167 	case SND_SOC_DAPM_POST_PMU:
168 		/* Wait for firmware to enter PS0 power state */
169 		ret = regmap_read_poll_timeout(cs35l56->base.regmap,
170 					       CS35L56_TRANSDUCER_ACTUAL_PS,
171 					       val, (val == CS35L56_PS0),
172 					       CS35L56_PS0_POLL_US,
173 					       CS35L56_PS0_TIMEOUT_US);
174 		if (ret)
175 			dev_err(cs35l56->base.dev, "PS0 wait failed: %d\n", ret);
176 		return ret;
177 	case SND_SOC_DAPM_POST_PMD:
178 		return cs35l56_mbox_send(&cs35l56->base, CS35L56_MBOX_CMD_AUDIO_PAUSE);
179 	default:
180 		return 0;
181 	}
182 }
183 
184 static const struct snd_soc_dapm_widget cs35l56_dapm_widgets[] = {
185 	SND_SOC_DAPM_REGULATOR_SUPPLY("VDD_B", 0, 0),
186 	SND_SOC_DAPM_REGULATOR_SUPPLY("VDD_AMP", 0, 0),
187 
188 	SND_SOC_DAPM_SUPPLY("PLAY", SND_SOC_NOPM, 0, 0, cs35l56_play_event,
189 			    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
190 
191 	SND_SOC_DAPM_OUT_DRV("AMP", SND_SOC_NOPM, 0, 0, NULL, 0),
192 	SND_SOC_DAPM_OUTPUT("SPK"),
193 
194 	SND_SOC_DAPM_PGA_E("DSP1", SND_SOC_NOPM, 0, 0, NULL, 0, cs35l56_dsp_event,
195 			   SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
196 
197 	SND_SOC_DAPM_AIF_IN("ASP1RX1", NULL, 0, CS35L56_ASP1_ENABLES1,
198 			    CS35L56_ASP_RX1_EN_SHIFT, 0),
199 	SND_SOC_DAPM_AIF_IN("ASP1RX2", NULL, 1, CS35L56_ASP1_ENABLES1,
200 			    CS35L56_ASP_RX2_EN_SHIFT, 0),
201 	SND_SOC_DAPM_AIF_OUT("ASP1TX1", NULL, 0, CS35L56_ASP1_ENABLES1,
202 			     CS35L56_ASP_TX1_EN_SHIFT, 0),
203 	SND_SOC_DAPM_AIF_OUT("ASP1TX2", NULL, 1, CS35L56_ASP1_ENABLES1,
204 			     CS35L56_ASP_TX2_EN_SHIFT, 0),
205 	SND_SOC_DAPM_AIF_OUT("ASP1TX3", NULL, 2, CS35L56_ASP1_ENABLES1,
206 			     CS35L56_ASP_TX3_EN_SHIFT, 0),
207 	SND_SOC_DAPM_AIF_OUT("ASP1TX4", NULL, 3, CS35L56_ASP1_ENABLES1,
208 			     CS35L56_ASP_TX4_EN_SHIFT, 0),
209 
210 	SND_SOC_DAPM_MUX("ASP1 TX1 Source", SND_SOC_NOPM, 0, 0, &asp1_tx1_mux),
211 	SND_SOC_DAPM_MUX("ASP1 TX2 Source", SND_SOC_NOPM, 0, 0, &asp1_tx2_mux),
212 	SND_SOC_DAPM_MUX("ASP1 TX3 Source", SND_SOC_NOPM, 0, 0, &asp1_tx3_mux),
213 	SND_SOC_DAPM_MUX("ASP1 TX4 Source", SND_SOC_NOPM, 0, 0, &asp1_tx4_mux),
214 
215 	SND_SOC_DAPM_MUX("SDW1 TX1 Source", SND_SOC_NOPM, 0, 0, &sdw1_tx1_mux),
216 	SND_SOC_DAPM_MUX("SDW1 TX2 Source", SND_SOC_NOPM, 0, 0, &sdw1_tx2_mux),
217 	SND_SOC_DAPM_MUX("SDW1 TX3 Source", SND_SOC_NOPM, 0, 0, &sdw1_tx3_mux),
218 	SND_SOC_DAPM_MUX("SDW1 TX4 Source", SND_SOC_NOPM, 0, 0, &sdw1_tx4_mux),
219 
220 	SND_SOC_DAPM_SIGGEN("VMON ADC"),
221 	SND_SOC_DAPM_SIGGEN("IMON ADC"),
222 	SND_SOC_DAPM_SIGGEN("ERRVOL ADC"),
223 	SND_SOC_DAPM_SIGGEN("CLASSH ADC"),
224 	SND_SOC_DAPM_SIGGEN("VDDBMON ADC"),
225 	SND_SOC_DAPM_SIGGEN("VBSTMON ADC"),
226 	SND_SOC_DAPM_SIGGEN("TEMPMON ADC"),
227 };
228 
229 #define CS35L56_SRC_ROUTE(name) \
230 	{ name" Source", "ASP1RX1", "ASP1RX1" }, \
231 	{ name" Source", "ASP1RX2", "ASP1RX2" }, \
232 	{ name" Source", "VMON", "VMON ADC" }, \
233 	{ name" Source", "IMON", "IMON ADC" }, \
234 	{ name" Source", "ERRVOL", "ERRVOL ADC" },   \
235 	{ name" Source", "CLASSH", "CLASSH ADC" },   \
236 	{ name" Source", "VDDBMON", "VDDBMON ADC" }, \
237 	{ name" Source", "VBSTMON", "VBSTMON ADC" }, \
238 	{ name" Source", "DSP1TX1", "DSP1" }, \
239 	{ name" Source", "DSP1TX2", "DSP1" }, \
240 	{ name" Source", "DSP1TX3", "DSP1" }, \
241 	{ name" Source", "DSP1TX4", "DSP1" }, \
242 	{ name" Source", "DSP1TX5", "DSP1" }, \
243 	{ name" Source", "DSP1TX6", "DSP1" }, \
244 	{ name" Source", "DSP1TX7", "DSP1" }, \
245 	{ name" Source", "DSP1TX8", "DSP1" }, \
246 	{ name" Source", "TEMPMON", "TEMPMON ADC" }, \
247 	{ name" Source", "INTERPOLATOR", "AMP" }, \
248 	{ name" Source", "SDW1RX1", "SDW1 Playback" }, \
249 	{ name" Source", "SDW1RX2", "SDW1 Playback" },
250 
251 static const struct snd_soc_dapm_route cs35l56_audio_map[] = {
252 	{ "AMP", NULL, "VDD_B" },
253 	{ "AMP", NULL, "VDD_AMP" },
254 
255 	{ "ASP1 Playback", NULL, "PLAY" },
256 	{ "SDW1 Playback", NULL, "PLAY" },
257 
258 	{ "ASP1RX1", NULL, "ASP1 Playback" },
259 	{ "ASP1RX2", NULL, "ASP1 Playback" },
260 	{ "DSP1", NULL, "ASP1RX1" },
261 	{ "DSP1", NULL, "ASP1RX2" },
262 	{ "DSP1", NULL, "SDW1 Playback" },
263 	{ "AMP", NULL, "DSP1" },
264 	{ "SPK", NULL, "AMP" },
265 
266 	CS35L56_SRC_ROUTE("ASP1 TX1")
267 	CS35L56_SRC_ROUTE("ASP1 TX2")
268 	CS35L56_SRC_ROUTE("ASP1 TX3")
269 	CS35L56_SRC_ROUTE("ASP1 TX4")
270 
271 	{ "ASP1TX1", NULL, "ASP1 TX1 Source" },
272 	{ "ASP1TX2", NULL, "ASP1 TX2 Source" },
273 	{ "ASP1TX3", NULL, "ASP1 TX3 Source" },
274 	{ "ASP1TX4", NULL, "ASP1 TX4 Source" },
275 	{ "ASP1 Capture", NULL, "ASP1TX1" },
276 	{ "ASP1 Capture", NULL, "ASP1TX2" },
277 	{ "ASP1 Capture", NULL, "ASP1TX3" },
278 	{ "ASP1 Capture", NULL, "ASP1TX4" },
279 
280 	CS35L56_SRC_ROUTE("SDW1 TX1")
281 	CS35L56_SRC_ROUTE("SDW1 TX2")
282 	CS35L56_SRC_ROUTE("SDW1 TX3")
283 	CS35L56_SRC_ROUTE("SDW1 TX4")
284 	{ "SDW1 Capture", NULL, "SDW1 TX1 Source" },
285 	{ "SDW1 Capture", NULL, "SDW1 TX2 Source" },
286 	{ "SDW1 Capture", NULL, "SDW1 TX3 Source" },
287 	{ "SDW1 Capture", NULL, "SDW1 TX4 Source" },
288 };
289 
290 static int cs35l56_dsp_event(struct snd_soc_dapm_widget *w,
291 			     struct snd_kcontrol *kcontrol, int event)
292 {
293 	struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
294 	struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);
295 
296 	dev_dbg(cs35l56->base.dev, "%s: %d\n", __func__, event);
297 
298 	return wm_adsp_event(w, kcontrol, event);
299 }
300 
301 static int cs35l56_asp_dai_set_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
302 {
303 	struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(codec_dai->component);
304 	unsigned int val;
305 
306 	dev_dbg(cs35l56->base.dev, "%s: %#x\n", __func__, fmt);
307 
308 	switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
309 	case SND_SOC_DAIFMT_CBC_CFC:
310 		break;
311 	default:
312 		dev_err(cs35l56->base.dev, "Unsupported clock source mode\n");
313 		return -EINVAL;
314 	}
315 
316 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
317 	case SND_SOC_DAIFMT_DSP_A:
318 		val = CS35L56_ASP_FMT_DSP_A << CS35L56_ASP_FMT_SHIFT;
319 		cs35l56->tdm_mode = true;
320 		break;
321 	case SND_SOC_DAIFMT_I2S:
322 		val = CS35L56_ASP_FMT_I2S << CS35L56_ASP_FMT_SHIFT;
323 		cs35l56->tdm_mode = false;
324 		break;
325 	default:
326 		dev_err(cs35l56->base.dev, "Unsupported DAI format\n");
327 		return -EINVAL;
328 	}
329 
330 	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
331 	case SND_SOC_DAIFMT_NB_IF:
332 		val |= CS35L56_ASP_FSYNC_INV_MASK;
333 		break;
334 	case SND_SOC_DAIFMT_IB_NF:
335 		val |= CS35L56_ASP_BCLK_INV_MASK;
336 		break;
337 	case SND_SOC_DAIFMT_IB_IF:
338 		val |= CS35L56_ASP_BCLK_INV_MASK | CS35L56_ASP_FSYNC_INV_MASK;
339 		break;
340 	case SND_SOC_DAIFMT_NB_NF:
341 		break;
342 	default:
343 		dev_err(cs35l56->base.dev, "Invalid clock invert\n");
344 		return -EINVAL;
345 	}
346 
347 	regmap_update_bits(cs35l56->base.regmap,
348 			   CS35L56_ASP1_CONTROL2,
349 			   CS35L56_ASP_FMT_MASK |
350 			   CS35L56_ASP_BCLK_INV_MASK | CS35L56_ASP_FSYNC_INV_MASK,
351 			   val);
352 
353 	/* Hi-Z DOUT in unused slots and when all TX are disabled */
354 	regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL3,
355 			   CS35L56_ASP1_DOUT_HIZ_CTRL_MASK,
356 			   CS35L56_ASP_UNUSED_HIZ_OFF_HIZ);
357 
358 	return 0;
359 }
360 
361 static unsigned int cs35l56_make_tdm_config_word(unsigned int reg_val, unsigned long mask)
362 {
363 	unsigned int channel_shift;
364 	int bit_num;
365 
366 	/* Enable consecutive TX1..TXn for each of the slots set in mask */
367 	channel_shift = 0;
368 	for_each_set_bit(bit_num, &mask, 32) {
369 		reg_val &= ~(0x3f << channel_shift);
370 		reg_val |= bit_num << channel_shift;
371 		channel_shift += 8;
372 	}
373 
374 	return reg_val;
375 }
376 
377 static int cs35l56_asp_dai_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
378 					unsigned int rx_mask, int slots, int slot_width)
379 {
380 	struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component);
381 
382 	if ((slots == 0) || (slot_width == 0)) {
383 		dev_dbg(cs35l56->base.dev, "tdm config cleared\n");
384 		cs35l56->asp_slot_width = 0;
385 		cs35l56->asp_slot_count = 0;
386 		return 0;
387 	}
388 
389 	if (slot_width > (CS35L56_ASP_RX_WIDTH_MASK >> CS35L56_ASP_RX_WIDTH_SHIFT)) {
390 		dev_err(cs35l56->base.dev, "tdm invalid slot width %d\n", slot_width);
391 		return -EINVAL;
392 	}
393 
394 	/* More than 32 slots would give an unsupportable BCLK frequency */
395 	if (slots > 32) {
396 		dev_err(cs35l56->base.dev, "tdm invalid slot count %d\n", slots);
397 		return -EINVAL;
398 	}
399 
400 	cs35l56->asp_slot_width = (u8)slot_width;
401 	cs35l56->asp_slot_count = (u8)slots;
402 
403 	// Note: rx/tx is from point of view of the CPU end
404 	if (tx_mask == 0)
405 		tx_mask = 0x3;	// ASPRX1/RX2 in slots 0 and 1
406 
407 	if (rx_mask == 0)
408 		rx_mask = 0xf;	// ASPTX1..TX4 in slots 0..3
409 
410 	/* Default unused slots to 63 */
411 	regmap_write(cs35l56->base.regmap, CS35L56_ASP1_FRAME_CONTROL1,
412 		     cs35l56_make_tdm_config_word(0x3f3f3f3f, rx_mask));
413 	regmap_write(cs35l56->base.regmap, CS35L56_ASP1_FRAME_CONTROL5,
414 		     cs35l56_make_tdm_config_word(0x3f3f3f, tx_mask));
415 
416 	dev_dbg(cs35l56->base.dev, "tdm slot width: %u count: %u tx_mask: %#x rx_mask: %#x\n",
417 		cs35l56->asp_slot_width, cs35l56->asp_slot_count, tx_mask, rx_mask);
418 
419 	return 0;
420 }
421 
422 static int cs35l56_asp_dai_hw_params(struct snd_pcm_substream *substream,
423 				     struct snd_pcm_hw_params *params,
424 				     struct snd_soc_dai *dai)
425 {
426 	struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component);
427 	unsigned int rate = params_rate(params);
428 	u8 asp_width, asp_wl;
429 
430 	asp_wl = params_width(params);
431 	if (cs35l56->asp_slot_width)
432 		asp_width = cs35l56->asp_slot_width;
433 	else
434 		asp_width = asp_wl;
435 
436 	dev_dbg(cs35l56->base.dev, "%s: wl=%d, width=%d, rate=%d",
437 		__func__, asp_wl, asp_width, rate);
438 
439 	if (!cs35l56->sysclk_set) {
440 		unsigned int slots = cs35l56->asp_slot_count;
441 		unsigned int bclk_freq;
442 		int freq_id;
443 
444 		if (slots == 0) {
445 			slots = params_channels(params);
446 
447 			/* I2S always has an even number of slots */
448 			if (!cs35l56->tdm_mode)
449 				slots = round_up(slots, 2);
450 		}
451 
452 		bclk_freq = asp_width * slots * rate;
453 		freq_id = cs35l56_get_bclk_freq_id(bclk_freq);
454 		if (freq_id < 0) {
455 			dev_err(cs35l56->base.dev, "%s: Invalid BCLK %u\n", __func__, bclk_freq);
456 			return -EINVAL;
457 		}
458 
459 		regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL1,
460 				   CS35L56_ASP_BCLK_FREQ_MASK,
461 				   freq_id << CS35L56_ASP_BCLK_FREQ_SHIFT);
462 	}
463 
464 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
465 		regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL2,
466 				   CS35L56_ASP_RX_WIDTH_MASK, asp_width <<
467 				   CS35L56_ASP_RX_WIDTH_SHIFT);
468 		regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_DATA_CONTROL5,
469 				   CS35L56_ASP_RX_WL_MASK, asp_wl);
470 	} else {
471 		regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL2,
472 				   CS35L56_ASP_TX_WIDTH_MASK, asp_width <<
473 				   CS35L56_ASP_TX_WIDTH_SHIFT);
474 		regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_DATA_CONTROL1,
475 				   CS35L56_ASP_TX_WL_MASK, asp_wl);
476 	}
477 
478 	return 0;
479 }
480 
481 static int cs35l56_asp_dai_set_sysclk(struct snd_soc_dai *dai,
482 				      int clk_id, unsigned int freq, int dir)
483 {
484 	struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component);
485 	int freq_id;
486 
487 	if (freq == 0) {
488 		cs35l56->sysclk_set = false;
489 		return 0;
490 	}
491 
492 	freq_id = cs35l56_get_bclk_freq_id(freq);
493 	if (freq_id < 0)
494 		return freq_id;
495 
496 	regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL1,
497 			   CS35L56_ASP_BCLK_FREQ_MASK,
498 			   freq_id << CS35L56_ASP_BCLK_FREQ_SHIFT);
499 	cs35l56->sysclk_set = true;
500 
501 	return 0;
502 }
503 
504 static const struct snd_soc_dai_ops cs35l56_ops = {
505 	.set_fmt = cs35l56_asp_dai_set_fmt,
506 	.set_tdm_slot = cs35l56_asp_dai_set_tdm_slot,
507 	.hw_params = cs35l56_asp_dai_hw_params,
508 	.set_sysclk = cs35l56_asp_dai_set_sysclk,
509 };
510 
511 static void cs35l56_sdw_dai_shutdown(struct snd_pcm_substream *substream,
512 				     struct snd_soc_dai *dai)
513 {
514 	snd_soc_dai_set_dma_data(dai, substream, NULL);
515 }
516 
517 static int cs35l56_sdw_dai_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
518 					unsigned int rx_mask, int slots, int slot_width)
519 {
520 	struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component);
521 
522 	/* rx/tx are from point of view of the CPU end so opposite to our rx/tx */
523 	cs35l56->rx_mask = tx_mask;
524 	cs35l56->tx_mask = rx_mask;
525 
526 	return 0;
527 }
528 
529 static int cs35l56_sdw_dai_hw_params(struct snd_pcm_substream *substream,
530 				     struct snd_pcm_hw_params *params,
531 				     struct snd_soc_dai *dai)
532 {
533 	struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component);
534 	struct sdw_stream_runtime *sdw_stream = snd_soc_dai_get_dma_data(dai, substream);
535 	struct sdw_stream_config sconfig;
536 	struct sdw_port_config pconfig;
537 	int ret;
538 
539 	dev_dbg(cs35l56->base.dev, "%s: rate %d\n", __func__, params_rate(params));
540 
541 	if (!cs35l56->base.init_done)
542 		return -ENODEV;
543 
544 	if (!sdw_stream)
545 		return -EINVAL;
546 
547 	memset(&sconfig, 0, sizeof(sconfig));
548 	memset(&pconfig, 0, sizeof(pconfig));
549 
550 	sconfig.frame_rate = params_rate(params);
551 	sconfig.bps = snd_pcm_format_width(params_format(params));
552 
553 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
554 		sconfig.direction = SDW_DATA_DIR_RX;
555 		pconfig.num = CS35L56_SDW1_PLAYBACK_PORT;
556 		pconfig.ch_mask = cs35l56->rx_mask;
557 	} else {
558 		sconfig.direction = SDW_DATA_DIR_TX;
559 		pconfig.num = CS35L56_SDW1_CAPTURE_PORT;
560 		pconfig.ch_mask = cs35l56->tx_mask;
561 	}
562 
563 	if (pconfig.ch_mask == 0) {
564 		sconfig.ch_count = params_channels(params);
565 		pconfig.ch_mask = GENMASK(sconfig.ch_count - 1, 0);
566 	} else {
567 		sconfig.ch_count = hweight32(pconfig.ch_mask);
568 	}
569 
570 	ret = sdw_stream_add_slave(cs35l56->sdw_peripheral, &sconfig, &pconfig,
571 				   1, sdw_stream);
572 	if (ret) {
573 		dev_err(dai->dev, "Failed to add sdw stream: %d\n", ret);
574 		return ret;
575 	}
576 
577 	return 0;
578 }
579 
580 static int cs35l56_sdw_dai_hw_free(struct snd_pcm_substream *substream,
581 				   struct snd_soc_dai *dai)
582 {
583 	struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component);
584 	struct sdw_stream_runtime *sdw_stream = snd_soc_dai_get_dma_data(dai, substream);
585 
586 	if (!cs35l56->sdw_peripheral)
587 		return -EINVAL;
588 
589 	sdw_stream_remove_slave(cs35l56->sdw_peripheral, sdw_stream);
590 
591 	return 0;
592 }
593 
594 static int cs35l56_sdw_dai_set_stream(struct snd_soc_dai *dai,
595 				      void *sdw_stream, int direction)
596 {
597 	snd_soc_dai_dma_data_set(dai, direction, sdw_stream);
598 
599 	return 0;
600 }
601 
602 static const struct snd_soc_dai_ops cs35l56_sdw_dai_ops = {
603 	.set_tdm_slot = cs35l56_sdw_dai_set_tdm_slot,
604 	.shutdown = cs35l56_sdw_dai_shutdown,
605 	.hw_params = cs35l56_sdw_dai_hw_params,
606 	.hw_free = cs35l56_sdw_dai_hw_free,
607 	.set_stream = cs35l56_sdw_dai_set_stream,
608 };
609 
610 static struct snd_soc_dai_driver cs35l56_dai[] = {
611 	{
612 		.name = "cs35l56-asp1",
613 		.id = 0,
614 		.playback = {
615 			.stream_name = "ASP1 Playback",
616 			.channels_min = 1,
617 			.channels_max = 2,
618 			.rates = CS35L56_RATES,
619 			.formats = CS35L56_RX_FORMATS,
620 		},
621 		.capture = {
622 			.stream_name = "ASP1 Capture",
623 			.channels_min = 1,
624 			.channels_max = 4,
625 			.rates = CS35L56_RATES,
626 			.formats = CS35L56_TX_FORMATS,
627 		},
628 		.ops = &cs35l56_ops,
629 		.symmetric_rate = 1,
630 		.symmetric_sample_bits = 1,
631 	},
632 	{
633 		.name = "cs35l56-sdw1",
634 		.id = 1,
635 		.playback = {
636 			.stream_name = "SDW1 Playback",
637 			.channels_min = 1,
638 			.channels_max = 2,
639 			.rates = CS35L56_RATES,
640 			.formats = CS35L56_RX_FORMATS,
641 		},
642 		.capture = {
643 			.stream_name = "SDW1 Capture",
644 			.channels_min = 1,
645 			.channels_max = 4,
646 			.rates = CS35L56_RATES,
647 			.formats = CS35L56_TX_FORMATS,
648 		},
649 		.symmetric_rate = 1,
650 		.ops = &cs35l56_sdw_dai_ops,
651 	}
652 };
653 
654 static void cs35l56_secure_patch(struct cs35l56_private *cs35l56)
655 {
656 	int ret;
657 
658 	/* Use wm_adsp to load and apply the firmware patch and coefficient files */
659 	ret = wm_adsp_power_up(&cs35l56->dsp, true);
660 	if (ret)
661 		dev_dbg(cs35l56->base.dev, "%s: wm_adsp_power_up ret %d\n", __func__, ret);
662 	else
663 		cs35l56_mbox_send(&cs35l56->base, CS35L56_MBOX_CMD_AUDIO_REINIT);
664 }
665 
666 static void cs35l56_patch(struct cs35l56_private *cs35l56)
667 {
668 	unsigned int firmware_missing;
669 	int ret;
670 
671 	ret = regmap_read(cs35l56->base.regmap, CS35L56_PROTECTION_STATUS, &firmware_missing);
672 	if (ret) {
673 		dev_err(cs35l56->base.dev, "Failed to read PROTECTION_STATUS: %d\n", ret);
674 		return;
675 	}
676 
677 	firmware_missing &= CS35L56_FIRMWARE_MISSING;
678 
679 	/*
680 	 * Disable SoundWire interrupts to prevent race with IRQ work.
681 	 * Setting sdw_irq_no_unmask prevents the handler re-enabling
682 	 * the SoundWire interrupt.
683 	 */
684 	if (cs35l56->sdw_peripheral) {
685 		cs35l56->sdw_irq_no_unmask = true;
686 		flush_work(&cs35l56->sdw_irq_work);
687 		sdw_write_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_MASK_1, 0);
688 		sdw_read_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_STAT_1);
689 		sdw_write_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_STAT_1, 0xFF);
690 		flush_work(&cs35l56->sdw_irq_work);
691 	}
692 
693 	ret = cs35l56_firmware_shutdown(&cs35l56->base);
694 	if (ret)
695 		goto err;
696 
697 	/*
698 	 * Use wm_adsp to load and apply the firmware patch and coefficient files,
699 	 * but only if firmware is missing. If firmware is already patched just
700 	 * power-up wm_adsp without downloading firmware.
701 	 */
702 	ret = wm_adsp_power_up(&cs35l56->dsp, !!firmware_missing);
703 	if (ret) {
704 		dev_dbg(cs35l56->base.dev, "%s: wm_adsp_power_up ret %d\n", __func__, ret);
705 		goto err;
706 	}
707 
708 	mutex_lock(&cs35l56->base.irq_lock);
709 
710 	init_completion(&cs35l56->init_completion);
711 
712 	cs35l56->soft_resetting = true;
713 	cs35l56_system_reset(&cs35l56->base, !!cs35l56->sdw_peripheral);
714 
715 	if (cs35l56->sdw_peripheral) {
716 		/*
717 		 * The system-reset causes the CS35L56 to detach from the bus.
718 		 * Wait for the manager to re-enumerate the CS35L56 and
719 		 * cs35l56_init() to run again.
720 		 */
721 		if (!wait_for_completion_timeout(&cs35l56->init_completion,
722 						 msecs_to_jiffies(5000))) {
723 			dev_err(cs35l56->base.dev, "%s: init_completion timed out (SDW)\n",
724 				__func__);
725 			goto err_unlock;
726 		}
727 	} else if (cs35l56_init(cs35l56)) {
728 		goto err_unlock;
729 	}
730 
731 	regmap_clear_bits(cs35l56->base.regmap, CS35L56_PROTECTION_STATUS,
732 			  CS35L56_FIRMWARE_MISSING);
733 	cs35l56->base.fw_patched = true;
734 
735 err_unlock:
736 	mutex_unlock(&cs35l56->base.irq_lock);
737 err:
738 	/* Re-enable SoundWire interrupts */
739 	if (cs35l56->sdw_peripheral) {
740 		cs35l56->sdw_irq_no_unmask = false;
741 		sdw_write_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_MASK_1,
742 				CS35L56_SDW_INT_MASK_CODEC_IRQ);
743 	}
744 }
745 
746 static void cs35l56_dsp_work(struct work_struct *work)
747 {
748 	struct cs35l56_private *cs35l56 = container_of(work,
749 						       struct cs35l56_private,
750 						       dsp_work);
751 
752 	if (!cs35l56->base.init_done)
753 		return;
754 
755 	pm_runtime_get_sync(cs35l56->base.dev);
756 
757 	/*
758 	 * When the device is running in secure mode the firmware files can
759 	 * only contain insecure tunings and therefore we do not need to
760 	 * shutdown the firmware to apply them and can use the lower cost
761 	 * reinit sequence instead.
762 	 */
763 	if (cs35l56->base.secured)
764 		cs35l56_secure_patch(cs35l56);
765 	else
766 		cs35l56_patch(cs35l56);
767 
768 	pm_runtime_mark_last_busy(cs35l56->base.dev);
769 	pm_runtime_put_autosuspend(cs35l56->base.dev);
770 }
771 
772 static int cs35l56_component_probe(struct snd_soc_component *component)
773 {
774 	struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);
775 	struct dentry *debugfs_root = component->debugfs_root;
776 
777 	BUILD_BUG_ON(ARRAY_SIZE(cs35l56_tx_input_texts) != ARRAY_SIZE(cs35l56_tx_input_values));
778 
779 	if (!wait_for_completion_timeout(&cs35l56->init_completion,
780 					 msecs_to_jiffies(5000))) {
781 		dev_err(cs35l56->base.dev, "%s: init_completion timed out\n", __func__);
782 		return -ENODEV;
783 	}
784 
785 	cs35l56->component = component;
786 	wm_adsp2_component_probe(&cs35l56->dsp, component);
787 
788 	debugfs_create_bool("init_done", 0444, debugfs_root, &cs35l56->base.init_done);
789 	debugfs_create_bool("can_hibernate", 0444, debugfs_root, &cs35l56->base.can_hibernate);
790 	debugfs_create_bool("fw_patched", 0444, debugfs_root, &cs35l56->base.fw_patched);
791 
792 	queue_work(cs35l56->dsp_wq, &cs35l56->dsp_work);
793 
794 	return 0;
795 }
796 
797 static void cs35l56_component_remove(struct snd_soc_component *component)
798 {
799 	struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);
800 
801 	cancel_work_sync(&cs35l56->dsp_work);
802 }
803 
804 static int cs35l56_set_bias_level(struct snd_soc_component *component,
805 				  enum snd_soc_bias_level level)
806 {
807 	struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);
808 
809 	switch (level) {
810 	case SND_SOC_BIAS_STANDBY:
811 		/*
812 		 * Wait for patching to complete when transitioning from
813 		 * BIAS_OFF to BIAS_STANDBY
814 		 */
815 		if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF)
816 			cs35l56_wait_dsp_ready(cs35l56);
817 
818 		break;
819 	default:
820 		break;
821 	}
822 
823 	return 0;
824 }
825 
826 static const struct snd_soc_component_driver soc_component_dev_cs35l56 = {
827 	.probe = cs35l56_component_probe,
828 	.remove = cs35l56_component_remove,
829 
830 	.dapm_widgets = cs35l56_dapm_widgets,
831 	.num_dapm_widgets = ARRAY_SIZE(cs35l56_dapm_widgets),
832 	.dapm_routes = cs35l56_audio_map,
833 	.num_dapm_routes = ARRAY_SIZE(cs35l56_audio_map),
834 	.controls = cs35l56_controls,
835 	.num_controls = ARRAY_SIZE(cs35l56_controls),
836 
837 	.set_bias_level = cs35l56_set_bias_level,
838 
839 	.suspend_bias_off = 1, /* see cs35l56_system_resume() */
840 };
841 
842 static int __maybe_unused cs35l56_runtime_suspend_i2c_spi(struct device *dev)
843 {
844 	struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
845 
846 	return cs35l56_runtime_suspend_common(&cs35l56->base);
847 }
848 
849 static int __maybe_unused cs35l56_runtime_resume_i2c_spi(struct device *dev)
850 {
851 	struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
852 
853 	return cs35l56_runtime_resume_common(&cs35l56->base, false);
854 }
855 
856 int cs35l56_system_suspend(struct device *dev)
857 {
858 	struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
859 
860 	dev_dbg(dev, "system_suspend\n");
861 
862 	if (cs35l56->component)
863 		flush_work(&cs35l56->dsp_work);
864 
865 	/*
866 	 * The interrupt line is normally shared, but after we start suspending
867 	 * we can't check if our device is the source of an interrupt, and can't
868 	 * clear it. Prevent this race by temporarily disabling the parent irq
869 	 * until we reach _no_irq.
870 	 */
871 	if (cs35l56->base.irq)
872 		disable_irq(cs35l56->base.irq);
873 
874 	return pm_runtime_force_suspend(dev);
875 }
876 EXPORT_SYMBOL_GPL(cs35l56_system_suspend);
877 
878 int cs35l56_system_suspend_late(struct device *dev)
879 {
880 	struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
881 
882 	dev_dbg(dev, "system_suspend_late\n");
883 
884 	/*
885 	 * Assert RESET before removing supplies.
886 	 * RESET is usually shared by all amps so it must not be asserted until
887 	 * all driver instances have done their suspend() stage.
888 	 */
889 	if (cs35l56->base.reset_gpio) {
890 		gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0);
891 		cs35l56_wait_min_reset_pulse();
892 	}
893 
894 	regulator_bulk_disable(ARRAY_SIZE(cs35l56->supplies), cs35l56->supplies);
895 
896 	return 0;
897 }
898 EXPORT_SYMBOL_GPL(cs35l56_system_suspend_late);
899 
900 int cs35l56_system_suspend_no_irq(struct device *dev)
901 {
902 	struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
903 
904 	dev_dbg(dev, "system_suspend_no_irq\n");
905 
906 	/* Handlers are now disabled so the parent IRQ can safely be re-enabled. */
907 	if (cs35l56->base.irq)
908 		enable_irq(cs35l56->base.irq);
909 
910 	return 0;
911 }
912 EXPORT_SYMBOL_GPL(cs35l56_system_suspend_no_irq);
913 
914 int cs35l56_system_resume_no_irq(struct device *dev)
915 {
916 	struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
917 
918 	dev_dbg(dev, "system_resume_no_irq\n");
919 
920 	/*
921 	 * WAKE interrupts unmask if the CS35L56 hibernates, which can cause
922 	 * spurious interrupts, and the interrupt line is normally shared.
923 	 * We can't check if our device is the source of an interrupt, and can't
924 	 * clear it, until it has fully resumed. Prevent this race by temporarily
925 	 * disabling the parent irq until we complete resume().
926 	 */
927 	if (cs35l56->base.irq)
928 		disable_irq(cs35l56->base.irq);
929 
930 	return 0;
931 }
932 EXPORT_SYMBOL_GPL(cs35l56_system_resume_no_irq);
933 
934 int cs35l56_system_resume_early(struct device *dev)
935 {
936 	struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
937 	int ret;
938 
939 	dev_dbg(dev, "system_resume_early\n");
940 
941 	/* Ensure a spec-compliant RESET pulse. */
942 	if (cs35l56->base.reset_gpio) {
943 		gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0);
944 		cs35l56_wait_min_reset_pulse();
945 	}
946 
947 	/* Enable supplies before releasing RESET. */
948 	ret = regulator_bulk_enable(ARRAY_SIZE(cs35l56->supplies), cs35l56->supplies);
949 	if (ret) {
950 		dev_err(dev, "system_resume_early failed to enable supplies: %d\n", ret);
951 		return ret;
952 	}
953 
954 	/* Release shared RESET before drivers start resume(). */
955 	gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 1);
956 
957 	return 0;
958 }
959 EXPORT_SYMBOL_GPL(cs35l56_system_resume_early);
960 
961 int cs35l56_system_resume(struct device *dev)
962 {
963 	struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
964 	int ret;
965 
966 	dev_dbg(dev, "system_resume\n");
967 
968 	/*
969 	 * We might have done a hard reset or the CS35L56 was power-cycled
970 	 * so wait for control port to be ready.
971 	 */
972 	cs35l56_wait_control_port_ready();
973 
974 	/* Undo pm_runtime_force_suspend() before re-enabling the irq */
975 	ret = pm_runtime_force_resume(dev);
976 	if (cs35l56->base.irq)
977 		enable_irq(cs35l56->base.irq);
978 
979 	if (ret)
980 		return ret;
981 
982 	/* Firmware won't have been loaded if the component hasn't probed */
983 	if (!cs35l56->component)
984 		return 0;
985 
986 	ret = cs35l56_is_fw_reload_needed(&cs35l56->base);
987 	dev_dbg(cs35l56->base.dev, "fw_reload_needed: %d\n", ret);
988 	if (ret < 1)
989 		return ret;
990 
991 	cs35l56->base.fw_patched = false;
992 	wm_adsp_power_down(&cs35l56->dsp);
993 	queue_work(cs35l56->dsp_wq, &cs35l56->dsp_work);
994 
995 	/*
996 	 * suspend_bias_off ensures we are now in BIAS_OFF so there will be
997 	 * a BIAS_OFF->BIAS_STANDBY transition to complete dsp patching.
998 	 */
999 
1000 	return 0;
1001 }
1002 EXPORT_SYMBOL_GPL(cs35l56_system_resume);
1003 
1004 static int cs35l56_dsp_init(struct cs35l56_private *cs35l56)
1005 {
1006 	struct wm_adsp *dsp;
1007 	int ret;
1008 
1009 	cs35l56->dsp_wq = create_singlethread_workqueue("cs35l56-dsp");
1010 	if (!cs35l56->dsp_wq)
1011 		return -ENOMEM;
1012 
1013 	INIT_WORK(&cs35l56->dsp_work, cs35l56_dsp_work);
1014 
1015 	dsp = &cs35l56->dsp;
1016 	cs35l56_init_cs_dsp(&cs35l56->base, &dsp->cs_dsp);
1017 	dsp->part = "cs35l56";
1018 	dsp->fw = 12;
1019 	dsp->wmfw_optional = true;
1020 
1021 	dev_dbg(cs35l56->base.dev, "DSP system name: '%s'\n", dsp->system_name);
1022 
1023 	ret = wm_halo_init(dsp);
1024 	if (ret != 0) {
1025 		dev_err(cs35l56->base.dev, "wm_halo_init failed\n");
1026 		return ret;
1027 	}
1028 
1029 	return 0;
1030 }
1031 
1032 static int cs35l56_acpi_get_name(struct cs35l56_private *cs35l56)
1033 {
1034 	acpi_handle handle = ACPI_HANDLE(cs35l56->base.dev);
1035 	const char *sub;
1036 
1037 	/* If there is no ACPI_HANDLE, there is no ACPI for this system, return 0 */
1038 	if (!handle)
1039 		return 0;
1040 
1041 	sub = acpi_get_subsystem_id(handle);
1042 	if (IS_ERR(sub)) {
1043 		/* If bad ACPI, return 0 and fallback to legacy firmware path, otherwise fail */
1044 		if (PTR_ERR(sub) == -ENODATA)
1045 			return 0;
1046 		else
1047 			return PTR_ERR(sub);
1048 	}
1049 
1050 	cs35l56->dsp.system_name = sub;
1051 	dev_dbg(cs35l56->base.dev, "Subsystem ID: %s\n", cs35l56->dsp.system_name);
1052 
1053 	return 0;
1054 }
1055 
1056 int cs35l56_common_probe(struct cs35l56_private *cs35l56)
1057 {
1058 	int ret;
1059 
1060 	init_completion(&cs35l56->init_completion);
1061 	mutex_init(&cs35l56->base.irq_lock);
1062 
1063 	dev_set_drvdata(cs35l56->base.dev, cs35l56);
1064 
1065 	cs35l56_fill_supply_names(cs35l56->supplies);
1066 	ret = devm_regulator_bulk_get(cs35l56->base.dev, ARRAY_SIZE(cs35l56->supplies),
1067 				      cs35l56->supplies);
1068 	if (ret != 0)
1069 		return dev_err_probe(cs35l56->base.dev, ret, "Failed to request supplies\n");
1070 
1071 	/* Reset could be controlled by the BIOS or shared by multiple amps */
1072 	cs35l56->base.reset_gpio = devm_gpiod_get_optional(cs35l56->base.dev, "reset",
1073 							   GPIOD_OUT_LOW);
1074 	if (IS_ERR(cs35l56->base.reset_gpio)) {
1075 		ret = PTR_ERR(cs35l56->base.reset_gpio);
1076 		/*
1077 		 * If RESET is shared the first amp to probe will grab the reset
1078 		 * line and reset all the amps
1079 		 */
1080 		if (ret != -EBUSY)
1081 			return dev_err_probe(cs35l56->base.dev, ret, "Failed to get reset GPIO\n");
1082 
1083 		dev_info(cs35l56->base.dev, "Reset GPIO busy, assume shared reset\n");
1084 		cs35l56->base.reset_gpio = NULL;
1085 	}
1086 
1087 	ret = regulator_bulk_enable(ARRAY_SIZE(cs35l56->supplies), cs35l56->supplies);
1088 	if (ret != 0)
1089 		return dev_err_probe(cs35l56->base.dev, ret, "Failed to enable supplies\n");
1090 
1091 	if (cs35l56->base.reset_gpio) {
1092 		/* ACPI can override GPIOD_OUT_LOW flag so force it to start low */
1093 		gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0);
1094 		cs35l56_wait_min_reset_pulse();
1095 		gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 1);
1096 	}
1097 
1098 	ret = cs35l56_acpi_get_name(cs35l56);
1099 	if (ret != 0)
1100 		goto err;
1101 
1102 	ret = cs35l56_dsp_init(cs35l56);
1103 	if (ret < 0) {
1104 		dev_err_probe(cs35l56->base.dev, ret, "DSP init failed\n");
1105 		goto err;
1106 	}
1107 
1108 	ret = devm_snd_soc_register_component(cs35l56->base.dev,
1109 					      &soc_component_dev_cs35l56,
1110 					      cs35l56_dai, ARRAY_SIZE(cs35l56_dai));
1111 	if (ret < 0) {
1112 		dev_err_probe(cs35l56->base.dev, ret, "Register codec failed\n");
1113 		goto err;
1114 	}
1115 
1116 	return 0;
1117 
1118 err:
1119 	gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0);
1120 	regulator_bulk_disable(ARRAY_SIZE(cs35l56->supplies), cs35l56->supplies);
1121 
1122 	return ret;
1123 }
1124 EXPORT_SYMBOL_NS_GPL(cs35l56_common_probe, SND_SOC_CS35L56_CORE);
1125 
1126 int cs35l56_init(struct cs35l56_private *cs35l56)
1127 {
1128 	int ret;
1129 
1130 	/*
1131 	 * Check whether the actions associated with soft reset or one time
1132 	 * init need to be performed.
1133 	 */
1134 	if (cs35l56->soft_resetting)
1135 		goto post_soft_reset;
1136 
1137 	if (cs35l56->base.init_done)
1138 		return 0;
1139 
1140 	pm_runtime_set_autosuspend_delay(cs35l56->base.dev, 100);
1141 	pm_runtime_use_autosuspend(cs35l56->base.dev);
1142 	pm_runtime_set_active(cs35l56->base.dev);
1143 	pm_runtime_enable(cs35l56->base.dev);
1144 
1145 	ret = cs35l56_hw_init(&cs35l56->base);
1146 	if (ret < 0)
1147 		return ret;
1148 
1149 	/* Populate the DSP information with the revision and security state */
1150 	cs35l56->dsp.part = devm_kasprintf(cs35l56->base.dev, GFP_KERNEL, "cs35l56%s-%02x",
1151 					   cs35l56->base.secured ? "s" : "", cs35l56->base.rev);
1152 	if (!cs35l56->dsp.part)
1153 		return -ENOMEM;
1154 
1155 	if (!cs35l56->base.reset_gpio) {
1156 		dev_dbg(cs35l56->base.dev, "No reset gpio: using soft reset\n");
1157 		cs35l56->soft_resetting = true;
1158 		cs35l56_system_reset(&cs35l56->base, !!cs35l56->sdw_peripheral);
1159 		if (cs35l56->sdw_peripheral) {
1160 			/* Keep alive while we wait for re-enumeration */
1161 			pm_runtime_get_noresume(cs35l56->base.dev);
1162 			return 0;
1163 		}
1164 	}
1165 
1166 post_soft_reset:
1167 	if (cs35l56->soft_resetting) {
1168 		cs35l56->soft_resetting = false;
1169 
1170 		/* Done re-enumerating after one-time init so release the keep-alive */
1171 		if (cs35l56->sdw_peripheral && !cs35l56->base.init_done)
1172 			pm_runtime_put_noidle(cs35l56->base.dev);
1173 
1174 		regcache_mark_dirty(cs35l56->base.regmap);
1175 		ret = cs35l56_wait_for_firmware_boot(&cs35l56->base);
1176 		if (ret)
1177 			return ret;
1178 
1179 		dev_dbg(cs35l56->base.dev, "Firmware rebooted after soft reset\n");
1180 	}
1181 
1182 	/* Disable auto-hibernate so that runtime_pm has control */
1183 	ret = cs35l56_mbox_send(&cs35l56->base, CS35L56_MBOX_CMD_PREVENT_AUTO_HIBERNATE);
1184 	if (ret)
1185 		return ret;
1186 
1187 	ret = cs35l56_set_patch(&cs35l56->base);
1188 	if (ret)
1189 		return ret;
1190 
1191 	/* Registers could be dirty after soft reset or SoundWire enumeration */
1192 	regcache_sync(cs35l56->base.regmap);
1193 
1194 	cs35l56->base.init_done = true;
1195 	complete(&cs35l56->init_completion);
1196 
1197 	return 0;
1198 }
1199 EXPORT_SYMBOL_NS_GPL(cs35l56_init, SND_SOC_CS35L56_CORE);
1200 
1201 void cs35l56_remove(struct cs35l56_private *cs35l56)
1202 {
1203 	cs35l56->base.init_done = false;
1204 
1205 	/*
1206 	 * WAKE IRQs unmask if CS35L56 hibernates so free the handler to
1207 	 * prevent it racing with remove().
1208 	 */
1209 	if (cs35l56->base.irq)
1210 		devm_free_irq(cs35l56->base.dev, cs35l56->base.irq, &cs35l56->base);
1211 
1212 	flush_workqueue(cs35l56->dsp_wq);
1213 	destroy_workqueue(cs35l56->dsp_wq);
1214 
1215 	pm_runtime_suspend(cs35l56->base.dev);
1216 	pm_runtime_disable(cs35l56->base.dev);
1217 
1218 	regcache_cache_only(cs35l56->base.regmap, true);
1219 
1220 	kfree(cs35l56->dsp.system_name);
1221 
1222 	gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0);
1223 	regulator_bulk_disable(ARRAY_SIZE(cs35l56->supplies), cs35l56->supplies);
1224 }
1225 EXPORT_SYMBOL_NS_GPL(cs35l56_remove, SND_SOC_CS35L56_CORE);
1226 
1227 const struct dev_pm_ops cs35l56_pm_ops_i2c_spi = {
1228 	SET_RUNTIME_PM_OPS(cs35l56_runtime_suspend_i2c_spi, cs35l56_runtime_resume_i2c_spi, NULL)
1229 	SYSTEM_SLEEP_PM_OPS(cs35l56_system_suspend, cs35l56_system_resume)
1230 	LATE_SYSTEM_SLEEP_PM_OPS(cs35l56_system_suspend_late, cs35l56_system_resume_early)
1231 	NOIRQ_SYSTEM_SLEEP_PM_OPS(cs35l56_system_suspend_no_irq, cs35l56_system_resume_no_irq)
1232 };
1233 EXPORT_SYMBOL_NS_GPL(cs35l56_pm_ops_i2c_spi, SND_SOC_CS35L56_CORE);
1234 
1235 MODULE_DESCRIPTION("ASoC CS35L56 driver");
1236 MODULE_IMPORT_NS(SND_SOC_CS35L56_SHARED);
1237 MODULE_AUTHOR("Richard Fitzgerald <rf@opensource.cirrus.com>");
1238 MODULE_AUTHOR("Simon Trimmer <simont@opensource.cirrus.com>");
1239 MODULE_LICENSE("GPL");
1240