xref: /openbmc/linux/sound/soc/codecs/cs35l56-sdw.c (revision 81ec384b)
1 // SPDX-License-Identifier: GPL-2.0-only
2 //
3 // CS35L56 ALSA SoC audio driver SoundWire binding
4 //
5 // Copyright (C) 2023 Cirrus Logic, Inc. and
6 //                    Cirrus Logic International Semiconductor Ltd.
7 
8 #include <linux/delay.h>
9 #include <linux/device.h>
10 #include <linux/err.h>
11 #include <linux/module.h>
12 #include <linux/pm_runtime.h>
13 #include <linux/regmap.h>
14 #include <linux/soundwire/sdw.h>
15 #include <linux/soundwire/sdw_registers.h>
16 #include <linux/soundwire/sdw_type.h>
17 #include <linux/swab.h>
18 #include <linux/types.h>
19 #include <linux/workqueue.h>
20 
21 #include "cs35l56.h"
22 
23 /* Register addresses are offset when sent over SoundWire */
24 #define CS35L56_SDW_ADDR_OFFSET		0x8000
25 
26 static int cs35l56_sdw_read_one(struct sdw_slave *peripheral, unsigned int reg, void *buf)
27 {
28 	int ret;
29 
30 	ret = sdw_nread_no_pm(peripheral, reg, 4, (u8 *)buf);
31 	if (ret != 0) {
32 		dev_err(&peripheral->dev, "Read failed @%#x:%d\n", reg, ret);
33 		return ret;
34 	}
35 
36 	swab32s((u32 *)buf);
37 
38 	return 0;
39 }
40 
41 static int cs35l56_sdw_read(void *context, const void *reg_buf,
42 			    const size_t reg_size, void *val_buf,
43 			    size_t val_size)
44 {
45 	struct sdw_slave *peripheral = context;
46 	u8 *buf8 = val_buf;
47 	unsigned int reg, bytes;
48 	int ret;
49 
50 	reg = le32_to_cpu(*(const __le32 *)reg_buf);
51 	reg += CS35L56_SDW_ADDR_OFFSET;
52 
53 	if (val_size == 4)
54 		return cs35l56_sdw_read_one(peripheral, reg, val_buf);
55 
56 	while (val_size) {
57 		bytes = SDW_REG_NO_PAGE - (reg & SDW_REGADDR); /* to end of page */
58 		if (bytes > val_size)
59 			bytes = val_size;
60 
61 		ret = sdw_nread_no_pm(peripheral, reg, bytes, buf8);
62 		if (ret != 0) {
63 			dev_err(&peripheral->dev, "Read failed @%#x..%#x:%d\n",
64 				reg, reg + bytes - 1, ret);
65 			return ret;
66 		}
67 
68 		swab32_array((u32 *)buf8, bytes / 4);
69 		val_size -= bytes;
70 		reg += bytes;
71 		buf8 += bytes;
72 	}
73 
74 	return 0;
75 }
76 
77 static inline void cs35l56_swab_copy(void *dest, const void *src, size_t nbytes)
78 {
79 	u32 *dest32 = dest;
80 	const u32 *src32 = src;
81 
82 	for (; nbytes > 0; nbytes -= 4)
83 		*dest32++ = swab32(*src32++);
84 }
85 
86 static int cs35l56_sdw_write_one(struct sdw_slave *peripheral, unsigned int reg, const void *buf)
87 {
88 	u32 val_le = swab32(*(u32 *)buf);
89 	int ret;
90 
91 	ret = sdw_nwrite_no_pm(peripheral, reg, 4, (u8 *)&val_le);
92 	if (ret != 0) {
93 		dev_err(&peripheral->dev, "Write failed @%#x:%d\n", reg, ret);
94 		return ret;
95 	}
96 
97 	return 0;
98 }
99 
100 static int cs35l56_sdw_gather_write(void *context,
101 				    const void *reg_buf, size_t reg_size,
102 				    const void *val_buf, size_t val_size)
103 {
104 	struct sdw_slave *peripheral = context;
105 	const u8 *src_be = val_buf;
106 	u32 val_le_buf[64];	/* Define u32 so it is 32-bit aligned */
107 	unsigned int reg, bytes;
108 	int ret;
109 
110 	reg = le32_to_cpu(*(const __le32 *)reg_buf);
111 	reg += CS35L56_SDW_ADDR_OFFSET;
112 
113 	if (val_size == 4)
114 		return cs35l56_sdw_write_one(peripheral, reg, src_be);
115 
116 	while (val_size) {
117 		bytes = SDW_REG_NO_PAGE - (reg & SDW_REGADDR); /* to end of page */
118 		if (bytes > val_size)
119 			bytes = val_size;
120 		if (bytes > sizeof(val_le_buf))
121 			bytes = sizeof(val_le_buf);
122 
123 		cs35l56_swab_copy(val_le_buf, src_be, bytes);
124 
125 		ret = sdw_nwrite_no_pm(peripheral, reg, bytes, (u8 *)val_le_buf);
126 		if (ret != 0) {
127 			dev_err(&peripheral->dev, "Write failed @%#x..%#x:%d\n",
128 				reg, reg + bytes - 1, ret);
129 			return ret;
130 		}
131 
132 		val_size -= bytes;
133 		reg += bytes;
134 		src_be += bytes;
135 	}
136 
137 	return 0;
138 }
139 
140 static int cs35l56_sdw_write(void *context, const void *val_buf, size_t val_size)
141 {
142 	const u8 *src_buf = val_buf;
143 
144 	/* First word of val_buf contains the destination address */
145 	return cs35l56_sdw_gather_write(context, &src_buf[0], 4, &src_buf[4], val_size - 4);
146 }
147 
148 /*
149  * Registers are big-endian on I2C and SPI but little-endian on SoundWire.
150  * Exported firmware controls are big-endian on I2C/SPI but little-endian on
151  * SoundWire. Firmware files are always big-endian and are opaque blobs.
152  * Present a big-endian regmap and hide the endianness swap, so that the ALSA
153  * byte controls always have the same byte order, and firmware file blobs
154  * can be written verbatim.
155  */
156 static const struct regmap_bus cs35l56_regmap_bus_sdw = {
157 	.read = cs35l56_sdw_read,
158 	.write = cs35l56_sdw_write,
159 	.gather_write = cs35l56_sdw_gather_write,
160 	.reg_format_endian_default = REGMAP_ENDIAN_LITTLE,
161 	.val_format_endian_default = REGMAP_ENDIAN_BIG,
162 };
163 
164 static void cs35l56_sdw_init(struct sdw_slave *peripheral)
165 {
166 	struct cs35l56_private *cs35l56 = dev_get_drvdata(&peripheral->dev);
167 	int ret;
168 
169 	pm_runtime_get_noresume(cs35l56->base.dev);
170 
171 	regcache_cache_only(cs35l56->base.regmap, false);
172 
173 	ret = cs35l56_init(cs35l56);
174 	if (ret < 0) {
175 		regcache_cache_only(cs35l56->base.regmap, true);
176 		goto out;
177 	}
178 
179 	/*
180 	 * cs35l56_init can return with !init_done if it triggered
181 	 * a soft reset.
182 	 */
183 	if (cs35l56->base.init_done) {
184 		/* Enable SoundWire interrupts */
185 		sdw_write_no_pm(peripheral, CS35L56_SDW_GEN_INT_MASK_1,
186 				CS35L56_SDW_INT_MASK_CODEC_IRQ);
187 	}
188 
189 out:
190 	pm_runtime_mark_last_busy(cs35l56->base.dev);
191 	pm_runtime_put_autosuspend(cs35l56->base.dev);
192 }
193 
194 static int cs35l56_sdw_interrupt(struct sdw_slave *peripheral,
195 				 struct sdw_slave_intr_status *status)
196 {
197 	struct cs35l56_private *cs35l56 = dev_get_drvdata(&peripheral->dev);
198 
199 	/* SoundWire core holds our pm_runtime when calling this function. */
200 
201 	dev_dbg(cs35l56->base.dev, "int control_port=%#x\n", status->control_port);
202 
203 	if ((status->control_port & SDW_SCP_INT1_IMPL_DEF) == 0)
204 		return 0;
205 
206 	/*
207 	 * Prevent bus manager suspending and possibly issuing a
208 	 * bus-reset before the queued work has run.
209 	 */
210 	pm_runtime_get_noresume(cs35l56->base.dev);
211 
212 	/*
213 	 * Mask and clear until it has been handled. The read of GEN_INT_STAT_1
214 	 * is required as per the SoundWire spec for interrupt status bits
215 	 * to clear. GEN_INT_MASK_1 masks the _inputs_ to GEN_INT_STAT1.
216 	 * None of the interrupts are time-critical so use the
217 	 * power-efficient queue.
218 	 */
219 	sdw_write_no_pm(peripheral, CS35L56_SDW_GEN_INT_MASK_1, 0);
220 	sdw_read_no_pm(peripheral, CS35L56_SDW_GEN_INT_STAT_1);
221 	sdw_write_no_pm(peripheral, CS35L56_SDW_GEN_INT_STAT_1, 0xFF);
222 	queue_work(system_power_efficient_wq, &cs35l56->sdw_irq_work);
223 
224 	return 0;
225 }
226 
227 static void cs35l56_sdw_irq_work(struct work_struct *work)
228 {
229 	struct cs35l56_private *cs35l56 = container_of(work,
230 						       struct cs35l56_private,
231 						       sdw_irq_work);
232 
233 	cs35l56_irq(-1, &cs35l56->base);
234 
235 	/* unmask interrupts */
236 	if (!cs35l56->sdw_irq_no_unmask)
237 		sdw_write_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_MASK_1,
238 				CS35L56_SDW_INT_MASK_CODEC_IRQ);
239 
240 	pm_runtime_put_autosuspend(cs35l56->base.dev);
241 }
242 
243 static int cs35l56_sdw_read_prop(struct sdw_slave *peripheral)
244 {
245 	struct cs35l56_private *cs35l56 = dev_get_drvdata(&peripheral->dev);
246 	struct sdw_slave_prop *prop = &peripheral->prop;
247 	struct sdw_dpn_prop *ports;
248 
249 	ports = devm_kcalloc(cs35l56->base.dev, 2, sizeof(*ports), GFP_KERNEL);
250 	if (!ports)
251 		return -ENOMEM;
252 
253 	prop->source_ports = BIT(CS35L56_SDW1_CAPTURE_PORT);
254 	prop->sink_ports = BIT(CS35L56_SDW1_PLAYBACK_PORT);
255 	prop->paging_support = true;
256 	prop->clk_stop_mode1 = false;
257 	prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY;
258 	prop->scp_int1_mask = SDW_SCP_INT1_BUS_CLASH | SDW_SCP_INT1_PARITY | SDW_SCP_INT1_IMPL_DEF;
259 
260 	/* DP1 - playback */
261 	ports[0].num = CS35L56_SDW1_PLAYBACK_PORT;
262 	ports[0].type = SDW_DPN_FULL;
263 	ports[0].ch_prep_timeout = 10;
264 	prop->sink_dpn_prop = &ports[0];
265 
266 	/* DP3 - capture */
267 	ports[1].num = CS35L56_SDW1_CAPTURE_PORT;
268 	ports[1].type = SDW_DPN_FULL;
269 	ports[1].ch_prep_timeout = 10;
270 	prop->src_dpn_prop = &ports[1];
271 
272 	return 0;
273 }
274 
275 static int cs35l56_sdw_update_status(struct sdw_slave *peripheral,
276 				     enum sdw_slave_status status)
277 {
278 	struct cs35l56_private *cs35l56 = dev_get_drvdata(&peripheral->dev);
279 
280 	switch (status) {
281 	case SDW_SLAVE_ATTACHED:
282 		dev_dbg(cs35l56->base.dev, "%s: ATTACHED\n", __func__);
283 		if (cs35l56->sdw_attached)
284 			break;
285 
286 		if (!cs35l56->base.init_done || cs35l56->soft_resetting)
287 			cs35l56_sdw_init(peripheral);
288 
289 		cs35l56->sdw_attached = true;
290 		break;
291 	case SDW_SLAVE_UNATTACHED:
292 		dev_dbg(cs35l56->base.dev, "%s: UNATTACHED\n", __func__);
293 		cs35l56->sdw_attached = false;
294 		break;
295 	default:
296 		break;
297 	}
298 
299 	return 0;
300 }
301 
302 static int cs35l56_a1_kick_divider(struct cs35l56_private *cs35l56,
303 				   struct sdw_slave *peripheral)
304 {
305 	unsigned int curr_scale_reg, next_scale_reg;
306 	int curr_scale, next_scale, ret;
307 
308 	if (!cs35l56->base.init_done)
309 		return 0;
310 
311 	if (peripheral->bus->params.curr_bank) {
312 		curr_scale_reg = SDW_SCP_BUSCLOCK_SCALE_B1;
313 		next_scale_reg = SDW_SCP_BUSCLOCK_SCALE_B0;
314 	} else {
315 		curr_scale_reg = SDW_SCP_BUSCLOCK_SCALE_B0;
316 		next_scale_reg = SDW_SCP_BUSCLOCK_SCALE_B1;
317 	}
318 
319 	/*
320 	 * Current clock scale value must be different to new value.
321 	 * Modify current to guarantee this. If next still has the dummy
322 	 * value we wrote when it was current, the core code has not set
323 	 * a new scale so restore its original good value
324 	 */
325 	curr_scale = sdw_read_no_pm(peripheral, curr_scale_reg);
326 	if (curr_scale < 0) {
327 		dev_err(cs35l56->base.dev, "Failed to read current clock scale: %d\n", curr_scale);
328 		return curr_scale;
329 	}
330 
331 	next_scale = sdw_read_no_pm(peripheral, next_scale_reg);
332 	if (next_scale < 0) {
333 		dev_err(cs35l56->base.dev, "Failed to read next clock scale: %d\n", next_scale);
334 		return next_scale;
335 	}
336 
337 	if (next_scale == CS35L56_SDW_INVALID_BUS_SCALE) {
338 		next_scale = cs35l56->old_sdw_clock_scale;
339 		ret = sdw_write_no_pm(peripheral, next_scale_reg, next_scale);
340 		if (ret < 0) {
341 			dev_err(cs35l56->base.dev, "Failed to modify current clock scale: %d\n",
342 				ret);
343 			return ret;
344 		}
345 	}
346 
347 	cs35l56->old_sdw_clock_scale = curr_scale;
348 	ret = sdw_write_no_pm(peripheral, curr_scale_reg, CS35L56_SDW_INVALID_BUS_SCALE);
349 	if (ret < 0) {
350 		dev_err(cs35l56->base.dev, "Failed to modify current clock scale: %d\n", ret);
351 		return ret;
352 	}
353 
354 	dev_dbg(cs35l56->base.dev, "Next bus scale: %#x\n", next_scale);
355 
356 	return 0;
357 }
358 
359 static int cs35l56_sdw_bus_config(struct sdw_slave *peripheral,
360 				  struct sdw_bus_params *params)
361 {
362 	struct cs35l56_private *cs35l56 = dev_get_drvdata(&peripheral->dev);
363 	int sclk;
364 
365 	sclk = params->curr_dr_freq / 2;
366 	dev_dbg(cs35l56->base.dev, "%s: sclk=%u c=%u r=%u\n",
367 		__func__, sclk, params->col, params->row);
368 
369 	if (cs35l56->base.rev < 0xb0)
370 		return cs35l56_a1_kick_divider(cs35l56, peripheral);
371 
372 	return 0;
373 }
374 
375 static int __maybe_unused cs35l56_sdw_clk_stop(struct sdw_slave *peripheral,
376 					       enum sdw_clk_stop_mode mode,
377 					       enum sdw_clk_stop_type type)
378 {
379 	struct cs35l56_private *cs35l56 = dev_get_drvdata(&peripheral->dev);
380 
381 	dev_dbg(cs35l56->base.dev, "%s: mode:%d type:%d\n", __func__, mode, type);
382 
383 	return 0;
384 }
385 
386 static const struct sdw_slave_ops cs35l56_sdw_ops = {
387 	.read_prop = cs35l56_sdw_read_prop,
388 	.interrupt_callback = cs35l56_sdw_interrupt,
389 	.update_status = cs35l56_sdw_update_status,
390 	.bus_config = cs35l56_sdw_bus_config,
391 #ifdef DEBUG
392 	.clk_stop = cs35l56_sdw_clk_stop,
393 #endif
394 };
395 
396 static int __maybe_unused cs35l56_sdw_handle_unattach(struct cs35l56_private *cs35l56)
397 {
398 	struct sdw_slave *peripheral = cs35l56->sdw_peripheral;
399 
400 	if (peripheral->unattach_request) {
401 		/* Cannot access registers until bus is re-initialized. */
402 		dev_dbg(cs35l56->base.dev, "Wait for initialization_complete\n");
403 		if (!wait_for_completion_timeout(&peripheral->initialization_complete,
404 						 msecs_to_jiffies(5000))) {
405 			dev_err(cs35l56->base.dev, "initialization_complete timed out\n");
406 			return -ETIMEDOUT;
407 		}
408 
409 		peripheral->unattach_request = 0;
410 
411 		/*
412 		 * Don't call regcache_mark_dirty(), we can't be sure that the
413 		 * Manager really did issue a Bus Reset.
414 		 */
415 	}
416 
417 	return 0;
418 }
419 
420 static int __maybe_unused cs35l56_sdw_runtime_suspend(struct device *dev)
421 {
422 	struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
423 
424 	if (!cs35l56->base.init_done)
425 		return 0;
426 
427 	return cs35l56_runtime_suspend_common(&cs35l56->base);
428 }
429 
430 static int __maybe_unused cs35l56_sdw_runtime_resume(struct device *dev)
431 {
432 	struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
433 	int ret;
434 
435 	dev_dbg(dev, "Runtime resume\n");
436 
437 	if (!cs35l56->base.init_done)
438 		return 0;
439 
440 	ret = cs35l56_sdw_handle_unattach(cs35l56);
441 	if (ret < 0)
442 		return ret;
443 
444 	ret = cs35l56_runtime_resume_common(&cs35l56->base, true);
445 	if (ret)
446 		return ret;
447 
448 	/* Re-enable SoundWire interrupts */
449 	sdw_write_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_MASK_1,
450 			CS35L56_SDW_INT_MASK_CODEC_IRQ);
451 
452 	return 0;
453 }
454 
455 static int __maybe_unused cs35l56_sdw_system_suspend(struct device *dev)
456 {
457 	struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
458 
459 	if (!cs35l56->base.init_done)
460 		return 0;
461 
462 	/*
463 	 * Disable SoundWire interrupts.
464 	 * Flush - don't cancel because that could leave an unbalanced pm_runtime_get.
465 	 */
466 	cs35l56->sdw_irq_no_unmask = true;
467 	flush_work(&cs35l56->sdw_irq_work);
468 
469 	/* Mask interrupts and flush in case sdw_irq_work was queued again */
470 	sdw_write_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_MASK_1, 0);
471 	sdw_read_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_STAT_1);
472 	sdw_write_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_STAT_1, 0xFF);
473 	flush_work(&cs35l56->sdw_irq_work);
474 
475 	return cs35l56_system_suspend(dev);
476 }
477 
478 static int __maybe_unused cs35l56_sdw_system_resume(struct device *dev)
479 {
480 	struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
481 
482 	cs35l56->sdw_irq_no_unmask = false;
483 	/* runtime_resume re-enables the interrupt */
484 
485 	return cs35l56_system_resume(dev);
486 }
487 
488 static int cs35l56_sdw_probe(struct sdw_slave *peripheral, const struct sdw_device_id *id)
489 {
490 	struct device *dev = &peripheral->dev;
491 	struct cs35l56_private *cs35l56;
492 	int ret;
493 
494 	cs35l56 = devm_kzalloc(dev, sizeof(*cs35l56), GFP_KERNEL);
495 	if (!cs35l56)
496 		return -ENOMEM;
497 
498 	cs35l56->base.dev = dev;
499 	cs35l56->sdw_peripheral = peripheral;
500 	INIT_WORK(&cs35l56->sdw_irq_work, cs35l56_sdw_irq_work);
501 
502 	dev_set_drvdata(dev, cs35l56);
503 
504 	cs35l56->base.regmap = devm_regmap_init(dev, &cs35l56_regmap_bus_sdw,
505 					   peripheral, &cs35l56_regmap_sdw);
506 	if (IS_ERR(cs35l56->base.regmap)) {
507 		ret = PTR_ERR(cs35l56->base.regmap);
508 		return dev_err_probe(dev, ret, "Failed to allocate register map\n");
509 	}
510 
511 	/* Start in cache-only until device is enumerated */
512 	regcache_cache_only(cs35l56->base.regmap, true);
513 
514 	ret = cs35l56_common_probe(cs35l56);
515 	if (ret != 0)
516 		return ret;
517 
518 	return 0;
519 }
520 
521 static int cs35l56_sdw_remove(struct sdw_slave *peripheral)
522 {
523 	struct cs35l56_private *cs35l56 = dev_get_drvdata(&peripheral->dev);
524 
525 	/* Disable SoundWire interrupts */
526 	cs35l56->sdw_irq_no_unmask = true;
527 	cancel_work_sync(&cs35l56->sdw_irq_work);
528 	sdw_write_no_pm(peripheral, CS35L56_SDW_GEN_INT_MASK_1, 0);
529 	sdw_read_no_pm(peripheral, CS35L56_SDW_GEN_INT_STAT_1);
530 	sdw_write_no_pm(peripheral, CS35L56_SDW_GEN_INT_STAT_1, 0xFF);
531 
532 	cs35l56_remove(cs35l56);
533 
534 	return 0;
535 }
536 
537 static const struct dev_pm_ops cs35l56_sdw_pm = {
538 	SET_RUNTIME_PM_OPS(cs35l56_sdw_runtime_suspend, cs35l56_sdw_runtime_resume, NULL)
539 	SYSTEM_SLEEP_PM_OPS(cs35l56_sdw_system_suspend, cs35l56_sdw_system_resume)
540 	LATE_SYSTEM_SLEEP_PM_OPS(cs35l56_system_suspend_late, cs35l56_system_resume_early)
541 	/* NOIRQ stage not needed, SoundWire doesn't use a hard IRQ */
542 };
543 
544 static const struct sdw_device_id cs35l56_sdw_id[] = {
545 	SDW_SLAVE_ENTRY(0x01FA, 0x3556, 0),
546 	{},
547 };
548 MODULE_DEVICE_TABLE(sdw, cs35l56_sdw_id);
549 
550 static struct sdw_driver cs35l56_sdw_driver = {
551 	.driver = {
552 		.name = "cs35l56",
553 		.pm = &cs35l56_sdw_pm,
554 	},
555 	.probe = cs35l56_sdw_probe,
556 	.remove = cs35l56_sdw_remove,
557 	.ops = &cs35l56_sdw_ops,
558 	.id_table = cs35l56_sdw_id,
559 };
560 
561 module_sdw_driver(cs35l56_sdw_driver);
562 
563 MODULE_DESCRIPTION("ASoC CS35L56 SoundWire driver");
564 MODULE_IMPORT_NS(SND_SOC_CS35L56_CORE);
565 MODULE_IMPORT_NS(SND_SOC_CS35L56_SHARED);
566 MODULE_AUTHOR("Richard Fitzgerald <rf@opensource.cirrus.com>");
567 MODULE_AUTHOR("Simon Trimmer <simont@opensource.cirrus.com>");
568 MODULE_LICENSE("GPL");
569