1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * cs35l32.c -- CS35L32 ALSA SoC audio driver 4 * 5 * Copyright 2014 CirrusLogic, Inc. 6 * 7 * Author: Brian Austin <brian.austin@cirrus.com> 8 */ 9 10 #include <linux/module.h> 11 #include <linux/moduleparam.h> 12 #include <linux/kernel.h> 13 #include <linux/init.h> 14 #include <linux/delay.h> 15 #include <linux/i2c.h> 16 #include <linux/gpio.h> 17 #include <linux/regmap.h> 18 #include <linux/slab.h> 19 #include <linux/platform_device.h> 20 #include <linux/regulator/consumer.h> 21 #include <linux/gpio/consumer.h> 22 #include <linux/of_device.h> 23 #include <sound/core.h> 24 #include <sound/pcm.h> 25 #include <sound/pcm_params.h> 26 #include <sound/soc.h> 27 #include <sound/soc-dapm.h> 28 #include <sound/initval.h> 29 #include <sound/tlv.h> 30 #include <dt-bindings/sound/cs35l32.h> 31 32 #include "cs35l32.h" 33 34 #define CS35L32_NUM_SUPPLIES 2 35 static const char *const cs35l32_supply_names[CS35L32_NUM_SUPPLIES] = { 36 "VA", 37 "VP", 38 }; 39 40 struct cs35l32_private { 41 struct regmap *regmap; 42 struct snd_soc_component *component; 43 struct regulator_bulk_data supplies[CS35L32_NUM_SUPPLIES]; 44 struct cs35l32_platform_data pdata; 45 struct gpio_desc *reset_gpio; 46 }; 47 48 static const struct reg_default cs35l32_reg_defaults[] = { 49 50 { 0x06, 0x04 }, /* Power Ctl 1 */ 51 { 0x07, 0xE8 }, /* Power Ctl 2 */ 52 { 0x08, 0x40 }, /* Clock Ctl */ 53 { 0x09, 0x20 }, /* Low Battery Threshold */ 54 { 0x0A, 0x00 }, /* Voltage Monitor [RO] */ 55 { 0x0B, 0x40 }, /* Conv Peak Curr Protection CTL */ 56 { 0x0C, 0x07 }, /* IMON Scaling */ 57 { 0x0D, 0x03 }, /* Audio/LED Pwr Manager */ 58 { 0x0F, 0x20 }, /* Serial Port Control */ 59 { 0x10, 0x14 }, /* Class D Amp CTL */ 60 { 0x11, 0x00 }, /* Protection Release CTL */ 61 { 0x12, 0xFF }, /* Interrupt Mask 1 */ 62 { 0x13, 0xFF }, /* Interrupt Mask 2 */ 63 { 0x14, 0xFF }, /* Interrupt Mask 3 */ 64 { 0x19, 0x00 }, /* LED Flash Mode Current */ 65 { 0x1A, 0x00 }, /* LED Movie Mode Current */ 66 { 0x1B, 0x20 }, /* LED Flash Timer */ 67 { 0x1C, 0x00 }, /* LED Flash Inhibit Current */ 68 }; 69 70 static bool cs35l32_readable_register(struct device *dev, unsigned int reg) 71 { 72 switch (reg) { 73 case CS35L32_DEVID_AB ... CS35L32_AUDIO_LED_MNGR: 74 case CS35L32_ADSP_CTL ... CS35L32_FLASH_INHIBIT: 75 return true; 76 default: 77 return false; 78 } 79 } 80 81 static bool cs35l32_volatile_register(struct device *dev, unsigned int reg) 82 { 83 switch (reg) { 84 case CS35L32_DEVID_AB ... CS35L32_REV_ID: 85 case CS35L32_INT_STATUS_1 ... CS35L32_LED_STATUS: 86 return true; 87 default: 88 return false; 89 } 90 } 91 92 static bool cs35l32_precious_register(struct device *dev, unsigned int reg) 93 { 94 switch (reg) { 95 case CS35L32_INT_STATUS_1 ... CS35L32_LED_STATUS: 96 return true; 97 default: 98 return false; 99 } 100 } 101 102 static DECLARE_TLV_DB_SCALE(classd_ctl_tlv, 900, 300, 0); 103 104 static const struct snd_kcontrol_new imon_ctl = 105 SOC_DAPM_SINGLE("Switch", CS35L32_PWRCTL2, 6, 1, 1); 106 107 static const struct snd_kcontrol_new vmon_ctl = 108 SOC_DAPM_SINGLE("Switch", CS35L32_PWRCTL2, 7, 1, 1); 109 110 static const struct snd_kcontrol_new vpmon_ctl = 111 SOC_DAPM_SINGLE("Switch", CS35L32_PWRCTL2, 5, 1, 1); 112 113 static const struct snd_kcontrol_new cs35l32_snd_controls[] = { 114 SOC_SINGLE_TLV("Speaker Volume", CS35L32_CLASSD_CTL, 115 3, 0x04, 1, classd_ctl_tlv), 116 SOC_SINGLE("Zero Cross Switch", CS35L32_CLASSD_CTL, 2, 1, 0), 117 SOC_SINGLE("Gain Manager Switch", CS35L32_AUDIO_LED_MNGR, 3, 1, 0), 118 }; 119 120 static const struct snd_soc_dapm_widget cs35l32_dapm_widgets[] = { 121 122 SND_SOC_DAPM_SUPPLY("BOOST", CS35L32_PWRCTL1, 2, 1, NULL, 0), 123 SND_SOC_DAPM_OUT_DRV("Speaker", CS35L32_PWRCTL1, 7, 1, NULL, 0), 124 125 SND_SOC_DAPM_AIF_OUT("SDOUT", NULL, 0, CS35L32_PWRCTL2, 3, 1), 126 127 SND_SOC_DAPM_INPUT("VP"), 128 SND_SOC_DAPM_INPUT("ISENSE"), 129 SND_SOC_DAPM_INPUT("VSENSE"), 130 131 SND_SOC_DAPM_SWITCH("VMON ADC", CS35L32_PWRCTL2, 7, 1, &vmon_ctl), 132 SND_SOC_DAPM_SWITCH("IMON ADC", CS35L32_PWRCTL2, 6, 1, &imon_ctl), 133 SND_SOC_DAPM_SWITCH("VPMON ADC", CS35L32_PWRCTL2, 5, 1, &vpmon_ctl), 134 }; 135 136 static const struct snd_soc_dapm_route cs35l32_audio_map[] = { 137 138 {"Speaker", NULL, "BOOST"}, 139 140 {"VMON ADC", NULL, "VSENSE"}, 141 {"IMON ADC", NULL, "ISENSE"}, 142 {"VPMON ADC", NULL, "VP"}, 143 144 {"SDOUT", "Switch", "VMON ADC"}, 145 {"SDOUT", "Switch", "IMON ADC"}, 146 {"SDOUT", "Switch", "VPMON ADC"}, 147 148 {"Capture", NULL, "SDOUT"}, 149 }; 150 151 static int cs35l32_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) 152 { 153 struct snd_soc_component *component = codec_dai->component; 154 155 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 156 case SND_SOC_DAIFMT_CBM_CFM: 157 snd_soc_component_update_bits(component, CS35L32_ADSP_CTL, 158 CS35L32_ADSP_MASTER_MASK, 159 CS35L32_ADSP_MASTER_MASK); 160 break; 161 case SND_SOC_DAIFMT_CBS_CFS: 162 snd_soc_component_update_bits(component, CS35L32_ADSP_CTL, 163 CS35L32_ADSP_MASTER_MASK, 0); 164 break; 165 default: 166 return -EINVAL; 167 } 168 169 return 0; 170 } 171 172 static int cs35l32_set_tristate(struct snd_soc_dai *dai, int tristate) 173 { 174 struct snd_soc_component *component = dai->component; 175 176 return snd_soc_component_update_bits(component, CS35L32_PWRCTL2, 177 CS35L32_SDOUT_3ST, tristate << 3); 178 } 179 180 static const struct snd_soc_dai_ops cs35l32_ops = { 181 .set_fmt = cs35l32_set_dai_fmt, 182 .set_tristate = cs35l32_set_tristate, 183 }; 184 185 static struct snd_soc_dai_driver cs35l32_dai[] = { 186 { 187 .name = "cs35l32-monitor", 188 .id = 0, 189 .capture = { 190 .stream_name = "Capture", 191 .channels_min = 2, 192 .channels_max = 2, 193 .rates = CS35L32_RATES, 194 .formats = CS35L32_FORMATS, 195 }, 196 .ops = &cs35l32_ops, 197 .symmetric_rate = 1, 198 } 199 }; 200 201 static int cs35l32_component_set_sysclk(struct snd_soc_component *component, 202 int clk_id, int source, unsigned int freq, int dir) 203 { 204 unsigned int val; 205 206 switch (freq) { 207 case 6000000: 208 val = CS35L32_MCLK_RATIO; 209 break; 210 case 12000000: 211 val = CS35L32_MCLK_DIV2_MASK | CS35L32_MCLK_RATIO; 212 break; 213 case 6144000: 214 val = 0; 215 break; 216 case 12288000: 217 val = CS35L32_MCLK_DIV2_MASK; 218 break; 219 default: 220 return -EINVAL; 221 } 222 223 return snd_soc_component_update_bits(component, CS35L32_CLK_CTL, 224 CS35L32_MCLK_DIV2_MASK | CS35L32_MCLK_RATIO_MASK, val); 225 } 226 227 static const struct snd_soc_component_driver soc_component_dev_cs35l32 = { 228 .set_sysclk = cs35l32_component_set_sysclk, 229 .controls = cs35l32_snd_controls, 230 .num_controls = ARRAY_SIZE(cs35l32_snd_controls), 231 .dapm_widgets = cs35l32_dapm_widgets, 232 .num_dapm_widgets = ARRAY_SIZE(cs35l32_dapm_widgets), 233 .dapm_routes = cs35l32_audio_map, 234 .num_dapm_routes = ARRAY_SIZE(cs35l32_audio_map), 235 .idle_bias_on = 1, 236 .use_pmdown_time = 1, 237 .endianness = 1, 238 .non_legacy_dai_naming = 1, 239 }; 240 241 /* Current and threshold powerup sequence Pg37 in datasheet */ 242 static const struct reg_sequence cs35l32_monitor_patch[] = { 243 244 { 0x00, 0x99 }, 245 { 0x48, 0x17 }, 246 { 0x49, 0x56 }, 247 { 0x43, 0x01 }, 248 { 0x3B, 0x62 }, 249 { 0x3C, 0x80 }, 250 { 0x00, 0x00 }, 251 }; 252 253 static const struct regmap_config cs35l32_regmap = { 254 .reg_bits = 8, 255 .val_bits = 8, 256 257 .max_register = CS35L32_MAX_REGISTER, 258 .reg_defaults = cs35l32_reg_defaults, 259 .num_reg_defaults = ARRAY_SIZE(cs35l32_reg_defaults), 260 .volatile_reg = cs35l32_volatile_register, 261 .readable_reg = cs35l32_readable_register, 262 .precious_reg = cs35l32_precious_register, 263 .cache_type = REGCACHE_RBTREE, 264 265 .use_single_read = true, 266 .use_single_write = true, 267 }; 268 269 static int cs35l32_handle_of_data(struct i2c_client *i2c_client, 270 struct cs35l32_platform_data *pdata) 271 { 272 struct device_node *np = i2c_client->dev.of_node; 273 unsigned int val; 274 275 if (of_property_read_u32(np, "cirrus,sdout-share", &val) >= 0) 276 pdata->sdout_share = val; 277 278 if (of_property_read_u32(np, "cirrus,boost-manager", &val)) 279 val = -1u; 280 281 switch (val) { 282 case CS35L32_BOOST_MGR_AUTO: 283 case CS35L32_BOOST_MGR_AUTO_AUDIO: 284 case CS35L32_BOOST_MGR_BYPASS: 285 case CS35L32_BOOST_MGR_FIXED: 286 pdata->boost_mng = val; 287 break; 288 case -1u: 289 default: 290 dev_err(&i2c_client->dev, 291 "Wrong cirrus,boost-manager DT value %d\n", val); 292 pdata->boost_mng = CS35L32_BOOST_MGR_BYPASS; 293 } 294 295 if (of_property_read_u32(np, "cirrus,sdout-datacfg", &val)) 296 val = -1u; 297 switch (val) { 298 case CS35L32_DATA_CFG_LR_VP: 299 case CS35L32_DATA_CFG_LR_STAT: 300 case CS35L32_DATA_CFG_LR: 301 case CS35L32_DATA_CFG_LR_VPSTAT: 302 pdata->sdout_datacfg = val; 303 break; 304 case -1u: 305 default: 306 dev_err(&i2c_client->dev, 307 "Wrong cirrus,sdout-datacfg DT value %d\n", val); 308 pdata->sdout_datacfg = CS35L32_DATA_CFG_LR; 309 } 310 311 if (of_property_read_u32(np, "cirrus,battery-threshold", &val)) 312 val = -1u; 313 switch (val) { 314 case CS35L32_BATT_THRESH_3_1V: 315 case CS35L32_BATT_THRESH_3_2V: 316 case CS35L32_BATT_THRESH_3_3V: 317 case CS35L32_BATT_THRESH_3_4V: 318 pdata->batt_thresh = val; 319 break; 320 case -1u: 321 default: 322 dev_err(&i2c_client->dev, 323 "Wrong cirrus,battery-threshold DT value %d\n", val); 324 pdata->batt_thresh = CS35L32_BATT_THRESH_3_3V; 325 } 326 327 if (of_property_read_u32(np, "cirrus,battery-recovery", &val)) 328 val = -1u; 329 switch (val) { 330 case CS35L32_BATT_RECOV_3_1V: 331 case CS35L32_BATT_RECOV_3_2V: 332 case CS35L32_BATT_RECOV_3_3V: 333 case CS35L32_BATT_RECOV_3_4V: 334 case CS35L32_BATT_RECOV_3_5V: 335 case CS35L32_BATT_RECOV_3_6V: 336 pdata->batt_recov = val; 337 break; 338 case -1u: 339 default: 340 dev_err(&i2c_client->dev, 341 "Wrong cirrus,battery-recovery DT value %d\n", val); 342 pdata->batt_recov = CS35L32_BATT_RECOV_3_4V; 343 } 344 345 return 0; 346 } 347 348 static int cs35l32_i2c_probe(struct i2c_client *i2c_client, 349 const struct i2c_device_id *id) 350 { 351 struct cs35l32_private *cs35l32; 352 struct cs35l32_platform_data *pdata = 353 dev_get_platdata(&i2c_client->dev); 354 int ret, i; 355 unsigned int devid = 0; 356 unsigned int reg; 357 358 cs35l32 = devm_kzalloc(&i2c_client->dev, sizeof(*cs35l32), GFP_KERNEL); 359 if (!cs35l32) 360 return -ENOMEM; 361 362 i2c_set_clientdata(i2c_client, cs35l32); 363 364 cs35l32->regmap = devm_regmap_init_i2c(i2c_client, &cs35l32_regmap); 365 if (IS_ERR(cs35l32->regmap)) { 366 ret = PTR_ERR(cs35l32->regmap); 367 dev_err(&i2c_client->dev, "regmap_init() failed: %d\n", ret); 368 return ret; 369 } 370 371 if (pdata) { 372 cs35l32->pdata = *pdata; 373 } else { 374 pdata = devm_kzalloc(&i2c_client->dev, sizeof(*pdata), 375 GFP_KERNEL); 376 if (!pdata) 377 return -ENOMEM; 378 379 if (i2c_client->dev.of_node) { 380 ret = cs35l32_handle_of_data(i2c_client, 381 &cs35l32->pdata); 382 if (ret != 0) 383 return ret; 384 } 385 } 386 387 for (i = 0; i < ARRAY_SIZE(cs35l32->supplies); i++) 388 cs35l32->supplies[i].supply = cs35l32_supply_names[i]; 389 390 ret = devm_regulator_bulk_get(&i2c_client->dev, 391 ARRAY_SIZE(cs35l32->supplies), 392 cs35l32->supplies); 393 if (ret != 0) { 394 dev_err(&i2c_client->dev, 395 "Failed to request supplies: %d\n", ret); 396 return ret; 397 } 398 399 ret = regulator_bulk_enable(ARRAY_SIZE(cs35l32->supplies), 400 cs35l32->supplies); 401 if (ret != 0) { 402 dev_err(&i2c_client->dev, 403 "Failed to enable supplies: %d\n", ret); 404 return ret; 405 } 406 407 /* Reset the Device */ 408 cs35l32->reset_gpio = devm_gpiod_get_optional(&i2c_client->dev, 409 "reset", GPIOD_OUT_LOW); 410 if (IS_ERR(cs35l32->reset_gpio)) 411 return PTR_ERR(cs35l32->reset_gpio); 412 413 gpiod_set_value_cansleep(cs35l32->reset_gpio, 1); 414 415 /* initialize codec */ 416 ret = regmap_read(cs35l32->regmap, CS35L32_DEVID_AB, ®); 417 devid = (reg & 0xFF) << 12; 418 419 ret = regmap_read(cs35l32->regmap, CS35L32_DEVID_CD, ®); 420 devid |= (reg & 0xFF) << 4; 421 422 ret = regmap_read(cs35l32->regmap, CS35L32_DEVID_E, ®); 423 devid |= (reg & 0xF0) >> 4; 424 425 if (devid != CS35L32_CHIP_ID) { 426 ret = -ENODEV; 427 dev_err(&i2c_client->dev, 428 "CS35L32 Device ID (%X). Expected %X\n", 429 devid, CS35L32_CHIP_ID); 430 return ret; 431 } 432 433 ret = regmap_read(cs35l32->regmap, CS35L32_REV_ID, ®); 434 if (ret < 0) { 435 dev_err(&i2c_client->dev, "Get Revision ID failed\n"); 436 return ret; 437 } 438 439 ret = regmap_register_patch(cs35l32->regmap, cs35l32_monitor_patch, 440 ARRAY_SIZE(cs35l32_monitor_patch)); 441 if (ret < 0) { 442 dev_err(&i2c_client->dev, "Failed to apply errata patch\n"); 443 return ret; 444 } 445 446 dev_info(&i2c_client->dev, 447 "Cirrus Logic CS35L32, Revision: %02X\n", reg & 0xFF); 448 449 /* Setup VBOOST Management */ 450 if (cs35l32->pdata.boost_mng) 451 regmap_update_bits(cs35l32->regmap, CS35L32_AUDIO_LED_MNGR, 452 CS35L32_BOOST_MASK, 453 cs35l32->pdata.boost_mng); 454 455 /* Setup ADSP Format Config */ 456 if (cs35l32->pdata.sdout_share) 457 regmap_update_bits(cs35l32->regmap, CS35L32_ADSP_CTL, 458 CS35L32_ADSP_SHARE_MASK, 459 cs35l32->pdata.sdout_share << 3); 460 461 /* Setup ADSP Data Configuration */ 462 if (cs35l32->pdata.sdout_datacfg) 463 regmap_update_bits(cs35l32->regmap, CS35L32_ADSP_CTL, 464 CS35L32_ADSP_DATACFG_MASK, 465 cs35l32->pdata.sdout_datacfg << 4); 466 467 /* Setup Low Battery Recovery */ 468 if (cs35l32->pdata.batt_recov) 469 regmap_update_bits(cs35l32->regmap, CS35L32_BATT_THRESHOLD, 470 CS35L32_BATT_REC_MASK, 471 cs35l32->pdata.batt_recov << 1); 472 473 /* Setup Low Battery Threshold */ 474 if (cs35l32->pdata.batt_thresh) 475 regmap_update_bits(cs35l32->regmap, CS35L32_BATT_THRESHOLD, 476 CS35L32_BATT_THRESH_MASK, 477 cs35l32->pdata.batt_thresh << 4); 478 479 /* Power down the AMP */ 480 regmap_update_bits(cs35l32->regmap, CS35L32_PWRCTL1, CS35L32_PDN_AMP, 481 CS35L32_PDN_AMP); 482 483 /* Clear MCLK Error Bit since we don't have the clock yet */ 484 ret = regmap_read(cs35l32->regmap, CS35L32_INT_STATUS_1, ®); 485 486 ret = devm_snd_soc_register_component(&i2c_client->dev, 487 &soc_component_dev_cs35l32, cs35l32_dai, 488 ARRAY_SIZE(cs35l32_dai)); 489 if (ret < 0) 490 goto err_disable; 491 492 return 0; 493 494 err_disable: 495 regulator_bulk_disable(ARRAY_SIZE(cs35l32->supplies), 496 cs35l32->supplies); 497 return ret; 498 } 499 500 static int cs35l32_i2c_remove(struct i2c_client *i2c_client) 501 { 502 struct cs35l32_private *cs35l32 = i2c_get_clientdata(i2c_client); 503 504 /* Hold down reset */ 505 gpiod_set_value_cansleep(cs35l32->reset_gpio, 0); 506 507 return 0; 508 } 509 510 #ifdef CONFIG_PM 511 static int cs35l32_runtime_suspend(struct device *dev) 512 { 513 struct cs35l32_private *cs35l32 = dev_get_drvdata(dev); 514 515 regcache_cache_only(cs35l32->regmap, true); 516 regcache_mark_dirty(cs35l32->regmap); 517 518 /* Hold down reset */ 519 gpiod_set_value_cansleep(cs35l32->reset_gpio, 0); 520 521 /* remove power */ 522 regulator_bulk_disable(ARRAY_SIZE(cs35l32->supplies), 523 cs35l32->supplies); 524 525 return 0; 526 } 527 528 static int cs35l32_runtime_resume(struct device *dev) 529 { 530 struct cs35l32_private *cs35l32 = dev_get_drvdata(dev); 531 int ret; 532 533 /* Enable power */ 534 ret = regulator_bulk_enable(ARRAY_SIZE(cs35l32->supplies), 535 cs35l32->supplies); 536 if (ret != 0) { 537 dev_err(dev, "Failed to enable supplies: %d\n", 538 ret); 539 return ret; 540 } 541 542 gpiod_set_value_cansleep(cs35l32->reset_gpio, 1); 543 544 regcache_cache_only(cs35l32->regmap, false); 545 regcache_sync(cs35l32->regmap); 546 547 return 0; 548 } 549 #endif 550 551 static const struct dev_pm_ops cs35l32_runtime_pm = { 552 SET_RUNTIME_PM_OPS(cs35l32_runtime_suspend, cs35l32_runtime_resume, 553 NULL) 554 }; 555 556 static const struct of_device_id cs35l32_of_match[] = { 557 { .compatible = "cirrus,cs35l32", }, 558 {}, 559 }; 560 MODULE_DEVICE_TABLE(of, cs35l32_of_match); 561 562 563 static const struct i2c_device_id cs35l32_id[] = { 564 {"cs35l32", 0}, 565 {} 566 }; 567 568 MODULE_DEVICE_TABLE(i2c, cs35l32_id); 569 570 static struct i2c_driver cs35l32_i2c_driver = { 571 .driver = { 572 .name = "cs35l32", 573 .pm = &cs35l32_runtime_pm, 574 .of_match_table = cs35l32_of_match, 575 }, 576 .id_table = cs35l32_id, 577 .probe = cs35l32_i2c_probe, 578 .remove = cs35l32_i2c_remove, 579 }; 580 581 module_i2c_driver(cs35l32_i2c_driver); 582 583 MODULE_DESCRIPTION("ASoC CS35L32 driver"); 584 MODULE_AUTHOR("Brian Austin, Cirrus Logic Inc, <brian.austin@cirrus.com>"); 585 MODULE_LICENSE("GPL"); 586