1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * cs35l32.c -- CS35L32 ALSA SoC audio driver
4 *
5 * Copyright 2014 CirrusLogic, Inc.
6 *
7 * Author: Brian Austin <brian.austin@cirrus.com>
8 */
9
10 #include <linux/module.h>
11 #include <linux/moduleparam.h>
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/delay.h>
15 #include <linux/i2c.h>
16 #include <linux/gpio.h>
17 #include <linux/regmap.h>
18 #include <linux/slab.h>
19 #include <linux/platform_device.h>
20 #include <linux/regulator/consumer.h>
21 #include <linux/gpio/consumer.h>
22 #include <linux/of_device.h>
23 #include <sound/core.h>
24 #include <sound/pcm.h>
25 #include <sound/pcm_params.h>
26 #include <sound/soc.h>
27 #include <sound/soc-dapm.h>
28 #include <sound/initval.h>
29 #include <sound/tlv.h>
30 #include <dt-bindings/sound/cs35l32.h>
31
32 #include "cs35l32.h"
33 #include "cirrus_legacy.h"
34
35 #define CS35L32_NUM_SUPPLIES 2
36 static const char *const cs35l32_supply_names[CS35L32_NUM_SUPPLIES] = {
37 "VA",
38 "VP",
39 };
40
41 struct cs35l32_private {
42 struct regmap *regmap;
43 struct snd_soc_component *component;
44 struct regulator_bulk_data supplies[CS35L32_NUM_SUPPLIES];
45 struct cs35l32_platform_data pdata;
46 struct gpio_desc *reset_gpio;
47 };
48
49 static const struct reg_default cs35l32_reg_defaults[] = {
50
51 { 0x06, 0x04 }, /* Power Ctl 1 */
52 { 0x07, 0xE8 }, /* Power Ctl 2 */
53 { 0x08, 0x40 }, /* Clock Ctl */
54 { 0x09, 0x20 }, /* Low Battery Threshold */
55 { 0x0A, 0x00 }, /* Voltage Monitor [RO] */
56 { 0x0B, 0x40 }, /* Conv Peak Curr Protection CTL */
57 { 0x0C, 0x07 }, /* IMON Scaling */
58 { 0x0D, 0x03 }, /* Audio/LED Pwr Manager */
59 { 0x0F, 0x20 }, /* Serial Port Control */
60 { 0x10, 0x14 }, /* Class D Amp CTL */
61 { 0x11, 0x00 }, /* Protection Release CTL */
62 { 0x12, 0xFF }, /* Interrupt Mask 1 */
63 { 0x13, 0xFF }, /* Interrupt Mask 2 */
64 { 0x14, 0xFF }, /* Interrupt Mask 3 */
65 { 0x19, 0x00 }, /* LED Flash Mode Current */
66 { 0x1A, 0x00 }, /* LED Movie Mode Current */
67 { 0x1B, 0x20 }, /* LED Flash Timer */
68 { 0x1C, 0x00 }, /* LED Flash Inhibit Current */
69 };
70
cs35l32_readable_register(struct device * dev,unsigned int reg)71 static bool cs35l32_readable_register(struct device *dev, unsigned int reg)
72 {
73 switch (reg) {
74 case CS35L32_DEVID_AB ... CS35L32_AUDIO_LED_MNGR:
75 case CS35L32_ADSP_CTL ... CS35L32_FLASH_INHIBIT:
76 return true;
77 default:
78 return false;
79 }
80 }
81
cs35l32_volatile_register(struct device * dev,unsigned int reg)82 static bool cs35l32_volatile_register(struct device *dev, unsigned int reg)
83 {
84 switch (reg) {
85 case CS35L32_DEVID_AB ... CS35L32_REV_ID:
86 case CS35L32_INT_STATUS_1 ... CS35L32_LED_STATUS:
87 return true;
88 default:
89 return false;
90 }
91 }
92
cs35l32_precious_register(struct device * dev,unsigned int reg)93 static bool cs35l32_precious_register(struct device *dev, unsigned int reg)
94 {
95 switch (reg) {
96 case CS35L32_INT_STATUS_1 ... CS35L32_LED_STATUS:
97 return true;
98 default:
99 return false;
100 }
101 }
102
103 static DECLARE_TLV_DB_SCALE(classd_ctl_tlv, 900, 300, 0);
104
105 static const struct snd_kcontrol_new imon_ctl =
106 SOC_DAPM_SINGLE("Switch", CS35L32_PWRCTL2, 6, 1, 1);
107
108 static const struct snd_kcontrol_new vmon_ctl =
109 SOC_DAPM_SINGLE("Switch", CS35L32_PWRCTL2, 7, 1, 1);
110
111 static const struct snd_kcontrol_new vpmon_ctl =
112 SOC_DAPM_SINGLE("Switch", CS35L32_PWRCTL2, 5, 1, 1);
113
114 static const struct snd_kcontrol_new cs35l32_snd_controls[] = {
115 SOC_SINGLE_TLV("Speaker Volume", CS35L32_CLASSD_CTL,
116 3, 0x04, 1, classd_ctl_tlv),
117 SOC_SINGLE("Zero Cross Switch", CS35L32_CLASSD_CTL, 2, 1, 0),
118 SOC_SINGLE("Gain Manager Switch", CS35L32_AUDIO_LED_MNGR, 3, 1, 0),
119 };
120
121 static const struct snd_soc_dapm_widget cs35l32_dapm_widgets[] = {
122
123 SND_SOC_DAPM_SUPPLY("BOOST", CS35L32_PWRCTL1, 2, 1, NULL, 0),
124 SND_SOC_DAPM_OUT_DRV("Speaker", CS35L32_PWRCTL1, 7, 1, NULL, 0),
125
126 SND_SOC_DAPM_AIF_OUT("SDOUT", NULL, 0, CS35L32_PWRCTL2, 3, 1),
127
128 SND_SOC_DAPM_INPUT("VP"),
129 SND_SOC_DAPM_INPUT("ISENSE"),
130 SND_SOC_DAPM_INPUT("VSENSE"),
131
132 SND_SOC_DAPM_SWITCH("VMON ADC", CS35L32_PWRCTL2, 7, 1, &vmon_ctl),
133 SND_SOC_DAPM_SWITCH("IMON ADC", CS35L32_PWRCTL2, 6, 1, &imon_ctl),
134 SND_SOC_DAPM_SWITCH("VPMON ADC", CS35L32_PWRCTL2, 5, 1, &vpmon_ctl),
135 };
136
137 static const struct snd_soc_dapm_route cs35l32_audio_map[] = {
138
139 {"Speaker", NULL, "BOOST"},
140
141 {"VMON ADC", NULL, "VSENSE"},
142 {"IMON ADC", NULL, "ISENSE"},
143 {"VPMON ADC", NULL, "VP"},
144
145 {"SDOUT", "Switch", "VMON ADC"},
146 {"SDOUT", "Switch", "IMON ADC"},
147 {"SDOUT", "Switch", "VPMON ADC"},
148
149 {"Capture", NULL, "SDOUT"},
150 };
151
cs35l32_set_dai_fmt(struct snd_soc_dai * codec_dai,unsigned int fmt)152 static int cs35l32_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
153 {
154 struct snd_soc_component *component = codec_dai->component;
155
156 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
157 case SND_SOC_DAIFMT_CBM_CFM:
158 snd_soc_component_update_bits(component, CS35L32_ADSP_CTL,
159 CS35L32_ADSP_MASTER_MASK,
160 CS35L32_ADSP_MASTER_MASK);
161 break;
162 case SND_SOC_DAIFMT_CBS_CFS:
163 snd_soc_component_update_bits(component, CS35L32_ADSP_CTL,
164 CS35L32_ADSP_MASTER_MASK, 0);
165 break;
166 default:
167 return -EINVAL;
168 }
169
170 return 0;
171 }
172
cs35l32_set_tristate(struct snd_soc_dai * dai,int tristate)173 static int cs35l32_set_tristate(struct snd_soc_dai *dai, int tristate)
174 {
175 struct snd_soc_component *component = dai->component;
176
177 return snd_soc_component_update_bits(component, CS35L32_PWRCTL2,
178 CS35L32_SDOUT_3ST, tristate << 3);
179 }
180
181 static const struct snd_soc_dai_ops cs35l32_ops = {
182 .set_fmt = cs35l32_set_dai_fmt,
183 .set_tristate = cs35l32_set_tristate,
184 };
185
186 static struct snd_soc_dai_driver cs35l32_dai[] = {
187 {
188 .name = "cs35l32-monitor",
189 .id = 0,
190 .capture = {
191 .stream_name = "Capture",
192 .channels_min = 2,
193 .channels_max = 2,
194 .rates = CS35L32_RATES,
195 .formats = CS35L32_FORMATS,
196 },
197 .ops = &cs35l32_ops,
198 .symmetric_rate = 1,
199 }
200 };
201
cs35l32_component_set_sysclk(struct snd_soc_component * component,int clk_id,int source,unsigned int freq,int dir)202 static int cs35l32_component_set_sysclk(struct snd_soc_component *component,
203 int clk_id, int source, unsigned int freq, int dir)
204 {
205 unsigned int val;
206
207 switch (freq) {
208 case 6000000:
209 val = CS35L32_MCLK_RATIO;
210 break;
211 case 12000000:
212 val = CS35L32_MCLK_DIV2_MASK | CS35L32_MCLK_RATIO;
213 break;
214 case 6144000:
215 val = 0;
216 break;
217 case 12288000:
218 val = CS35L32_MCLK_DIV2_MASK;
219 break;
220 default:
221 return -EINVAL;
222 }
223
224 return snd_soc_component_update_bits(component, CS35L32_CLK_CTL,
225 CS35L32_MCLK_DIV2_MASK | CS35L32_MCLK_RATIO_MASK, val);
226 }
227
228 static const struct snd_soc_component_driver soc_component_dev_cs35l32 = {
229 .set_sysclk = cs35l32_component_set_sysclk,
230 .controls = cs35l32_snd_controls,
231 .num_controls = ARRAY_SIZE(cs35l32_snd_controls),
232 .dapm_widgets = cs35l32_dapm_widgets,
233 .num_dapm_widgets = ARRAY_SIZE(cs35l32_dapm_widgets),
234 .dapm_routes = cs35l32_audio_map,
235 .num_dapm_routes = ARRAY_SIZE(cs35l32_audio_map),
236 .idle_bias_on = 1,
237 .use_pmdown_time = 1,
238 .endianness = 1,
239 };
240
241 /* Current and threshold powerup sequence Pg37 in datasheet */
242 static const struct reg_sequence cs35l32_monitor_patch[] = {
243
244 { 0x00, 0x99 },
245 { 0x48, 0x17 },
246 { 0x49, 0x56 },
247 { 0x43, 0x01 },
248 { 0x3B, 0x62 },
249 { 0x3C, 0x80 },
250 { 0x00, 0x00 },
251 };
252
253 static const struct regmap_config cs35l32_regmap = {
254 .reg_bits = 8,
255 .val_bits = 8,
256
257 .max_register = CS35L32_MAX_REGISTER,
258 .reg_defaults = cs35l32_reg_defaults,
259 .num_reg_defaults = ARRAY_SIZE(cs35l32_reg_defaults),
260 .volatile_reg = cs35l32_volatile_register,
261 .readable_reg = cs35l32_readable_register,
262 .precious_reg = cs35l32_precious_register,
263 .cache_type = REGCACHE_MAPLE,
264
265 .use_single_read = true,
266 .use_single_write = true,
267 };
268
cs35l32_handle_of_data(struct i2c_client * i2c_client,struct cs35l32_platform_data * pdata)269 static int cs35l32_handle_of_data(struct i2c_client *i2c_client,
270 struct cs35l32_platform_data *pdata)
271 {
272 struct device_node *np = i2c_client->dev.of_node;
273 unsigned int val;
274
275 if (of_property_read_u32(np, "cirrus,sdout-share", &val) >= 0)
276 pdata->sdout_share = val;
277
278 if (of_property_read_u32(np, "cirrus,boost-manager", &val))
279 val = -1u;
280
281 switch (val) {
282 case CS35L32_BOOST_MGR_AUTO:
283 case CS35L32_BOOST_MGR_AUTO_AUDIO:
284 case CS35L32_BOOST_MGR_BYPASS:
285 case CS35L32_BOOST_MGR_FIXED:
286 pdata->boost_mng = val;
287 break;
288 case -1u:
289 default:
290 dev_err(&i2c_client->dev,
291 "Wrong cirrus,boost-manager DT value %d\n", val);
292 pdata->boost_mng = CS35L32_BOOST_MGR_BYPASS;
293 }
294
295 if (of_property_read_u32(np, "cirrus,sdout-datacfg", &val))
296 val = -1u;
297 switch (val) {
298 case CS35L32_DATA_CFG_LR_VP:
299 case CS35L32_DATA_CFG_LR_STAT:
300 case CS35L32_DATA_CFG_LR:
301 case CS35L32_DATA_CFG_LR_VPSTAT:
302 pdata->sdout_datacfg = val;
303 break;
304 case -1u:
305 default:
306 dev_err(&i2c_client->dev,
307 "Wrong cirrus,sdout-datacfg DT value %d\n", val);
308 pdata->sdout_datacfg = CS35L32_DATA_CFG_LR;
309 }
310
311 if (of_property_read_u32(np, "cirrus,battery-threshold", &val))
312 val = -1u;
313 switch (val) {
314 case CS35L32_BATT_THRESH_3_1V:
315 case CS35L32_BATT_THRESH_3_2V:
316 case CS35L32_BATT_THRESH_3_3V:
317 case CS35L32_BATT_THRESH_3_4V:
318 pdata->batt_thresh = val;
319 break;
320 case -1u:
321 default:
322 dev_err(&i2c_client->dev,
323 "Wrong cirrus,battery-threshold DT value %d\n", val);
324 pdata->batt_thresh = CS35L32_BATT_THRESH_3_3V;
325 }
326
327 if (of_property_read_u32(np, "cirrus,battery-recovery", &val))
328 val = -1u;
329 switch (val) {
330 case CS35L32_BATT_RECOV_3_1V:
331 case CS35L32_BATT_RECOV_3_2V:
332 case CS35L32_BATT_RECOV_3_3V:
333 case CS35L32_BATT_RECOV_3_4V:
334 case CS35L32_BATT_RECOV_3_5V:
335 case CS35L32_BATT_RECOV_3_6V:
336 pdata->batt_recov = val;
337 break;
338 case -1u:
339 default:
340 dev_err(&i2c_client->dev,
341 "Wrong cirrus,battery-recovery DT value %d\n", val);
342 pdata->batt_recov = CS35L32_BATT_RECOV_3_4V;
343 }
344
345 return 0;
346 }
347
cs35l32_i2c_probe(struct i2c_client * i2c_client)348 static int cs35l32_i2c_probe(struct i2c_client *i2c_client)
349 {
350 struct cs35l32_private *cs35l32;
351 struct cs35l32_platform_data *pdata =
352 dev_get_platdata(&i2c_client->dev);
353 int ret, i, devid;
354 unsigned int reg;
355
356 cs35l32 = devm_kzalloc(&i2c_client->dev, sizeof(*cs35l32), GFP_KERNEL);
357 if (!cs35l32)
358 return -ENOMEM;
359
360 i2c_set_clientdata(i2c_client, cs35l32);
361
362 cs35l32->regmap = devm_regmap_init_i2c(i2c_client, &cs35l32_regmap);
363 if (IS_ERR(cs35l32->regmap)) {
364 ret = PTR_ERR(cs35l32->regmap);
365 dev_err(&i2c_client->dev, "regmap_init() failed: %d\n", ret);
366 return ret;
367 }
368
369 if (pdata) {
370 cs35l32->pdata = *pdata;
371 } else {
372 pdata = devm_kzalloc(&i2c_client->dev, sizeof(*pdata),
373 GFP_KERNEL);
374 if (!pdata)
375 return -ENOMEM;
376
377 if (i2c_client->dev.of_node) {
378 ret = cs35l32_handle_of_data(i2c_client,
379 &cs35l32->pdata);
380 if (ret != 0)
381 return ret;
382 }
383 }
384
385 for (i = 0; i < ARRAY_SIZE(cs35l32->supplies); i++)
386 cs35l32->supplies[i].supply = cs35l32_supply_names[i];
387
388 ret = devm_regulator_bulk_get(&i2c_client->dev,
389 ARRAY_SIZE(cs35l32->supplies),
390 cs35l32->supplies);
391 if (ret != 0) {
392 dev_err(&i2c_client->dev,
393 "Failed to request supplies: %d\n", ret);
394 return ret;
395 }
396
397 ret = regulator_bulk_enable(ARRAY_SIZE(cs35l32->supplies),
398 cs35l32->supplies);
399 if (ret != 0) {
400 dev_err(&i2c_client->dev,
401 "Failed to enable supplies: %d\n", ret);
402 return ret;
403 }
404
405 /* Reset the Device */
406 cs35l32->reset_gpio = devm_gpiod_get_optional(&i2c_client->dev,
407 "reset", GPIOD_OUT_LOW);
408 if (IS_ERR(cs35l32->reset_gpio)) {
409 ret = PTR_ERR(cs35l32->reset_gpio);
410 goto err_supplies;
411 }
412
413 gpiod_set_value_cansleep(cs35l32->reset_gpio, 1);
414
415 /* initialize codec */
416 devid = cirrus_read_device_id(cs35l32->regmap, CS35L32_DEVID_AB);
417 if (devid < 0) {
418 ret = devid;
419 dev_err(&i2c_client->dev, "Failed to read device ID: %d\n", ret);
420 goto err_disable;
421 }
422
423 if (devid != CS35L32_CHIP_ID) {
424 ret = -ENODEV;
425 dev_err(&i2c_client->dev,
426 "CS35L32 Device ID (%X). Expected %X\n",
427 devid, CS35L32_CHIP_ID);
428 goto err_disable;
429 }
430
431 ret = regmap_read(cs35l32->regmap, CS35L32_REV_ID, ®);
432 if (ret < 0) {
433 dev_err(&i2c_client->dev, "Get Revision ID failed\n");
434 goto err_disable;
435 }
436
437 ret = regmap_register_patch(cs35l32->regmap, cs35l32_monitor_patch,
438 ARRAY_SIZE(cs35l32_monitor_patch));
439 if (ret < 0) {
440 dev_err(&i2c_client->dev, "Failed to apply errata patch\n");
441 goto err_disable;
442 }
443
444 dev_info(&i2c_client->dev,
445 "Cirrus Logic CS35L32, Revision: %02X\n", reg & 0xFF);
446
447 /* Setup VBOOST Management */
448 if (cs35l32->pdata.boost_mng)
449 regmap_update_bits(cs35l32->regmap, CS35L32_AUDIO_LED_MNGR,
450 CS35L32_BOOST_MASK,
451 cs35l32->pdata.boost_mng);
452
453 /* Setup ADSP Format Config */
454 if (cs35l32->pdata.sdout_share)
455 regmap_update_bits(cs35l32->regmap, CS35L32_ADSP_CTL,
456 CS35L32_ADSP_SHARE_MASK,
457 cs35l32->pdata.sdout_share << 3);
458
459 /* Setup ADSP Data Configuration */
460 if (cs35l32->pdata.sdout_datacfg)
461 regmap_update_bits(cs35l32->regmap, CS35L32_ADSP_CTL,
462 CS35L32_ADSP_DATACFG_MASK,
463 cs35l32->pdata.sdout_datacfg << 4);
464
465 /* Setup Low Battery Recovery */
466 if (cs35l32->pdata.batt_recov)
467 regmap_update_bits(cs35l32->regmap, CS35L32_BATT_THRESHOLD,
468 CS35L32_BATT_REC_MASK,
469 cs35l32->pdata.batt_recov << 1);
470
471 /* Setup Low Battery Threshold */
472 if (cs35l32->pdata.batt_thresh)
473 regmap_update_bits(cs35l32->regmap, CS35L32_BATT_THRESHOLD,
474 CS35L32_BATT_THRESH_MASK,
475 cs35l32->pdata.batt_thresh << 4);
476
477 /* Power down the AMP */
478 regmap_update_bits(cs35l32->regmap, CS35L32_PWRCTL1, CS35L32_PDN_AMP,
479 CS35L32_PDN_AMP);
480
481 /* Clear MCLK Error Bit since we don't have the clock yet */
482 regmap_read(cs35l32->regmap, CS35L32_INT_STATUS_1, ®);
483
484 ret = devm_snd_soc_register_component(&i2c_client->dev,
485 &soc_component_dev_cs35l32, cs35l32_dai,
486 ARRAY_SIZE(cs35l32_dai));
487 if (ret < 0)
488 goto err_disable;
489
490 return 0;
491
492 err_disable:
493 gpiod_set_value_cansleep(cs35l32->reset_gpio, 0);
494 err_supplies:
495 regulator_bulk_disable(ARRAY_SIZE(cs35l32->supplies),
496 cs35l32->supplies);
497 return ret;
498 }
499
cs35l32_i2c_remove(struct i2c_client * i2c_client)500 static void cs35l32_i2c_remove(struct i2c_client *i2c_client)
501 {
502 struct cs35l32_private *cs35l32 = i2c_get_clientdata(i2c_client);
503
504 /* Hold down reset */
505 gpiod_set_value_cansleep(cs35l32->reset_gpio, 0);
506 }
507
508 #ifdef CONFIG_PM
cs35l32_runtime_suspend(struct device * dev)509 static int cs35l32_runtime_suspend(struct device *dev)
510 {
511 struct cs35l32_private *cs35l32 = dev_get_drvdata(dev);
512
513 regcache_cache_only(cs35l32->regmap, true);
514 regcache_mark_dirty(cs35l32->regmap);
515
516 /* Hold down reset */
517 gpiod_set_value_cansleep(cs35l32->reset_gpio, 0);
518
519 /* remove power */
520 regulator_bulk_disable(ARRAY_SIZE(cs35l32->supplies),
521 cs35l32->supplies);
522
523 return 0;
524 }
525
cs35l32_runtime_resume(struct device * dev)526 static int cs35l32_runtime_resume(struct device *dev)
527 {
528 struct cs35l32_private *cs35l32 = dev_get_drvdata(dev);
529 int ret;
530
531 /* Enable power */
532 ret = regulator_bulk_enable(ARRAY_SIZE(cs35l32->supplies),
533 cs35l32->supplies);
534 if (ret != 0) {
535 dev_err(dev, "Failed to enable supplies: %d\n",
536 ret);
537 return ret;
538 }
539
540 gpiod_set_value_cansleep(cs35l32->reset_gpio, 1);
541
542 regcache_cache_only(cs35l32->regmap, false);
543 regcache_sync(cs35l32->regmap);
544
545 return 0;
546 }
547 #endif
548
549 static const struct dev_pm_ops cs35l32_runtime_pm = {
550 SET_RUNTIME_PM_OPS(cs35l32_runtime_suspend, cs35l32_runtime_resume,
551 NULL)
552 };
553
554 static const struct of_device_id cs35l32_of_match[] = {
555 { .compatible = "cirrus,cs35l32", },
556 {},
557 };
558 MODULE_DEVICE_TABLE(of, cs35l32_of_match);
559
560
561 static const struct i2c_device_id cs35l32_id[] = {
562 {"cs35l32", 0},
563 {}
564 };
565
566 MODULE_DEVICE_TABLE(i2c, cs35l32_id);
567
568 static struct i2c_driver cs35l32_i2c_driver = {
569 .driver = {
570 .name = "cs35l32",
571 .pm = &cs35l32_runtime_pm,
572 .of_match_table = cs35l32_of_match,
573 },
574 .id_table = cs35l32_id,
575 .probe = cs35l32_i2c_probe,
576 .remove = cs35l32_i2c_remove,
577 };
578
579 module_i2c_driver(cs35l32_i2c_driver);
580
581 MODULE_DESCRIPTION("ASoC CS35L32 driver");
582 MODULE_AUTHOR("Brian Austin, Cirrus Logic Inc, <brian.austin@cirrus.com>");
583 MODULE_LICENSE("GPL");
584