xref: /openbmc/linux/sound/soc/codecs/alc5623.h (revision d2912cb1)
1d2912cb1SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */
26f4bc952SArnaud Patard (Rtp) /*
36f4bc952SArnaud Patard (Rtp)  * alc5623.h  --  alc562[123] ALSA Soc Audio driver
46f4bc952SArnaud Patard (Rtp)  *
56f4bc952SArnaud Patard (Rtp)  * Copyright 2008 Realtek Microelectronics
66f4bc952SArnaud Patard (Rtp)  * Copyright 2010 Arnaud Patard <arnaud.patard@rtp-net.org>
76f4bc952SArnaud Patard (Rtp)  *
86f4bc952SArnaud Patard (Rtp)  * Author: flove <flove@realtek.com>
96f4bc952SArnaud Patard (Rtp)  * Arnaud Patard <arnaud.patard@rtp-net.org>
106f4bc952SArnaud Patard (Rtp)  */
116f4bc952SArnaud Patard (Rtp) 
126f4bc952SArnaud Patard (Rtp) #ifndef _ALC5623_H
136f4bc952SArnaud Patard (Rtp) #define _ALC5623_H
146f4bc952SArnaud Patard (Rtp) 
156f4bc952SArnaud Patard (Rtp) #define ALC5623_RESET				0x00
166f4bc952SArnaud Patard (Rtp) /*				5621 5622 5623  */
176f4bc952SArnaud Patard (Rtp) /* speaker output vol		   2    2       */
186f4bc952SArnaud Patard (Rtp) /* line output vol                      4    2  */
196f4bc952SArnaud Patard (Rtp) /* HP output vol		   4    0    4  */
206f4bc952SArnaud Patard (Rtp) #define ALC5623_SPK_OUT_VOL			0x02
216f4bc952SArnaud Patard (Rtp) #define ALC5623_HP_OUT_VOL			0x04
226f4bc952SArnaud Patard (Rtp) #define ALC5623_MONO_AUX_OUT_VOL		0x06
236f4bc952SArnaud Patard (Rtp) #define ALC5623_AUXIN_VOL			0x08
246f4bc952SArnaud Patard (Rtp) #define ALC5623_LINE_IN_VOL			0x0A
256f4bc952SArnaud Patard (Rtp) #define ALC5623_STEREO_DAC_VOL			0x0C
266f4bc952SArnaud Patard (Rtp) #define ALC5623_MIC_VOL				0x0E
276f4bc952SArnaud Patard (Rtp) #define ALC5623_MIC_ROUTING_CTRL		0x10
286f4bc952SArnaud Patard (Rtp) #define ALC5623_ADC_REC_GAIN			0x12
296f4bc952SArnaud Patard (Rtp) #define ALC5623_ADC_REC_MIXER			0x14
306f4bc952SArnaud Patard (Rtp) #define ALC5623_SOFT_VOL_CTRL_TIME		0x16
316f4bc952SArnaud Patard (Rtp) /* ALC5623_OUTPUT_MIXER_CTRL :			*/
326f4bc952SArnaud Patard (Rtp) /* same remark as for reg 2 line vs speaker	*/
336f4bc952SArnaud Patard (Rtp) #define ALC5623_OUTPUT_MIXER_CTRL		0x1C
346f4bc952SArnaud Patard (Rtp) #define ALC5623_MIC_CTRL			0x22
356f4bc952SArnaud Patard (Rtp) 
366f4bc952SArnaud Patard (Rtp) #define	ALC5623_DAI_CONTROL			0x34
376f4bc952SArnaud Patard (Rtp) #define ALC5623_DAI_SDP_MASTER_MODE		(0 << 15)
386f4bc952SArnaud Patard (Rtp) #define ALC5623_DAI_SDP_SLAVE_MODE		(1 << 15)
396f4bc952SArnaud Patard (Rtp) #define ALC5623_DAI_I2S_PCM_MODE		(1 << 14)
406f4bc952SArnaud Patard (Rtp) #define ALC5623_DAI_MAIN_I2S_BCLK_POL_CTRL	(1 <<  7)
416f4bc952SArnaud Patard (Rtp) #define ALC5623_DAI_ADC_DATA_L_R_SWAP		(1 <<  5)
426f4bc952SArnaud Patard (Rtp) #define ALC5623_DAI_DAC_DATA_L_R_SWAP		(1 <<  4)
436f4bc952SArnaud Patard (Rtp) #define ALC5623_DAI_I2S_DL_MASK			(3 <<  2)
446f4bc952SArnaud Patard (Rtp) #define ALC5623_DAI_I2S_DL_32			(3 <<  2)
456f4bc952SArnaud Patard (Rtp) #define	ALC5623_DAI_I2S_DL_24			(2 <<  2)
466f4bc952SArnaud Patard (Rtp) #define ALC5623_DAI_I2S_DL_20			(1 <<  2)
476f4bc952SArnaud Patard (Rtp) #define ALC5623_DAI_I2S_DL_16			(0 <<  2)
486f4bc952SArnaud Patard (Rtp) #define ALC5623_DAI_I2S_DF_PCM			(3 <<  0)
496f4bc952SArnaud Patard (Rtp) #define	ALC5623_DAI_I2S_DF_LEFT			(2 <<  0)
506f4bc952SArnaud Patard (Rtp) #define ALC5623_DAI_I2S_DF_RIGHT		(1 <<  0)
516f4bc952SArnaud Patard (Rtp) #define ALC5623_DAI_I2S_DF_I2S			(0 <<  0)
526f4bc952SArnaud Patard (Rtp) 
536f4bc952SArnaud Patard (Rtp) #define ALC5623_STEREO_AD_DA_CLK_CTRL		0x36
546f4bc952SArnaud Patard (Rtp) #define	ALC5623_COMPANDING_CTRL			0x38
556f4bc952SArnaud Patard (Rtp) 
566f4bc952SArnaud Patard (Rtp) #define	ALC5623_PWR_MANAG_ADD1			0x3A
576f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_ADD1_MAIN_I2S_EN		(1 << 15)
586f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_ADD1_ZC_DET_PD_EN		(1 << 14)
596f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_ADD1_MIC1_BIAS_EN		(1 << 11)
606f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_ADD1_SHORT_CURR_DET_EN	(1 << 10)
616f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_ADD1_SOFTGEN_EN		(1 <<  8) /* rsvd on 5622 */
626f4bc952SArnaud Patard (Rtp) #define	ALC5623_PWR_ADD1_DEPOP_BUF_HP		(1 <<  6) /* rsvd on 5622 */
636f4bc952SArnaud Patard (Rtp) #define	ALC5623_PWR_ADD1_HP_OUT_AMP		(1 <<  5)
646f4bc952SArnaud Patard (Rtp) #define	ALC5623_PWR_ADD1_HP_OUT_ENH_AMP		(1 <<  4) /* rsvd on 5622 */
656f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_ADD1_DEPOP_BUF_AUX		(1 <<  2)
666f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_ADD1_AUX_OUT_AMP		(1 <<  1)
676f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_ADD1_AUX_OUT_ENH_AMP	(1 <<  0) /* rsvd on 5622 */
686f4bc952SArnaud Patard (Rtp) 
696f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_MANAG_ADD2			0x3C
706f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_ADD2_LINEOUT		(1 << 15) /* rt5623 */
716f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_ADD2_CLASS_AB		(1 << 15) /* rt5621 */
726f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_ADD2_CLASS_D		(1 << 14) /* rt5621 */
736f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_ADD2_VREF			(1 << 13)
746f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_ADD2_PLL			(1 << 12)
756f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_ADD2_DAC_REF_CIR		(1 << 10)
766f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_ADD2_L_DAC_CLK		(1 <<  9)
776f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_ADD2_R_DAC_CLK		(1 <<  8)
786f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_ADD2_L_ADC_CLK_GAIN		(1 <<  7)
796f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_ADD2_R_ADC_CLK_GAIN		(1 <<  6)
806f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_ADD2_L_HP_MIXER		(1 <<  5)
816f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_ADD2_R_HP_MIXER		(1 <<  4)
826f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_ADD2_SPK_MIXER		(1 <<  3)
836f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_ADD2_MONO_MIXER		(1 <<  2)
846f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_ADD2_L_ADC_REC_MIXER	(1 <<  1)
856f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_ADD2_R_ADC_REC_MIXER	(1 <<  0)
866f4bc952SArnaud Patard (Rtp) 
876f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_MANAG_ADD3			0x3E
886f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_ADD3_MAIN_BIAS		(1 << 15)
896f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_ADD3_AUXOUT_L_VOL_AMP	(1 << 14)
906f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_ADD3_AUXOUT_R_VOL_AMP	(1 << 13)
916f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_ADD3_SPK_OUT		(1 << 12)
926f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_ADD3_HP_L_OUT_VOL		(1 << 10)
936f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_ADD3_HP_R_OUT_VOL		(1 <<  9)
946f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_ADD3_LINEIN_L_VOL		(1 <<  7)
956f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_ADD3_LINEIN_R_VOL		(1 <<  6)
966f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_ADD3_AUXIN_L_VOL		(1 <<  5)
976f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_ADD3_AUXIN_R_VOL		(1 <<  4)
986f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_ADD3_MIC1_FUN_CTRL		(1 <<  3)
996f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_ADD3_MIC2_FUN_CTRL		(1 <<  2)
1006f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_ADD3_MIC1_BOOST_AD		(1 <<  1)
1016f4bc952SArnaud Patard (Rtp) #define ALC5623_PWR_ADD3_MIC2_BOOST_AD		(1 <<  0)
1026f4bc952SArnaud Patard (Rtp) 
1036f4bc952SArnaud Patard (Rtp) #define ALC5623_ADD_CTRL_REG			0x40
1046f4bc952SArnaud Patard (Rtp) 
1056f4bc952SArnaud Patard (Rtp) #define	ALC5623_GLOBAL_CLK_CTRL_REG		0x42
1066f4bc952SArnaud Patard (Rtp) #define ALC5623_GBL_CLK_SYS_SOUR_SEL_PLL	(1 << 15)
1076f4bc952SArnaud Patard (Rtp) #define ALC5623_GBL_CLK_SYS_SOUR_SEL_MCLK	(0 << 15)
1086f4bc952SArnaud Patard (Rtp) #define ALC5623_GBL_CLK_PLL_SOUR_SEL_BITCLK	(1 << 14)
1096f4bc952SArnaud Patard (Rtp) #define ALC5623_GBL_CLK_PLL_SOUR_SEL_MCLK	(0 << 14)
1106f4bc952SArnaud Patard (Rtp) #define ALC5623_GBL_CLK_PLL_DIV_RATIO_DIV8	(3 <<  1)
1116f4bc952SArnaud Patard (Rtp) #define ALC5623_GBL_CLK_PLL_DIV_RATIO_DIV4	(2 <<  1)
1126f4bc952SArnaud Patard (Rtp) #define ALC5623_GBL_CLK_PLL_DIV_RATIO_DIV2	(1 <<  1)
1136f4bc952SArnaud Patard (Rtp) #define ALC5623_GBL_CLK_PLL_DIV_RATIO_DIV1	(0 <<  1)
1146f4bc952SArnaud Patard (Rtp) #define ALC5623_GBL_CLK_PLL_PRE_DIV2		(1 <<  0)
1156f4bc952SArnaud Patard (Rtp) #define ALC5623_GBL_CLK_PLL_PRE_DIV1		(0 <<  0)
1166f4bc952SArnaud Patard (Rtp) 
1176f4bc952SArnaud Patard (Rtp) #define ALC5623_PLL_CTRL			0x44
1186f4bc952SArnaud Patard (Rtp) #define ALC5623_PLL_CTRL_N_VAL(n)		(((n)&0xff) << 8)
1196f4bc952SArnaud Patard (Rtp) #define ALC5623_PLL_CTRL_K_VAL(k)		(((k)&0x7)  << 4)
1206f4bc952SArnaud Patard (Rtp) #define ALC5623_PLL_CTRL_M_VAL(m)		((m)&0xf)
1216f4bc952SArnaud Patard (Rtp) 
1226f4bc952SArnaud Patard (Rtp) #define ALC5623_GPIO_OUTPUT_PIN_CTRL		0x4A
1236f4bc952SArnaud Patard (Rtp) #define ALC5623_GPIO_PIN_CONFIG			0x4C
1246f4bc952SArnaud Patard (Rtp) #define ALC5623_GPIO_PIN_POLARITY		0x4E
1256f4bc952SArnaud Patard (Rtp) #define ALC5623_GPIO_PIN_STICKY			0x50
1266f4bc952SArnaud Patard (Rtp) #define ALC5623_GPIO_PIN_WAKEUP			0x52
1276f4bc952SArnaud Patard (Rtp) #define ALC5623_GPIO_PIN_STATUS			0x54
1286f4bc952SArnaud Patard (Rtp) #define ALC5623_GPIO_PIN_SHARING		0x56
1296f4bc952SArnaud Patard (Rtp) #define	ALC5623_OVER_CURR_STATUS		0x58
1306f4bc952SArnaud Patard (Rtp) #define ALC5623_JACK_DET_CTRL			0x5A
1316f4bc952SArnaud Patard (Rtp) 
1326f4bc952SArnaud Patard (Rtp) #define ALC5623_MISC_CTRL			0x5E
1336f4bc952SArnaud Patard (Rtp) #define ALC5623_MISC_DISABLE_FAST_VREG		(1 << 15)
1346f4bc952SArnaud Patard (Rtp) #define ALC5623_MISC_SPK_CLASS_AB_OC_PD		(1 << 13) /* 5621 */
1356f4bc952SArnaud Patard (Rtp) #define ALC5623_MISC_SPK_CLASS_AB_OC_DET	(1 << 12) /* 5621 */
1366f4bc952SArnaud Patard (Rtp) #define ALC5623_MISC_HP_DEPOP_MODE3_EN		(1 << 10)
1376f4bc952SArnaud Patard (Rtp) #define ALC5623_MISC_HP_DEPOP_MODE2_EN		(1 <<  9)
1386f4bc952SArnaud Patard (Rtp) #define ALC5623_MISC_HP_DEPOP_MODE1_EN		(1 <<  8)
1396f4bc952SArnaud Patard (Rtp) #define ALC5623_MISC_AUXOUT_DEPOP_MODE3_EN	(1 <<  6)
1406f4bc952SArnaud Patard (Rtp) #define ALC5623_MISC_AUXOUT_DEPOP_MODE2_EN	(1 <<  5)
1416f4bc952SArnaud Patard (Rtp) #define ALC5623_MISC_AUXOUT_DEPOP_MODE1_EN	(1 <<  4)
1426f4bc952SArnaud Patard (Rtp) #define ALC5623_MISC_M_DAC_L_INPUT		(1 <<  3)
1436f4bc952SArnaud Patard (Rtp) #define ALC5623_MISC_M_DAC_R_INPUT		(1 <<  2)
1446f4bc952SArnaud Patard (Rtp) #define ALC5623_MISC_IRQOUT_INV_CTRL		(1 <<  0)
1456f4bc952SArnaud Patard (Rtp) 
1466f4bc952SArnaud Patard (Rtp) #define	ALC5623_PSEDUEO_SPATIAL_CTRL		0x60
1476f4bc952SArnaud Patard (Rtp) #define ALC5623_EQ_CTRL				0x62
1486f4bc952SArnaud Patard (Rtp) #define ALC5623_EQ_MODE_ENABLE			0x66
1496f4bc952SArnaud Patard (Rtp) #define ALC5623_AVC_CTRL			0x68
1506f4bc952SArnaud Patard (Rtp) #define ALC5623_HID_CTRL_INDEX			0x6A
1516f4bc952SArnaud Patard (Rtp) #define ALC5623_HID_CTRL_DATA			0x6C
1526f4bc952SArnaud Patard (Rtp) #define ALC5623_VENDOR_ID1			0x7C
1536f4bc952SArnaud Patard (Rtp) #define ALC5623_VENDOR_ID2			0x7E
1546f4bc952SArnaud Patard (Rtp) 
1556f4bc952SArnaud Patard (Rtp) #define ALC5623_PLL_FR_MCLK			0
1566f4bc952SArnaud Patard (Rtp) #define ALC5623_PLL_FR_BCK			1
1576f4bc952SArnaud Patard (Rtp) #endif
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