xref: /openbmc/linux/sound/soc/codecs/ak4642.c (revision b6bec26c)
1 /*
2  * ak4642.c  --  AK4642/AK4643 ALSA Soc Audio driver
3  *
4  * Copyright (C) 2009 Renesas Solutions Corp.
5  * Kuninori Morimoto <morimoto.kuninori@renesas.com>
6  *
7  * Based on wm8731.c by Richard Purdie
8  * Based on ak4535.c by Richard Purdie
9  * Based on wm8753.c by Liam Girdwood
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License version 2 as
13  * published by the Free Software Foundation.
14  */
15 
16 /* ** CAUTION **
17  *
18  * This is very simple driver.
19  * It can use headphone output / stereo input only
20  *
21  * AK4642 is tested.
22  * AK4643 is tested.
23  * AK4648 is tested.
24  */
25 
26 #include <linux/delay.h>
27 #include <linux/i2c.h>
28 #include <linux/slab.h>
29 #include <linux/module.h>
30 #include <sound/soc.h>
31 #include <sound/initval.h>
32 #include <sound/tlv.h>
33 
34 #define PW_MGMT1	0x00
35 #define PW_MGMT2	0x01
36 #define SG_SL1		0x02
37 #define SG_SL2		0x03
38 #define MD_CTL1		0x04
39 #define MD_CTL2		0x05
40 #define TIMER		0x06
41 #define ALC_CTL1	0x07
42 #define ALC_CTL2	0x08
43 #define L_IVC		0x09
44 #define L_DVC		0x0a
45 #define ALC_CTL3	0x0b
46 #define R_IVC		0x0c
47 #define R_DVC		0x0d
48 #define MD_CTL3		0x0e
49 #define MD_CTL4		0x0f
50 #define PW_MGMT3	0x10
51 #define DF_S		0x11
52 #define FIL3_0		0x12
53 #define FIL3_1		0x13
54 #define FIL3_2		0x14
55 #define FIL3_3		0x15
56 #define EQ_0		0x16
57 #define EQ_1		0x17
58 #define EQ_2		0x18
59 #define EQ_3		0x19
60 #define EQ_4		0x1a
61 #define EQ_5		0x1b
62 #define FIL1_0		0x1c
63 #define FIL1_1		0x1d
64 #define FIL1_2		0x1e
65 #define FIL1_3		0x1f
66 #define PW_MGMT4	0x20
67 #define MD_CTL5		0x21
68 #define LO_MS		0x22
69 #define HP_MS		0x23
70 #define SPK_MS		0x24
71 
72 /* PW_MGMT1*/
73 #define PMVCM		(1 << 6) /* VCOM Power Management */
74 #define PMMIN		(1 << 5) /* MIN Input Power Management */
75 #define PMDAC		(1 << 2) /* DAC Power Management */
76 #define PMADL		(1 << 0) /* MIC Amp Lch and ADC Lch Power Management */
77 
78 /* PW_MGMT2 */
79 #define HPMTN		(1 << 6)
80 #define PMHPL		(1 << 5)
81 #define PMHPR		(1 << 4)
82 #define MS		(1 << 3) /* master/slave select */
83 #define MCKO		(1 << 1)
84 #define PMPLL		(1 << 0)
85 
86 #define PMHP_MASK	(PMHPL | PMHPR)
87 #define PMHP		PMHP_MASK
88 
89 /* PW_MGMT3 */
90 #define PMADR		(1 << 0) /* MIC L / ADC R Power Management */
91 
92 /* SG_SL1 */
93 #define MINS		(1 << 6) /* Switch from MIN to Speaker */
94 #define DACL		(1 << 4) /* Switch from DAC to Stereo or Receiver */
95 #define PMMP		(1 << 2) /* MPWR pin Power Management */
96 #define MGAIN0		(1 << 0) /* MIC amp gain*/
97 
98 /* TIMER */
99 #define ZTM(param)	((param & 0x3) << 4) /* ALC Zoro Crossing TimeOut */
100 #define WTM(param)	(((param & 0x4) << 4) | ((param & 0x3) << 2))
101 
102 /* ALC_CTL1 */
103 #define ALC		(1 << 5) /* ALC Enable */
104 #define LMTH0		(1 << 0) /* ALC Limiter / Recovery Level */
105 
106 /* MD_CTL1 */
107 #define PLL3		(1 << 7)
108 #define PLL2		(1 << 6)
109 #define PLL1		(1 << 5)
110 #define PLL0		(1 << 4)
111 #define PLL_MASK	(PLL3 | PLL2 | PLL1 | PLL0)
112 
113 #define BCKO_MASK	(1 << 3)
114 #define BCKO_64		BCKO_MASK
115 
116 #define DIF_MASK	(3 << 0)
117 #define DSP		(0 << 0)
118 #define RIGHT_J		(1 << 0)
119 #define LEFT_J		(2 << 0)
120 #define I2S		(3 << 0)
121 
122 /* MD_CTL2 */
123 #define FS0		(1 << 0)
124 #define FS1		(1 << 1)
125 #define FS2		(1 << 2)
126 #define FS3		(1 << 5)
127 #define FS_MASK		(FS0 | FS1 | FS2 | FS3)
128 
129 /* MD_CTL3 */
130 #define BST1		(1 << 3)
131 
132 /* MD_CTL4 */
133 #define DACH		(1 << 0)
134 
135 /*
136  * Playback Volume (table 39)
137  *
138  * max : 0x00 : +12.0 dB
139  *       ( 0.5 dB step )
140  * min : 0xFE : -115.0 dB
141  * mute: 0xFF
142  */
143 static const DECLARE_TLV_DB_SCALE(out_tlv, -11550, 50, 1);
144 
145 static const struct snd_kcontrol_new ak4642_snd_controls[] = {
146 
147 	SOC_DOUBLE_R_TLV("Digital Playback Volume", L_DVC, R_DVC,
148 			 0, 0xFF, 1, out_tlv),
149 };
150 
151 static const struct snd_kcontrol_new ak4642_headphone_control =
152 	SOC_DAPM_SINGLE("Switch", PW_MGMT2, 6, 1, 0);
153 
154 static const struct snd_kcontrol_new ak4642_lout_mixer_controls[] = {
155 	SOC_DAPM_SINGLE("DACL", SG_SL1, 4, 1, 0),
156 };
157 
158 static const struct snd_soc_dapm_widget ak4642_dapm_widgets[] = {
159 
160 	/* Outputs */
161 	SND_SOC_DAPM_OUTPUT("HPOUTL"),
162 	SND_SOC_DAPM_OUTPUT("HPOUTR"),
163 	SND_SOC_DAPM_OUTPUT("LINEOUT"),
164 
165 	SND_SOC_DAPM_PGA("HPL Out", PW_MGMT2, 5, 0, NULL, 0),
166 	SND_SOC_DAPM_PGA("HPR Out", PW_MGMT2, 4, 0, NULL, 0),
167 	SND_SOC_DAPM_SWITCH("Headphone Enable", SND_SOC_NOPM, 0, 0,
168 			    &ak4642_headphone_control),
169 
170 	SND_SOC_DAPM_PGA("DACH", MD_CTL4, 0, 0, NULL, 0),
171 
172 	SND_SOC_DAPM_MIXER("LINEOUT Mixer", PW_MGMT1, 3, 0,
173 			   &ak4642_lout_mixer_controls[0],
174 			   ARRAY_SIZE(ak4642_lout_mixer_controls)),
175 
176 	/* DAC */
177 	SND_SOC_DAPM_DAC("DAC", "HiFi Playback", PW_MGMT1, 2, 0),
178 };
179 
180 static const struct snd_soc_dapm_route ak4642_intercon[] = {
181 
182 	/* Outputs */
183 	{"HPOUTL", NULL, "HPL Out"},
184 	{"HPOUTR", NULL, "HPR Out"},
185 	{"LINEOUT", NULL, "LINEOUT Mixer"},
186 
187 	{"HPL Out", NULL, "Headphone Enable"},
188 	{"HPR Out", NULL, "Headphone Enable"},
189 
190 	{"Headphone Enable", "Switch", "DACH"},
191 
192 	{"DACH", NULL, "DAC"},
193 
194 	{"LINEOUT Mixer", "DACL", "DAC"},
195 };
196 
197 /*
198  * ak4642 register cache
199  */
200 static const u8 ak4642_reg[] = {
201 	0x00, 0x00, 0x01, 0x00,
202 	0x02, 0x00, 0x00, 0x00,
203 	0xe1, 0xe1, 0x18, 0x00,
204 	0xe1, 0x18, 0x11, 0x08,
205 	0x00, 0x00, 0x00, 0x00,
206 	0x00, 0x00, 0x00, 0x00,
207 	0x00, 0x00, 0x00, 0x00,
208 	0x00, 0x00, 0x00, 0x00,
209 	0x00, 0x00, 0x00, 0x00,
210 	0x00,
211 };
212 
213 static const u8 ak4648_reg[] = {
214 	0x00, 0x00, 0x01, 0x00,
215 	0x02, 0x00, 0x00, 0x00,
216 	0xe1, 0xe1, 0x18, 0x00,
217 	0xe1, 0x18, 0x11, 0xb8,
218 	0x00, 0x00, 0x00, 0x00,
219 	0x00, 0x00, 0x00, 0x00,
220 	0x00, 0x00, 0x00, 0x00,
221 	0x00, 0x00, 0x00, 0x00,
222 	0x00, 0x00, 0x00, 0x00,
223 	0x00, 0x88, 0x88, 0x08,
224 };
225 
226 static int ak4642_dai_startup(struct snd_pcm_substream *substream,
227 			      struct snd_soc_dai *dai)
228 {
229 	int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
230 	struct snd_soc_codec *codec = dai->codec;
231 
232 	if (is_play) {
233 		/*
234 		 * start headphone output
235 		 *
236 		 * PLL, Master Mode
237 		 * Audio I/F Format :MSB justified (ADC & DAC)
238 		 * Bass Boost Level : Middle
239 		 *
240 		 * This operation came from example code of
241 		 * "ASAHI KASEI AK4642" (japanese) manual p97.
242 		 */
243 		snd_soc_write(codec, L_IVC, 0x91); /* volume */
244 		snd_soc_write(codec, R_IVC, 0x91); /* volume */
245 	} else {
246 		/*
247 		 * start stereo input
248 		 *
249 		 * PLL Master Mode
250 		 * Audio I/F Format:MSB justified (ADC & DAC)
251 		 * Pre MIC AMP:+20dB
252 		 * MIC Power On
253 		 * ALC setting:Refer to Table 35
254 		 * ALC bit=“1”
255 		 *
256 		 * This operation came from example code of
257 		 * "ASAHI KASEI AK4642" (japanese) manual p94.
258 		 */
259 		snd_soc_write(codec, SG_SL1, PMMP | MGAIN0);
260 		snd_soc_write(codec, TIMER, ZTM(0x3) | WTM(0x3));
261 		snd_soc_write(codec, ALC_CTL1, ALC | LMTH0);
262 		snd_soc_update_bits(codec, PW_MGMT1, PMADL, PMADL);
263 		snd_soc_update_bits(codec, PW_MGMT3, PMADR, PMADR);
264 	}
265 
266 	return 0;
267 }
268 
269 static void ak4642_dai_shutdown(struct snd_pcm_substream *substream,
270 			       struct snd_soc_dai *dai)
271 {
272 	int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
273 	struct snd_soc_codec *codec = dai->codec;
274 
275 	if (is_play) {
276 	} else {
277 		/* stop stereo input */
278 		snd_soc_update_bits(codec, PW_MGMT1, PMADL, 0);
279 		snd_soc_update_bits(codec, PW_MGMT3, PMADR, 0);
280 		snd_soc_update_bits(codec, ALC_CTL1, ALC, 0);
281 	}
282 }
283 
284 static int ak4642_dai_set_sysclk(struct snd_soc_dai *codec_dai,
285 	int clk_id, unsigned int freq, int dir)
286 {
287 	struct snd_soc_codec *codec = codec_dai->codec;
288 	u8 pll;
289 
290 	switch (freq) {
291 	case 11289600:
292 		pll = PLL2;
293 		break;
294 	case 12288000:
295 		pll = PLL2 | PLL0;
296 		break;
297 	case 12000000:
298 		pll = PLL2 | PLL1;
299 		break;
300 	case 24000000:
301 		pll = PLL2 | PLL1 | PLL0;
302 		break;
303 	case 13500000:
304 		pll = PLL3 | PLL2;
305 		break;
306 	case 27000000:
307 		pll = PLL3 | PLL2 | PLL0;
308 		break;
309 	default:
310 		return -EINVAL;
311 	}
312 	snd_soc_update_bits(codec, MD_CTL1, PLL_MASK, pll);
313 
314 	return 0;
315 }
316 
317 static int ak4642_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
318 {
319 	struct snd_soc_codec *codec = dai->codec;
320 	u8 data;
321 	u8 bcko;
322 
323 	data = MCKO | PMPLL; /* use MCKO */
324 	bcko = 0;
325 
326 	/* set master/slave audio interface */
327 	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
328 	case SND_SOC_DAIFMT_CBM_CFM:
329 		data |= MS;
330 		bcko = BCKO_64;
331 		break;
332 	case SND_SOC_DAIFMT_CBS_CFS:
333 		break;
334 	default:
335 		return -EINVAL;
336 	}
337 	snd_soc_update_bits(codec, PW_MGMT2, MS | MCKO | PMPLL, data);
338 	snd_soc_update_bits(codec, MD_CTL1, BCKO_MASK, bcko);
339 
340 	/* format type */
341 	data = 0;
342 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
343 	case SND_SOC_DAIFMT_LEFT_J:
344 		data = LEFT_J;
345 		break;
346 	case SND_SOC_DAIFMT_I2S:
347 		data = I2S;
348 		break;
349 	/* FIXME
350 	 * Please add RIGHT_J / DSP support here
351 	 */
352 	default:
353 		return -EINVAL;
354 		break;
355 	}
356 	snd_soc_update_bits(codec, MD_CTL1, DIF_MASK, data);
357 
358 	return 0;
359 }
360 
361 static int ak4642_dai_hw_params(struct snd_pcm_substream *substream,
362 				struct snd_pcm_hw_params *params,
363 				struct snd_soc_dai *dai)
364 {
365 	struct snd_soc_codec *codec = dai->codec;
366 	u8 rate;
367 
368 	switch (params_rate(params)) {
369 	case 7350:
370 		rate = FS2;
371 		break;
372 	case 8000:
373 		rate = 0;
374 		break;
375 	case 11025:
376 		rate = FS2 | FS0;
377 		break;
378 	case 12000:
379 		rate = FS0;
380 		break;
381 	case 14700:
382 		rate = FS2 | FS1;
383 		break;
384 	case 16000:
385 		rate = FS1;
386 		break;
387 	case 22050:
388 		rate = FS2 | FS1 | FS0;
389 		break;
390 	case 24000:
391 		rate = FS1 | FS0;
392 		break;
393 	case 29400:
394 		rate = FS3 | FS2 | FS1;
395 		break;
396 	case 32000:
397 		rate = FS3 | FS1;
398 		break;
399 	case 44100:
400 		rate = FS3 | FS2 | FS1 | FS0;
401 		break;
402 	case 48000:
403 		rate = FS3 | FS1 | FS0;
404 		break;
405 	default:
406 		return -EINVAL;
407 		break;
408 	}
409 	snd_soc_update_bits(codec, MD_CTL2, FS_MASK, rate);
410 
411 	return 0;
412 }
413 
414 static int ak4642_set_bias_level(struct snd_soc_codec *codec,
415 				 enum snd_soc_bias_level level)
416 {
417 	switch (level) {
418 	case SND_SOC_BIAS_OFF:
419 		snd_soc_write(codec, PW_MGMT1, 0x00);
420 		break;
421 	default:
422 		snd_soc_update_bits(codec, PW_MGMT1, PMVCM, PMVCM);
423 		break;
424 	}
425 	codec->dapm.bias_level = level;
426 
427 	return 0;
428 }
429 
430 static const struct snd_soc_dai_ops ak4642_dai_ops = {
431 	.startup	= ak4642_dai_startup,
432 	.shutdown	= ak4642_dai_shutdown,
433 	.set_sysclk	= ak4642_dai_set_sysclk,
434 	.set_fmt	= ak4642_dai_set_fmt,
435 	.hw_params	= ak4642_dai_hw_params,
436 };
437 
438 static struct snd_soc_dai_driver ak4642_dai = {
439 	.name = "ak4642-hifi",
440 	.playback = {
441 		.stream_name = "Playback",
442 		.channels_min = 1,
443 		.channels_max = 2,
444 		.rates = SNDRV_PCM_RATE_8000_48000,
445 		.formats = SNDRV_PCM_FMTBIT_S16_LE },
446 	.capture = {
447 		.stream_name = "Capture",
448 		.channels_min = 1,
449 		.channels_max = 2,
450 		.rates = SNDRV_PCM_RATE_8000_48000,
451 		.formats = SNDRV_PCM_FMTBIT_S16_LE },
452 	.ops = &ak4642_dai_ops,
453 	.symmetric_rates = 1,
454 };
455 
456 static int ak4642_resume(struct snd_soc_codec *codec)
457 {
458 	snd_soc_cache_sync(codec);
459 	return 0;
460 }
461 
462 
463 static int ak4642_probe(struct snd_soc_codec *codec)
464 {
465 	int ret;
466 
467 	ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_I2C);
468 	if (ret < 0) {
469 		dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
470 		return ret;
471 	}
472 
473 	snd_soc_add_codec_controls(codec, ak4642_snd_controls,
474 			     ARRAY_SIZE(ak4642_snd_controls));
475 
476 	ak4642_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
477 
478 	return 0;
479 }
480 
481 static int ak4642_remove(struct snd_soc_codec *codec)
482 {
483 	ak4642_set_bias_level(codec, SND_SOC_BIAS_OFF);
484 	return 0;
485 }
486 
487 static struct snd_soc_codec_driver soc_codec_dev_ak4642 = {
488 	.probe			= ak4642_probe,
489 	.remove			= ak4642_remove,
490 	.resume			= ak4642_resume,
491 	.set_bias_level		= ak4642_set_bias_level,
492 	.reg_cache_default	= ak4642_reg,			/* ak4642 reg */
493 	.reg_cache_size		= ARRAY_SIZE(ak4642_reg),	/* ak4642 reg */
494 	.reg_word_size		= sizeof(u8),
495 	.dapm_widgets		= ak4642_dapm_widgets,
496 	.num_dapm_widgets	= ARRAY_SIZE(ak4642_dapm_widgets),
497 	.dapm_routes		= ak4642_intercon,
498 	.num_dapm_routes	= ARRAY_SIZE(ak4642_intercon),
499 };
500 
501 static struct snd_soc_codec_driver soc_codec_dev_ak4648 = {
502 	.probe			= ak4642_probe,
503 	.remove			= ak4642_remove,
504 	.resume			= ak4642_resume,
505 	.set_bias_level		= ak4642_set_bias_level,
506 	.reg_cache_default	= ak4648_reg,			/* ak4648 reg */
507 	.reg_cache_size		= ARRAY_SIZE(ak4648_reg),	/* ak4648 reg */
508 	.reg_word_size		= sizeof(u8),
509 	.dapm_widgets		= ak4642_dapm_widgets,
510 	.num_dapm_widgets	= ARRAY_SIZE(ak4642_dapm_widgets),
511 	.dapm_routes		= ak4642_intercon,
512 	.num_dapm_routes	= ARRAY_SIZE(ak4642_intercon),
513 };
514 
515 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
516 static int ak4642_i2c_probe(struct i2c_client *i2c,
517 			    const struct i2c_device_id *id)
518 {
519 	return snd_soc_register_codec(&i2c->dev,
520 				(struct snd_soc_codec_driver *)id->driver_data,
521 				&ak4642_dai, 1);
522 }
523 
524 static int ak4642_i2c_remove(struct i2c_client *client)
525 {
526 	snd_soc_unregister_codec(&client->dev);
527 	return 0;
528 }
529 
530 static const struct i2c_device_id ak4642_i2c_id[] = {
531 	{ "ak4642", (kernel_ulong_t)&soc_codec_dev_ak4642 },
532 	{ "ak4643", (kernel_ulong_t)&soc_codec_dev_ak4642 },
533 	{ "ak4648", (kernel_ulong_t)&soc_codec_dev_ak4648 },
534 	{ }
535 };
536 MODULE_DEVICE_TABLE(i2c, ak4642_i2c_id);
537 
538 static struct i2c_driver ak4642_i2c_driver = {
539 	.driver = {
540 		.name = "ak4642-codec",
541 		.owner = THIS_MODULE,
542 	},
543 	.probe		= ak4642_i2c_probe,
544 	.remove		= ak4642_i2c_remove,
545 	.id_table	= ak4642_i2c_id,
546 };
547 #endif
548 
549 static int __init ak4642_modinit(void)
550 {
551 	int ret = 0;
552 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
553 	ret = i2c_add_driver(&ak4642_i2c_driver);
554 #endif
555 	return ret;
556 
557 }
558 module_init(ak4642_modinit);
559 
560 static void __exit ak4642_exit(void)
561 {
562 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
563 	i2c_del_driver(&ak4642_i2c_driver);
564 #endif
565 
566 }
567 module_exit(ak4642_exit);
568 
569 MODULE_DESCRIPTION("Soc AK4642 driver");
570 MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");
571 MODULE_LICENSE("GPL");
572