xref: /openbmc/linux/sound/soc/codecs/ak4642.c (revision 7490ca1e)
1 /*
2  * ak4642.c  --  AK4642/AK4643 ALSA Soc Audio driver
3  *
4  * Copyright (C) 2009 Renesas Solutions Corp.
5  * Kuninori Morimoto <morimoto.kuninori@renesas.com>
6  *
7  * Based on wm8731.c by Richard Purdie
8  * Based on ak4535.c by Richard Purdie
9  * Based on wm8753.c by Liam Girdwood
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License version 2 as
13  * published by the Free Software Foundation.
14  */
15 
16 /* ** CAUTION **
17  *
18  * This is very simple driver.
19  * It can use headphone output / stereo input only
20  *
21  * AK4642 is tested.
22  * AK4643 is tested.
23  * AK4648 is tested.
24  */
25 
26 #include <linux/delay.h>
27 #include <linux/i2c.h>
28 #include <linux/slab.h>
29 #include <linux/module.h>
30 #include <sound/soc.h>
31 #include <sound/initval.h>
32 #include <sound/tlv.h>
33 
34 #define PW_MGMT1	0x00
35 #define PW_MGMT2	0x01
36 #define SG_SL1		0x02
37 #define SG_SL2		0x03
38 #define MD_CTL1		0x04
39 #define MD_CTL2		0x05
40 #define TIMER		0x06
41 #define ALC_CTL1	0x07
42 #define ALC_CTL2	0x08
43 #define L_IVC		0x09
44 #define L_DVC		0x0a
45 #define ALC_CTL3	0x0b
46 #define R_IVC		0x0c
47 #define R_DVC		0x0d
48 #define MD_CTL3		0x0e
49 #define MD_CTL4		0x0f
50 #define PW_MGMT3	0x10
51 #define DF_S		0x11
52 #define FIL3_0		0x12
53 #define FIL3_1		0x13
54 #define FIL3_2		0x14
55 #define FIL3_3		0x15
56 #define EQ_0		0x16
57 #define EQ_1		0x17
58 #define EQ_2		0x18
59 #define EQ_3		0x19
60 #define EQ_4		0x1a
61 #define EQ_5		0x1b
62 #define FIL1_0		0x1c
63 #define FIL1_1		0x1d
64 #define FIL1_2		0x1e
65 #define FIL1_3		0x1f
66 #define PW_MGMT4	0x20
67 #define MD_CTL5		0x21
68 #define LO_MS		0x22
69 #define HP_MS		0x23
70 #define SPK_MS		0x24
71 
72 /* PW_MGMT1*/
73 #define PMVCM		(1 << 6) /* VCOM Power Management */
74 #define PMMIN		(1 << 5) /* MIN Input Power Management */
75 #define PMDAC		(1 << 2) /* DAC Power Management */
76 #define PMADL		(1 << 0) /* MIC Amp Lch and ADC Lch Power Management */
77 
78 /* PW_MGMT2 */
79 #define HPMTN		(1 << 6)
80 #define PMHPL		(1 << 5)
81 #define PMHPR		(1 << 4)
82 #define MS		(1 << 3) /* master/slave select */
83 #define MCKO		(1 << 1)
84 #define PMPLL		(1 << 0)
85 
86 #define PMHP_MASK	(PMHPL | PMHPR)
87 #define PMHP		PMHP_MASK
88 
89 /* PW_MGMT3 */
90 #define PMADR		(1 << 0) /* MIC L / ADC R Power Management */
91 
92 /* SG_SL1 */
93 #define MINS		(1 << 6) /* Switch from MIN to Speaker */
94 #define DACL		(1 << 4) /* Switch from DAC to Stereo or Receiver */
95 #define PMMP		(1 << 2) /* MPWR pin Power Management */
96 #define MGAIN0		(1 << 0) /* MIC amp gain*/
97 
98 /* TIMER */
99 #define ZTM(param)	((param & 0x3) << 4) /* ALC Zoro Crossing TimeOut */
100 #define WTM(param)	(((param & 0x4) << 4) | ((param & 0x3) << 2))
101 
102 /* ALC_CTL1 */
103 #define ALC		(1 << 5) /* ALC Enable */
104 #define LMTH0		(1 << 0) /* ALC Limiter / Recovery Level */
105 
106 /* MD_CTL1 */
107 #define PLL3		(1 << 7)
108 #define PLL2		(1 << 6)
109 #define PLL1		(1 << 5)
110 #define PLL0		(1 << 4)
111 #define PLL_MASK	(PLL3 | PLL2 | PLL1 | PLL0)
112 
113 #define BCKO_MASK	(1 << 3)
114 #define BCKO_64		BCKO_MASK
115 
116 #define DIF_MASK	(3 << 0)
117 #define DSP		(0 << 0)
118 #define RIGHT_J		(1 << 0)
119 #define LEFT_J		(2 << 0)
120 #define I2S		(3 << 0)
121 
122 /* MD_CTL2 */
123 #define FS0		(1 << 0)
124 #define FS1		(1 << 1)
125 #define FS2		(1 << 2)
126 #define FS3		(1 << 5)
127 #define FS_MASK		(FS0 | FS1 | FS2 | FS3)
128 
129 /* MD_CTL3 */
130 #define BST1		(1 << 3)
131 
132 /* MD_CTL4 */
133 #define DACH		(1 << 0)
134 
135 /*
136  * Playback Volume (table 39)
137  *
138  * max : 0x00 : +12.0 dB
139  *       ( 0.5 dB step )
140  * min : 0xFE : -115.0 dB
141  * mute: 0xFF
142  */
143 static const DECLARE_TLV_DB_SCALE(out_tlv, -11500, 50, 1);
144 
145 static const struct snd_kcontrol_new ak4642_snd_controls[] = {
146 
147 	SOC_DOUBLE_R_TLV("Digital Playback Volume", L_DVC, R_DVC,
148 			 0, 0xFF, 1, out_tlv),
149 };
150 
151 static const struct snd_kcontrol_new ak4642_headphone_control =
152 	SOC_DAPM_SINGLE("Switch", PW_MGMT2, 6, 1, 0);
153 
154 static const struct snd_kcontrol_new ak4642_lout_mixer_controls[] = {
155 	SOC_DAPM_SINGLE("DACL", SG_SL1, 4, 1, 0),
156 };
157 
158 static const struct snd_soc_dapm_widget ak4642_dapm_widgets[] = {
159 
160 	/* Outputs */
161 	SND_SOC_DAPM_OUTPUT("HPOUTL"),
162 	SND_SOC_DAPM_OUTPUT("HPOUTR"),
163 	SND_SOC_DAPM_OUTPUT("LINEOUT"),
164 
165 	SND_SOC_DAPM_PGA("HPL Out", PW_MGMT2, 5, 0, NULL, 0),
166 	SND_SOC_DAPM_PGA("HPR Out", PW_MGMT2, 4, 0, NULL, 0),
167 	SND_SOC_DAPM_SWITCH("Headphone Enable", SND_SOC_NOPM, 0, 0,
168 			    &ak4642_headphone_control),
169 
170 	SND_SOC_DAPM_PGA("DACH", MD_CTL4, 0, 0, NULL, 0),
171 
172 	SND_SOC_DAPM_MIXER("LINEOUT Mixer", PW_MGMT1, 3, 0,
173 			   &ak4642_lout_mixer_controls[0],
174 			   ARRAY_SIZE(ak4642_lout_mixer_controls)),
175 
176 	/* DAC */
177 	SND_SOC_DAPM_DAC("DAC", "HiFi Playback", PW_MGMT1, 2, 0),
178 };
179 
180 static const struct snd_soc_dapm_route ak4642_intercon[] = {
181 
182 	/* Outputs */
183 	{"HPOUTL", NULL, "HPL Out"},
184 	{"HPOUTR", NULL, "HPR Out"},
185 	{"LINEOUT", NULL, "LINEOUT Mixer"},
186 
187 	{"HPL Out", NULL, "Headphone Enable"},
188 	{"HPR Out", NULL, "Headphone Enable"},
189 
190 	{"Headphone Enable", "Switch", "DACH"},
191 
192 	{"DACH", NULL, "DAC"},
193 
194 	{"LINEOUT Mixer", "DACL", "DAC"},
195 };
196 
197 /* codec private data */
198 struct ak4642_priv {
199 	unsigned int sysclk;
200 	enum snd_soc_control_type control_type;
201 };
202 
203 /*
204  * ak4642 register cache
205  */
206 static const u8 ak4642_reg[] = {
207 	0x00, 0x00, 0x01, 0x00,
208 	0x02, 0x00, 0x00, 0x00,
209 	0xe1, 0xe1, 0x18, 0x00,
210 	0xe1, 0x18, 0x11, 0x08,
211 	0x00, 0x00, 0x00, 0x00,
212 	0x00, 0x00, 0x00, 0x00,
213 	0x00, 0x00, 0x00, 0x00,
214 	0x00, 0x00, 0x00, 0x00,
215 	0x00, 0x00, 0x00, 0x00,
216 	0x00,
217 };
218 
219 static const u8 ak4648_reg[] = {
220 	0x00, 0x00, 0x01, 0x00,
221 	0x02, 0x00, 0x00, 0x00,
222 	0xe1, 0xe1, 0x18, 0x00,
223 	0xe1, 0x18, 0x11, 0xb8,
224 	0x00, 0x00, 0x00, 0x00,
225 	0x00, 0x00, 0x00, 0x00,
226 	0x00, 0x00, 0x00, 0x00,
227 	0x00, 0x00, 0x00, 0x00,
228 	0x00, 0x00, 0x00, 0x00,
229 	0x00, 0x88, 0x88, 0x08,
230 };
231 
232 static int ak4642_dai_startup(struct snd_pcm_substream *substream,
233 			      struct snd_soc_dai *dai)
234 {
235 	int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
236 	struct snd_soc_codec *codec = dai->codec;
237 
238 	if (is_play) {
239 		/*
240 		 * start headphone output
241 		 *
242 		 * PLL, Master Mode
243 		 * Audio I/F Format :MSB justified (ADC & DAC)
244 		 * Bass Boost Level : Middle
245 		 *
246 		 * This operation came from example code of
247 		 * "ASAHI KASEI AK4642" (japanese) manual p97.
248 		 */
249 		snd_soc_write(codec, L_IVC, 0x91); /* volume */
250 		snd_soc_write(codec, R_IVC, 0x91); /* volume */
251 	} else {
252 		/*
253 		 * start stereo input
254 		 *
255 		 * PLL Master Mode
256 		 * Audio I/F Format:MSB justified (ADC & DAC)
257 		 * Pre MIC AMP:+20dB
258 		 * MIC Power On
259 		 * ALC setting:Refer to Table 35
260 		 * ALC bit=“1”
261 		 *
262 		 * This operation came from example code of
263 		 * "ASAHI KASEI AK4642" (japanese) manual p94.
264 		 */
265 		snd_soc_write(codec, SG_SL1, PMMP | MGAIN0);
266 		snd_soc_write(codec, TIMER, ZTM(0x3) | WTM(0x3));
267 		snd_soc_write(codec, ALC_CTL1, ALC | LMTH0);
268 		snd_soc_update_bits(codec, PW_MGMT1, PMADL, PMADL);
269 		snd_soc_update_bits(codec, PW_MGMT3, PMADR, PMADR);
270 	}
271 
272 	return 0;
273 }
274 
275 static void ak4642_dai_shutdown(struct snd_pcm_substream *substream,
276 			       struct snd_soc_dai *dai)
277 {
278 	int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
279 	struct snd_soc_codec *codec = dai->codec;
280 
281 	if (is_play) {
282 	} else {
283 		/* stop stereo input */
284 		snd_soc_update_bits(codec, PW_MGMT1, PMADL, 0);
285 		snd_soc_update_bits(codec, PW_MGMT3, PMADR, 0);
286 		snd_soc_update_bits(codec, ALC_CTL1, ALC, 0);
287 	}
288 }
289 
290 static int ak4642_dai_set_sysclk(struct snd_soc_dai *codec_dai,
291 	int clk_id, unsigned int freq, int dir)
292 {
293 	struct snd_soc_codec *codec = codec_dai->codec;
294 	u8 pll;
295 
296 	switch (freq) {
297 	case 11289600:
298 		pll = PLL2;
299 		break;
300 	case 12288000:
301 		pll = PLL2 | PLL0;
302 		break;
303 	case 12000000:
304 		pll = PLL2 | PLL1;
305 		break;
306 	case 24000000:
307 		pll = PLL2 | PLL1 | PLL0;
308 		break;
309 	case 13500000:
310 		pll = PLL3 | PLL2;
311 		break;
312 	case 27000000:
313 		pll = PLL3 | PLL2 | PLL0;
314 		break;
315 	default:
316 		return -EINVAL;
317 	}
318 	snd_soc_update_bits(codec, MD_CTL1, PLL_MASK, pll);
319 
320 	return 0;
321 }
322 
323 static int ak4642_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
324 {
325 	struct snd_soc_codec *codec = dai->codec;
326 	u8 data;
327 	u8 bcko;
328 
329 	data = MCKO | PMPLL; /* use MCKO */
330 	bcko = 0;
331 
332 	/* set master/slave audio interface */
333 	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
334 	case SND_SOC_DAIFMT_CBM_CFM:
335 		data |= MS;
336 		bcko = BCKO_64;
337 		break;
338 	case SND_SOC_DAIFMT_CBS_CFS:
339 		break;
340 	default:
341 		return -EINVAL;
342 	}
343 	snd_soc_update_bits(codec, PW_MGMT2, MS | MCKO | PMPLL, data);
344 	snd_soc_update_bits(codec, MD_CTL1, BCKO_MASK, bcko);
345 
346 	/* format type */
347 	data = 0;
348 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
349 	case SND_SOC_DAIFMT_LEFT_J:
350 		data = LEFT_J;
351 		break;
352 	case SND_SOC_DAIFMT_I2S:
353 		data = I2S;
354 		break;
355 	/* FIXME
356 	 * Please add RIGHT_J / DSP support here
357 	 */
358 	default:
359 		return -EINVAL;
360 		break;
361 	}
362 	snd_soc_update_bits(codec, MD_CTL1, DIF_MASK, data);
363 
364 	return 0;
365 }
366 
367 static int ak4642_dai_hw_params(struct snd_pcm_substream *substream,
368 				struct snd_pcm_hw_params *params,
369 				struct snd_soc_dai *dai)
370 {
371 	struct snd_soc_codec *codec = dai->codec;
372 	u8 rate;
373 
374 	switch (params_rate(params)) {
375 	case 7350:
376 		rate = FS2;
377 		break;
378 	case 8000:
379 		rate = 0;
380 		break;
381 	case 11025:
382 		rate = FS2 | FS0;
383 		break;
384 	case 12000:
385 		rate = FS0;
386 		break;
387 	case 14700:
388 		rate = FS2 | FS1;
389 		break;
390 	case 16000:
391 		rate = FS1;
392 		break;
393 	case 22050:
394 		rate = FS2 | FS1 | FS0;
395 		break;
396 	case 24000:
397 		rate = FS1 | FS0;
398 		break;
399 	case 29400:
400 		rate = FS3 | FS2 | FS1;
401 		break;
402 	case 32000:
403 		rate = FS3 | FS1;
404 		break;
405 	case 44100:
406 		rate = FS3 | FS2 | FS1 | FS0;
407 		break;
408 	case 48000:
409 		rate = FS3 | FS1 | FS0;
410 		break;
411 	default:
412 		return -EINVAL;
413 		break;
414 	}
415 	snd_soc_update_bits(codec, MD_CTL2, FS_MASK, rate);
416 
417 	return 0;
418 }
419 
420 static int ak4642_set_bias_level(struct snd_soc_codec *codec,
421 				 enum snd_soc_bias_level level)
422 {
423 	switch (level) {
424 	case SND_SOC_BIAS_OFF:
425 		snd_soc_write(codec, PW_MGMT1, 0x00);
426 		break;
427 	default:
428 		snd_soc_update_bits(codec, PW_MGMT1, PMVCM, PMVCM);
429 		break;
430 	}
431 	codec->dapm.bias_level = level;
432 
433 	return 0;
434 }
435 
436 static const struct snd_soc_dai_ops ak4642_dai_ops = {
437 	.startup	= ak4642_dai_startup,
438 	.shutdown	= ak4642_dai_shutdown,
439 	.set_sysclk	= ak4642_dai_set_sysclk,
440 	.set_fmt	= ak4642_dai_set_fmt,
441 	.hw_params	= ak4642_dai_hw_params,
442 };
443 
444 static struct snd_soc_dai_driver ak4642_dai = {
445 	.name = "ak4642-hifi",
446 	.playback = {
447 		.stream_name = "Playback",
448 		.channels_min = 1,
449 		.channels_max = 2,
450 		.rates = SNDRV_PCM_RATE_8000_48000,
451 		.formats = SNDRV_PCM_FMTBIT_S16_LE },
452 	.capture = {
453 		.stream_name = "Capture",
454 		.channels_min = 1,
455 		.channels_max = 2,
456 		.rates = SNDRV_PCM_RATE_8000_48000,
457 		.formats = SNDRV_PCM_FMTBIT_S16_LE },
458 	.ops = &ak4642_dai_ops,
459 	.symmetric_rates = 1,
460 };
461 
462 static int ak4642_resume(struct snd_soc_codec *codec)
463 {
464 	snd_soc_cache_sync(codec);
465 	return 0;
466 }
467 
468 
469 static int ak4642_probe(struct snd_soc_codec *codec)
470 {
471 	struct ak4642_priv *ak4642 = snd_soc_codec_get_drvdata(codec);
472 	int ret;
473 
474 	ret = snd_soc_codec_set_cache_io(codec, 8, 8, ak4642->control_type);
475 	if (ret < 0) {
476 		dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
477 		return ret;
478 	}
479 
480 	snd_soc_add_controls(codec, ak4642_snd_controls,
481 			     ARRAY_SIZE(ak4642_snd_controls));
482 
483 	ak4642_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
484 
485 	return 0;
486 }
487 
488 static int ak4642_remove(struct snd_soc_codec *codec)
489 {
490 	ak4642_set_bias_level(codec, SND_SOC_BIAS_OFF);
491 	return 0;
492 }
493 
494 static struct snd_soc_codec_driver soc_codec_dev_ak4642 = {
495 	.probe			= ak4642_probe,
496 	.remove			= ak4642_remove,
497 	.resume			= ak4642_resume,
498 	.set_bias_level		= ak4642_set_bias_level,
499 	.reg_cache_default	= ak4642_reg,			/* ak4642 reg */
500 	.reg_cache_size		= ARRAY_SIZE(ak4642_reg),	/* ak4642 reg */
501 	.reg_word_size		= sizeof(u8),
502 	.dapm_widgets		= ak4642_dapm_widgets,
503 	.num_dapm_widgets	= ARRAY_SIZE(ak4642_dapm_widgets),
504 	.dapm_routes		= ak4642_intercon,
505 	.num_dapm_routes	= ARRAY_SIZE(ak4642_intercon),
506 };
507 
508 static struct snd_soc_codec_driver soc_codec_dev_ak4648 = {
509 	.probe			= ak4642_probe,
510 	.remove			= ak4642_remove,
511 	.resume			= ak4642_resume,
512 	.set_bias_level		= ak4642_set_bias_level,
513 	.reg_cache_default	= ak4648_reg,			/* ak4648 reg */
514 	.reg_cache_size		= ARRAY_SIZE(ak4648_reg),	/* ak4648 reg */
515 	.reg_word_size		= sizeof(u8),
516 	.dapm_widgets		= ak4642_dapm_widgets,
517 	.num_dapm_widgets	= ARRAY_SIZE(ak4642_dapm_widgets),
518 	.dapm_routes		= ak4642_intercon,
519 	.num_dapm_routes	= ARRAY_SIZE(ak4642_intercon),
520 };
521 
522 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
523 static __devinit int ak4642_i2c_probe(struct i2c_client *i2c,
524 				      const struct i2c_device_id *id)
525 {
526 	struct ak4642_priv *ak4642;
527 	int ret;
528 
529 	ak4642 = devm_kzalloc(&i2c->dev, sizeof(struct ak4642_priv),
530 			      GFP_KERNEL);
531 	if (!ak4642)
532 		return -ENOMEM;
533 
534 	i2c_set_clientdata(i2c, ak4642);
535 	ak4642->control_type = SND_SOC_I2C;
536 
537 	ret =  snd_soc_register_codec(&i2c->dev,
538 				(struct snd_soc_codec_driver *)id->driver_data,
539 				&ak4642_dai, 1);
540 	return ret;
541 }
542 
543 static __devexit int ak4642_i2c_remove(struct i2c_client *client)
544 {
545 	snd_soc_unregister_codec(&client->dev);
546 	return 0;
547 }
548 
549 static const struct i2c_device_id ak4642_i2c_id[] = {
550 	{ "ak4642", (kernel_ulong_t)&soc_codec_dev_ak4642 },
551 	{ "ak4643", (kernel_ulong_t)&soc_codec_dev_ak4642 },
552 	{ "ak4648", (kernel_ulong_t)&soc_codec_dev_ak4648 },
553 	{ }
554 };
555 MODULE_DEVICE_TABLE(i2c, ak4642_i2c_id);
556 
557 static struct i2c_driver ak4642_i2c_driver = {
558 	.driver = {
559 		.name = "ak4642-codec",
560 		.owner = THIS_MODULE,
561 	},
562 	.probe		= ak4642_i2c_probe,
563 	.remove		= __devexit_p(ak4642_i2c_remove),
564 	.id_table	= ak4642_i2c_id,
565 };
566 #endif
567 
568 static int __init ak4642_modinit(void)
569 {
570 	int ret = 0;
571 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
572 	ret = i2c_add_driver(&ak4642_i2c_driver);
573 #endif
574 	return ret;
575 
576 }
577 module_init(ak4642_modinit);
578 
579 static void __exit ak4642_exit(void)
580 {
581 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
582 	i2c_del_driver(&ak4642_i2c_driver);
583 #endif
584 
585 }
586 module_exit(ak4642_exit);
587 
588 MODULE_DESCRIPTION("Soc AK4642 driver");
589 MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");
590 MODULE_LICENSE("GPL");
591