1 /* 2 * ak4642.c -- AK4642/AK4643 ALSA Soc Audio driver 3 * 4 * Copyright (C) 2009 Renesas Solutions Corp. 5 * Kuninori Morimoto <morimoto.kuninori@renesas.com> 6 * 7 * Based on wm8731.c by Richard Purdie 8 * Based on ak4535.c by Richard Purdie 9 * Based on wm8753.c by Liam Girdwood 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License version 2 as 13 * published by the Free Software Foundation. 14 */ 15 16 /* ** CAUTION ** 17 * 18 * This is very simple driver. 19 * It can use headphone output / stereo input only 20 * 21 * AK4642 is tested. 22 * AK4643 is tested. 23 * AK4648 is tested. 24 */ 25 26 #include <linux/delay.h> 27 #include <linux/i2c.h> 28 #include <linux/slab.h> 29 #include <linux/of_device.h> 30 #include <linux/module.h> 31 #include <linux/regmap.h> 32 #include <sound/soc.h> 33 #include <sound/initval.h> 34 #include <sound/tlv.h> 35 36 #define PW_MGMT1 0x00 37 #define PW_MGMT2 0x01 38 #define SG_SL1 0x02 39 #define SG_SL2 0x03 40 #define MD_CTL1 0x04 41 #define MD_CTL2 0x05 42 #define TIMER 0x06 43 #define ALC_CTL1 0x07 44 #define ALC_CTL2 0x08 45 #define L_IVC 0x09 46 #define L_DVC 0x0a 47 #define ALC_CTL3 0x0b 48 #define R_IVC 0x0c 49 #define R_DVC 0x0d 50 #define MD_CTL3 0x0e 51 #define MD_CTL4 0x0f 52 #define PW_MGMT3 0x10 53 #define DF_S 0x11 54 #define FIL3_0 0x12 55 #define FIL3_1 0x13 56 #define FIL3_2 0x14 57 #define FIL3_3 0x15 58 #define EQ_0 0x16 59 #define EQ_1 0x17 60 #define EQ_2 0x18 61 #define EQ_3 0x19 62 #define EQ_4 0x1a 63 #define EQ_5 0x1b 64 #define FIL1_0 0x1c 65 #define FIL1_1 0x1d 66 #define FIL1_2 0x1e 67 #define FIL1_3 0x1f 68 #define PW_MGMT4 0x20 69 #define MD_CTL5 0x21 70 #define LO_MS 0x22 71 #define HP_MS 0x23 72 #define SPK_MS 0x24 73 74 /* PW_MGMT1*/ 75 #define PMVCM (1 << 6) /* VCOM Power Management */ 76 #define PMMIN (1 << 5) /* MIN Input Power Management */ 77 #define PMDAC (1 << 2) /* DAC Power Management */ 78 #define PMADL (1 << 0) /* MIC Amp Lch and ADC Lch Power Management */ 79 80 /* PW_MGMT2 */ 81 #define HPMTN (1 << 6) 82 #define PMHPL (1 << 5) 83 #define PMHPR (1 << 4) 84 #define MS (1 << 3) /* master/slave select */ 85 #define MCKO (1 << 1) 86 #define PMPLL (1 << 0) 87 88 #define PMHP_MASK (PMHPL | PMHPR) 89 #define PMHP PMHP_MASK 90 91 /* PW_MGMT3 */ 92 #define PMADR (1 << 0) /* MIC L / ADC R Power Management */ 93 94 /* SG_SL1 */ 95 #define MINS (1 << 6) /* Switch from MIN to Speaker */ 96 #define DACL (1 << 4) /* Switch from DAC to Stereo or Receiver */ 97 #define PMMP (1 << 2) /* MPWR pin Power Management */ 98 #define MGAIN0 (1 << 0) /* MIC amp gain*/ 99 100 /* SG_SL2 */ 101 #define LOPS (1 << 6) /* Stero Line-out Power Save Mode */ 102 103 /* TIMER */ 104 #define ZTM(param) ((param & 0x3) << 4) /* ALC Zero Crossing TimeOut */ 105 #define WTM(param) (((param & 0x4) << 4) | ((param & 0x3) << 2)) 106 107 /* ALC_CTL1 */ 108 #define ALC (1 << 5) /* ALC Enable */ 109 #define LMTH0 (1 << 0) /* ALC Limiter / Recovery Level */ 110 111 /* MD_CTL1 */ 112 #define PLL3 (1 << 7) 113 #define PLL2 (1 << 6) 114 #define PLL1 (1 << 5) 115 #define PLL0 (1 << 4) 116 #define PLL_MASK (PLL3 | PLL2 | PLL1 | PLL0) 117 118 #define BCKO_MASK (1 << 3) 119 #define BCKO_64 BCKO_MASK 120 121 #define DIF_MASK (3 << 0) 122 #define DSP (0 << 0) 123 #define RIGHT_J (1 << 0) 124 #define LEFT_J (2 << 0) 125 #define I2S (3 << 0) 126 127 /* MD_CTL2 */ 128 #define FS0 (1 << 0) 129 #define FS1 (1 << 1) 130 #define FS2 (1 << 2) 131 #define FS3 (1 << 5) 132 #define FS_MASK (FS0 | FS1 | FS2 | FS3) 133 134 /* MD_CTL3 */ 135 #define BST1 (1 << 3) 136 137 /* MD_CTL4 */ 138 #define DACH (1 << 0) 139 140 struct ak4642_drvdata { 141 const struct regmap_config *regmap_config; 142 int extended_frequencies; 143 }; 144 145 struct ak4642_priv { 146 const struct ak4642_drvdata *drvdata; 147 }; 148 149 /* 150 * Playback Volume (table 39) 151 * 152 * max : 0x00 : +12.0 dB 153 * ( 0.5 dB step ) 154 * min : 0xFE : -115.0 dB 155 * mute: 0xFF 156 */ 157 static const DECLARE_TLV_DB_SCALE(out_tlv, -11550, 50, 1); 158 159 static const struct snd_kcontrol_new ak4642_snd_controls[] = { 160 161 SOC_DOUBLE_R_TLV("Digital Playback Volume", L_DVC, R_DVC, 162 0, 0xFF, 1, out_tlv), 163 SOC_SINGLE("ALC Capture Switch", ALC_CTL1, 5, 1, 0), 164 SOC_SINGLE("ALC Capture ZC Switch", ALC_CTL1, 4, 1, 1), 165 }; 166 167 static const struct snd_kcontrol_new ak4642_headphone_control = 168 SOC_DAPM_SINGLE("Switch", PW_MGMT2, 6, 1, 0); 169 170 static const struct snd_kcontrol_new ak4642_lout_mixer_controls[] = { 171 SOC_DAPM_SINGLE("DACL", SG_SL1, 4, 1, 0), 172 }; 173 174 /* event handlers */ 175 static int ak4642_lout_event(struct snd_soc_dapm_widget *w, 176 struct snd_kcontrol *kcontrol, int event) 177 { 178 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 179 180 switch (event) { 181 case SND_SOC_DAPM_PRE_PMD: 182 case SND_SOC_DAPM_PRE_PMU: 183 /* Power save mode ON */ 184 snd_soc_update_bits(codec, SG_SL2, LOPS, LOPS); 185 break; 186 case SND_SOC_DAPM_POST_PMU: 187 case SND_SOC_DAPM_POST_PMD: 188 /* Power save mode OFF */ 189 mdelay(300); 190 snd_soc_update_bits(codec, SG_SL2, LOPS, 0); 191 break; 192 } 193 194 return 0; 195 } 196 197 static const struct snd_soc_dapm_widget ak4642_dapm_widgets[] = { 198 199 /* Outputs */ 200 SND_SOC_DAPM_OUTPUT("HPOUTL"), 201 SND_SOC_DAPM_OUTPUT("HPOUTR"), 202 SND_SOC_DAPM_OUTPUT("LINEOUT"), 203 204 SND_SOC_DAPM_PGA("HPL Out", PW_MGMT2, 5, 0, NULL, 0), 205 SND_SOC_DAPM_PGA("HPR Out", PW_MGMT2, 4, 0, NULL, 0), 206 SND_SOC_DAPM_SWITCH("Headphone Enable", SND_SOC_NOPM, 0, 0, 207 &ak4642_headphone_control), 208 209 SND_SOC_DAPM_PGA("DACH", MD_CTL4, 0, 0, NULL, 0), 210 211 SND_SOC_DAPM_MIXER_E("LINEOUT Mixer", PW_MGMT1, 3, 0, 212 &ak4642_lout_mixer_controls[0], 213 ARRAY_SIZE(ak4642_lout_mixer_controls), 214 ak4642_lout_event, 215 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU | 216 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD), 217 218 /* DAC */ 219 SND_SOC_DAPM_DAC("DAC", NULL, PW_MGMT1, 2, 0), 220 }; 221 222 static const struct snd_soc_dapm_route ak4642_intercon[] = { 223 224 /* Outputs */ 225 {"HPOUTL", NULL, "HPL Out"}, 226 {"HPOUTR", NULL, "HPR Out"}, 227 {"LINEOUT", NULL, "LINEOUT Mixer"}, 228 229 {"HPL Out", NULL, "Headphone Enable"}, 230 {"HPR Out", NULL, "Headphone Enable"}, 231 232 {"Headphone Enable", "Switch", "DACH"}, 233 234 {"DACH", NULL, "DAC"}, 235 236 {"LINEOUT Mixer", "DACL", "DAC"}, 237 238 { "DAC", NULL, "Playback" }, 239 }; 240 241 /* 242 * ak4642 register cache 243 */ 244 static const struct reg_default ak4642_reg[] = { 245 { 0, 0x00 }, { 1, 0x00 }, { 2, 0x01 }, { 3, 0x00 }, 246 { 4, 0x02 }, { 5, 0x00 }, { 6, 0x00 }, { 7, 0x00 }, 247 { 8, 0xe1 }, { 9, 0xe1 }, { 10, 0x18 }, { 11, 0x00 }, 248 { 12, 0xe1 }, { 13, 0x18 }, { 14, 0x11 }, { 15, 0x08 }, 249 { 16, 0x00 }, { 17, 0x00 }, { 18, 0x00 }, { 19, 0x00 }, 250 { 20, 0x00 }, { 21, 0x00 }, { 22, 0x00 }, { 23, 0x00 }, 251 { 24, 0x00 }, { 25, 0x00 }, { 26, 0x00 }, { 27, 0x00 }, 252 { 28, 0x00 }, { 29, 0x00 }, { 30, 0x00 }, { 31, 0x00 }, 253 { 32, 0x00 }, { 33, 0x00 }, { 34, 0x00 }, { 35, 0x00 }, 254 { 36, 0x00 }, 255 }; 256 257 static const struct reg_default ak4648_reg[] = { 258 { 0, 0x00 }, { 1, 0x00 }, { 2, 0x01 }, { 3, 0x00 }, 259 { 4, 0x02 }, { 5, 0x00 }, { 6, 0x00 }, { 7, 0x00 }, 260 { 8, 0xe1 }, { 9, 0xe1 }, { 10, 0x18 }, { 11, 0x00 }, 261 { 12, 0xe1 }, { 13, 0x18 }, { 14, 0x11 }, { 15, 0xb8 }, 262 { 16, 0x00 }, { 17, 0x00 }, { 18, 0x00 }, { 19, 0x00 }, 263 { 20, 0x00 }, { 21, 0x00 }, { 22, 0x00 }, { 23, 0x00 }, 264 { 24, 0x00 }, { 25, 0x00 }, { 26, 0x00 }, { 27, 0x00 }, 265 { 28, 0x00 }, { 29, 0x00 }, { 30, 0x00 }, { 31, 0x00 }, 266 { 32, 0x00 }, { 33, 0x00 }, { 34, 0x00 }, { 35, 0x00 }, 267 { 36, 0x00 }, { 37, 0x88 }, { 38, 0x88 }, { 39, 0x08 }, 268 }; 269 270 static int ak4642_dai_startup(struct snd_pcm_substream *substream, 271 struct snd_soc_dai *dai) 272 { 273 int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK; 274 struct snd_soc_codec *codec = dai->codec; 275 276 if (is_play) { 277 /* 278 * start headphone output 279 * 280 * PLL, Master Mode 281 * Audio I/F Format :MSB justified (ADC & DAC) 282 * Bass Boost Level : Middle 283 * 284 * This operation came from example code of 285 * "ASAHI KASEI AK4642" (japanese) manual p97. 286 */ 287 snd_soc_write(codec, L_IVC, 0x91); /* volume */ 288 snd_soc_write(codec, R_IVC, 0x91); /* volume */ 289 } else { 290 /* 291 * start stereo input 292 * 293 * PLL Master Mode 294 * Audio I/F Format:MSB justified (ADC & DAC) 295 * Pre MIC AMP:+20dB 296 * MIC Power On 297 * ALC setting:Refer to Table 35 298 * ALC bit=“1” 299 * 300 * This operation came from example code of 301 * "ASAHI KASEI AK4642" (japanese) manual p94. 302 */ 303 snd_soc_update_bits(codec, SG_SL1, PMMP | MGAIN0, PMMP | MGAIN0); 304 snd_soc_write(codec, TIMER, ZTM(0x3) | WTM(0x3)); 305 snd_soc_write(codec, ALC_CTL1, ALC | LMTH0); 306 snd_soc_update_bits(codec, PW_MGMT1, PMADL, PMADL); 307 snd_soc_update_bits(codec, PW_MGMT3, PMADR, PMADR); 308 } 309 310 return 0; 311 } 312 313 static void ak4642_dai_shutdown(struct snd_pcm_substream *substream, 314 struct snd_soc_dai *dai) 315 { 316 int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK; 317 struct snd_soc_codec *codec = dai->codec; 318 319 if (is_play) { 320 } else { 321 /* stop stereo input */ 322 snd_soc_update_bits(codec, PW_MGMT1, PMADL, 0); 323 snd_soc_update_bits(codec, PW_MGMT3, PMADR, 0); 324 snd_soc_update_bits(codec, ALC_CTL1, ALC, 0); 325 } 326 } 327 328 static int ak4642_dai_set_sysclk(struct snd_soc_dai *codec_dai, 329 int clk_id, unsigned int freq, int dir) 330 { 331 struct snd_soc_codec *codec = codec_dai->codec; 332 struct ak4642_priv *priv = snd_soc_codec_get_drvdata(codec); 333 u8 pll; 334 int extended_freq = 0; 335 336 switch (freq) { 337 case 11289600: 338 pll = PLL2; 339 break; 340 case 12288000: 341 pll = PLL2 | PLL0; 342 break; 343 case 12000000: 344 pll = PLL2 | PLL1; 345 break; 346 case 24000000: 347 pll = PLL2 | PLL1 | PLL0; 348 break; 349 case 13500000: 350 pll = PLL3 | PLL2; 351 break; 352 case 27000000: 353 pll = PLL3 | PLL2 | PLL0; 354 break; 355 case 19200000: 356 pll = PLL3; 357 extended_freq = 1; 358 break; 359 case 13000000: 360 pll = PLL3 | PLL2 | PLL1; 361 extended_freq = 1; 362 break; 363 case 26000000: 364 pll = PLL3 | PLL2 | PLL1 | PLL0; 365 extended_freq = 1; 366 break; 367 default: 368 return -EINVAL; 369 } 370 371 if (extended_freq && !priv->drvdata->extended_frequencies) 372 return -EINVAL; 373 374 snd_soc_update_bits(codec, MD_CTL1, PLL_MASK, pll); 375 376 return 0; 377 } 378 379 static int ak4642_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) 380 { 381 struct snd_soc_codec *codec = dai->codec; 382 u8 data; 383 u8 bcko; 384 385 data = MCKO | PMPLL; /* use MCKO */ 386 bcko = 0; 387 388 /* set master/slave audio interface */ 389 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 390 case SND_SOC_DAIFMT_CBM_CFM: 391 data |= MS; 392 bcko = BCKO_64; 393 break; 394 case SND_SOC_DAIFMT_CBS_CFS: 395 break; 396 default: 397 return -EINVAL; 398 } 399 snd_soc_update_bits(codec, PW_MGMT2, MS | MCKO | PMPLL, data); 400 snd_soc_update_bits(codec, MD_CTL1, BCKO_MASK, bcko); 401 402 /* format type */ 403 data = 0; 404 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 405 case SND_SOC_DAIFMT_LEFT_J: 406 data = LEFT_J; 407 break; 408 case SND_SOC_DAIFMT_I2S: 409 data = I2S; 410 break; 411 /* FIXME 412 * Please add RIGHT_J / DSP support here 413 */ 414 default: 415 return -EINVAL; 416 } 417 snd_soc_update_bits(codec, MD_CTL1, DIF_MASK, data); 418 419 return 0; 420 } 421 422 static int ak4642_dai_hw_params(struct snd_pcm_substream *substream, 423 struct snd_pcm_hw_params *params, 424 struct snd_soc_dai *dai) 425 { 426 struct snd_soc_codec *codec = dai->codec; 427 u8 rate; 428 429 switch (params_rate(params)) { 430 case 7350: 431 rate = FS2; 432 break; 433 case 8000: 434 rate = 0; 435 break; 436 case 11025: 437 rate = FS2 | FS0; 438 break; 439 case 12000: 440 rate = FS0; 441 break; 442 case 14700: 443 rate = FS2 | FS1; 444 break; 445 case 16000: 446 rate = FS1; 447 break; 448 case 22050: 449 rate = FS2 | FS1 | FS0; 450 break; 451 case 24000: 452 rate = FS1 | FS0; 453 break; 454 case 29400: 455 rate = FS3 | FS2 | FS1; 456 break; 457 case 32000: 458 rate = FS3 | FS1; 459 break; 460 case 44100: 461 rate = FS3 | FS2 | FS1 | FS0; 462 break; 463 case 48000: 464 rate = FS3 | FS1 | FS0; 465 break; 466 default: 467 return -EINVAL; 468 } 469 snd_soc_update_bits(codec, MD_CTL2, FS_MASK, rate); 470 471 return 0; 472 } 473 474 static int ak4642_set_bias_level(struct snd_soc_codec *codec, 475 enum snd_soc_bias_level level) 476 { 477 switch (level) { 478 case SND_SOC_BIAS_OFF: 479 snd_soc_write(codec, PW_MGMT1, 0x00); 480 break; 481 default: 482 snd_soc_update_bits(codec, PW_MGMT1, PMVCM, PMVCM); 483 break; 484 } 485 486 return 0; 487 } 488 489 static const struct snd_soc_dai_ops ak4642_dai_ops = { 490 .startup = ak4642_dai_startup, 491 .shutdown = ak4642_dai_shutdown, 492 .set_sysclk = ak4642_dai_set_sysclk, 493 .set_fmt = ak4642_dai_set_fmt, 494 .hw_params = ak4642_dai_hw_params, 495 }; 496 497 static struct snd_soc_dai_driver ak4642_dai = { 498 .name = "ak4642-hifi", 499 .playback = { 500 .stream_name = "Playback", 501 .channels_min = 2, 502 .channels_max = 2, 503 .rates = SNDRV_PCM_RATE_8000_48000, 504 .formats = SNDRV_PCM_FMTBIT_S16_LE }, 505 .capture = { 506 .stream_name = "Capture", 507 .channels_min = 2, 508 .channels_max = 2, 509 .rates = SNDRV_PCM_RATE_8000_48000, 510 .formats = SNDRV_PCM_FMTBIT_S16_LE }, 511 .ops = &ak4642_dai_ops, 512 .symmetric_rates = 1, 513 }; 514 515 static int ak4642_resume(struct snd_soc_codec *codec) 516 { 517 struct regmap *regmap = dev_get_regmap(codec->dev, NULL); 518 519 regcache_mark_dirty(regmap); 520 regcache_sync(regmap); 521 return 0; 522 } 523 524 static struct snd_soc_codec_driver soc_codec_dev_ak4642 = { 525 .resume = ak4642_resume, 526 .set_bias_level = ak4642_set_bias_level, 527 .controls = ak4642_snd_controls, 528 .num_controls = ARRAY_SIZE(ak4642_snd_controls), 529 .dapm_widgets = ak4642_dapm_widgets, 530 .num_dapm_widgets = ARRAY_SIZE(ak4642_dapm_widgets), 531 .dapm_routes = ak4642_intercon, 532 .num_dapm_routes = ARRAY_SIZE(ak4642_intercon), 533 }; 534 535 static const struct regmap_config ak4642_regmap = { 536 .reg_bits = 8, 537 .val_bits = 8, 538 .max_register = ARRAY_SIZE(ak4642_reg) + 1, 539 .reg_defaults = ak4642_reg, 540 .num_reg_defaults = ARRAY_SIZE(ak4642_reg), 541 }; 542 543 static const struct regmap_config ak4648_regmap = { 544 .reg_bits = 8, 545 .val_bits = 8, 546 .max_register = ARRAY_SIZE(ak4648_reg) + 1, 547 .reg_defaults = ak4648_reg, 548 .num_reg_defaults = ARRAY_SIZE(ak4648_reg), 549 }; 550 551 static const struct ak4642_drvdata ak4642_drvdata = { 552 .regmap_config = &ak4642_regmap, 553 }; 554 555 static const struct ak4642_drvdata ak4643_drvdata = { 556 .regmap_config = &ak4642_regmap, 557 }; 558 559 static const struct ak4642_drvdata ak4648_drvdata = { 560 .regmap_config = &ak4648_regmap, 561 .extended_frequencies = 1, 562 }; 563 564 static const struct of_device_id ak4642_of_match[]; 565 static int ak4642_i2c_probe(struct i2c_client *i2c, 566 const struct i2c_device_id *id) 567 { 568 struct device_node *np = i2c->dev.of_node; 569 const struct ak4642_drvdata *drvdata = NULL; 570 struct regmap *regmap; 571 struct ak4642_priv *priv; 572 573 if (np) { 574 const struct of_device_id *of_id; 575 576 of_id = of_match_device(ak4642_of_match, &i2c->dev); 577 if (of_id) 578 drvdata = of_id->data; 579 } else { 580 drvdata = (const struct ak4642_drvdata *)id->driver_data; 581 } 582 583 if (!drvdata) { 584 dev_err(&i2c->dev, "Unknown device type\n"); 585 return -EINVAL; 586 } 587 588 priv = devm_kzalloc(&i2c->dev, sizeof(*priv), GFP_KERNEL); 589 if (!priv) 590 return -ENOMEM; 591 592 priv->drvdata = drvdata; 593 594 i2c_set_clientdata(i2c, priv); 595 596 regmap = devm_regmap_init_i2c(i2c, drvdata->regmap_config); 597 if (IS_ERR(regmap)) 598 return PTR_ERR(regmap); 599 600 return snd_soc_register_codec(&i2c->dev, 601 &soc_codec_dev_ak4642, &ak4642_dai, 1); 602 } 603 604 static int ak4642_i2c_remove(struct i2c_client *client) 605 { 606 snd_soc_unregister_codec(&client->dev); 607 return 0; 608 } 609 610 static const struct of_device_id ak4642_of_match[] = { 611 { .compatible = "asahi-kasei,ak4642", .data = &ak4642_drvdata}, 612 { .compatible = "asahi-kasei,ak4643", .data = &ak4643_drvdata}, 613 { .compatible = "asahi-kasei,ak4648", .data = &ak4648_drvdata}, 614 {}, 615 }; 616 MODULE_DEVICE_TABLE(of, ak4642_of_match); 617 618 static const struct i2c_device_id ak4642_i2c_id[] = { 619 { "ak4642", (kernel_ulong_t)&ak4642_drvdata }, 620 { "ak4643", (kernel_ulong_t)&ak4643_drvdata }, 621 { "ak4648", (kernel_ulong_t)&ak4648_drvdata }, 622 { } 623 }; 624 MODULE_DEVICE_TABLE(i2c, ak4642_i2c_id); 625 626 static struct i2c_driver ak4642_i2c_driver = { 627 .driver = { 628 .name = "ak4642-codec", 629 .owner = THIS_MODULE, 630 .of_match_table = ak4642_of_match, 631 }, 632 .probe = ak4642_i2c_probe, 633 .remove = ak4642_i2c_remove, 634 .id_table = ak4642_i2c_id, 635 }; 636 637 module_i2c_driver(ak4642_i2c_driver); 638 639 MODULE_DESCRIPTION("Soc AK4642 driver"); 640 MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>"); 641 MODULE_LICENSE("GPL"); 642