1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Audio driver for AK4458 4 * 5 * Copyright (C) 2016 Asahi Kasei Microdevices Corporation 6 * Copyright 2018 NXP 7 */ 8 9 #ifndef _AK4458_H 10 #define _AK4458_H 11 12 #include <linux/regmap.h> 13 14 /* Settings */ 15 16 #define AK4458_00_CONTROL1 0x00 17 #define AK4458_01_CONTROL2 0x01 18 #define AK4458_02_CONTROL3 0x02 19 #define AK4458_03_LCHATT 0x03 20 #define AK4458_04_RCHATT 0x04 21 #define AK4458_05_CONTROL4 0x05 22 #define AK4458_06_DSD1 0x06 23 #define AK4458_07_CONTROL5 0x07 24 #define AK4458_08_SOUND_CONTROL 0x08 25 #define AK4458_09_DSD2 0x09 26 #define AK4458_0A_CONTROL6 0x0A 27 #define AK4458_0B_CONTROL7 0x0B 28 #define AK4458_0C_CONTROL8 0x0C 29 #define AK4458_0D_CONTROL9 0x0D 30 #define AK4458_0E_CONTROL10 0x0E 31 #define AK4458_0F_L2CHATT 0x0F 32 #define AK4458_10_R2CHATT 0x10 33 #define AK4458_11_L3CHATT 0x11 34 #define AK4458_12_R3CHATT 0x12 35 #define AK4458_13_L4CHATT 0x13 36 #define AK4458_14_R4CHATT 0x14 37 38 /* Bitfield Definitions */ 39 40 /* AK4458_00_CONTROL1 (0x00) Fields 41 * Addr Register Name D7 D6 D5 D4 D3 D2 D1 D0 42 * 00H Control 1 ACKS 0 0 0 DIF2 DIF1 DIF0 RSTN 43 */ 44 45 /* Digital Filter (SD, SLOW, SSLOW) */ 46 #define AK4458_SD_MASK GENMASK(5, 5) 47 #define AK4458_SLOW_MASK GENMASK(0, 0) 48 #define AK4458_SSLOW_MASK GENMASK(0, 0) 49 50 /* DIF2 1 0 51 * x 1 0 MSB justified Figure 3 (default) 52 * x 1 1 I2S Compliment Figure 4 53 */ 54 #define AK4458_DIF_SHIFT 1 55 #define AK4458_DIF_MASK GENMASK(3, 1) 56 57 #define AK4458_DIF_16BIT_LSB (0 << 1) 58 #define AK4458_DIF_24BIT_I2S (3 << 1) 59 #define AK4458_DIF_32BIT_LSB (5 << 1) 60 #define AK4458_DIF_32BIT_MSB (6 << 1) 61 #define AK4458_DIF_32BIT_I2S (7 << 1) 62 63 /* AK4458_00_CONTROL1 (0x00) D0 bit */ 64 #define AK4458_RSTN_MASK GENMASK(0, 0) 65 #define AK4458_RSTN (0x1 << 0) 66 67 /* AK4458_0A_CONTROL6 Mode bits */ 68 #define AK4458_MODE_SHIFT 6 69 #define AK4458_MODE_MASK GENMASK(7, 6) 70 #define AK4458_MODE_NORMAL (0 << AK4458_MODE_SHIFT) 71 #define AK4458_MODE_TDM128 (1 << AK4458_MODE_SHIFT) 72 #define AK4458_MODE_TDM256 (2 << AK4458_MODE_SHIFT) 73 #define AK4458_MODE_TDM512 (3 << AK4458_MODE_SHIFT) 74 75 /* DAC Digital attenuator transition time setting 76 * Table 19 77 * Mode ATS1 ATS2 ATT speed 78 * 0 0 0 4080/fs 79 * 1 0 1 2040/fs 80 * 2 1 0 510/fs 81 * 3 1 1 255/fs 82 * */ 83 #define AK4458_ATS_SHIFT 6 84 #define AK4458_ATS_MASK GENMASK(7, 6) 85 #define AK4458_DCHAIN_MASK (0x1 << 1) 86 87 #define AK4458_DSDSEL_MASK (0x1 << 0) 88 #define AK4458_DP_MASK (0x1 << 7) 89 90 #endif 91