1 // SPDX-License-Identifier: GPL-2.0 2 // 3 // Audio driver for AK4458 DAC 4 // 5 // Copyright (C) 2016 Asahi Kasei Microdevices Corporation 6 // Copyright 2018 NXP 7 8 #include <linux/delay.h> 9 #include <linux/gpio/consumer.h> 10 #include <linux/i2c.h> 11 #include <linux/module.h> 12 #include <linux/of_device.h> 13 #include <linux/of_gpio.h> 14 #include <linux/pm_runtime.h> 15 #include <linux/regulator/consumer.h> 16 #include <linux/slab.h> 17 #include <sound/initval.h> 18 #include <sound/pcm_params.h> 19 #include <sound/soc.h> 20 #include <sound/soc-dapm.h> 21 #include <sound/tlv.h> 22 23 #include "ak4458.h" 24 25 #define AK4458_NUM_SUPPLIES 2 26 static const char *ak4458_supply_names[AK4458_NUM_SUPPLIES] = { 27 "DVDD", 28 "AVDD", 29 }; 30 31 enum ak4458_type { 32 AK4458 = 0, 33 AK4497 = 1, 34 }; 35 36 struct ak4458_drvdata { 37 struct snd_soc_dai_driver *dai_drv; 38 const struct snd_soc_component_driver *comp_drv; 39 enum ak4458_type type; 40 }; 41 42 /* AK4458 Codec Private Data */ 43 struct ak4458_priv { 44 struct regulator_bulk_data supplies[AK4458_NUM_SUPPLIES]; 45 const struct ak4458_drvdata *drvdata; 46 struct device *dev; 47 struct regmap *regmap; 48 struct gpio_desc *reset_gpiod; 49 struct gpio_desc *mute_gpiod; 50 int digfil; /* SSLOW, SD, SLOW bits */ 51 int fs; /* sampling rate */ 52 int fmt; 53 int slots; 54 int slot_width; 55 u32 dsd_path; /* For ak4497 */ 56 }; 57 58 static const struct reg_default ak4458_reg_defaults[] = { 59 { 0x00, 0x0C }, /* 0x00 AK4458_00_CONTROL1 */ 60 { 0x01, 0x22 }, /* 0x01 AK4458_01_CONTROL2 */ 61 { 0x02, 0x00 }, /* 0x02 AK4458_02_CONTROL3 */ 62 { 0x03, 0xFF }, /* 0x03 AK4458_03_LCHATT */ 63 { 0x04, 0xFF }, /* 0x04 AK4458_04_RCHATT */ 64 { 0x05, 0x00 }, /* 0x05 AK4458_05_CONTROL4 */ 65 { 0x06, 0x00 }, /* 0x06 AK4458_06_DSD1 */ 66 { 0x07, 0x03 }, /* 0x07 AK4458_07_CONTROL5 */ 67 { 0x08, 0x00 }, /* 0x08 AK4458_08_SOUND_CONTROL */ 68 { 0x09, 0x00 }, /* 0x09 AK4458_09_DSD2 */ 69 { 0x0A, 0x0D }, /* 0x0A AK4458_0A_CONTROL6 */ 70 { 0x0B, 0x0C }, /* 0x0B AK4458_0B_CONTROL7 */ 71 { 0x0C, 0x00 }, /* 0x0C AK4458_0C_CONTROL8 */ 72 { 0x0D, 0x00 }, /* 0x0D AK4458_0D_CONTROL9 */ 73 { 0x0E, 0x50 }, /* 0x0E AK4458_0E_CONTROL10 */ 74 { 0x0F, 0xFF }, /* 0x0F AK4458_0F_L2CHATT */ 75 { 0x10, 0xFF }, /* 0x10 AK4458_10_R2CHATT */ 76 { 0x11, 0xFF }, /* 0x11 AK4458_11_L3CHATT */ 77 { 0x12, 0xFF }, /* 0x12 AK4458_12_R3CHATT */ 78 { 0x13, 0xFF }, /* 0x13 AK4458_13_L4CHATT */ 79 { 0x14, 0xFF }, /* 0x14 AK4458_14_R4CHATT */ 80 }; 81 82 /* 83 * Volume control: 84 * from -127 to 0 dB in 0.5 dB steps (mute instead of -127.5 dB) 85 */ 86 static DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1); 87 88 /* 89 * DEM1 bit DEM0 bit Mode 90 * 0 0 44.1kHz 91 * 0 1 OFF (default) 92 * 1 0 48kHz 93 * 1 1 32kHz 94 */ 95 static const char * const ak4458_dem_select_texts[] = { 96 "44.1kHz", "OFF", "48kHz", "32kHz" 97 }; 98 99 /* 100 * SSLOW, SD, SLOW bits Digital Filter Setting 101 * 0, 0, 0 : Sharp Roll-Off Filter 102 * 0, 0, 1 : Slow Roll-Off Filter 103 * 0, 1, 0 : Short delay Sharp Roll-Off Filter 104 * 0, 1, 1 : Short delay Slow Roll-Off Filter 105 * 1, *, * : Super Slow Roll-Off Filter 106 */ 107 static const char * const ak4458_digfil_select_texts[] = { 108 "Sharp Roll-Off Filter", 109 "Slow Roll-Off Filter", 110 "Short delay Sharp Roll-Off Filter", 111 "Short delay Slow Roll-Off Filter", 112 "Super Slow Roll-Off Filter" 113 }; 114 115 /* 116 * DZFB: Inverting Enable of DZF 117 * 0: DZF goes H at Zero Detection 118 * 1: DZF goes L at Zero Detection 119 */ 120 static const char * const ak4458_dzfb_select_texts[] = {"H", "L"}; 121 122 /* 123 * SC1-0 bits: Sound Mode Setting 124 * 0 0 : Sound Mode 0 125 * 0 1 : Sound Mode 1 126 * 1 0 : Sound Mode 2 127 * 1 1 : Reserved 128 */ 129 static const char * const ak4458_sc_select_texts[] = { 130 "Sound Mode 0", "Sound Mode 1", "Sound Mode 2" 131 }; 132 133 /* FIR2-0 bits: FIR Filter Mode Setting */ 134 static const char * const ak4458_fir_select_texts[] = { 135 "Mode 0", "Mode 1", "Mode 2", "Mode 3", 136 "Mode 4", "Mode 5", "Mode 6", "Mode 7", 137 }; 138 139 /* ATS1-0 bits Attenuation Speed */ 140 static const char * const ak4458_ats_select_texts[] = { 141 "4080/fs", "2040/fs", "510/fs", "255/fs", 142 }; 143 144 /* DIF2 bit Audio Interface Format Setting(BICK fs) */ 145 static const char * const ak4458_dif_select_texts[] = {"32fs,48fs", "64fs",}; 146 147 static const struct soc_enum ak4458_dac1_dem_enum = 148 SOC_ENUM_SINGLE(AK4458_01_CONTROL2, 1, 149 ARRAY_SIZE(ak4458_dem_select_texts), 150 ak4458_dem_select_texts); 151 static const struct soc_enum ak4458_dac2_dem_enum = 152 SOC_ENUM_SINGLE(AK4458_0A_CONTROL6, 0, 153 ARRAY_SIZE(ak4458_dem_select_texts), 154 ak4458_dem_select_texts); 155 static const struct soc_enum ak4458_dac3_dem_enum = 156 SOC_ENUM_SINGLE(AK4458_0E_CONTROL10, 4, 157 ARRAY_SIZE(ak4458_dem_select_texts), 158 ak4458_dem_select_texts); 159 static const struct soc_enum ak4458_dac4_dem_enum = 160 SOC_ENUM_SINGLE(AK4458_0E_CONTROL10, 6, 161 ARRAY_SIZE(ak4458_dem_select_texts), 162 ak4458_dem_select_texts); 163 static const struct soc_enum ak4458_digfil_enum = 164 SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(ak4458_digfil_select_texts), 165 ak4458_digfil_select_texts); 166 static const struct soc_enum ak4458_dzfb_enum = 167 SOC_ENUM_SINGLE(AK4458_02_CONTROL3, 2, 168 ARRAY_SIZE(ak4458_dzfb_select_texts), 169 ak4458_dzfb_select_texts); 170 static const struct soc_enum ak4458_sm_enum = 171 SOC_ENUM_SINGLE(AK4458_08_SOUND_CONTROL, 0, 172 ARRAY_SIZE(ak4458_sc_select_texts), 173 ak4458_sc_select_texts); 174 static const struct soc_enum ak4458_fir_enum = 175 SOC_ENUM_SINGLE(AK4458_0C_CONTROL8, 0, 176 ARRAY_SIZE(ak4458_fir_select_texts), 177 ak4458_fir_select_texts); 178 static const struct soc_enum ak4458_ats_enum = 179 SOC_ENUM_SINGLE(AK4458_0B_CONTROL7, 6, 180 ARRAY_SIZE(ak4458_ats_select_texts), 181 ak4458_ats_select_texts); 182 static const struct soc_enum ak4458_dif_enum = 183 SOC_ENUM_SINGLE(AK4458_00_CONTROL1, 3, 184 ARRAY_SIZE(ak4458_dif_select_texts), 185 ak4458_dif_select_texts); 186 187 static int get_digfil(struct snd_kcontrol *kcontrol, 188 struct snd_ctl_elem_value *ucontrol) 189 { 190 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); 191 struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component); 192 193 ucontrol->value.enumerated.item[0] = ak4458->digfil; 194 195 return 0; 196 } 197 198 static int set_digfil(struct snd_kcontrol *kcontrol, 199 struct snd_ctl_elem_value *ucontrol) 200 { 201 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); 202 struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component); 203 int num; 204 205 num = ucontrol->value.enumerated.item[0]; 206 if (num > 4) 207 return -EINVAL; 208 209 ak4458->digfil = num; 210 211 /* write SD bit */ 212 snd_soc_component_update_bits(component, AK4458_01_CONTROL2, 213 AK4458_SD_MASK, 214 ((ak4458->digfil & 0x02) << 4)); 215 216 /* write SLOW bit */ 217 snd_soc_component_update_bits(component, AK4458_02_CONTROL3, 218 AK4458_SLOW_MASK, 219 (ak4458->digfil & 0x01)); 220 221 /* write SSLOW bit */ 222 snd_soc_component_update_bits(component, AK4458_05_CONTROL4, 223 AK4458_SSLOW_MASK, 224 ((ak4458->digfil & 0x04) >> 2)); 225 226 return 0; 227 } 228 229 static const struct snd_kcontrol_new ak4458_snd_controls[] = { 230 SOC_DOUBLE_R_TLV("DAC1 Playback Volume", AK4458_03_LCHATT, 231 AK4458_04_RCHATT, 0, 0xFF, 0, dac_tlv), 232 SOC_DOUBLE_R_TLV("DAC2 Playback Volume", AK4458_0F_L2CHATT, 233 AK4458_10_R2CHATT, 0, 0xFF, 0, dac_tlv), 234 SOC_DOUBLE_R_TLV("DAC3 Playback Volume", AK4458_11_L3CHATT, 235 AK4458_12_R3CHATT, 0, 0xFF, 0, dac_tlv), 236 SOC_DOUBLE_R_TLV("DAC4 Playback Volume", AK4458_13_L4CHATT, 237 AK4458_14_R4CHATT, 0, 0xFF, 0, dac_tlv), 238 SOC_ENUM("AK4458 De-emphasis Response DAC1", ak4458_dac1_dem_enum), 239 SOC_ENUM("AK4458 De-emphasis Response DAC2", ak4458_dac2_dem_enum), 240 SOC_ENUM("AK4458 De-emphasis Response DAC3", ak4458_dac3_dem_enum), 241 SOC_ENUM("AK4458 De-emphasis Response DAC4", ak4458_dac4_dem_enum), 242 SOC_ENUM_EXT("AK4458 Digital Filter Setting", ak4458_digfil_enum, 243 get_digfil, set_digfil), 244 SOC_ENUM("AK4458 Inverting Enable of DZFB", ak4458_dzfb_enum), 245 SOC_ENUM("AK4458 Sound Mode", ak4458_sm_enum), 246 SOC_ENUM("AK4458 FIR Filter Mode Setting", ak4458_fir_enum), 247 SOC_ENUM("AK4458 Attenuation transition Time Setting", 248 ak4458_ats_enum), 249 SOC_ENUM("AK4458 BICK fs Setting", ak4458_dif_enum), 250 }; 251 252 /* ak4458 dapm widgets */ 253 static const struct snd_soc_dapm_widget ak4458_dapm_widgets[] = { 254 SND_SOC_DAPM_DAC("AK4458 DAC1", NULL, AK4458_0A_CONTROL6, 2, 0),/*pw*/ 255 SND_SOC_DAPM_AIF_IN("AK4458 SDTI", "Playback", 0, SND_SOC_NOPM, 0, 0), 256 SND_SOC_DAPM_OUTPUT("AK4458 AOUTA"), 257 258 SND_SOC_DAPM_DAC("AK4458 DAC2", NULL, AK4458_0A_CONTROL6, 3, 0),/*pw*/ 259 SND_SOC_DAPM_OUTPUT("AK4458 AOUTB"), 260 261 SND_SOC_DAPM_DAC("AK4458 DAC3", NULL, AK4458_0B_CONTROL7, 2, 0),/*pw*/ 262 SND_SOC_DAPM_OUTPUT("AK4458 AOUTC"), 263 264 SND_SOC_DAPM_DAC("AK4458 DAC4", NULL, AK4458_0B_CONTROL7, 3, 0),/*pw*/ 265 SND_SOC_DAPM_OUTPUT("AK4458 AOUTD"), 266 }; 267 268 static const struct snd_soc_dapm_route ak4458_intercon[] = { 269 {"AK4458 DAC1", NULL, "AK4458 SDTI"}, 270 {"AK4458 AOUTA", NULL, "AK4458 DAC1"}, 271 272 {"AK4458 DAC2", NULL, "AK4458 SDTI"}, 273 {"AK4458 AOUTB", NULL, "AK4458 DAC2"}, 274 275 {"AK4458 DAC3", NULL, "AK4458 SDTI"}, 276 {"AK4458 AOUTC", NULL, "AK4458 DAC3"}, 277 278 {"AK4458 DAC4", NULL, "AK4458 SDTI"}, 279 {"AK4458 AOUTD", NULL, "AK4458 DAC4"}, 280 }; 281 282 /* ak4497 controls */ 283 static const struct snd_kcontrol_new ak4497_snd_controls[] = { 284 SOC_DOUBLE_R_TLV("DAC Playback Volume", AK4458_03_LCHATT, 285 AK4458_04_RCHATT, 0, 0xFF, 0, dac_tlv), 286 SOC_ENUM("AK4497 De-emphasis Response DAC", ak4458_dac1_dem_enum), 287 SOC_ENUM_EXT("AK4497 Digital Filter Setting", ak4458_digfil_enum, 288 get_digfil, set_digfil), 289 SOC_ENUM("AK4497 Inverting Enable of DZFB", ak4458_dzfb_enum), 290 SOC_ENUM("AK4497 Sound Mode", ak4458_sm_enum), 291 SOC_ENUM("AK4497 Attenuation transition Time Setting", 292 ak4458_ats_enum), 293 }; 294 295 /* ak4497 dapm widgets */ 296 static const struct snd_soc_dapm_widget ak4497_dapm_widgets[] = { 297 SND_SOC_DAPM_DAC("AK4497 DAC", NULL, AK4458_0A_CONTROL6, 2, 0), 298 SND_SOC_DAPM_AIF_IN("AK4497 SDTI", "Playback", 0, SND_SOC_NOPM, 0, 0), 299 SND_SOC_DAPM_OUTPUT("AK4497 AOUT"), 300 }; 301 302 /* ak4497 dapm routes */ 303 static const struct snd_soc_dapm_route ak4497_intercon[] = { 304 {"AK4497 DAC", NULL, "AK4497 SDTI"}, 305 {"AK4497 AOUT", NULL, "AK4497 DAC"}, 306 307 }; 308 309 static int ak4458_get_tdm_mode(struct ak4458_priv *ak4458) 310 { 311 switch (ak4458->slots * ak4458->slot_width) { 312 case 128: 313 return 1; 314 case 256: 315 return 2; 316 case 512: 317 return 3; 318 default: 319 return 0; 320 } 321 } 322 323 static int ak4458_rstn_control(struct snd_soc_component *component, int bit) 324 { 325 int ret; 326 327 if (bit) 328 ret = snd_soc_component_update_bits(component, 329 AK4458_00_CONTROL1, 330 AK4458_RSTN_MASK, 331 0x1); 332 else 333 ret = snd_soc_component_update_bits(component, 334 AK4458_00_CONTROL1, 335 AK4458_RSTN_MASK, 336 0x0); 337 if (ret < 0) 338 return ret; 339 340 return 0; 341 } 342 343 static int ak4458_hw_params(struct snd_pcm_substream *substream, 344 struct snd_pcm_hw_params *params, 345 struct snd_soc_dai *dai) 346 { 347 struct snd_soc_component *component = dai->component; 348 struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component); 349 int pcm_width = max(params_physical_width(params), ak4458->slot_width); 350 u8 format, dsdsel0, dsdsel1, dchn; 351 int nfs1, dsd_bclk, ret, channels, channels_max; 352 353 nfs1 = params_rate(params); 354 ak4458->fs = nfs1; 355 356 /* calculate bit clock */ 357 channels = params_channels(params); 358 channels_max = dai->driver->playback.channels_max; 359 360 switch (params_format(params)) { 361 case SNDRV_PCM_FORMAT_DSD_U8: 362 case SNDRV_PCM_FORMAT_DSD_U16_LE: 363 case SNDRV_PCM_FORMAT_DSD_U16_BE: 364 case SNDRV_PCM_FORMAT_DSD_U32_LE: 365 case SNDRV_PCM_FORMAT_DSD_U32_BE: 366 dsd_bclk = nfs1 * params_physical_width(params); 367 switch (dsd_bclk) { 368 case 2822400: 369 dsdsel0 = 0; 370 dsdsel1 = 0; 371 break; 372 case 5644800: 373 dsdsel0 = 1; 374 dsdsel1 = 0; 375 break; 376 case 11289600: 377 dsdsel0 = 0; 378 dsdsel1 = 1; 379 break; 380 case 22579200: 381 if (ak4458->drvdata->type == AK4497) { 382 dsdsel0 = 1; 383 dsdsel1 = 1; 384 } else { 385 dev_err(dai->dev, "DSD512 not supported.\n"); 386 return -EINVAL; 387 } 388 break; 389 default: 390 dev_err(dai->dev, "Unsupported dsd bclk.\n"); 391 return -EINVAL; 392 } 393 394 snd_soc_component_update_bits(component, AK4458_06_DSD1, 395 AK4458_DSDSEL_MASK, dsdsel0); 396 snd_soc_component_update_bits(component, AK4458_09_DSD2, 397 AK4458_DSDSEL_MASK, dsdsel1); 398 break; 399 } 400 401 /* Master Clock Frequency Auto Setting Mode Enable */ 402 snd_soc_component_update_bits(component, AK4458_00_CONTROL1, 0x80, 0x80); 403 404 switch (pcm_width) { 405 case 16: 406 if (ak4458->fmt == SND_SOC_DAIFMT_I2S) 407 format = AK4458_DIF_24BIT_I2S; 408 else 409 format = AK4458_DIF_16BIT_LSB; 410 break; 411 case 32: 412 switch (ak4458->fmt) { 413 case SND_SOC_DAIFMT_I2S: 414 format = AK4458_DIF_32BIT_I2S; 415 break; 416 case SND_SOC_DAIFMT_LEFT_J: 417 format = AK4458_DIF_32BIT_MSB; 418 break; 419 case SND_SOC_DAIFMT_RIGHT_J: 420 format = AK4458_DIF_32BIT_LSB; 421 break; 422 case SND_SOC_DAIFMT_DSP_B: 423 format = AK4458_DIF_32BIT_MSB; 424 break; 425 case SND_SOC_DAIFMT_PDM: 426 format = AK4458_DIF_32BIT_MSB; 427 break; 428 default: 429 return -EINVAL; 430 } 431 break; 432 default: 433 return -EINVAL; 434 } 435 436 snd_soc_component_update_bits(component, AK4458_00_CONTROL1, 437 AK4458_DIF_MASK, format); 438 439 /* 440 * Enable/disable Daisy Chain if in TDM mode and the number of played 441 * channels is bigger than the maximum supported number of channels 442 */ 443 dchn = ak4458_get_tdm_mode(ak4458) && 444 (ak4458->fmt == SND_SOC_DAIFMT_DSP_B) && 445 (channels > channels_max) ? AK4458_DCHAIN_MASK : 0; 446 447 snd_soc_component_update_bits(component, AK4458_0B_CONTROL7, 448 AK4458_DCHAIN_MASK, dchn); 449 450 ret = ak4458_rstn_control(component, 0); 451 if (ret) 452 return ret; 453 454 ret = ak4458_rstn_control(component, 1); 455 if (ret) 456 return ret; 457 458 return 0; 459 } 460 461 static int ak4458_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) 462 { 463 struct snd_soc_component *component = dai->component; 464 struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component); 465 int ret; 466 467 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 468 case SND_SOC_DAIFMT_CBC_CFC: /* Consumer Mode */ 469 break; 470 case SND_SOC_DAIFMT_CBP_CFP: /* Provider Mode is not supported */ 471 case SND_SOC_DAIFMT_CBC_CFP: 472 case SND_SOC_DAIFMT_CBP_CFC: 473 default: 474 dev_err(component->dev, "Clock provider mode unsupported\n"); 475 return -EINVAL; 476 } 477 478 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 479 case SND_SOC_DAIFMT_I2S: 480 case SND_SOC_DAIFMT_LEFT_J: 481 case SND_SOC_DAIFMT_RIGHT_J: 482 case SND_SOC_DAIFMT_DSP_B: 483 case SND_SOC_DAIFMT_PDM: 484 ak4458->fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK; 485 break; 486 default: 487 dev_err(component->dev, "Audio format 0x%02X unsupported\n", 488 fmt & SND_SOC_DAIFMT_FORMAT_MASK); 489 return -EINVAL; 490 } 491 492 /* DSD mode */ 493 snd_soc_component_update_bits(component, AK4458_02_CONTROL3, 494 AK4458_DP_MASK, 495 ak4458->fmt == SND_SOC_DAIFMT_PDM ? 496 AK4458_DP_MASK : 0); 497 498 ret = ak4458_rstn_control(component, 0); 499 if (ret) 500 return ret; 501 502 ret = ak4458_rstn_control(component, 1); 503 if (ret) 504 return ret; 505 506 return 0; 507 } 508 509 static const int att_speed[] = { 4080, 2040, 510, 255 }; 510 511 static int ak4458_set_dai_mute(struct snd_soc_dai *dai, int mute, int direction) 512 { 513 struct snd_soc_component *component = dai->component; 514 struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component); 515 int nfs, ndt, reg; 516 int ats; 517 518 nfs = ak4458->fs; 519 520 reg = snd_soc_component_read(component, AK4458_0B_CONTROL7); 521 ats = (reg & AK4458_ATS_MASK) >> AK4458_ATS_SHIFT; 522 523 ndt = att_speed[ats] / (nfs / 1000); 524 525 if (mute) { 526 snd_soc_component_update_bits(component, AK4458_01_CONTROL2, 0x01, 1); 527 mdelay(ndt); 528 if (ak4458->mute_gpiod) 529 gpiod_set_value_cansleep(ak4458->mute_gpiod, 1); 530 } else { 531 if (ak4458->mute_gpiod) 532 gpiod_set_value_cansleep(ak4458->mute_gpiod, 0); 533 snd_soc_component_update_bits(component, AK4458_01_CONTROL2, 0x01, 0); 534 mdelay(ndt); 535 } 536 537 return 0; 538 } 539 540 static int ak4458_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, 541 unsigned int rx_mask, int slots, int slot_width) 542 { 543 struct snd_soc_component *component = dai->component; 544 struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component); 545 int mode; 546 547 ak4458->slots = slots; 548 ak4458->slot_width = slot_width; 549 550 mode = ak4458_get_tdm_mode(ak4458) << AK4458_MODE_SHIFT; 551 552 snd_soc_component_update_bits(component, AK4458_0A_CONTROL6, 553 AK4458_MODE_MASK, 554 mode); 555 556 return 0; 557 } 558 559 #define AK4458_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\ 560 SNDRV_PCM_FMTBIT_S24_LE |\ 561 SNDRV_PCM_FMTBIT_S32_LE |\ 562 SNDRV_PCM_FMTBIT_DSD_U8 |\ 563 SNDRV_PCM_FMTBIT_DSD_U16_LE |\ 564 SNDRV_PCM_FMTBIT_DSD_U32_LE) 565 566 static const unsigned int ak4458_rates[] = { 567 8000, 11025, 16000, 22050, 568 32000, 44100, 48000, 88200, 569 96000, 176400, 192000, 352800, 570 384000, 705600, 768000, 1411200, 571 2822400, 572 }; 573 574 static const struct snd_pcm_hw_constraint_list ak4458_rate_constraints = { 575 .count = ARRAY_SIZE(ak4458_rates), 576 .list = ak4458_rates, 577 }; 578 579 static int ak4458_startup(struct snd_pcm_substream *substream, 580 struct snd_soc_dai *dai) 581 { 582 int ret; 583 584 ret = snd_pcm_hw_constraint_list(substream->runtime, 0, 585 SNDRV_PCM_HW_PARAM_RATE, 586 &ak4458_rate_constraints); 587 588 return ret; 589 } 590 591 static const struct snd_soc_dai_ops ak4458_dai_ops = { 592 .startup = ak4458_startup, 593 .hw_params = ak4458_hw_params, 594 .set_fmt = ak4458_set_dai_fmt, 595 .mute_stream = ak4458_set_dai_mute, 596 .set_tdm_slot = ak4458_set_tdm_slot, 597 .no_capture_mute = 1, 598 }; 599 600 static struct snd_soc_dai_driver ak4458_dai = { 601 .name = "ak4458-aif", 602 .playback = { 603 .stream_name = "Playback", 604 .channels_min = 1, 605 .channels_max = 8, 606 .rates = SNDRV_PCM_RATE_KNOT, 607 .formats = AK4458_FORMATS, 608 }, 609 .ops = &ak4458_dai_ops, 610 }; 611 612 static struct snd_soc_dai_driver ak4497_dai = { 613 .name = "ak4497-aif", 614 .playback = { 615 .stream_name = "Playback", 616 .channels_min = 1, 617 .channels_max = 2, 618 .rates = SNDRV_PCM_RATE_KNOT, 619 .formats = AK4458_FORMATS, 620 }, 621 .ops = &ak4458_dai_ops, 622 }; 623 624 static void ak4458_reset(struct ak4458_priv *ak4458, bool active) 625 { 626 if (ak4458->reset_gpiod) { 627 gpiod_set_value_cansleep(ak4458->reset_gpiod, active); 628 usleep_range(1000, 2000); 629 } 630 } 631 632 static int ak4458_init(struct snd_soc_component *component) 633 { 634 struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component); 635 int ret; 636 637 /* External Mute ON */ 638 if (ak4458->mute_gpiod) 639 gpiod_set_value_cansleep(ak4458->mute_gpiod, 1); 640 641 ak4458_reset(ak4458, false); 642 643 ret = snd_soc_component_update_bits(component, AK4458_00_CONTROL1, 644 0x80, 0x80); /* ACKS bit = 1; 10000000 */ 645 if (ret < 0) 646 return ret; 647 648 if (ak4458->drvdata->type == AK4497) { 649 ret = snd_soc_component_update_bits(component, AK4458_09_DSD2, 650 0x4, (ak4458->dsd_path << 2)); 651 if (ret < 0) 652 return ret; 653 } 654 655 return ak4458_rstn_control(component, 1); 656 } 657 658 static int ak4458_probe(struct snd_soc_component *component) 659 { 660 struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component); 661 662 ak4458->fs = 48000; 663 664 return ak4458_init(component); 665 } 666 667 static void ak4458_remove(struct snd_soc_component *component) 668 { 669 struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component); 670 671 ak4458_reset(ak4458, true); 672 } 673 674 #ifdef CONFIG_PM 675 static int __maybe_unused ak4458_runtime_suspend(struct device *dev) 676 { 677 struct ak4458_priv *ak4458 = dev_get_drvdata(dev); 678 679 regcache_cache_only(ak4458->regmap, true); 680 681 ak4458_reset(ak4458, true); 682 683 if (ak4458->mute_gpiod) 684 gpiod_set_value_cansleep(ak4458->mute_gpiod, 0); 685 686 regulator_bulk_disable(ARRAY_SIZE(ak4458->supplies), 687 ak4458->supplies); 688 return 0; 689 } 690 691 static int __maybe_unused ak4458_runtime_resume(struct device *dev) 692 { 693 struct ak4458_priv *ak4458 = dev_get_drvdata(dev); 694 int ret; 695 696 ret = regulator_bulk_enable(ARRAY_SIZE(ak4458->supplies), 697 ak4458->supplies); 698 if (ret != 0) { 699 dev_err(ak4458->dev, "Failed to enable supplies: %d\n", ret); 700 return ret; 701 } 702 703 if (ak4458->mute_gpiod) 704 gpiod_set_value_cansleep(ak4458->mute_gpiod, 1); 705 706 ak4458_reset(ak4458, true); 707 ak4458_reset(ak4458, false); 708 709 regcache_cache_only(ak4458->regmap, false); 710 regcache_mark_dirty(ak4458->regmap); 711 712 return regcache_sync(ak4458->regmap); 713 } 714 #endif /* CONFIG_PM */ 715 716 static const struct snd_soc_component_driver soc_codec_dev_ak4458 = { 717 .probe = ak4458_probe, 718 .remove = ak4458_remove, 719 .controls = ak4458_snd_controls, 720 .num_controls = ARRAY_SIZE(ak4458_snd_controls), 721 .dapm_widgets = ak4458_dapm_widgets, 722 .num_dapm_widgets = ARRAY_SIZE(ak4458_dapm_widgets), 723 .dapm_routes = ak4458_intercon, 724 .num_dapm_routes = ARRAY_SIZE(ak4458_intercon), 725 .idle_bias_on = 1, 726 .use_pmdown_time = 1, 727 .endianness = 1, 728 }; 729 730 static const struct snd_soc_component_driver soc_codec_dev_ak4497 = { 731 .probe = ak4458_probe, 732 .remove = ak4458_remove, 733 .controls = ak4497_snd_controls, 734 .num_controls = ARRAY_SIZE(ak4497_snd_controls), 735 .dapm_widgets = ak4497_dapm_widgets, 736 .num_dapm_widgets = ARRAY_SIZE(ak4497_dapm_widgets), 737 .dapm_routes = ak4497_intercon, 738 .num_dapm_routes = ARRAY_SIZE(ak4497_intercon), 739 .idle_bias_on = 1, 740 .use_pmdown_time = 1, 741 .endianness = 1, 742 }; 743 744 static const struct regmap_config ak4458_regmap = { 745 .reg_bits = 8, 746 .val_bits = 8, 747 748 .max_register = AK4458_14_R4CHATT, 749 .reg_defaults = ak4458_reg_defaults, 750 .num_reg_defaults = ARRAY_SIZE(ak4458_reg_defaults), 751 .cache_type = REGCACHE_RBTREE, 752 }; 753 754 static const struct ak4458_drvdata ak4458_drvdata = { 755 .dai_drv = &ak4458_dai, 756 .comp_drv = &soc_codec_dev_ak4458, 757 .type = AK4458, 758 }; 759 760 static const struct ak4458_drvdata ak4497_drvdata = { 761 .dai_drv = &ak4497_dai, 762 .comp_drv = &soc_codec_dev_ak4497, 763 .type = AK4497, 764 }; 765 766 static const struct dev_pm_ops ak4458_pm = { 767 SET_RUNTIME_PM_OPS(ak4458_runtime_suspend, ak4458_runtime_resume, NULL) 768 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, 769 pm_runtime_force_resume) 770 }; 771 772 static int ak4458_i2c_probe(struct i2c_client *i2c) 773 { 774 struct ak4458_priv *ak4458; 775 int ret, i; 776 777 ak4458 = devm_kzalloc(&i2c->dev, sizeof(*ak4458), GFP_KERNEL); 778 if (!ak4458) 779 return -ENOMEM; 780 781 ak4458->regmap = devm_regmap_init_i2c(i2c, &ak4458_regmap); 782 if (IS_ERR(ak4458->regmap)) 783 return PTR_ERR(ak4458->regmap); 784 785 i2c_set_clientdata(i2c, ak4458); 786 ak4458->dev = &i2c->dev; 787 788 ak4458->drvdata = of_device_get_match_data(&i2c->dev); 789 790 ak4458->reset_gpiod = devm_gpiod_get_optional(ak4458->dev, "reset", 791 GPIOD_OUT_LOW); 792 if (IS_ERR(ak4458->reset_gpiod)) 793 return PTR_ERR(ak4458->reset_gpiod); 794 795 ak4458->mute_gpiod = devm_gpiod_get_optional(ak4458->dev, "mute", 796 GPIOD_OUT_LOW); 797 if (IS_ERR(ak4458->mute_gpiod)) 798 return PTR_ERR(ak4458->mute_gpiod); 799 800 /* Optional property for ak4497 */ 801 of_property_read_u32(i2c->dev.of_node, "dsd-path", &ak4458->dsd_path); 802 803 for (i = 0; i < ARRAY_SIZE(ak4458->supplies); i++) 804 ak4458->supplies[i].supply = ak4458_supply_names[i]; 805 806 ret = devm_regulator_bulk_get(ak4458->dev, ARRAY_SIZE(ak4458->supplies), 807 ak4458->supplies); 808 if (ret != 0) { 809 dev_err(ak4458->dev, "Failed to request supplies: %d\n", ret); 810 return ret; 811 } 812 813 ret = devm_snd_soc_register_component(ak4458->dev, 814 ak4458->drvdata->comp_drv, 815 ak4458->drvdata->dai_drv, 1); 816 if (ret < 0) { 817 dev_err(ak4458->dev, "Failed to register CODEC: %d\n", ret); 818 return ret; 819 } 820 821 pm_runtime_enable(&i2c->dev); 822 regcache_cache_only(ak4458->regmap, true); 823 824 return 0; 825 } 826 827 static int ak4458_i2c_remove(struct i2c_client *i2c) 828 { 829 pm_runtime_disable(&i2c->dev); 830 831 return 0; 832 } 833 834 static const struct of_device_id ak4458_of_match[] = { 835 { .compatible = "asahi-kasei,ak4458", .data = &ak4458_drvdata}, 836 { .compatible = "asahi-kasei,ak4497", .data = &ak4497_drvdata}, 837 { }, 838 }; 839 MODULE_DEVICE_TABLE(of, ak4458_of_match); 840 841 static struct i2c_driver ak4458_i2c_driver = { 842 .driver = { 843 .name = "ak4458", 844 .pm = &ak4458_pm, 845 .of_match_table = ak4458_of_match, 846 }, 847 .probe_new = ak4458_i2c_probe, 848 .remove = ak4458_i2c_remove, 849 }; 850 851 module_i2c_driver(ak4458_i2c_driver); 852 853 MODULE_AUTHOR("Junichi Wakasugi <wakasugi.jb@om.asahi-kasei.co.jp>"); 854 MODULE_AUTHOR("Mihai Serban <mihai.serban@nxp.com>"); 855 MODULE_DESCRIPTION("ASoC AK4458 DAC driver"); 856 MODULE_LICENSE("GPL v2"); 857