xref: /openbmc/linux/sound/soc/codecs/ak4458.c (revision 40ddb537)
1 // SPDX-License-Identifier: GPL-2.0
2 //
3 // Audio driver for AK4458 DAC
4 //
5 // Copyright (C) 2016 Asahi Kasei Microdevices Corporation
6 // Copyright 2018 NXP
7 
8 #include <linux/delay.h>
9 #include <linux/gpio/consumer.h>
10 #include <linux/i2c.h>
11 #include <linux/module.h>
12 #include <linux/of_device.h>
13 #include <linux/of_gpio.h>
14 #include <linux/pm_runtime.h>
15 #include <linux/regulator/consumer.h>
16 #include <linux/slab.h>
17 #include <sound/initval.h>
18 #include <sound/pcm_params.h>
19 #include <sound/soc.h>
20 #include <sound/soc-dapm.h>
21 #include <sound/tlv.h>
22 
23 #include "ak4458.h"
24 
25 #define AK4458_NUM_SUPPLIES 2
26 static const char *ak4458_supply_names[AK4458_NUM_SUPPLIES] = {
27 	"DVDD",
28 	"AVDD",
29 };
30 
31 enum ak4458_type {
32 	AK4458 = 0,
33 	AK4497 = 1,
34 };
35 
36 struct ak4458_drvdata {
37 	struct snd_soc_dai_driver *dai_drv;
38 	const struct snd_soc_component_driver *comp_drv;
39 	enum ak4458_type type;
40 };
41 
42 /* AK4458 Codec Private Data */
43 struct ak4458_priv {
44 	struct regulator_bulk_data supplies[AK4458_NUM_SUPPLIES];
45 	const struct ak4458_drvdata *drvdata;
46 	struct device *dev;
47 	struct regmap *regmap;
48 	struct gpio_desc *reset_gpiod;
49 	struct gpio_desc *mute_gpiod;
50 	int digfil;	/* SSLOW, SD, SLOW bits */
51 	int fs;		/* sampling rate */
52 	int fmt;
53 	int slots;
54 	int slot_width;
55 	u32 dsd_path;    /* For ak4497 */
56 };
57 
58 static const struct reg_default ak4458_reg_defaults[] = {
59 	{ 0x00, 0x0C },	/*	0x00	AK4458_00_CONTROL1	*/
60 	{ 0x01, 0x22 },	/*	0x01	AK4458_01_CONTROL2	*/
61 	{ 0x02, 0x00 },	/*	0x02	AK4458_02_CONTROL3	*/
62 	{ 0x03, 0xFF },	/*	0x03	AK4458_03_LCHATT	*/
63 	{ 0x04, 0xFF },	/*	0x04	AK4458_04_RCHATT	*/
64 	{ 0x05, 0x00 },	/*	0x05	AK4458_05_CONTROL4	*/
65 	{ 0x06, 0x00 },	/*	0x06	AK4458_06_DSD1		*/
66 	{ 0x07, 0x03 },	/*	0x07	AK4458_07_CONTROL5	*/
67 	{ 0x08, 0x00 },	/*	0x08	AK4458_08_SOUND_CONTROL	*/
68 	{ 0x09, 0x00 },	/*	0x09	AK4458_09_DSD2		*/
69 	{ 0x0A, 0x0D },	/*	0x0A	AK4458_0A_CONTROL6	*/
70 	{ 0x0B, 0x0C },	/*	0x0B	AK4458_0B_CONTROL7	*/
71 	{ 0x0C, 0x00 },	/*	0x0C	AK4458_0C_CONTROL8	*/
72 	{ 0x0D, 0x00 },	/*	0x0D	AK4458_0D_CONTROL9	*/
73 	{ 0x0E, 0x50 },	/*	0x0E	AK4458_0E_CONTROL10	*/
74 	{ 0x0F, 0xFF },	/*	0x0F	AK4458_0F_L2CHATT	*/
75 	{ 0x10, 0xFF },	/*	0x10	AK4458_10_R2CHATT	*/
76 	{ 0x11, 0xFF },	/*	0x11	AK4458_11_L3CHATT	*/
77 	{ 0x12, 0xFF },	/*	0x12	AK4458_12_R3CHATT	*/
78 	{ 0x13, 0xFF },	/*	0x13	AK4458_13_L4CHATT	*/
79 	{ 0x14, 0xFF },	/*	0x14	AK4458_14_R4CHATT	*/
80 };
81 
82 /*
83  * Volume control:
84  * from -127 to 0 dB in 0.5 dB steps (mute instead of -127.5 dB)
85  */
86 static DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
87 
88 /*
89  * DEM1 bit DEM0 bit Mode
90  * 0 0 44.1kHz
91  * 0 1 OFF (default)
92  * 1 0 48kHz
93  * 1 1 32kHz
94  */
95 static const char * const ak4458_dem_select_texts[] = {
96 	"44.1kHz", "OFF", "48kHz", "32kHz"
97 };
98 
99 /*
100  * SSLOW, SD, SLOW bits Digital Filter Setting
101  * 0, 0, 0 : Sharp Roll-Off Filter
102  * 0, 0, 1 : Slow Roll-Off Filter
103  * 0, 1, 0 : Short delay Sharp Roll-Off Filter
104  * 0, 1, 1 : Short delay Slow Roll-Off Filter
105  * 1, *, * : Super Slow Roll-Off Filter
106  */
107 static const char * const ak4458_digfil_select_texts[] = {
108 	"Sharp Roll-Off Filter",
109 	"Slow Roll-Off Filter",
110 	"Short delay Sharp Roll-Off Filter",
111 	"Short delay Slow Roll-Off Filter",
112 	"Super Slow Roll-Off Filter"
113 };
114 
115 /*
116  * DZFB: Inverting Enable of DZF
117  * 0: DZF goes H at Zero Detection
118  * 1: DZF goes L at Zero Detection
119  */
120 static const char * const ak4458_dzfb_select_texts[] = {"H", "L"};
121 
122 /*
123  * SC1-0 bits: Sound Mode Setting
124  * 0 0 : Sound Mode 0
125  * 0 1 : Sound Mode 1
126  * 1 0 : Sound Mode 2
127  * 1 1 : Reserved
128  */
129 static const char * const ak4458_sc_select_texts[] = {
130 	"Sound Mode 0", "Sound Mode 1", "Sound Mode 2"
131 };
132 
133 /* FIR2-0 bits: FIR Filter Mode Setting */
134 static const char * const ak4458_fir_select_texts[] = {
135 	"Mode 0", "Mode 1", "Mode 2", "Mode 3",
136 	"Mode 4", "Mode 5", "Mode 6", "Mode 7",
137 };
138 
139 /* ATS1-0 bits Attenuation Speed */
140 static const char * const ak4458_ats_select_texts[] = {
141 	"4080/fs", "2040/fs", "510/fs", "255/fs",
142 };
143 
144 /* DIF2 bit Audio Interface Format Setting(BICK fs) */
145 static const char * const ak4458_dif_select_texts[] = {"32fs,48fs", "64fs",};
146 
147 static const struct soc_enum ak4458_dac1_dem_enum =
148 	SOC_ENUM_SINGLE(AK4458_01_CONTROL2, 1,
149 			ARRAY_SIZE(ak4458_dem_select_texts),
150 			ak4458_dem_select_texts);
151 static const struct soc_enum ak4458_dac2_dem_enum =
152 	SOC_ENUM_SINGLE(AK4458_0A_CONTROL6, 0,
153 			ARRAY_SIZE(ak4458_dem_select_texts),
154 			ak4458_dem_select_texts);
155 static const struct soc_enum ak4458_dac3_dem_enum =
156 	SOC_ENUM_SINGLE(AK4458_0E_CONTROL10, 4,
157 			ARRAY_SIZE(ak4458_dem_select_texts),
158 			ak4458_dem_select_texts);
159 static const struct soc_enum ak4458_dac4_dem_enum =
160 	SOC_ENUM_SINGLE(AK4458_0E_CONTROL10, 6,
161 			ARRAY_SIZE(ak4458_dem_select_texts),
162 			ak4458_dem_select_texts);
163 static const struct soc_enum ak4458_digfil_enum =
164 	SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(ak4458_digfil_select_texts),
165 			    ak4458_digfil_select_texts);
166 static const struct soc_enum ak4458_dzfb_enum =
167 	SOC_ENUM_SINGLE(AK4458_02_CONTROL3, 2,
168 			ARRAY_SIZE(ak4458_dzfb_select_texts),
169 			ak4458_dzfb_select_texts);
170 static const struct soc_enum ak4458_sm_enum =
171 	SOC_ENUM_SINGLE(AK4458_08_SOUND_CONTROL, 0,
172 			ARRAY_SIZE(ak4458_sc_select_texts),
173 			ak4458_sc_select_texts);
174 static const struct soc_enum ak4458_fir_enum =
175 	SOC_ENUM_SINGLE(AK4458_0C_CONTROL8, 0,
176 			ARRAY_SIZE(ak4458_fir_select_texts),
177 			ak4458_fir_select_texts);
178 static const struct soc_enum ak4458_ats_enum =
179 	SOC_ENUM_SINGLE(AK4458_0B_CONTROL7, 6,
180 			ARRAY_SIZE(ak4458_ats_select_texts),
181 			ak4458_ats_select_texts);
182 static const struct soc_enum ak4458_dif_enum =
183 	SOC_ENUM_SINGLE(AK4458_00_CONTROL1, 3,
184 			ARRAY_SIZE(ak4458_dif_select_texts),
185 			ak4458_dif_select_texts);
186 
187 static int get_digfil(struct snd_kcontrol *kcontrol,
188 		      struct snd_ctl_elem_value *ucontrol)
189 {
190 	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
191 	struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
192 
193 	ucontrol->value.enumerated.item[0] = ak4458->digfil;
194 
195 	return 0;
196 }
197 
198 static int set_digfil(struct snd_kcontrol *kcontrol,
199 		      struct snd_ctl_elem_value *ucontrol)
200 {
201 	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
202 	struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
203 	int num;
204 
205 	num = ucontrol->value.enumerated.item[0];
206 	if (num > 4)
207 		return -EINVAL;
208 
209 	ak4458->digfil = num;
210 
211 	/* write SD bit */
212 	snd_soc_component_update_bits(component, AK4458_01_CONTROL2,
213 			    AK4458_SD_MASK,
214 			    ((ak4458->digfil & 0x02) << 4));
215 
216 	/* write SLOW bit */
217 	snd_soc_component_update_bits(component, AK4458_02_CONTROL3,
218 			    AK4458_SLOW_MASK,
219 			    (ak4458->digfil & 0x01));
220 
221 	/* write SSLOW bit */
222 	snd_soc_component_update_bits(component, AK4458_05_CONTROL4,
223 			    AK4458_SSLOW_MASK,
224 			    ((ak4458->digfil & 0x04) >> 2));
225 
226 	return 0;
227 }
228 
229 static const struct snd_kcontrol_new ak4458_snd_controls[] = {
230 	SOC_DOUBLE_R_TLV("DAC1 Playback Volume", AK4458_03_LCHATT,
231 			 AK4458_04_RCHATT, 0, 0xFF, 0, dac_tlv),
232 	SOC_DOUBLE_R_TLV("DAC2 Playback Volume", AK4458_0F_L2CHATT,
233 			 AK4458_10_R2CHATT, 0, 0xFF, 0, dac_tlv),
234 	SOC_DOUBLE_R_TLV("DAC3 Playback Volume", AK4458_11_L3CHATT,
235 			 AK4458_12_R3CHATT, 0, 0xFF, 0, dac_tlv),
236 	SOC_DOUBLE_R_TLV("DAC4 Playback Volume", AK4458_13_L4CHATT,
237 			 AK4458_14_R4CHATT, 0, 0xFF, 0, dac_tlv),
238 	SOC_ENUM("AK4458 De-emphasis Response DAC1", ak4458_dac1_dem_enum),
239 	SOC_ENUM("AK4458 De-emphasis Response DAC2", ak4458_dac2_dem_enum),
240 	SOC_ENUM("AK4458 De-emphasis Response DAC3", ak4458_dac3_dem_enum),
241 	SOC_ENUM("AK4458 De-emphasis Response DAC4", ak4458_dac4_dem_enum),
242 	SOC_ENUM_EXT("AK4458 Digital Filter Setting", ak4458_digfil_enum,
243 		     get_digfil, set_digfil),
244 	SOC_ENUM("AK4458 Inverting Enable of DZFB", ak4458_dzfb_enum),
245 	SOC_ENUM("AK4458 Sound Mode", ak4458_sm_enum),
246 	SOC_ENUM("AK4458 FIR Filter Mode Setting", ak4458_fir_enum),
247 	SOC_ENUM("AK4458 Attenuation transition Time Setting",
248 		 ak4458_ats_enum),
249 	SOC_ENUM("AK4458 BICK fs Setting", ak4458_dif_enum),
250 };
251 
252 /* ak4458 dapm widgets */
253 static const struct snd_soc_dapm_widget ak4458_dapm_widgets[] = {
254 	SND_SOC_DAPM_DAC("AK4458 DAC1", NULL, AK4458_0A_CONTROL6, 2, 0),/*pw*/
255 	SND_SOC_DAPM_AIF_IN("AK4458 SDTI", "Playback", 0, SND_SOC_NOPM, 0, 0),
256 	SND_SOC_DAPM_OUTPUT("AK4458 AOUTA"),
257 
258 	SND_SOC_DAPM_DAC("AK4458 DAC2", NULL, AK4458_0A_CONTROL6, 3, 0),/*pw*/
259 	SND_SOC_DAPM_OUTPUT("AK4458 AOUTB"),
260 
261 	SND_SOC_DAPM_DAC("AK4458 DAC3", NULL, AK4458_0B_CONTROL7, 2, 0),/*pw*/
262 	SND_SOC_DAPM_OUTPUT("AK4458 AOUTC"),
263 
264 	SND_SOC_DAPM_DAC("AK4458 DAC4", NULL, AK4458_0B_CONTROL7, 3, 0),/*pw*/
265 	SND_SOC_DAPM_OUTPUT("AK4458 AOUTD"),
266 };
267 
268 static const struct snd_soc_dapm_route ak4458_intercon[] = {
269 	{"AK4458 DAC1",		NULL,	"AK4458 SDTI"},
270 	{"AK4458 AOUTA",	NULL,	"AK4458 DAC1"},
271 
272 	{"AK4458 DAC2",		NULL,	"AK4458 SDTI"},
273 	{"AK4458 AOUTB",	NULL,	"AK4458 DAC2"},
274 
275 	{"AK4458 DAC3",		NULL,	"AK4458 SDTI"},
276 	{"AK4458 AOUTC",	NULL,	"AK4458 DAC3"},
277 
278 	{"AK4458 DAC4",		NULL,	"AK4458 SDTI"},
279 	{"AK4458 AOUTD",	NULL,	"AK4458 DAC4"},
280 };
281 
282 /* ak4497 controls */
283 static const struct snd_kcontrol_new ak4497_snd_controls[] = {
284 	SOC_DOUBLE_R_TLV("DAC Playback Volume", AK4458_03_LCHATT,
285 			 AK4458_04_RCHATT, 0, 0xFF, 0, dac_tlv),
286 	SOC_ENUM("AK4497 De-emphasis Response DAC", ak4458_dac1_dem_enum),
287 	SOC_ENUM_EXT("AK4497 Digital Filter Setting", ak4458_digfil_enum,
288 		     get_digfil, set_digfil),
289 	SOC_ENUM("AK4497 Inverting Enable of DZFB", ak4458_dzfb_enum),
290 	SOC_ENUM("AK4497 Sound Mode", ak4458_sm_enum),
291 	SOC_ENUM("AK4497 Attenuation transition Time Setting",
292 		 ak4458_ats_enum),
293 };
294 
295 /* ak4497 dapm widgets */
296 static const struct snd_soc_dapm_widget ak4497_dapm_widgets[] = {
297 	SND_SOC_DAPM_DAC("AK4497 DAC", NULL, AK4458_0A_CONTROL6, 2, 0),
298 	SND_SOC_DAPM_AIF_IN("AK4497 SDTI", "Playback", 0, SND_SOC_NOPM, 0, 0),
299 	SND_SOC_DAPM_OUTPUT("AK4497 AOUT"),
300 };
301 
302 /* ak4497 dapm routes */
303 static const struct snd_soc_dapm_route ak4497_intercon[] = {
304 	{"AK4497 DAC",		NULL,	"AK4497 SDTI"},
305 	{"AK4497 AOUT",		NULL,	"AK4497 DAC"},
306 
307 };
308 
309 static int ak4458_rstn_control(struct snd_soc_component *component, int bit)
310 {
311 	int ret;
312 
313 	if (bit)
314 		ret = snd_soc_component_update_bits(component,
315 					  AK4458_00_CONTROL1,
316 					  AK4458_RSTN_MASK,
317 					  0x1);
318 	else
319 		ret = snd_soc_component_update_bits(component,
320 					  AK4458_00_CONTROL1,
321 					  AK4458_RSTN_MASK,
322 					  0x0);
323 	if (ret < 0)
324 		return ret;
325 
326 	return 0;
327 }
328 
329 static int ak4458_hw_params(struct snd_pcm_substream *substream,
330 			    struct snd_pcm_hw_params *params,
331 			    struct snd_soc_dai *dai)
332 {
333 	struct snd_soc_component *component = dai->component;
334 	struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
335 	int pcm_width = max(params_physical_width(params), ak4458->slot_width);
336 	u8 format, dsdsel0, dsdsel1;
337 	int nfs1, dsd_bclk;
338 
339 	nfs1 = params_rate(params);
340 	ak4458->fs = nfs1;
341 
342 	/* calculate bit clock */
343 	switch (params_format(params)) {
344 	case SNDRV_PCM_FORMAT_DSD_U8:
345 	case SNDRV_PCM_FORMAT_DSD_U16_LE:
346 	case SNDRV_PCM_FORMAT_DSD_U16_BE:
347 	case SNDRV_PCM_FORMAT_DSD_U32_LE:
348 	case SNDRV_PCM_FORMAT_DSD_U32_BE:
349 		dsd_bclk = nfs1 * params_physical_width(params);
350 		switch (dsd_bclk) {
351 		case 2822400:
352 			dsdsel0 = 0;
353 			dsdsel1 = 0;
354 			break;
355 		case 5644800:
356 			dsdsel0 = 1;
357 			dsdsel1 = 0;
358 			break;
359 		case 11289600:
360 			dsdsel0 = 0;
361 			dsdsel1 = 1;
362 			break;
363 		case 22579200:
364 			if (ak4458->drvdata->type == AK4497) {
365 				dsdsel0 = 1;
366 				dsdsel1 = 1;
367 			} else {
368 				dev_err(dai->dev, "DSD512 not supported.\n");
369 				return -EINVAL;
370 			}
371 			break;
372 		default:
373 			dev_err(dai->dev, "Unsupported dsd bclk.\n");
374 			return -EINVAL;
375 		}
376 
377 		snd_soc_component_update_bits(component, AK4458_06_DSD1,
378 					      AK4458_DSDSEL_MASK, dsdsel0);
379 		snd_soc_component_update_bits(component, AK4458_09_DSD2,
380 					      AK4458_DSDSEL_MASK, dsdsel1);
381 		break;
382 	}
383 
384 	/* Master Clock Frequency Auto Setting Mode Enable */
385 	snd_soc_component_update_bits(component, AK4458_00_CONTROL1, 0x80, 0x80);
386 
387 	switch (pcm_width) {
388 	case 16:
389 		if (ak4458->fmt == SND_SOC_DAIFMT_I2S)
390 			format = AK4458_DIF_24BIT_I2S;
391 		else
392 			format = AK4458_DIF_16BIT_LSB;
393 		break;
394 	case 32:
395 		switch (ak4458->fmt) {
396 		case SND_SOC_DAIFMT_I2S:
397 			format = AK4458_DIF_32BIT_I2S;
398 			break;
399 		case SND_SOC_DAIFMT_LEFT_J:
400 			format = AK4458_DIF_32BIT_MSB;
401 			break;
402 		case SND_SOC_DAIFMT_RIGHT_J:
403 			format = AK4458_DIF_32BIT_LSB;
404 			break;
405 		case SND_SOC_DAIFMT_DSP_B:
406 			format = AK4458_DIF_32BIT_MSB;
407 			break;
408 		case SND_SOC_DAIFMT_PDM:
409 			format = AK4458_DIF_32BIT_MSB;
410 			break;
411 		default:
412 			return -EINVAL;
413 		}
414 		break;
415 	default:
416 		return -EINVAL;
417 	}
418 
419 	snd_soc_component_update_bits(component, AK4458_00_CONTROL1,
420 			    AK4458_DIF_MASK, format);
421 
422 	ak4458_rstn_control(component, 0);
423 	ak4458_rstn_control(component, 1);
424 
425 	return 0;
426 }
427 
428 static int ak4458_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
429 {
430 	struct snd_soc_component *component = dai->component;
431 	struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
432 
433 	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
434 	case SND_SOC_DAIFMT_CBS_CFS: /* Slave Mode */
435 		break;
436 	case SND_SOC_DAIFMT_CBM_CFM: /* Master Mode is not supported */
437 	case SND_SOC_DAIFMT_CBS_CFM:
438 	case SND_SOC_DAIFMT_CBM_CFS:
439 	default:
440 		dev_err(component->dev, "Master mode unsupported\n");
441 		return -EINVAL;
442 	}
443 
444 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
445 	case SND_SOC_DAIFMT_I2S:
446 	case SND_SOC_DAIFMT_LEFT_J:
447 	case SND_SOC_DAIFMT_RIGHT_J:
448 	case SND_SOC_DAIFMT_DSP_B:
449 	case SND_SOC_DAIFMT_PDM:
450 		ak4458->fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
451 		break;
452 	default:
453 		dev_err(component->dev, "Audio format 0x%02X unsupported\n",
454 			fmt & SND_SOC_DAIFMT_FORMAT_MASK);
455 		return -EINVAL;
456 	}
457 
458 	/* DSD mode */
459 	snd_soc_component_update_bits(component, AK4458_02_CONTROL3,
460 				      AK4458_DP_MASK,
461 				      ak4458->fmt == SND_SOC_DAIFMT_PDM ?
462 				      AK4458_DP_MASK : 0);
463 
464 	ak4458_rstn_control(component, 0);
465 	ak4458_rstn_control(component, 1);
466 
467 	return 0;
468 }
469 
470 static const int att_speed[] = { 4080, 2040, 510, 255 };
471 
472 static int ak4458_set_dai_mute(struct snd_soc_dai *dai, int mute, int direction)
473 {
474 	struct snd_soc_component *component = dai->component;
475 	struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
476 	int nfs, ndt, reg;
477 	int ats;
478 
479 	nfs = ak4458->fs;
480 
481 	reg = snd_soc_component_read(component, AK4458_0B_CONTROL7);
482 	ats = (reg & AK4458_ATS_MASK) >> AK4458_ATS_SHIFT;
483 
484 	ndt = att_speed[ats] / (nfs / 1000);
485 
486 	if (mute) {
487 		snd_soc_component_update_bits(component, AK4458_01_CONTROL2,  0x01, 1);
488 		mdelay(ndt);
489 		if (ak4458->mute_gpiod)
490 			gpiod_set_value_cansleep(ak4458->mute_gpiod, 1);
491 	} else {
492 		if (ak4458->mute_gpiod)
493 			gpiod_set_value_cansleep(ak4458->mute_gpiod, 0);
494 		snd_soc_component_update_bits(component, AK4458_01_CONTROL2, 0x01, 0);
495 		mdelay(ndt);
496 	}
497 
498 	return 0;
499 }
500 
501 static int ak4458_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
502 			       unsigned int rx_mask, int slots, int slot_width)
503 {
504 	struct snd_soc_component *component = dai->component;
505 	struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
506 	int mode;
507 
508 	ak4458->slots = slots;
509 	ak4458->slot_width = slot_width;
510 
511 	switch (slots * slot_width) {
512 	case 128:
513 		mode = AK4458_MODE_TDM128;
514 		break;
515 	case 256:
516 		mode = AK4458_MODE_TDM256;
517 		break;
518 	case 512:
519 		mode = AK4458_MODE_TDM512;
520 		break;
521 	default:
522 		mode = AK4458_MODE_NORMAL;
523 		break;
524 	}
525 
526 	snd_soc_component_update_bits(component, AK4458_0A_CONTROL6,
527 			    AK4458_MODE_MASK,
528 			    mode);
529 
530 	return 0;
531 }
532 
533 #define AK4458_FORMATS	(SNDRV_PCM_FMTBIT_S16_LE |\
534 			 SNDRV_PCM_FMTBIT_S24_LE |\
535 			 SNDRV_PCM_FMTBIT_S32_LE |\
536 			 SNDRV_PCM_FMTBIT_DSD_U8 |\
537 			 SNDRV_PCM_FMTBIT_DSD_U16_LE |\
538 			 SNDRV_PCM_FMTBIT_DSD_U32_LE)
539 
540 static const unsigned int ak4458_rates[] = {
541 	8000, 11025,  16000, 22050,
542 	32000, 44100, 48000, 88200,
543 	96000, 176400, 192000, 352800,
544 	384000, 705600, 768000, 1411200,
545 	2822400,
546 };
547 
548 static const struct snd_pcm_hw_constraint_list ak4458_rate_constraints = {
549 	.count = ARRAY_SIZE(ak4458_rates),
550 	.list = ak4458_rates,
551 };
552 
553 static int ak4458_startup(struct snd_pcm_substream *substream,
554 			  struct snd_soc_dai *dai)
555 {
556 	int ret;
557 
558 	ret = snd_pcm_hw_constraint_list(substream->runtime, 0,
559 					 SNDRV_PCM_HW_PARAM_RATE,
560 					 &ak4458_rate_constraints);
561 
562 	return ret;
563 }
564 
565 static const struct snd_soc_dai_ops ak4458_dai_ops = {
566 	.startup        = ak4458_startup,
567 	.hw_params	= ak4458_hw_params,
568 	.set_fmt	= ak4458_set_dai_fmt,
569 	.mute_stream	= ak4458_set_dai_mute,
570 	.set_tdm_slot	= ak4458_set_tdm_slot,
571 	.no_capture_mute = 1,
572 };
573 
574 static struct snd_soc_dai_driver ak4458_dai = {
575 	.name = "ak4458-aif",
576 	.playback = {
577 		.stream_name = "Playback",
578 		.channels_min = 1,
579 		.channels_max = 8,
580 		.rates = SNDRV_PCM_RATE_KNOT,
581 		.formats = AK4458_FORMATS,
582 	},
583 	.ops = &ak4458_dai_ops,
584 };
585 
586 static struct snd_soc_dai_driver ak4497_dai = {
587 	.name = "ak4497-aif",
588 	.playback = {
589 		.stream_name = "Playback",
590 		.channels_min = 1,
591 		.channels_max = 2,
592 		.rates = SNDRV_PCM_RATE_KNOT,
593 		.formats = AK4458_FORMATS,
594 	},
595 	.ops = &ak4458_dai_ops,
596 };
597 
598 static void ak4458_reset(struct ak4458_priv *ak4458, bool active)
599 {
600 	if (ak4458->reset_gpiod) {
601 		gpiod_set_value_cansleep(ak4458->reset_gpiod, active);
602 		usleep_range(1000, 2000);
603 	}
604 }
605 
606 static int ak4458_init(struct snd_soc_component *component)
607 {
608 	struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
609 	int ret;
610 
611 	/* External Mute ON */
612 	if (ak4458->mute_gpiod)
613 		gpiod_set_value_cansleep(ak4458->mute_gpiod, 1);
614 
615 	ak4458_reset(ak4458, false);
616 
617 	ret = snd_soc_component_update_bits(component, AK4458_00_CONTROL1,
618 			    0x80, 0x80);   /* ACKS bit = 1; 10000000 */
619 	if (ret < 0)
620 		return ret;
621 
622 	if (ak4458->drvdata->type == AK4497) {
623 		ret = snd_soc_component_update_bits(component, AK4458_09_DSD2,
624 						    0x4, (ak4458->dsd_path << 2));
625 		if (ret < 0)
626 			return ret;
627 	}
628 
629 	return ak4458_rstn_control(component, 1);
630 }
631 
632 static int ak4458_probe(struct snd_soc_component *component)
633 {
634 	struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
635 
636 	ak4458->fs = 48000;
637 
638 	return ak4458_init(component);
639 }
640 
641 static void ak4458_remove(struct snd_soc_component *component)
642 {
643 	struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
644 
645 	ak4458_reset(ak4458, true);
646 }
647 
648 #ifdef CONFIG_PM
649 static int __maybe_unused ak4458_runtime_suspend(struct device *dev)
650 {
651 	struct ak4458_priv *ak4458 = dev_get_drvdata(dev);
652 
653 	regcache_cache_only(ak4458->regmap, true);
654 
655 	ak4458_reset(ak4458, true);
656 
657 	if (ak4458->mute_gpiod)
658 		gpiod_set_value_cansleep(ak4458->mute_gpiod, 0);
659 
660 	regulator_bulk_disable(ARRAY_SIZE(ak4458->supplies),
661 			       ak4458->supplies);
662 	return 0;
663 }
664 
665 static int __maybe_unused ak4458_runtime_resume(struct device *dev)
666 {
667 	struct ak4458_priv *ak4458 = dev_get_drvdata(dev);
668 	int ret;
669 
670 	ret = regulator_bulk_enable(ARRAY_SIZE(ak4458->supplies),
671 				    ak4458->supplies);
672 	if (ret != 0) {
673 		dev_err(ak4458->dev, "Failed to enable supplies: %d\n", ret);
674 		return ret;
675 	}
676 
677 	if (ak4458->mute_gpiod)
678 		gpiod_set_value_cansleep(ak4458->mute_gpiod, 1);
679 
680 	ak4458_reset(ak4458, true);
681 	ak4458_reset(ak4458, false);
682 
683 	regcache_cache_only(ak4458->regmap, false);
684 	regcache_mark_dirty(ak4458->regmap);
685 
686 	return regcache_sync(ak4458->regmap);
687 }
688 #endif /* CONFIG_PM */
689 
690 static const struct snd_soc_component_driver soc_codec_dev_ak4458 = {
691 	.probe			= ak4458_probe,
692 	.remove			= ak4458_remove,
693 	.controls		= ak4458_snd_controls,
694 	.num_controls		= ARRAY_SIZE(ak4458_snd_controls),
695 	.dapm_widgets		= ak4458_dapm_widgets,
696 	.num_dapm_widgets	= ARRAY_SIZE(ak4458_dapm_widgets),
697 	.dapm_routes		= ak4458_intercon,
698 	.num_dapm_routes	= ARRAY_SIZE(ak4458_intercon),
699 	.idle_bias_on		= 1,
700 	.use_pmdown_time	= 1,
701 	.endianness		= 1,
702 	.non_legacy_dai_naming	= 1,
703 };
704 
705 static const struct snd_soc_component_driver soc_codec_dev_ak4497 = {
706 	.probe			= ak4458_probe,
707 	.remove			= ak4458_remove,
708 	.controls		= ak4497_snd_controls,
709 	.num_controls		= ARRAY_SIZE(ak4497_snd_controls),
710 	.dapm_widgets		= ak4497_dapm_widgets,
711 	.num_dapm_widgets	= ARRAY_SIZE(ak4497_dapm_widgets),
712 	.dapm_routes		= ak4497_intercon,
713 	.num_dapm_routes	= ARRAY_SIZE(ak4497_intercon),
714 	.idle_bias_on		= 1,
715 	.use_pmdown_time	= 1,
716 	.endianness		= 1,
717 	.non_legacy_dai_naming	= 1,
718 };
719 
720 static const struct regmap_config ak4458_regmap = {
721 	.reg_bits = 8,
722 	.val_bits = 8,
723 
724 	.max_register = AK4458_14_R4CHATT,
725 	.reg_defaults = ak4458_reg_defaults,
726 	.num_reg_defaults = ARRAY_SIZE(ak4458_reg_defaults),
727 	.cache_type = REGCACHE_RBTREE,
728 };
729 
730 static const struct ak4458_drvdata ak4458_drvdata = {
731 	.dai_drv = &ak4458_dai,
732 	.comp_drv = &soc_codec_dev_ak4458,
733 	.type = AK4458,
734 };
735 
736 static const struct ak4458_drvdata ak4497_drvdata = {
737 	.dai_drv = &ak4497_dai,
738 	.comp_drv = &soc_codec_dev_ak4497,
739 	.type = AK4497,
740 };
741 
742 static const struct dev_pm_ops ak4458_pm = {
743 	SET_RUNTIME_PM_OPS(ak4458_runtime_suspend, ak4458_runtime_resume, NULL)
744 	SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
745 				pm_runtime_force_resume)
746 };
747 
748 static int ak4458_i2c_probe(struct i2c_client *i2c)
749 {
750 	struct ak4458_priv *ak4458;
751 	int ret, i;
752 
753 	ak4458 = devm_kzalloc(&i2c->dev, sizeof(*ak4458), GFP_KERNEL);
754 	if (!ak4458)
755 		return -ENOMEM;
756 
757 	ak4458->regmap = devm_regmap_init_i2c(i2c, &ak4458_regmap);
758 	if (IS_ERR(ak4458->regmap))
759 		return PTR_ERR(ak4458->regmap);
760 
761 	i2c_set_clientdata(i2c, ak4458);
762 	ak4458->dev = &i2c->dev;
763 
764 	ak4458->drvdata = of_device_get_match_data(&i2c->dev);
765 
766 	ak4458->reset_gpiod = devm_gpiod_get_optional(ak4458->dev, "reset",
767 						      GPIOD_OUT_LOW);
768 	if (IS_ERR(ak4458->reset_gpiod))
769 		return PTR_ERR(ak4458->reset_gpiod);
770 
771 	ak4458->mute_gpiod = devm_gpiod_get_optional(ak4458->dev, "mute",
772 						     GPIOD_OUT_LOW);
773 	if (IS_ERR(ak4458->mute_gpiod))
774 		return PTR_ERR(ak4458->mute_gpiod);
775 
776 	/* Optional property for ak4497 */
777 	of_property_read_u32(i2c->dev.of_node, "dsd-path", &ak4458->dsd_path);
778 
779 	for (i = 0; i < ARRAY_SIZE(ak4458->supplies); i++)
780 		ak4458->supplies[i].supply = ak4458_supply_names[i];
781 
782 	ret = devm_regulator_bulk_get(ak4458->dev, ARRAY_SIZE(ak4458->supplies),
783 				      ak4458->supplies);
784 	if (ret != 0) {
785 		dev_err(ak4458->dev, "Failed to request supplies: %d\n", ret);
786 		return ret;
787 	}
788 
789 	ret = devm_snd_soc_register_component(ak4458->dev,
790 					      ak4458->drvdata->comp_drv,
791 					      ak4458->drvdata->dai_drv, 1);
792 	if (ret < 0) {
793 		dev_err(ak4458->dev, "Failed to register CODEC: %d\n", ret);
794 		return ret;
795 	}
796 
797 	pm_runtime_enable(&i2c->dev);
798 	regcache_cache_only(ak4458->regmap, true);
799 
800 	return 0;
801 }
802 
803 static int ak4458_i2c_remove(struct i2c_client *i2c)
804 {
805 	pm_runtime_disable(&i2c->dev);
806 
807 	return 0;
808 }
809 
810 static const struct of_device_id ak4458_of_match[] = {
811 	{ .compatible = "asahi-kasei,ak4458", .data = &ak4458_drvdata},
812 	{ .compatible = "asahi-kasei,ak4497", .data = &ak4497_drvdata},
813 	{ },
814 };
815 
816 static struct i2c_driver ak4458_i2c_driver = {
817 	.driver = {
818 		.name = "ak4458",
819 		.pm = &ak4458_pm,
820 		.of_match_table = ak4458_of_match,
821 		},
822 	.probe_new = ak4458_i2c_probe,
823 	.remove = ak4458_i2c_remove,
824 };
825 
826 module_i2c_driver(ak4458_i2c_driver);
827 
828 MODULE_AUTHOR("Junichi Wakasugi <wakasugi.jb@om.asahi-kasei.co.jp>");
829 MODULE_AUTHOR("Mihai Serban <mihai.serban@nxp.com>");
830 MODULE_DESCRIPTION("ASoC AK4458 DAC driver");
831 MODULE_LICENSE("GPL v2");
832