1 #ifndef __ADAU17X1_H__ 2 #define __ADAU17X1_H__ 3 4 #include <linux/regmap.h> 5 #include <linux/platform_data/adau17x1.h> 6 7 #include "sigmadsp.h" 8 9 enum adau17x1_type { 10 ADAU1361, 11 ADAU1761, 12 ADAU1381, 13 ADAU1781, 14 }; 15 16 enum adau17x1_pll { 17 ADAU17X1_PLL, 18 }; 19 20 enum adau17x1_pll_src { 21 ADAU17X1_PLL_SRC_MCLK, 22 }; 23 24 enum adau17x1_clk_src { 25 ADAU17X1_CLK_SRC_MCLK, 26 ADAU17X1_CLK_SRC_PLL, 27 }; 28 29 struct adau { 30 unsigned int sysclk; 31 unsigned int pll_freq; 32 33 enum adau17x1_clk_src clk_src; 34 enum adau17x1_type type; 35 void (*switch_mode)(struct device *dev); 36 37 unsigned int dai_fmt; 38 39 uint8_t pll_regs[6]; 40 41 bool master; 42 43 unsigned int tdm_slot[2]; 44 bool dsp_bypass[2]; 45 46 struct regmap *regmap; 47 struct sigmadsp *sigmadsp; 48 }; 49 50 int adau17x1_add_widgets(struct snd_soc_codec *codec); 51 int adau17x1_add_routes(struct snd_soc_codec *codec); 52 int adau17x1_probe(struct device *dev, struct regmap *regmap, 53 enum adau17x1_type type, void (*switch_mode)(struct device *dev), 54 const char *firmware_name); 55 int adau17x1_set_micbias_voltage(struct snd_soc_codec *codec, 56 enum adau17x1_micbias_voltage micbias); 57 bool adau17x1_readable_register(struct device *dev, unsigned int reg); 58 bool adau17x1_volatile_register(struct device *dev, unsigned int reg); 59 bool adau17x1_precious_register(struct device *dev, unsigned int reg); 60 int adau17x1_resume(struct snd_soc_codec *codec); 61 62 extern const struct snd_soc_dai_ops adau17x1_dai_ops; 63 64 int adau17x1_setup_firmware(struct adau *adau, unsigned int rate); 65 bool adau17x1_has_dsp(struct adau *adau); 66 67 #define ADAU17X1_CLOCK_CONTROL 0x4000 68 #define ADAU17X1_PLL_CONTROL 0x4002 69 #define ADAU17X1_REC_POWER_MGMT 0x4009 70 #define ADAU17X1_MICBIAS 0x4010 71 #define ADAU17X1_SERIAL_PORT0 0x4015 72 #define ADAU17X1_SERIAL_PORT1 0x4016 73 #define ADAU17X1_CONVERTER0 0x4017 74 #define ADAU17X1_CONVERTER1 0x4018 75 #define ADAU17X1_LEFT_INPUT_DIGITAL_VOL 0x401a 76 #define ADAU17X1_RIGHT_INPUT_DIGITAL_VOL 0x401b 77 #define ADAU17X1_ADC_CONTROL 0x4019 78 #define ADAU17X1_PLAY_POWER_MGMT 0x4029 79 #define ADAU17X1_DAC_CONTROL0 0x402a 80 #define ADAU17X1_DAC_CONTROL1 0x402b 81 #define ADAU17X1_DAC_CONTROL2 0x402c 82 #define ADAU17X1_SERIAL_PORT_PAD 0x402d 83 #define ADAU17X1_CONTROL_PORT_PAD0 0x402f 84 #define ADAU17X1_CONTROL_PORT_PAD1 0x4030 85 #define ADAU17X1_DSP_SAMPLING_RATE 0x40eb 86 #define ADAU17X1_SERIAL_INPUT_ROUTE 0x40f2 87 #define ADAU17X1_SERIAL_OUTPUT_ROUTE 0x40f3 88 #define ADAU17X1_DSP_ENABLE 0x40f5 89 #define ADAU17X1_DSP_RUN 0x40f6 90 #define ADAU17X1_SERIAL_SAMPLING_RATE 0x40f8 91 92 #define ADAU17X1_SERIAL_PORT0_BCLK_POL BIT(4) 93 #define ADAU17X1_SERIAL_PORT0_LRCLK_POL BIT(3) 94 #define ADAU17X1_SERIAL_PORT0_MASTER BIT(0) 95 96 #define ADAU17X1_SERIAL_PORT1_DELAY1 0x00 97 #define ADAU17X1_SERIAL_PORT1_DELAY0 0x01 98 #define ADAU17X1_SERIAL_PORT1_DELAY8 0x02 99 #define ADAU17X1_SERIAL_PORT1_DELAY16 0x03 100 #define ADAU17X1_SERIAL_PORT1_DELAY_MASK 0x03 101 102 #define ADAU17X1_CLOCK_CONTROL_INFREQ_MASK 0x6 103 #define ADAU17X1_CLOCK_CONTROL_CORECLK_SRC_PLL BIT(3) 104 #define ADAU17X1_CLOCK_CONTROL_SYSCLK_EN BIT(0) 105 106 #define ADAU17X1_SERIAL_PORT1_BCLK32 (0x0 << 5) 107 #define ADAU17X1_SERIAL_PORT1_BCLK48 (0x1 << 5) 108 #define ADAU17X1_SERIAL_PORT1_BCLK64 (0x2 << 5) 109 #define ADAU17X1_SERIAL_PORT1_BCLK128 (0x3 << 5) 110 #define ADAU17X1_SERIAL_PORT1_BCLK256 (0x4 << 5) 111 #define ADAU17X1_SERIAL_PORT1_BCLK_MASK (0x7 << 5) 112 113 #define ADAU17X1_SERIAL_PORT0_STEREO (0x0 << 1) 114 #define ADAU17X1_SERIAL_PORT0_TDM4 (0x1 << 1) 115 #define ADAU17X1_SERIAL_PORT0_TDM8 (0x2 << 1) 116 #define ADAU17X1_SERIAL_PORT0_TDM_MASK (0x3 << 1) 117 #define ADAU17X1_SERIAL_PORT0_PULSE_MODE BIT(5) 118 119 #define ADAU17X1_CONVERTER0_DAC_PAIR(x) (((x) - 1) << 5) 120 #define ADAU17X1_CONVERTER0_DAC_PAIR_MASK (0x3 << 5) 121 #define ADAU17X1_CONVERTER1_ADC_PAIR(x) ((x) - 1) 122 #define ADAU17X1_CONVERTER1_ADC_PAIR_MASK 0x3 123 124 #define ADAU17X1_CONVERTER0_CONVSR_MASK 0x7 125 126 127 #endif 128