xref: /openbmc/linux/sound/soc/codecs/adau17x1.h (revision 9a29f5fc)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __ADAU17X1_H__
3 #define __ADAU17X1_H__
4 
5 #include <linux/regmap.h>
6 #include <linux/platform_data/adau17x1.h>
7 
8 #include "sigmadsp.h"
9 
10 enum adau17x1_type {
11 	ADAU1361,
12 	ADAU1761,
13 	ADAU1761_AS_1361,
14 	ADAU1381,
15 	ADAU1781,
16 };
17 
18 enum adau17x1_pll {
19 	ADAU17X1_PLL,
20 };
21 
22 enum adau17x1_pll_src {
23 	ADAU17X1_PLL_SRC_MCLK,
24 };
25 
26 enum adau17x1_clk_src {
27 	/* Automatically configure PLL based on the sample rate */
28 	ADAU17X1_CLK_SRC_PLL_AUTO,
29 	ADAU17X1_CLK_SRC_MCLK,
30 	ADAU17X1_CLK_SRC_PLL,
31 };
32 
33 struct clk;
34 
35 struct adau {
36 	unsigned int sysclk;
37 	unsigned int pll_freq;
38 	struct clk *mclk;
39 
40 	enum adau17x1_clk_src clk_src;
41 	enum adau17x1_type type;
42 	void (*switch_mode)(struct device *dev);
43 
44 	unsigned int dai_fmt;
45 
46 	uint8_t pll_regs[6];
47 
48 	bool master;
49 
50 	unsigned int tdm_slot[2];
51 	bool dsp_bypass[2];
52 
53 	struct regmap *regmap;
54 	struct sigmadsp *sigmadsp;
55 };
56 
57 int adau17x1_add_widgets(struct snd_soc_component *component);
58 int adau17x1_add_routes(struct snd_soc_component *component);
59 int adau17x1_probe(struct device *dev, struct regmap *regmap,
60 	enum adau17x1_type type, void (*switch_mode)(struct device *dev),
61 	const char *firmware_name);
62 void adau17x1_remove(struct device *dev);
63 int adau17x1_set_micbias_voltage(struct snd_soc_component *component,
64 	enum adau17x1_micbias_voltage micbias);
65 bool adau17x1_readable_register(struct device *dev, unsigned int reg);
66 bool adau17x1_volatile_register(struct device *dev, unsigned int reg);
67 bool adau17x1_precious_register(struct device *dev, unsigned int reg);
68 int adau17x1_resume(struct snd_soc_component *component);
69 
70 extern const struct snd_soc_dai_ops adau17x1_dai_ops;
71 
72 #define ADAU17X1_CLOCK_CONTROL			0x4000
73 #define ADAU17X1_PLL_CONTROL			0x4002
74 #define ADAU17X1_REC_POWER_MGMT			0x4009
75 #define ADAU17X1_MICBIAS			0x4010
76 #define ADAU17X1_SERIAL_PORT0			0x4015
77 #define ADAU17X1_SERIAL_PORT1			0x4016
78 #define ADAU17X1_CONVERTER0			0x4017
79 #define ADAU17X1_CONVERTER1			0x4018
80 #define ADAU17X1_LEFT_INPUT_DIGITAL_VOL		0x401a
81 #define ADAU17X1_RIGHT_INPUT_DIGITAL_VOL	0x401b
82 #define ADAU17X1_ADC_CONTROL			0x4019
83 #define ADAU17X1_PLAY_POWER_MGMT		0x4029
84 #define ADAU17X1_DAC_CONTROL0			0x402a
85 #define ADAU17X1_DAC_CONTROL1			0x402b
86 #define ADAU17X1_DAC_CONTROL2			0x402c
87 #define ADAU17X1_SERIAL_PORT_PAD		0x402d
88 #define ADAU17X1_CONTROL_PORT_PAD0		0x402f
89 #define ADAU17X1_CONTROL_PORT_PAD1		0x4030
90 #define ADAU17X1_DSP_SAMPLING_RATE		0x40eb
91 #define ADAU17X1_SERIAL_INPUT_ROUTE		0x40f2
92 #define ADAU17X1_SERIAL_OUTPUT_ROUTE		0x40f3
93 #define ADAU17X1_DSP_ENABLE			0x40f5
94 #define ADAU17X1_DSP_RUN			0x40f6
95 #define ADAU17X1_SERIAL_SAMPLING_RATE		0x40f8
96 
97 #define ADAU17X1_SERIAL_PORT0_BCLK_POL		BIT(4)
98 #define ADAU17X1_SERIAL_PORT0_LRCLK_POL		BIT(3)
99 #define ADAU17X1_SERIAL_PORT0_MASTER		BIT(0)
100 
101 #define ADAU17X1_SERIAL_PORT1_DELAY1		0x00
102 #define ADAU17X1_SERIAL_PORT1_DELAY0		0x01
103 #define ADAU17X1_SERIAL_PORT1_DELAY8		0x02
104 #define ADAU17X1_SERIAL_PORT1_DELAY16		0x03
105 #define ADAU17X1_SERIAL_PORT1_DELAY_MASK	0x03
106 
107 #define ADAU17X1_CLOCK_CONTROL_INFREQ_MASK	0x6
108 #define ADAU17X1_CLOCK_CONTROL_CORECLK_SRC_PLL	BIT(3)
109 #define ADAU17X1_CLOCK_CONTROL_SYSCLK_EN	BIT(0)
110 
111 #define ADAU17X1_SERIAL_PORT1_BCLK64		(0x0 << 5)
112 #define ADAU17X1_SERIAL_PORT1_BCLK32		(0x1 << 5)
113 #define ADAU17X1_SERIAL_PORT1_BCLK48		(0x2 << 5)
114 #define ADAU17X1_SERIAL_PORT1_BCLK128		(0x3 << 5)
115 #define ADAU17X1_SERIAL_PORT1_BCLK256		(0x4 << 5)
116 #define ADAU17X1_SERIAL_PORT1_BCLK_MASK		(0x7 << 5)
117 
118 #define ADAU17X1_SERIAL_PORT0_STEREO		(0x0 << 1)
119 #define ADAU17X1_SERIAL_PORT0_TDM4		(0x1 << 1)
120 #define ADAU17X1_SERIAL_PORT0_TDM8		(0x2 << 1)
121 #define ADAU17X1_SERIAL_PORT0_TDM_MASK		(0x3 << 1)
122 #define ADAU17X1_SERIAL_PORT0_PULSE_MODE	BIT(5)
123 
124 #define ADAU17X1_CONVERTER0_DAC_PAIR(x)		(((x) - 1) << 5)
125 #define ADAU17X1_CONVERTER0_DAC_PAIR_MASK	(0x3 << 5)
126 #define ADAU17X1_CONVERTER1_ADC_PAIR(x)		((x) - 1)
127 #define ADAU17X1_CONVERTER1_ADC_PAIR_MASK	0x3
128 
129 #define ADAU17X1_CONVERTER0_CONVSR_MASK		0x7
130 
131 #define ADAU17X1_CONVERTER0_ADOSR		BIT(3)
132 
133 
134 #endif
135