1 /* 2 * Common code for ADAU1X61 and ADAU1X81 codecs 3 * 4 * Copyright 2011-2014 Analog Devices Inc. 5 * Author: Lars-Peter Clausen <lars@metafoo.de> 6 * 7 * Licensed under the GPL-2 or later. 8 */ 9 10 #include <linux/module.h> 11 #include <linux/init.h> 12 #include <linux/clk.h> 13 #include <linux/delay.h> 14 #include <linux/slab.h> 15 #include <sound/core.h> 16 #include <sound/pcm.h> 17 #include <sound/pcm_params.h> 18 #include <sound/soc.h> 19 #include <sound/tlv.h> 20 #include <linux/gcd.h> 21 #include <linux/i2c.h> 22 #include <linux/spi/spi.h> 23 #include <linux/regmap.h> 24 25 #include "sigmadsp.h" 26 #include "adau17x1.h" 27 #include "adau-utils.h" 28 29 static const char * const adau17x1_capture_mixer_boost_text[] = { 30 "Normal operation", "Boost Level 1", "Boost Level 2", "Boost Level 3", 31 }; 32 33 static SOC_ENUM_SINGLE_DECL(adau17x1_capture_boost_enum, 34 ADAU17X1_REC_POWER_MGMT, 5, adau17x1_capture_mixer_boost_text); 35 36 static const char * const adau17x1_mic_bias_mode_text[] = { 37 "Normal operation", "High performance", 38 }; 39 40 static SOC_ENUM_SINGLE_DECL(adau17x1_mic_bias_mode_enum, 41 ADAU17X1_MICBIAS, 3, adau17x1_mic_bias_mode_text); 42 43 static const DECLARE_TLV_DB_MINMAX(adau17x1_digital_tlv, -9563, 0); 44 45 static const struct snd_kcontrol_new adau17x1_controls[] = { 46 SOC_DOUBLE_R_TLV("Digital Capture Volume", 47 ADAU17X1_LEFT_INPUT_DIGITAL_VOL, 48 ADAU17X1_RIGHT_INPUT_DIGITAL_VOL, 49 0, 0xff, 1, adau17x1_digital_tlv), 50 SOC_DOUBLE_R_TLV("Digital Playback Volume", ADAU17X1_DAC_CONTROL1, 51 ADAU17X1_DAC_CONTROL2, 0, 0xff, 1, adau17x1_digital_tlv), 52 53 SOC_SINGLE("ADC High Pass Filter Switch", ADAU17X1_ADC_CONTROL, 54 5, 1, 0), 55 SOC_SINGLE("Playback De-emphasis Switch", ADAU17X1_DAC_CONTROL0, 56 2, 1, 0), 57 58 SOC_ENUM("Capture Boost", adau17x1_capture_boost_enum), 59 60 SOC_ENUM("Mic Bias Mode", adau17x1_mic_bias_mode_enum), 61 }; 62 63 static int adau17x1_pll_event(struct snd_soc_dapm_widget *w, 64 struct snd_kcontrol *kcontrol, int event) 65 { 66 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 67 struct adau *adau = snd_soc_codec_get_drvdata(codec); 68 69 if (SND_SOC_DAPM_EVENT_ON(event)) { 70 adau->pll_regs[5] = 1; 71 } else { 72 adau->pll_regs[5] = 0; 73 /* Bypass the PLL when disabled, otherwise registers will become 74 * inaccessible. */ 75 regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL, 76 ADAU17X1_CLOCK_CONTROL_CORECLK_SRC_PLL, 0); 77 } 78 79 /* The PLL register is 6 bytes long and can only be written at once. */ 80 regmap_raw_write(adau->regmap, ADAU17X1_PLL_CONTROL, 81 adau->pll_regs, ARRAY_SIZE(adau->pll_regs)); 82 83 if (SND_SOC_DAPM_EVENT_ON(event)) { 84 mdelay(5); 85 regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL, 86 ADAU17X1_CLOCK_CONTROL_CORECLK_SRC_PLL, 87 ADAU17X1_CLOCK_CONTROL_CORECLK_SRC_PLL); 88 } 89 90 return 0; 91 } 92 93 static const char * const adau17x1_mono_stereo_text[] = { 94 "Stereo", 95 "Mono Left Channel (L+R)", 96 "Mono Right Channel (L+R)", 97 "Mono (L+R)", 98 }; 99 100 static SOC_ENUM_SINGLE_DECL(adau17x1_dac_mode_enum, 101 ADAU17X1_DAC_CONTROL0, 6, adau17x1_mono_stereo_text); 102 103 static const struct snd_kcontrol_new adau17x1_dac_mode_mux = 104 SOC_DAPM_ENUM("DAC Mono-Stereo-Mode", adau17x1_dac_mode_enum); 105 106 static const struct snd_soc_dapm_widget adau17x1_dapm_widgets[] = { 107 SND_SOC_DAPM_SUPPLY_S("PLL", 3, SND_SOC_NOPM, 0, 0, adau17x1_pll_event, 108 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), 109 110 SND_SOC_DAPM_SUPPLY("AIFCLK", SND_SOC_NOPM, 0, 0, NULL, 0), 111 112 SND_SOC_DAPM_SUPPLY("MICBIAS", ADAU17X1_MICBIAS, 0, 0, NULL, 0), 113 114 SND_SOC_DAPM_SUPPLY("Left Playback Enable", ADAU17X1_PLAY_POWER_MGMT, 115 0, 0, NULL, 0), 116 SND_SOC_DAPM_SUPPLY("Right Playback Enable", ADAU17X1_PLAY_POWER_MGMT, 117 1, 0, NULL, 0), 118 119 SND_SOC_DAPM_MUX("Left DAC Mode Mux", SND_SOC_NOPM, 0, 0, 120 &adau17x1_dac_mode_mux), 121 SND_SOC_DAPM_MUX("Right DAC Mode Mux", SND_SOC_NOPM, 0, 0, 122 &adau17x1_dac_mode_mux), 123 124 SND_SOC_DAPM_ADC("Left Decimator", NULL, ADAU17X1_ADC_CONTROL, 0, 0), 125 SND_SOC_DAPM_ADC("Right Decimator", NULL, ADAU17X1_ADC_CONTROL, 1, 0), 126 SND_SOC_DAPM_DAC("Left DAC", NULL, ADAU17X1_DAC_CONTROL0, 0, 0), 127 SND_SOC_DAPM_DAC("Right DAC", NULL, ADAU17X1_DAC_CONTROL0, 1, 0), 128 }; 129 130 static const struct snd_soc_dapm_route adau17x1_dapm_routes[] = { 131 { "Left Decimator", NULL, "SYSCLK" }, 132 { "Right Decimator", NULL, "SYSCLK" }, 133 { "Left DAC", NULL, "SYSCLK" }, 134 { "Right DAC", NULL, "SYSCLK" }, 135 { "Capture", NULL, "SYSCLK" }, 136 { "Playback", NULL, "SYSCLK" }, 137 138 { "Left DAC", NULL, "Left DAC Mode Mux" }, 139 { "Right DAC", NULL, "Right DAC Mode Mux" }, 140 141 { "Capture", NULL, "AIFCLK" }, 142 { "Playback", NULL, "AIFCLK" }, 143 }; 144 145 static const struct snd_soc_dapm_route adau17x1_dapm_pll_route = { 146 "SYSCLK", NULL, "PLL", 147 }; 148 149 /* 150 * The MUX register for the Capture and Playback MUXs selects either DSP as 151 * source/destination or one of the TDM slots. The TDM slot is selected via 152 * snd_soc_dai_set_tdm_slot(), so we only expose whether to go to the DSP or 153 * directly to the DAI interface with this control. 154 */ 155 static int adau17x1_dsp_mux_enum_put(struct snd_kcontrol *kcontrol, 156 struct snd_ctl_elem_value *ucontrol) 157 { 158 struct snd_soc_codec *codec = snd_soc_dapm_kcontrol_codec(kcontrol); 159 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); 160 struct adau *adau = snd_soc_codec_get_drvdata(codec); 161 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; 162 struct snd_soc_dapm_update update = { 0 }; 163 unsigned int stream = e->shift_l; 164 unsigned int val, change; 165 int reg; 166 167 if (ucontrol->value.enumerated.item[0] >= e->items) 168 return -EINVAL; 169 170 switch (ucontrol->value.enumerated.item[0]) { 171 case 0: 172 val = 0; 173 adau->dsp_bypass[stream] = false; 174 break; 175 default: 176 val = (adau->tdm_slot[stream] * 2) + 1; 177 adau->dsp_bypass[stream] = true; 178 break; 179 } 180 181 if (stream == SNDRV_PCM_STREAM_PLAYBACK) 182 reg = ADAU17X1_SERIAL_INPUT_ROUTE; 183 else 184 reg = ADAU17X1_SERIAL_OUTPUT_ROUTE; 185 186 change = snd_soc_test_bits(codec, reg, 0xff, val); 187 if (change) { 188 update.kcontrol = kcontrol; 189 update.mask = 0xff; 190 update.reg = reg; 191 update.val = val; 192 193 snd_soc_dapm_mux_update_power(dapm, kcontrol, 194 ucontrol->value.enumerated.item[0], e, &update); 195 } 196 197 return change; 198 } 199 200 static int adau17x1_dsp_mux_enum_get(struct snd_kcontrol *kcontrol, 201 struct snd_ctl_elem_value *ucontrol) 202 { 203 struct snd_soc_codec *codec = snd_soc_dapm_kcontrol_codec(kcontrol); 204 struct adau *adau = snd_soc_codec_get_drvdata(codec); 205 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; 206 unsigned int stream = e->shift_l; 207 unsigned int reg, val; 208 int ret; 209 210 if (stream == SNDRV_PCM_STREAM_PLAYBACK) 211 reg = ADAU17X1_SERIAL_INPUT_ROUTE; 212 else 213 reg = ADAU17X1_SERIAL_OUTPUT_ROUTE; 214 215 ret = regmap_read(adau->regmap, reg, &val); 216 if (ret) 217 return ret; 218 219 if (val != 0) 220 val = 1; 221 ucontrol->value.enumerated.item[0] = val; 222 223 return 0; 224 } 225 226 #define DECLARE_ADAU17X1_DSP_MUX_CTRL(_name, _label, _stream, _text) \ 227 const struct snd_kcontrol_new _name = \ 228 SOC_DAPM_ENUM_EXT(_label, (const struct soc_enum)\ 229 SOC_ENUM_SINGLE(SND_SOC_NOPM, _stream, \ 230 ARRAY_SIZE(_text), _text), \ 231 adau17x1_dsp_mux_enum_get, adau17x1_dsp_mux_enum_put) 232 233 static const char * const adau17x1_dac_mux_text[] = { 234 "DSP", 235 "AIFIN", 236 }; 237 238 static const char * const adau17x1_capture_mux_text[] = { 239 "DSP", 240 "Decimator", 241 }; 242 243 static DECLARE_ADAU17X1_DSP_MUX_CTRL(adau17x1_dac_mux, "DAC Playback Mux", 244 SNDRV_PCM_STREAM_PLAYBACK, adau17x1_dac_mux_text); 245 246 static DECLARE_ADAU17X1_DSP_MUX_CTRL(adau17x1_capture_mux, "Capture Mux", 247 SNDRV_PCM_STREAM_CAPTURE, adau17x1_capture_mux_text); 248 249 static const struct snd_soc_dapm_widget adau17x1_dsp_dapm_widgets[] = { 250 SND_SOC_DAPM_PGA("DSP", ADAU17X1_DSP_RUN, 0, 0, NULL, 0), 251 SND_SOC_DAPM_SIGGEN("DSP Siggen"), 252 253 SND_SOC_DAPM_MUX("DAC Playback Mux", SND_SOC_NOPM, 0, 0, 254 &adau17x1_dac_mux), 255 SND_SOC_DAPM_MUX("Capture Mux", SND_SOC_NOPM, 0, 0, 256 &adau17x1_capture_mux), 257 }; 258 259 static const struct snd_soc_dapm_route adau17x1_dsp_dapm_routes[] = { 260 { "DAC Playback Mux", "DSP", "DSP" }, 261 { "DAC Playback Mux", "AIFIN", "Playback" }, 262 263 { "Left DAC Mode Mux", "Stereo", "DAC Playback Mux" }, 264 { "Left DAC Mode Mux", "Mono (L+R)", "DAC Playback Mux" }, 265 { "Left DAC Mode Mux", "Mono Left Channel (L+R)", "DAC Playback Mux" }, 266 { "Right DAC Mode Mux", "Stereo", "DAC Playback Mux" }, 267 { "Right DAC Mode Mux", "Mono (L+R)", "DAC Playback Mux" }, 268 { "Right DAC Mode Mux", "Mono Right Channel (L+R)", "DAC Playback Mux" }, 269 270 { "Capture Mux", "DSP", "DSP" }, 271 { "Capture Mux", "Decimator", "Left Decimator" }, 272 { "Capture Mux", "Decimator", "Right Decimator" }, 273 274 { "Capture", NULL, "Capture Mux" }, 275 276 { "DSP", NULL, "DSP Siggen" }, 277 278 { "DSP", NULL, "Left Decimator" }, 279 { "DSP", NULL, "Right Decimator" }, 280 }; 281 282 static const struct snd_soc_dapm_route adau17x1_no_dsp_dapm_routes[] = { 283 { "Left DAC Mode Mux", "Stereo", "Playback" }, 284 { "Left DAC Mode Mux", "Mono (L+R)", "Playback" }, 285 { "Left DAC Mode Mux", "Mono Left Channel (L+R)", "Playback" }, 286 { "Right DAC Mode Mux", "Stereo", "Playback" }, 287 { "Right DAC Mode Mux", "Mono (L+R)", "Playback" }, 288 { "Right DAC Mode Mux", "Mono Right Channel (L+R)", "Playback" }, 289 { "Capture", NULL, "Left Decimator" }, 290 { "Capture", NULL, "Right Decimator" }, 291 }; 292 293 bool adau17x1_has_dsp(struct adau *adau) 294 { 295 switch (adau->type) { 296 case ADAU1761: 297 case ADAU1381: 298 case ADAU1781: 299 return true; 300 default: 301 return false; 302 } 303 } 304 EXPORT_SYMBOL_GPL(adau17x1_has_dsp); 305 306 static int adau17x1_set_dai_pll(struct snd_soc_dai *dai, int pll_id, 307 int source, unsigned int freq_in, unsigned int freq_out) 308 { 309 struct snd_soc_codec *codec = dai->codec; 310 struct adau *adau = snd_soc_codec_get_drvdata(codec); 311 int ret; 312 313 if (freq_in < 8000000 || freq_in > 27000000) 314 return -EINVAL; 315 316 ret = adau_calc_pll_cfg(freq_in, freq_out, adau->pll_regs); 317 if (ret < 0) 318 return ret; 319 320 /* The PLL register is 6 bytes long and can only be written at once. */ 321 ret = regmap_raw_write(adau->regmap, ADAU17X1_PLL_CONTROL, 322 adau->pll_regs, ARRAY_SIZE(adau->pll_regs)); 323 if (ret) 324 return ret; 325 326 adau->pll_freq = freq_out; 327 328 return 0; 329 } 330 331 static int adau17x1_set_dai_sysclk(struct snd_soc_dai *dai, 332 int clk_id, unsigned int freq, int dir) 333 { 334 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(dai->codec); 335 struct adau *adau = snd_soc_codec_get_drvdata(dai->codec); 336 bool is_pll; 337 bool was_pll; 338 339 switch (clk_id) { 340 case ADAU17X1_CLK_SRC_MCLK: 341 is_pll = false; 342 break; 343 case ADAU17X1_CLK_SRC_PLL_AUTO: 344 if (!adau->mclk) 345 return -EINVAL; 346 /* Fall-through */ 347 case ADAU17X1_CLK_SRC_PLL: 348 is_pll = true; 349 break; 350 default: 351 return -EINVAL; 352 } 353 354 switch (adau->clk_src) { 355 case ADAU17X1_CLK_SRC_MCLK: 356 was_pll = false; 357 break; 358 case ADAU17X1_CLK_SRC_PLL: 359 case ADAU17X1_CLK_SRC_PLL_AUTO: 360 was_pll = true; 361 break; 362 default: 363 return -EINVAL; 364 } 365 366 adau->sysclk = freq; 367 368 if (is_pll != was_pll) { 369 if (is_pll) { 370 snd_soc_dapm_add_routes(dapm, 371 &adau17x1_dapm_pll_route, 1); 372 } else { 373 snd_soc_dapm_del_routes(dapm, 374 &adau17x1_dapm_pll_route, 1); 375 } 376 } 377 378 adau->clk_src = clk_id; 379 380 return 0; 381 } 382 383 static int adau17x1_auto_pll(struct snd_soc_dai *dai, 384 struct snd_pcm_hw_params *params) 385 { 386 struct adau *adau = snd_soc_dai_get_drvdata(dai); 387 unsigned int pll_rate; 388 389 switch (params_rate(params)) { 390 case 48000: 391 case 8000: 392 case 12000: 393 case 16000: 394 case 24000: 395 case 32000: 396 case 96000: 397 pll_rate = 48000 * 1024; 398 break; 399 case 44100: 400 case 7350: 401 case 11025: 402 case 14700: 403 case 22050: 404 case 29400: 405 case 88200: 406 pll_rate = 44100 * 1024; 407 break; 408 default: 409 return -EINVAL; 410 } 411 412 return adau17x1_set_dai_pll(dai, ADAU17X1_PLL, ADAU17X1_PLL_SRC_MCLK, 413 clk_get_rate(adau->mclk), pll_rate); 414 } 415 416 static int adau17x1_hw_params(struct snd_pcm_substream *substream, 417 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) 418 { 419 struct snd_soc_codec *codec = dai->codec; 420 struct adau *adau = snd_soc_codec_get_drvdata(codec); 421 unsigned int val, div, dsp_div; 422 unsigned int freq; 423 int ret; 424 425 switch (adau->clk_src) { 426 case ADAU17X1_CLK_SRC_PLL_AUTO: 427 ret = adau17x1_auto_pll(dai, params); 428 if (ret) 429 return ret; 430 /* Fall-through */ 431 case ADAU17X1_CLK_SRC_PLL: 432 freq = adau->pll_freq; 433 break; 434 default: 435 freq = adau->sysclk; 436 break; 437 } 438 439 if (freq % params_rate(params) != 0) 440 return -EINVAL; 441 442 switch (freq / params_rate(params)) { 443 case 1024: /* fs */ 444 div = 0; 445 dsp_div = 1; 446 break; 447 case 6144: /* fs / 6 */ 448 div = 1; 449 dsp_div = 6; 450 break; 451 case 4096: /* fs / 4 */ 452 div = 2; 453 dsp_div = 5; 454 break; 455 case 3072: /* fs / 3 */ 456 div = 3; 457 dsp_div = 4; 458 break; 459 case 2048: /* fs / 2 */ 460 div = 4; 461 dsp_div = 3; 462 break; 463 case 1536: /* fs / 1.5 */ 464 div = 5; 465 dsp_div = 2; 466 break; 467 case 512: /* fs / 0.5 */ 468 div = 6; 469 dsp_div = 0; 470 break; 471 default: 472 return -EINVAL; 473 } 474 475 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0, 476 ADAU17X1_CONVERTER0_CONVSR_MASK, div); 477 if (adau17x1_has_dsp(adau)) { 478 regmap_write(adau->regmap, ADAU17X1_SERIAL_SAMPLING_RATE, div); 479 regmap_write(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, dsp_div); 480 } 481 482 if (adau->sigmadsp) { 483 ret = adau17x1_setup_firmware(adau, params_rate(params)); 484 if (ret < 0) 485 return ret; 486 } 487 488 if (adau->dai_fmt != SND_SOC_DAIFMT_RIGHT_J) 489 return 0; 490 491 switch (params_width(params)) { 492 case 16: 493 val = ADAU17X1_SERIAL_PORT1_DELAY16; 494 break; 495 case 24: 496 val = ADAU17X1_SERIAL_PORT1_DELAY8; 497 break; 498 case 32: 499 val = ADAU17X1_SERIAL_PORT1_DELAY0; 500 break; 501 default: 502 return -EINVAL; 503 } 504 505 return regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT1, 506 ADAU17X1_SERIAL_PORT1_DELAY_MASK, val); 507 } 508 509 static int adau17x1_set_dai_fmt(struct snd_soc_dai *dai, 510 unsigned int fmt) 511 { 512 struct adau *adau = snd_soc_codec_get_drvdata(dai->codec); 513 unsigned int ctrl0, ctrl1; 514 int lrclk_pol; 515 516 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 517 case SND_SOC_DAIFMT_CBM_CFM: 518 ctrl0 = ADAU17X1_SERIAL_PORT0_MASTER; 519 adau->master = true; 520 break; 521 case SND_SOC_DAIFMT_CBS_CFS: 522 ctrl0 = 0; 523 adau->master = false; 524 break; 525 default: 526 return -EINVAL; 527 } 528 529 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 530 case SND_SOC_DAIFMT_I2S: 531 lrclk_pol = 0; 532 ctrl1 = ADAU17X1_SERIAL_PORT1_DELAY1; 533 break; 534 case SND_SOC_DAIFMT_LEFT_J: 535 case SND_SOC_DAIFMT_RIGHT_J: 536 lrclk_pol = 1; 537 ctrl1 = ADAU17X1_SERIAL_PORT1_DELAY0; 538 break; 539 case SND_SOC_DAIFMT_DSP_A: 540 lrclk_pol = 1; 541 ctrl0 |= ADAU17X1_SERIAL_PORT0_PULSE_MODE; 542 ctrl1 = ADAU17X1_SERIAL_PORT1_DELAY1; 543 break; 544 case SND_SOC_DAIFMT_DSP_B: 545 lrclk_pol = 1; 546 ctrl0 |= ADAU17X1_SERIAL_PORT0_PULSE_MODE; 547 ctrl1 = ADAU17X1_SERIAL_PORT1_DELAY0; 548 break; 549 default: 550 return -EINVAL; 551 } 552 553 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 554 case SND_SOC_DAIFMT_NB_NF: 555 break; 556 case SND_SOC_DAIFMT_IB_NF: 557 ctrl0 |= ADAU17X1_SERIAL_PORT0_BCLK_POL; 558 break; 559 case SND_SOC_DAIFMT_NB_IF: 560 lrclk_pol = !lrclk_pol; 561 break; 562 case SND_SOC_DAIFMT_IB_IF: 563 ctrl0 |= ADAU17X1_SERIAL_PORT0_BCLK_POL; 564 lrclk_pol = !lrclk_pol; 565 break; 566 default: 567 return -EINVAL; 568 } 569 570 if (lrclk_pol) 571 ctrl0 |= ADAU17X1_SERIAL_PORT0_LRCLK_POL; 572 573 regmap_write(adau->regmap, ADAU17X1_SERIAL_PORT0, ctrl0); 574 regmap_write(adau->regmap, ADAU17X1_SERIAL_PORT1, ctrl1); 575 576 adau->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK; 577 578 return 0; 579 } 580 581 static int adau17x1_set_dai_tdm_slot(struct snd_soc_dai *dai, 582 unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width) 583 { 584 struct adau *adau = snd_soc_codec_get_drvdata(dai->codec); 585 unsigned int ser_ctrl0, ser_ctrl1; 586 unsigned int conv_ctrl0, conv_ctrl1; 587 588 /* I2S mode */ 589 if (slots == 0) { 590 slots = 2; 591 rx_mask = 3; 592 tx_mask = 3; 593 slot_width = 32; 594 } 595 596 switch (slots) { 597 case 2: 598 ser_ctrl0 = ADAU17X1_SERIAL_PORT0_STEREO; 599 break; 600 case 4: 601 ser_ctrl0 = ADAU17X1_SERIAL_PORT0_TDM4; 602 break; 603 case 8: 604 if (adau->type == ADAU1361) 605 return -EINVAL; 606 607 ser_ctrl0 = ADAU17X1_SERIAL_PORT0_TDM8; 608 break; 609 default: 610 return -EINVAL; 611 } 612 613 switch (slot_width * slots) { 614 case 32: 615 if (adau->type == ADAU1761) 616 return -EINVAL; 617 618 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK32; 619 break; 620 case 64: 621 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK64; 622 break; 623 case 48: 624 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK48; 625 break; 626 case 128: 627 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK128; 628 break; 629 case 256: 630 if (adau->type == ADAU1361) 631 return -EINVAL; 632 633 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK256; 634 break; 635 default: 636 return -EINVAL; 637 } 638 639 switch (rx_mask) { 640 case 0x03: 641 conv_ctrl1 = ADAU17X1_CONVERTER1_ADC_PAIR(1); 642 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 0; 643 break; 644 case 0x0c: 645 conv_ctrl1 = ADAU17X1_CONVERTER1_ADC_PAIR(2); 646 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 1; 647 break; 648 case 0x30: 649 conv_ctrl1 = ADAU17X1_CONVERTER1_ADC_PAIR(3); 650 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 2; 651 break; 652 case 0xc0: 653 conv_ctrl1 = ADAU17X1_CONVERTER1_ADC_PAIR(4); 654 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 3; 655 break; 656 default: 657 return -EINVAL; 658 } 659 660 switch (tx_mask) { 661 case 0x03: 662 conv_ctrl0 = ADAU17X1_CONVERTER0_DAC_PAIR(1); 663 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 0; 664 break; 665 case 0x0c: 666 conv_ctrl0 = ADAU17X1_CONVERTER0_DAC_PAIR(2); 667 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 1; 668 break; 669 case 0x30: 670 conv_ctrl0 = ADAU17X1_CONVERTER0_DAC_PAIR(3); 671 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 2; 672 break; 673 case 0xc0: 674 conv_ctrl0 = ADAU17X1_CONVERTER0_DAC_PAIR(4); 675 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 3; 676 break; 677 default: 678 return -EINVAL; 679 } 680 681 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0, 682 ADAU17X1_CONVERTER0_DAC_PAIR_MASK, conv_ctrl0); 683 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER1, 684 ADAU17X1_CONVERTER1_ADC_PAIR_MASK, conv_ctrl1); 685 regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT0, 686 ADAU17X1_SERIAL_PORT0_TDM_MASK, ser_ctrl0); 687 regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT1, 688 ADAU17X1_SERIAL_PORT1_BCLK_MASK, ser_ctrl1); 689 690 if (!adau17x1_has_dsp(adau)) 691 return 0; 692 693 if (adau->dsp_bypass[SNDRV_PCM_STREAM_PLAYBACK]) { 694 regmap_write(adau->regmap, ADAU17X1_SERIAL_INPUT_ROUTE, 695 (adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] * 2) + 1); 696 } 697 698 if (adau->dsp_bypass[SNDRV_PCM_STREAM_CAPTURE]) { 699 regmap_write(adau->regmap, ADAU17X1_SERIAL_OUTPUT_ROUTE, 700 (adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] * 2) + 1); 701 } 702 703 return 0; 704 } 705 706 static int adau17x1_startup(struct snd_pcm_substream *substream, 707 struct snd_soc_dai *dai) 708 { 709 struct adau *adau = snd_soc_codec_get_drvdata(dai->codec); 710 711 if (adau->sigmadsp) 712 return sigmadsp_restrict_params(adau->sigmadsp, substream); 713 714 return 0; 715 } 716 717 const struct snd_soc_dai_ops adau17x1_dai_ops = { 718 .hw_params = adau17x1_hw_params, 719 .set_sysclk = adau17x1_set_dai_sysclk, 720 .set_fmt = adau17x1_set_dai_fmt, 721 .set_pll = adau17x1_set_dai_pll, 722 .set_tdm_slot = adau17x1_set_dai_tdm_slot, 723 .startup = adau17x1_startup, 724 }; 725 EXPORT_SYMBOL_GPL(adau17x1_dai_ops); 726 727 int adau17x1_set_micbias_voltage(struct snd_soc_codec *codec, 728 enum adau17x1_micbias_voltage micbias) 729 { 730 struct adau *adau = snd_soc_codec_get_drvdata(codec); 731 732 switch (micbias) { 733 case ADAU17X1_MICBIAS_0_90_AVDD: 734 case ADAU17X1_MICBIAS_0_65_AVDD: 735 break; 736 default: 737 return -EINVAL; 738 } 739 740 return regmap_write(adau->regmap, ADAU17X1_MICBIAS, micbias << 2); 741 } 742 EXPORT_SYMBOL_GPL(adau17x1_set_micbias_voltage); 743 744 bool adau17x1_precious_register(struct device *dev, unsigned int reg) 745 { 746 /* SigmaDSP parameter memory */ 747 if (reg < 0x400) 748 return true; 749 750 return false; 751 } 752 EXPORT_SYMBOL_GPL(adau17x1_precious_register); 753 754 bool adau17x1_readable_register(struct device *dev, unsigned int reg) 755 { 756 /* SigmaDSP parameter memory */ 757 if (reg < 0x400) 758 return true; 759 760 switch (reg) { 761 case ADAU17X1_CLOCK_CONTROL: 762 case ADAU17X1_PLL_CONTROL: 763 case ADAU17X1_REC_POWER_MGMT: 764 case ADAU17X1_MICBIAS: 765 case ADAU17X1_SERIAL_PORT0: 766 case ADAU17X1_SERIAL_PORT1: 767 case ADAU17X1_CONVERTER0: 768 case ADAU17X1_CONVERTER1: 769 case ADAU17X1_LEFT_INPUT_DIGITAL_VOL: 770 case ADAU17X1_RIGHT_INPUT_DIGITAL_VOL: 771 case ADAU17X1_ADC_CONTROL: 772 case ADAU17X1_PLAY_POWER_MGMT: 773 case ADAU17X1_DAC_CONTROL0: 774 case ADAU17X1_DAC_CONTROL1: 775 case ADAU17X1_DAC_CONTROL2: 776 case ADAU17X1_SERIAL_PORT_PAD: 777 case ADAU17X1_CONTROL_PORT_PAD0: 778 case ADAU17X1_CONTROL_PORT_PAD1: 779 case ADAU17X1_DSP_SAMPLING_RATE: 780 case ADAU17X1_SERIAL_INPUT_ROUTE: 781 case ADAU17X1_SERIAL_OUTPUT_ROUTE: 782 case ADAU17X1_DSP_ENABLE: 783 case ADAU17X1_DSP_RUN: 784 case ADAU17X1_SERIAL_SAMPLING_RATE: 785 return true; 786 default: 787 break; 788 } 789 return false; 790 } 791 EXPORT_SYMBOL_GPL(adau17x1_readable_register); 792 793 bool adau17x1_volatile_register(struct device *dev, unsigned int reg) 794 { 795 /* SigmaDSP parameter and program memory */ 796 if (reg < 0x4000) 797 return true; 798 799 switch (reg) { 800 /* The PLL register is 6 bytes long */ 801 case ADAU17X1_PLL_CONTROL: 802 case ADAU17X1_PLL_CONTROL + 1: 803 case ADAU17X1_PLL_CONTROL + 2: 804 case ADAU17X1_PLL_CONTROL + 3: 805 case ADAU17X1_PLL_CONTROL + 4: 806 case ADAU17X1_PLL_CONTROL + 5: 807 return true; 808 default: 809 break; 810 } 811 812 return false; 813 } 814 EXPORT_SYMBOL_GPL(adau17x1_volatile_register); 815 816 int adau17x1_setup_firmware(struct adau *adau, unsigned int rate) 817 { 818 int ret; 819 int dspsr; 820 821 ret = regmap_read(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, &dspsr); 822 if (ret) 823 return ret; 824 825 regmap_write(adau->regmap, ADAU17X1_DSP_ENABLE, 1); 826 regmap_write(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, 0xf); 827 828 ret = sigmadsp_setup(adau->sigmadsp, rate); 829 if (ret) { 830 regmap_write(adau->regmap, ADAU17X1_DSP_ENABLE, 0); 831 return ret; 832 } 833 regmap_write(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, dspsr); 834 835 return 0; 836 } 837 EXPORT_SYMBOL_GPL(adau17x1_setup_firmware); 838 839 int adau17x1_add_widgets(struct snd_soc_codec *codec) 840 { 841 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); 842 struct adau *adau = snd_soc_codec_get_drvdata(codec); 843 int ret; 844 845 ret = snd_soc_add_codec_controls(codec, adau17x1_controls, 846 ARRAY_SIZE(adau17x1_controls)); 847 if (ret) 848 return ret; 849 ret = snd_soc_dapm_new_controls(dapm, adau17x1_dapm_widgets, 850 ARRAY_SIZE(adau17x1_dapm_widgets)); 851 if (ret) 852 return ret; 853 854 if (adau17x1_has_dsp(adau)) { 855 ret = snd_soc_dapm_new_controls(dapm, adau17x1_dsp_dapm_widgets, 856 ARRAY_SIZE(adau17x1_dsp_dapm_widgets)); 857 if (ret) 858 return ret; 859 860 if (!adau->sigmadsp) 861 return 0; 862 863 ret = sigmadsp_attach(adau->sigmadsp, &codec->component); 864 if (ret) { 865 dev_err(codec->dev, "Failed to attach firmware: %d\n", 866 ret); 867 return ret; 868 } 869 } 870 871 return 0; 872 } 873 EXPORT_SYMBOL_GPL(adau17x1_add_widgets); 874 875 int adau17x1_add_routes(struct snd_soc_codec *codec) 876 { 877 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); 878 struct adau *adau = snd_soc_codec_get_drvdata(codec); 879 int ret; 880 881 ret = snd_soc_dapm_add_routes(dapm, adau17x1_dapm_routes, 882 ARRAY_SIZE(adau17x1_dapm_routes)); 883 if (ret) 884 return ret; 885 886 if (adau17x1_has_dsp(adau)) { 887 ret = snd_soc_dapm_add_routes(dapm, adau17x1_dsp_dapm_routes, 888 ARRAY_SIZE(adau17x1_dsp_dapm_routes)); 889 } else { 890 ret = snd_soc_dapm_add_routes(dapm, adau17x1_no_dsp_dapm_routes, 891 ARRAY_SIZE(adau17x1_no_dsp_dapm_routes)); 892 } 893 894 if (adau->clk_src != ADAU17X1_CLK_SRC_MCLK) 895 snd_soc_dapm_add_routes(dapm, &adau17x1_dapm_pll_route, 1); 896 897 return ret; 898 } 899 EXPORT_SYMBOL_GPL(adau17x1_add_routes); 900 901 int adau17x1_resume(struct snd_soc_codec *codec) 902 { 903 struct adau *adau = snd_soc_codec_get_drvdata(codec); 904 905 if (adau->switch_mode) 906 adau->switch_mode(codec->dev); 907 908 regcache_sync(adau->regmap); 909 910 return 0; 911 } 912 EXPORT_SYMBOL_GPL(adau17x1_resume); 913 914 int adau17x1_probe(struct device *dev, struct regmap *regmap, 915 enum adau17x1_type type, void (*switch_mode)(struct device *dev), 916 const char *firmware_name) 917 { 918 struct adau *adau; 919 int ret; 920 921 if (IS_ERR(regmap)) 922 return PTR_ERR(regmap); 923 924 adau = devm_kzalloc(dev, sizeof(*adau), GFP_KERNEL); 925 if (!adau) 926 return -ENOMEM; 927 928 adau->mclk = devm_clk_get(dev, "mclk"); 929 if (IS_ERR(adau->mclk)) { 930 if (PTR_ERR(adau->mclk) != -ENOENT) 931 return PTR_ERR(adau->mclk); 932 /* Clock is optional (for the driver) */ 933 adau->mclk = NULL; 934 } else if (adau->mclk) { 935 adau->clk_src = ADAU17X1_CLK_SRC_PLL_AUTO; 936 937 /* 938 * Any valid PLL output rate will work at this point, use one 939 * that is likely to be chosen later as well. The register will 940 * be written when the PLL is powered up for the first time. 941 */ 942 ret = adau_calc_pll_cfg(clk_get_rate(adau->mclk), 48000 * 1024, 943 adau->pll_regs); 944 if (ret < 0) 945 return ret; 946 947 ret = clk_prepare_enable(adau->mclk); 948 if (ret) 949 return ret; 950 } 951 952 adau->regmap = regmap; 953 adau->switch_mode = switch_mode; 954 adau->type = type; 955 956 dev_set_drvdata(dev, adau); 957 958 if (firmware_name) { 959 adau->sigmadsp = devm_sigmadsp_init_regmap(dev, regmap, NULL, 960 firmware_name); 961 if (IS_ERR(adau->sigmadsp)) { 962 dev_warn(dev, "Could not find firmware file: %ld\n", 963 PTR_ERR(adau->sigmadsp)); 964 adau->sigmadsp = NULL; 965 } 966 } 967 968 if (switch_mode) 969 switch_mode(dev); 970 971 return 0; 972 } 973 EXPORT_SYMBOL_GPL(adau17x1_probe); 974 975 void adau17x1_remove(struct device *dev) 976 { 977 struct adau *adau = dev_get_drvdata(dev); 978 979 snd_soc_unregister_codec(dev); 980 if (adau->mclk) 981 clk_disable_unprepare(adau->mclk); 982 } 983 EXPORT_SYMBOL_GPL(adau17x1_remove); 984 985 MODULE_DESCRIPTION("ASoC ADAU1X61/ADAU1X81 common code"); 986 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>"); 987 MODULE_LICENSE("GPL"); 988