1 /* 2 * Common code for ADAU1X61 and ADAU1X81 codecs 3 * 4 * Copyright 2011-2014 Analog Devices Inc. 5 * Author: Lars-Peter Clausen <lars@metafoo.de> 6 * 7 * Licensed under the GPL-2 or later. 8 */ 9 10 #include <linux/module.h> 11 #include <linux/init.h> 12 #include <linux/clk.h> 13 #include <linux/delay.h> 14 #include <linux/slab.h> 15 #include <sound/core.h> 16 #include <sound/pcm.h> 17 #include <sound/pcm_params.h> 18 #include <sound/soc.h> 19 #include <sound/tlv.h> 20 #include <linux/gcd.h> 21 #include <linux/i2c.h> 22 #include <linux/spi/spi.h> 23 #include <linux/regmap.h> 24 25 #include "sigmadsp.h" 26 #include "adau17x1.h" 27 #include "adau-utils.h" 28 29 static const char * const adau17x1_capture_mixer_boost_text[] = { 30 "Normal operation", "Boost Level 1", "Boost Level 2", "Boost Level 3", 31 }; 32 33 static SOC_ENUM_SINGLE_DECL(adau17x1_capture_boost_enum, 34 ADAU17X1_REC_POWER_MGMT, 5, adau17x1_capture_mixer_boost_text); 35 36 static const char * const adau17x1_mic_bias_mode_text[] = { 37 "Normal operation", "High performance", 38 }; 39 40 static SOC_ENUM_SINGLE_DECL(adau17x1_mic_bias_mode_enum, 41 ADAU17X1_MICBIAS, 3, adau17x1_mic_bias_mode_text); 42 43 static const DECLARE_TLV_DB_MINMAX(adau17x1_digital_tlv, -9563, 0); 44 45 static const struct snd_kcontrol_new adau17x1_controls[] = { 46 SOC_DOUBLE_R_TLV("Digital Capture Volume", 47 ADAU17X1_LEFT_INPUT_DIGITAL_VOL, 48 ADAU17X1_RIGHT_INPUT_DIGITAL_VOL, 49 0, 0xff, 1, adau17x1_digital_tlv), 50 SOC_DOUBLE_R_TLV("Digital Playback Volume", ADAU17X1_DAC_CONTROL1, 51 ADAU17X1_DAC_CONTROL2, 0, 0xff, 1, adau17x1_digital_tlv), 52 53 SOC_SINGLE("ADC High Pass Filter Switch", ADAU17X1_ADC_CONTROL, 54 5, 1, 0), 55 SOC_SINGLE("Playback De-emphasis Switch", ADAU17X1_DAC_CONTROL0, 56 2, 1, 0), 57 58 SOC_ENUM("Capture Boost", adau17x1_capture_boost_enum), 59 60 SOC_ENUM("Mic Bias Mode", adau17x1_mic_bias_mode_enum), 61 }; 62 63 static int adau17x1_pll_event(struct snd_soc_dapm_widget *w, 64 struct snd_kcontrol *kcontrol, int event) 65 { 66 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 67 struct adau *adau = snd_soc_component_get_drvdata(component); 68 69 if (SND_SOC_DAPM_EVENT_ON(event)) { 70 adau->pll_regs[5] = 1; 71 } else { 72 adau->pll_regs[5] = 0; 73 /* Bypass the PLL when disabled, otherwise registers will become 74 * inaccessible. */ 75 regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL, 76 ADAU17X1_CLOCK_CONTROL_CORECLK_SRC_PLL, 0); 77 } 78 79 /* The PLL register is 6 bytes long and can only be written at once. */ 80 regmap_raw_write(adau->regmap, ADAU17X1_PLL_CONTROL, 81 adau->pll_regs, ARRAY_SIZE(adau->pll_regs)); 82 83 if (SND_SOC_DAPM_EVENT_ON(event)) { 84 mdelay(5); 85 regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL, 86 ADAU17X1_CLOCK_CONTROL_CORECLK_SRC_PLL, 87 ADAU17X1_CLOCK_CONTROL_CORECLK_SRC_PLL); 88 } 89 90 return 0; 91 } 92 93 static int adau17x1_adc_fixup(struct snd_soc_dapm_widget *w, 94 struct snd_kcontrol *kcontrol, int event) 95 { 96 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 97 struct adau *adau = snd_soc_component_get_drvdata(component); 98 99 /* 100 * If we are capturing, toggle the ADOSR bit in Converter Control 0 to 101 * avoid losing SNR (workaround from ADI). This must be done after 102 * the ADC(s) have been enabled. According to the data sheet, it is 103 * normally illegal to set this bit when the sampling rate is 96 kHz, 104 * but according to ADI it is acceptable for this workaround. 105 */ 106 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0, 107 ADAU17X1_CONVERTER0_ADOSR, ADAU17X1_CONVERTER0_ADOSR); 108 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0, 109 ADAU17X1_CONVERTER0_ADOSR, 0); 110 111 return 0; 112 } 113 114 static const char * const adau17x1_mono_stereo_text[] = { 115 "Stereo", 116 "Mono Left Channel (L+R)", 117 "Mono Right Channel (L+R)", 118 "Mono (L+R)", 119 }; 120 121 static SOC_ENUM_SINGLE_DECL(adau17x1_dac_mode_enum, 122 ADAU17X1_DAC_CONTROL0, 6, adau17x1_mono_stereo_text); 123 124 static const struct snd_kcontrol_new adau17x1_dac_mode_mux = 125 SOC_DAPM_ENUM("DAC Mono-Stereo-Mode", adau17x1_dac_mode_enum); 126 127 static const struct snd_soc_dapm_widget adau17x1_dapm_widgets[] = { 128 SND_SOC_DAPM_SUPPLY_S("PLL", 3, SND_SOC_NOPM, 0, 0, adau17x1_pll_event, 129 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), 130 131 SND_SOC_DAPM_SUPPLY("AIFCLK", SND_SOC_NOPM, 0, 0, NULL, 0), 132 133 SND_SOC_DAPM_SUPPLY("MICBIAS", ADAU17X1_MICBIAS, 0, 0, NULL, 0), 134 135 SND_SOC_DAPM_SUPPLY("Left Playback Enable", ADAU17X1_PLAY_POWER_MGMT, 136 0, 0, NULL, 0), 137 SND_SOC_DAPM_SUPPLY("Right Playback Enable", ADAU17X1_PLAY_POWER_MGMT, 138 1, 0, NULL, 0), 139 140 SND_SOC_DAPM_MUX("Left DAC Mode Mux", SND_SOC_NOPM, 0, 0, 141 &adau17x1_dac_mode_mux), 142 SND_SOC_DAPM_MUX("Right DAC Mode Mux", SND_SOC_NOPM, 0, 0, 143 &adau17x1_dac_mode_mux), 144 145 SND_SOC_DAPM_ADC_E("Left Decimator", NULL, ADAU17X1_ADC_CONTROL, 0, 0, 146 adau17x1_adc_fixup, SND_SOC_DAPM_POST_PMU), 147 SND_SOC_DAPM_ADC("Right Decimator", NULL, ADAU17X1_ADC_CONTROL, 1, 0), 148 SND_SOC_DAPM_DAC("Left DAC", NULL, ADAU17X1_DAC_CONTROL0, 0, 0), 149 SND_SOC_DAPM_DAC("Right DAC", NULL, ADAU17X1_DAC_CONTROL0, 1, 0), 150 }; 151 152 static const struct snd_soc_dapm_route adau17x1_dapm_routes[] = { 153 { "Left Decimator", NULL, "SYSCLK" }, 154 { "Right Decimator", NULL, "SYSCLK" }, 155 { "Left DAC", NULL, "SYSCLK" }, 156 { "Right DAC", NULL, "SYSCLK" }, 157 { "Capture", NULL, "SYSCLK" }, 158 { "Playback", NULL, "SYSCLK" }, 159 160 { "Left DAC", NULL, "Left DAC Mode Mux" }, 161 { "Right DAC", NULL, "Right DAC Mode Mux" }, 162 163 { "Capture", NULL, "AIFCLK" }, 164 { "Playback", NULL, "AIFCLK" }, 165 }; 166 167 static const struct snd_soc_dapm_route adau17x1_dapm_pll_route = { 168 "SYSCLK", NULL, "PLL", 169 }; 170 171 /* 172 * The MUX register for the Capture and Playback MUXs selects either DSP as 173 * source/destination or one of the TDM slots. The TDM slot is selected via 174 * snd_soc_dai_set_tdm_slot(), so we only expose whether to go to the DSP or 175 * directly to the DAI interface with this control. 176 */ 177 static int adau17x1_dsp_mux_enum_put(struct snd_kcontrol *kcontrol, 178 struct snd_ctl_elem_value *ucontrol) 179 { 180 struct snd_soc_component *component = snd_soc_dapm_kcontrol_component(kcontrol); 181 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component); 182 struct adau *adau = snd_soc_component_get_drvdata(component); 183 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; 184 struct snd_soc_dapm_update update = {}; 185 unsigned int stream = e->shift_l; 186 unsigned int val, change; 187 int reg; 188 189 if (ucontrol->value.enumerated.item[0] >= e->items) 190 return -EINVAL; 191 192 switch (ucontrol->value.enumerated.item[0]) { 193 case 0: 194 val = 0; 195 adau->dsp_bypass[stream] = false; 196 break; 197 default: 198 val = (adau->tdm_slot[stream] * 2) + 1; 199 adau->dsp_bypass[stream] = true; 200 break; 201 } 202 203 if (stream == SNDRV_PCM_STREAM_PLAYBACK) 204 reg = ADAU17X1_SERIAL_INPUT_ROUTE; 205 else 206 reg = ADAU17X1_SERIAL_OUTPUT_ROUTE; 207 208 change = snd_soc_component_test_bits(component, reg, 0xff, val); 209 if (change) { 210 update.kcontrol = kcontrol; 211 update.mask = 0xff; 212 update.reg = reg; 213 update.val = val; 214 215 snd_soc_dapm_mux_update_power(dapm, kcontrol, 216 ucontrol->value.enumerated.item[0], e, &update); 217 } 218 219 return change; 220 } 221 222 static int adau17x1_dsp_mux_enum_get(struct snd_kcontrol *kcontrol, 223 struct snd_ctl_elem_value *ucontrol) 224 { 225 struct snd_soc_component *component = snd_soc_dapm_kcontrol_component(kcontrol); 226 struct adau *adau = snd_soc_component_get_drvdata(component); 227 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; 228 unsigned int stream = e->shift_l; 229 unsigned int reg, val; 230 int ret; 231 232 if (stream == SNDRV_PCM_STREAM_PLAYBACK) 233 reg = ADAU17X1_SERIAL_INPUT_ROUTE; 234 else 235 reg = ADAU17X1_SERIAL_OUTPUT_ROUTE; 236 237 ret = regmap_read(adau->regmap, reg, &val); 238 if (ret) 239 return ret; 240 241 if (val != 0) 242 val = 1; 243 ucontrol->value.enumerated.item[0] = val; 244 245 return 0; 246 } 247 248 #define DECLARE_ADAU17X1_DSP_MUX_CTRL(_name, _label, _stream, _text) \ 249 const struct snd_kcontrol_new _name = \ 250 SOC_DAPM_ENUM_EXT(_label, (const struct soc_enum)\ 251 SOC_ENUM_SINGLE(SND_SOC_NOPM, _stream, \ 252 ARRAY_SIZE(_text), _text), \ 253 adau17x1_dsp_mux_enum_get, adau17x1_dsp_mux_enum_put) 254 255 static const char * const adau17x1_dac_mux_text[] = { 256 "DSP", 257 "AIFIN", 258 }; 259 260 static const char * const adau17x1_capture_mux_text[] = { 261 "DSP", 262 "Decimator", 263 }; 264 265 static DECLARE_ADAU17X1_DSP_MUX_CTRL(adau17x1_dac_mux, "DAC Playback Mux", 266 SNDRV_PCM_STREAM_PLAYBACK, adau17x1_dac_mux_text); 267 268 static DECLARE_ADAU17X1_DSP_MUX_CTRL(adau17x1_capture_mux, "Capture Mux", 269 SNDRV_PCM_STREAM_CAPTURE, adau17x1_capture_mux_text); 270 271 static const struct snd_soc_dapm_widget adau17x1_dsp_dapm_widgets[] = { 272 SND_SOC_DAPM_PGA("DSP", ADAU17X1_DSP_RUN, 0, 0, NULL, 0), 273 SND_SOC_DAPM_SIGGEN("DSP Siggen"), 274 275 SND_SOC_DAPM_MUX("DAC Playback Mux", SND_SOC_NOPM, 0, 0, 276 &adau17x1_dac_mux), 277 SND_SOC_DAPM_MUX("Capture Mux", SND_SOC_NOPM, 0, 0, 278 &adau17x1_capture_mux), 279 }; 280 281 static const struct snd_soc_dapm_route adau17x1_dsp_dapm_routes[] = { 282 { "DAC Playback Mux", "DSP", "DSP" }, 283 { "DAC Playback Mux", "AIFIN", "Playback" }, 284 285 { "Left DAC Mode Mux", "Stereo", "DAC Playback Mux" }, 286 { "Left DAC Mode Mux", "Mono (L+R)", "DAC Playback Mux" }, 287 { "Left DAC Mode Mux", "Mono Left Channel (L+R)", "DAC Playback Mux" }, 288 { "Right DAC Mode Mux", "Stereo", "DAC Playback Mux" }, 289 { "Right DAC Mode Mux", "Mono (L+R)", "DAC Playback Mux" }, 290 { "Right DAC Mode Mux", "Mono Right Channel (L+R)", "DAC Playback Mux" }, 291 292 { "Capture Mux", "DSP", "DSP" }, 293 { "Capture Mux", "Decimator", "Left Decimator" }, 294 { "Capture Mux", "Decimator", "Right Decimator" }, 295 296 { "Capture", NULL, "Capture Mux" }, 297 298 { "DSP", NULL, "DSP Siggen" }, 299 300 { "DSP", NULL, "Left Decimator" }, 301 { "DSP", NULL, "Right Decimator" }, 302 { "DSP", NULL, "Playback" }, 303 }; 304 305 static const struct snd_soc_dapm_route adau17x1_no_dsp_dapm_routes[] = { 306 { "Left DAC Mode Mux", "Stereo", "Playback" }, 307 { "Left DAC Mode Mux", "Mono (L+R)", "Playback" }, 308 { "Left DAC Mode Mux", "Mono Left Channel (L+R)", "Playback" }, 309 { "Right DAC Mode Mux", "Stereo", "Playback" }, 310 { "Right DAC Mode Mux", "Mono (L+R)", "Playback" }, 311 { "Right DAC Mode Mux", "Mono Right Channel (L+R)", "Playback" }, 312 { "Capture", NULL, "Left Decimator" }, 313 { "Capture", NULL, "Right Decimator" }, 314 }; 315 316 bool adau17x1_has_dsp(struct adau *adau) 317 { 318 switch (adau->type) { 319 case ADAU1761: 320 case ADAU1381: 321 case ADAU1781: 322 return true; 323 default: 324 return false; 325 } 326 } 327 EXPORT_SYMBOL_GPL(adau17x1_has_dsp); 328 329 static int adau17x1_set_dai_pll(struct snd_soc_dai *dai, int pll_id, 330 int source, unsigned int freq_in, unsigned int freq_out) 331 { 332 struct snd_soc_component *component = dai->component; 333 struct adau *adau = snd_soc_component_get_drvdata(component); 334 int ret; 335 336 if (freq_in < 8000000 || freq_in > 27000000) 337 return -EINVAL; 338 339 ret = adau_calc_pll_cfg(freq_in, freq_out, adau->pll_regs); 340 if (ret < 0) 341 return ret; 342 343 /* The PLL register is 6 bytes long and can only be written at once. */ 344 ret = regmap_raw_write(adau->regmap, ADAU17X1_PLL_CONTROL, 345 adau->pll_regs, ARRAY_SIZE(adau->pll_regs)); 346 if (ret) 347 return ret; 348 349 adau->pll_freq = freq_out; 350 351 return 0; 352 } 353 354 static int adau17x1_set_dai_sysclk(struct snd_soc_dai *dai, 355 int clk_id, unsigned int freq, int dir) 356 { 357 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(dai->component); 358 struct adau *adau = snd_soc_component_get_drvdata(dai->component); 359 bool is_pll; 360 bool was_pll; 361 362 switch (clk_id) { 363 case ADAU17X1_CLK_SRC_MCLK: 364 is_pll = false; 365 break; 366 case ADAU17X1_CLK_SRC_PLL_AUTO: 367 if (!adau->mclk) 368 return -EINVAL; 369 /* Fall-through */ 370 case ADAU17X1_CLK_SRC_PLL: 371 is_pll = true; 372 break; 373 default: 374 return -EINVAL; 375 } 376 377 switch (adau->clk_src) { 378 case ADAU17X1_CLK_SRC_MCLK: 379 was_pll = false; 380 break; 381 case ADAU17X1_CLK_SRC_PLL: 382 case ADAU17X1_CLK_SRC_PLL_AUTO: 383 was_pll = true; 384 break; 385 default: 386 return -EINVAL; 387 } 388 389 adau->sysclk = freq; 390 391 if (is_pll != was_pll) { 392 if (is_pll) { 393 snd_soc_dapm_add_routes(dapm, 394 &adau17x1_dapm_pll_route, 1); 395 } else { 396 snd_soc_dapm_del_routes(dapm, 397 &adau17x1_dapm_pll_route, 1); 398 } 399 } 400 401 adau->clk_src = clk_id; 402 403 return 0; 404 } 405 406 static int adau17x1_auto_pll(struct snd_soc_dai *dai, 407 struct snd_pcm_hw_params *params) 408 { 409 struct adau *adau = snd_soc_dai_get_drvdata(dai); 410 unsigned int pll_rate; 411 412 switch (params_rate(params)) { 413 case 48000: 414 case 8000: 415 case 12000: 416 case 16000: 417 case 24000: 418 case 32000: 419 case 96000: 420 pll_rate = 48000 * 1024; 421 break; 422 case 44100: 423 case 7350: 424 case 11025: 425 case 14700: 426 case 22050: 427 case 29400: 428 case 88200: 429 pll_rate = 44100 * 1024; 430 break; 431 default: 432 return -EINVAL; 433 } 434 435 return adau17x1_set_dai_pll(dai, ADAU17X1_PLL, ADAU17X1_PLL_SRC_MCLK, 436 clk_get_rate(adau->mclk), pll_rate); 437 } 438 439 static int adau17x1_hw_params(struct snd_pcm_substream *substream, 440 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) 441 { 442 struct snd_soc_component *component = dai->component; 443 struct adau *adau = snd_soc_component_get_drvdata(component); 444 unsigned int val, div, dsp_div; 445 unsigned int freq; 446 int ret; 447 448 switch (adau->clk_src) { 449 case ADAU17X1_CLK_SRC_PLL_AUTO: 450 ret = adau17x1_auto_pll(dai, params); 451 if (ret) 452 return ret; 453 /* Fall-through */ 454 case ADAU17X1_CLK_SRC_PLL: 455 freq = adau->pll_freq; 456 break; 457 default: 458 freq = adau->sysclk; 459 break; 460 } 461 462 if (freq % params_rate(params) != 0) 463 return -EINVAL; 464 465 switch (freq / params_rate(params)) { 466 case 1024: /* fs */ 467 div = 0; 468 dsp_div = 1; 469 break; 470 case 6144: /* fs / 6 */ 471 div = 1; 472 dsp_div = 6; 473 break; 474 case 4096: /* fs / 4 */ 475 div = 2; 476 dsp_div = 5; 477 break; 478 case 3072: /* fs / 3 */ 479 div = 3; 480 dsp_div = 4; 481 break; 482 case 2048: /* fs / 2 */ 483 div = 4; 484 dsp_div = 3; 485 break; 486 case 1536: /* fs / 1.5 */ 487 div = 5; 488 dsp_div = 2; 489 break; 490 case 512: /* fs / 0.5 */ 491 div = 6; 492 dsp_div = 0; 493 break; 494 default: 495 return -EINVAL; 496 } 497 498 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0, 499 ADAU17X1_CONVERTER0_CONVSR_MASK, div); 500 if (adau17x1_has_dsp(adau)) { 501 regmap_write(adau->regmap, ADAU17X1_SERIAL_SAMPLING_RATE, div); 502 regmap_write(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, dsp_div); 503 } 504 505 if (adau->sigmadsp) { 506 ret = adau17x1_setup_firmware(component, params_rate(params)); 507 if (ret < 0) 508 return ret; 509 } 510 511 if (adau->dai_fmt != SND_SOC_DAIFMT_RIGHT_J) 512 return 0; 513 514 switch (params_width(params)) { 515 case 16: 516 val = ADAU17X1_SERIAL_PORT1_DELAY16; 517 break; 518 case 24: 519 val = ADAU17X1_SERIAL_PORT1_DELAY8; 520 break; 521 case 32: 522 val = ADAU17X1_SERIAL_PORT1_DELAY0; 523 break; 524 default: 525 return -EINVAL; 526 } 527 528 return regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT1, 529 ADAU17X1_SERIAL_PORT1_DELAY_MASK, val); 530 } 531 532 static int adau17x1_set_dai_fmt(struct snd_soc_dai *dai, 533 unsigned int fmt) 534 { 535 struct adau *adau = snd_soc_component_get_drvdata(dai->component); 536 unsigned int ctrl0, ctrl1; 537 int lrclk_pol; 538 539 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 540 case SND_SOC_DAIFMT_CBM_CFM: 541 ctrl0 = ADAU17X1_SERIAL_PORT0_MASTER; 542 adau->master = true; 543 break; 544 case SND_SOC_DAIFMT_CBS_CFS: 545 ctrl0 = 0; 546 adau->master = false; 547 break; 548 default: 549 return -EINVAL; 550 } 551 552 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 553 case SND_SOC_DAIFMT_I2S: 554 lrclk_pol = 0; 555 ctrl1 = ADAU17X1_SERIAL_PORT1_DELAY1; 556 break; 557 case SND_SOC_DAIFMT_LEFT_J: 558 case SND_SOC_DAIFMT_RIGHT_J: 559 lrclk_pol = 1; 560 ctrl1 = ADAU17X1_SERIAL_PORT1_DELAY0; 561 break; 562 case SND_SOC_DAIFMT_DSP_A: 563 lrclk_pol = 1; 564 ctrl0 |= ADAU17X1_SERIAL_PORT0_PULSE_MODE; 565 ctrl1 = ADAU17X1_SERIAL_PORT1_DELAY1; 566 break; 567 case SND_SOC_DAIFMT_DSP_B: 568 lrclk_pol = 1; 569 ctrl0 |= ADAU17X1_SERIAL_PORT0_PULSE_MODE; 570 ctrl1 = ADAU17X1_SERIAL_PORT1_DELAY0; 571 break; 572 default: 573 return -EINVAL; 574 } 575 576 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 577 case SND_SOC_DAIFMT_NB_NF: 578 break; 579 case SND_SOC_DAIFMT_IB_NF: 580 ctrl0 |= ADAU17X1_SERIAL_PORT0_BCLK_POL; 581 break; 582 case SND_SOC_DAIFMT_NB_IF: 583 lrclk_pol = !lrclk_pol; 584 break; 585 case SND_SOC_DAIFMT_IB_IF: 586 ctrl0 |= ADAU17X1_SERIAL_PORT0_BCLK_POL; 587 lrclk_pol = !lrclk_pol; 588 break; 589 default: 590 return -EINVAL; 591 } 592 593 if (lrclk_pol) 594 ctrl0 |= ADAU17X1_SERIAL_PORT0_LRCLK_POL; 595 596 regmap_write(adau->regmap, ADAU17X1_SERIAL_PORT0, ctrl0); 597 regmap_write(adau->regmap, ADAU17X1_SERIAL_PORT1, ctrl1); 598 599 adau->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK; 600 601 return 0; 602 } 603 604 static int adau17x1_set_dai_tdm_slot(struct snd_soc_dai *dai, 605 unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width) 606 { 607 struct adau *adau = snd_soc_component_get_drvdata(dai->component); 608 unsigned int ser_ctrl0, ser_ctrl1; 609 unsigned int conv_ctrl0, conv_ctrl1; 610 611 /* I2S mode */ 612 if (slots == 0) { 613 slots = 2; 614 rx_mask = 3; 615 tx_mask = 3; 616 slot_width = 32; 617 } 618 619 switch (slots) { 620 case 2: 621 ser_ctrl0 = ADAU17X1_SERIAL_PORT0_STEREO; 622 break; 623 case 4: 624 ser_ctrl0 = ADAU17X1_SERIAL_PORT0_TDM4; 625 break; 626 case 8: 627 if (adau->type == ADAU1361) 628 return -EINVAL; 629 630 ser_ctrl0 = ADAU17X1_SERIAL_PORT0_TDM8; 631 break; 632 default: 633 return -EINVAL; 634 } 635 636 switch (slot_width * slots) { 637 case 32: 638 if (adau->type == ADAU1761) 639 return -EINVAL; 640 641 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK32; 642 break; 643 case 64: 644 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK64; 645 break; 646 case 48: 647 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK48; 648 break; 649 case 128: 650 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK128; 651 break; 652 case 256: 653 if (adau->type == ADAU1361) 654 return -EINVAL; 655 656 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK256; 657 break; 658 default: 659 return -EINVAL; 660 } 661 662 switch (rx_mask) { 663 case 0x03: 664 conv_ctrl1 = ADAU17X1_CONVERTER1_ADC_PAIR(1); 665 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 0; 666 break; 667 case 0x0c: 668 conv_ctrl1 = ADAU17X1_CONVERTER1_ADC_PAIR(2); 669 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 1; 670 break; 671 case 0x30: 672 conv_ctrl1 = ADAU17X1_CONVERTER1_ADC_PAIR(3); 673 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 2; 674 break; 675 case 0xc0: 676 conv_ctrl1 = ADAU17X1_CONVERTER1_ADC_PAIR(4); 677 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 3; 678 break; 679 default: 680 return -EINVAL; 681 } 682 683 switch (tx_mask) { 684 case 0x03: 685 conv_ctrl0 = ADAU17X1_CONVERTER0_DAC_PAIR(1); 686 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 0; 687 break; 688 case 0x0c: 689 conv_ctrl0 = ADAU17X1_CONVERTER0_DAC_PAIR(2); 690 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 1; 691 break; 692 case 0x30: 693 conv_ctrl0 = ADAU17X1_CONVERTER0_DAC_PAIR(3); 694 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 2; 695 break; 696 case 0xc0: 697 conv_ctrl0 = ADAU17X1_CONVERTER0_DAC_PAIR(4); 698 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 3; 699 break; 700 default: 701 return -EINVAL; 702 } 703 704 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0, 705 ADAU17X1_CONVERTER0_DAC_PAIR_MASK, conv_ctrl0); 706 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER1, 707 ADAU17X1_CONVERTER1_ADC_PAIR_MASK, conv_ctrl1); 708 regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT0, 709 ADAU17X1_SERIAL_PORT0_TDM_MASK, ser_ctrl0); 710 regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT1, 711 ADAU17X1_SERIAL_PORT1_BCLK_MASK, ser_ctrl1); 712 713 if (!adau17x1_has_dsp(adau)) 714 return 0; 715 716 if (adau->dsp_bypass[SNDRV_PCM_STREAM_PLAYBACK]) { 717 regmap_write(adau->regmap, ADAU17X1_SERIAL_INPUT_ROUTE, 718 (adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] * 2) + 1); 719 } 720 721 if (adau->dsp_bypass[SNDRV_PCM_STREAM_CAPTURE]) { 722 regmap_write(adau->regmap, ADAU17X1_SERIAL_OUTPUT_ROUTE, 723 (adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] * 2) + 1); 724 } 725 726 return 0; 727 } 728 729 static int adau17x1_startup(struct snd_pcm_substream *substream, 730 struct snd_soc_dai *dai) 731 { 732 struct adau *adau = snd_soc_component_get_drvdata(dai->component); 733 734 if (adau->sigmadsp) 735 return sigmadsp_restrict_params(adau->sigmadsp, substream); 736 737 return 0; 738 } 739 740 const struct snd_soc_dai_ops adau17x1_dai_ops = { 741 .hw_params = adau17x1_hw_params, 742 .set_sysclk = adau17x1_set_dai_sysclk, 743 .set_fmt = adau17x1_set_dai_fmt, 744 .set_pll = adau17x1_set_dai_pll, 745 .set_tdm_slot = adau17x1_set_dai_tdm_slot, 746 .startup = adau17x1_startup, 747 }; 748 EXPORT_SYMBOL_GPL(adau17x1_dai_ops); 749 750 int adau17x1_set_micbias_voltage(struct snd_soc_component *component, 751 enum adau17x1_micbias_voltage micbias) 752 { 753 struct adau *adau = snd_soc_component_get_drvdata(component); 754 755 switch (micbias) { 756 case ADAU17X1_MICBIAS_0_90_AVDD: 757 case ADAU17X1_MICBIAS_0_65_AVDD: 758 break; 759 default: 760 return -EINVAL; 761 } 762 763 return regmap_write(adau->regmap, ADAU17X1_MICBIAS, micbias << 2); 764 } 765 EXPORT_SYMBOL_GPL(adau17x1_set_micbias_voltage); 766 767 bool adau17x1_precious_register(struct device *dev, unsigned int reg) 768 { 769 /* SigmaDSP parameter memory */ 770 if (reg < 0x400) 771 return true; 772 773 return false; 774 } 775 EXPORT_SYMBOL_GPL(adau17x1_precious_register); 776 777 bool adau17x1_readable_register(struct device *dev, unsigned int reg) 778 { 779 /* SigmaDSP parameter memory */ 780 if (reg < 0x400) 781 return true; 782 783 switch (reg) { 784 case ADAU17X1_CLOCK_CONTROL: 785 case ADAU17X1_PLL_CONTROL: 786 case ADAU17X1_REC_POWER_MGMT: 787 case ADAU17X1_MICBIAS: 788 case ADAU17X1_SERIAL_PORT0: 789 case ADAU17X1_SERIAL_PORT1: 790 case ADAU17X1_CONVERTER0: 791 case ADAU17X1_CONVERTER1: 792 case ADAU17X1_LEFT_INPUT_DIGITAL_VOL: 793 case ADAU17X1_RIGHT_INPUT_DIGITAL_VOL: 794 case ADAU17X1_ADC_CONTROL: 795 case ADAU17X1_PLAY_POWER_MGMT: 796 case ADAU17X1_DAC_CONTROL0: 797 case ADAU17X1_DAC_CONTROL1: 798 case ADAU17X1_DAC_CONTROL2: 799 case ADAU17X1_SERIAL_PORT_PAD: 800 case ADAU17X1_CONTROL_PORT_PAD0: 801 case ADAU17X1_CONTROL_PORT_PAD1: 802 case ADAU17X1_DSP_SAMPLING_RATE: 803 case ADAU17X1_SERIAL_INPUT_ROUTE: 804 case ADAU17X1_SERIAL_OUTPUT_ROUTE: 805 case ADAU17X1_DSP_ENABLE: 806 case ADAU17X1_DSP_RUN: 807 case ADAU17X1_SERIAL_SAMPLING_RATE: 808 return true; 809 default: 810 break; 811 } 812 return false; 813 } 814 EXPORT_SYMBOL_GPL(adau17x1_readable_register); 815 816 bool adau17x1_volatile_register(struct device *dev, unsigned int reg) 817 { 818 /* SigmaDSP parameter and program memory */ 819 if (reg < 0x4000) 820 return true; 821 822 switch (reg) { 823 /* The PLL register is 6 bytes long */ 824 case ADAU17X1_PLL_CONTROL: 825 case ADAU17X1_PLL_CONTROL + 1: 826 case ADAU17X1_PLL_CONTROL + 2: 827 case ADAU17X1_PLL_CONTROL + 3: 828 case ADAU17X1_PLL_CONTROL + 4: 829 case ADAU17X1_PLL_CONTROL + 5: 830 return true; 831 default: 832 break; 833 } 834 835 return false; 836 } 837 EXPORT_SYMBOL_GPL(adau17x1_volatile_register); 838 839 int adau17x1_setup_firmware(struct snd_soc_component *component, 840 unsigned int rate) 841 { 842 int ret; 843 int dspsr, dsp_run; 844 struct adau *adau = snd_soc_component_get_drvdata(component); 845 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component); 846 847 /* Check if sample rate is the same as before. If it is there is no 848 * point in performing the below steps as the call to 849 * sigmadsp_setup(...) will return directly when it finds the sample 850 * rate to be the same as before. By checking this we can prevent an 851 * audiable popping noise which occours when toggling DSP_RUN. 852 */ 853 if (adau->sigmadsp->current_samplerate == rate) 854 return 0; 855 856 snd_soc_dapm_mutex_lock(dapm); 857 858 ret = regmap_read(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, &dspsr); 859 if (ret) 860 goto err; 861 862 ret = regmap_read(adau->regmap, ADAU17X1_DSP_RUN, &dsp_run); 863 if (ret) 864 goto err; 865 866 regmap_write(adau->regmap, ADAU17X1_DSP_ENABLE, 1); 867 regmap_write(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, 0xf); 868 regmap_write(adau->regmap, ADAU17X1_DSP_RUN, 0); 869 870 ret = sigmadsp_setup(adau->sigmadsp, rate); 871 if (ret) { 872 regmap_write(adau->regmap, ADAU17X1_DSP_ENABLE, 0); 873 goto err; 874 } 875 regmap_write(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, dspsr); 876 regmap_write(adau->regmap, ADAU17X1_DSP_RUN, dsp_run); 877 878 err: 879 snd_soc_dapm_mutex_unlock(dapm); 880 881 return ret; 882 } 883 EXPORT_SYMBOL_GPL(adau17x1_setup_firmware); 884 885 int adau17x1_add_widgets(struct snd_soc_component *component) 886 { 887 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component); 888 struct adau *adau = snd_soc_component_get_drvdata(component); 889 int ret; 890 891 ret = snd_soc_add_component_controls(component, adau17x1_controls, 892 ARRAY_SIZE(adau17x1_controls)); 893 if (ret) 894 return ret; 895 ret = snd_soc_dapm_new_controls(dapm, adau17x1_dapm_widgets, 896 ARRAY_SIZE(adau17x1_dapm_widgets)); 897 if (ret) 898 return ret; 899 900 if (adau17x1_has_dsp(adau)) { 901 ret = snd_soc_dapm_new_controls(dapm, adau17x1_dsp_dapm_widgets, 902 ARRAY_SIZE(adau17x1_dsp_dapm_widgets)); 903 if (ret) 904 return ret; 905 906 if (!adau->sigmadsp) 907 return 0; 908 909 ret = sigmadsp_attach(adau->sigmadsp, component); 910 if (ret) { 911 dev_err(component->dev, "Failed to attach firmware: %d\n", 912 ret); 913 return ret; 914 } 915 } 916 917 return 0; 918 } 919 EXPORT_SYMBOL_GPL(adau17x1_add_widgets); 920 921 int adau17x1_add_routes(struct snd_soc_component *component) 922 { 923 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component); 924 struct adau *adau = snd_soc_component_get_drvdata(component); 925 int ret; 926 927 ret = snd_soc_dapm_add_routes(dapm, adau17x1_dapm_routes, 928 ARRAY_SIZE(adau17x1_dapm_routes)); 929 if (ret) 930 return ret; 931 932 if (adau17x1_has_dsp(adau)) { 933 ret = snd_soc_dapm_add_routes(dapm, adau17x1_dsp_dapm_routes, 934 ARRAY_SIZE(adau17x1_dsp_dapm_routes)); 935 } else { 936 ret = snd_soc_dapm_add_routes(dapm, adau17x1_no_dsp_dapm_routes, 937 ARRAY_SIZE(adau17x1_no_dsp_dapm_routes)); 938 } 939 940 if (adau->clk_src != ADAU17X1_CLK_SRC_MCLK) 941 snd_soc_dapm_add_routes(dapm, &adau17x1_dapm_pll_route, 1); 942 943 return ret; 944 } 945 EXPORT_SYMBOL_GPL(adau17x1_add_routes); 946 947 int adau17x1_resume(struct snd_soc_component *component) 948 { 949 struct adau *adau = snd_soc_component_get_drvdata(component); 950 951 if (adau->switch_mode) 952 adau->switch_mode(component->dev); 953 954 regcache_sync(adau->regmap); 955 956 return 0; 957 } 958 EXPORT_SYMBOL_GPL(adau17x1_resume); 959 960 int adau17x1_probe(struct device *dev, struct regmap *regmap, 961 enum adau17x1_type type, void (*switch_mode)(struct device *dev), 962 const char *firmware_name) 963 { 964 struct adau *adau; 965 int ret; 966 967 if (IS_ERR(regmap)) 968 return PTR_ERR(regmap); 969 970 adau = devm_kzalloc(dev, sizeof(*adau), GFP_KERNEL); 971 if (!adau) 972 return -ENOMEM; 973 974 adau->mclk = devm_clk_get(dev, "mclk"); 975 if (IS_ERR(adau->mclk)) { 976 if (PTR_ERR(adau->mclk) != -ENOENT) 977 return PTR_ERR(adau->mclk); 978 /* Clock is optional (for the driver) */ 979 adau->mclk = NULL; 980 } else if (adau->mclk) { 981 adau->clk_src = ADAU17X1_CLK_SRC_PLL_AUTO; 982 983 /* 984 * Any valid PLL output rate will work at this point, use one 985 * that is likely to be chosen later as well. The register will 986 * be written when the PLL is powered up for the first time. 987 */ 988 ret = adau_calc_pll_cfg(clk_get_rate(adau->mclk), 48000 * 1024, 989 adau->pll_regs); 990 if (ret < 0) 991 return ret; 992 993 ret = clk_prepare_enable(adau->mclk); 994 if (ret) 995 return ret; 996 } 997 998 adau->regmap = regmap; 999 adau->switch_mode = switch_mode; 1000 adau->type = type; 1001 1002 dev_set_drvdata(dev, adau); 1003 1004 if (firmware_name) { 1005 adau->sigmadsp = devm_sigmadsp_init_regmap(dev, regmap, NULL, 1006 firmware_name); 1007 if (IS_ERR(adau->sigmadsp)) { 1008 dev_warn(dev, "Could not find firmware file: %ld\n", 1009 PTR_ERR(adau->sigmadsp)); 1010 adau->sigmadsp = NULL; 1011 } 1012 } 1013 1014 if (switch_mode) 1015 switch_mode(dev); 1016 1017 return 0; 1018 } 1019 EXPORT_SYMBOL_GPL(adau17x1_probe); 1020 1021 void adau17x1_remove(struct device *dev) 1022 { 1023 struct adau *adau = dev_get_drvdata(dev); 1024 1025 if (adau->mclk) 1026 clk_disable_unprepare(adau->mclk); 1027 } 1028 EXPORT_SYMBOL_GPL(adau17x1_remove); 1029 1030 MODULE_DESCRIPTION("ASoC ADAU1X61/ADAU1X81 common code"); 1031 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>"); 1032 MODULE_LICENSE("GPL"); 1033