1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Driver for ADAU1361/ADAU1461/ADAU1761/ADAU1961 codec 4 * 5 * Copyright 2011-2013 Analog Devices Inc. 6 * Author: Lars-Peter Clausen <lars@metafoo.de> 7 */ 8 9 #include <linux/module.h> 10 #include <linux/init.h> 11 #include <linux/i2c.h> 12 #include <linux/spi/spi.h> 13 #include <linux/slab.h> 14 #include <sound/core.h> 15 #include <sound/pcm.h> 16 #include <sound/pcm_params.h> 17 #include <sound/soc.h> 18 #include <sound/tlv.h> 19 #include <linux/platform_data/adau17x1.h> 20 21 #include "adau17x1.h" 22 #include "adau1761.h" 23 24 #define ADAU1761_DIGMIC_JACKDETECT 0x4008 25 #define ADAU1761_REC_MIXER_LEFT0 0x400a 26 #define ADAU1761_REC_MIXER_LEFT1 0x400b 27 #define ADAU1761_REC_MIXER_RIGHT0 0x400c 28 #define ADAU1761_REC_MIXER_RIGHT1 0x400d 29 #define ADAU1761_LEFT_DIFF_INPUT_VOL 0x400e 30 #define ADAU1761_RIGHT_DIFF_INPUT_VOL 0x400f 31 #define ADAU1761_ALC_CTRL0 0x4011 32 #define ADAU1761_ALC_CTRL1 0x4012 33 #define ADAU1761_ALC_CTRL2 0x4013 34 #define ADAU1761_ALC_CTRL3 0x4014 35 #define ADAU1761_PLAY_LR_MIXER_LEFT 0x4020 36 #define ADAU1761_PLAY_MIXER_LEFT0 0x401c 37 #define ADAU1761_PLAY_MIXER_LEFT1 0x401d 38 #define ADAU1761_PLAY_MIXER_RIGHT0 0x401e 39 #define ADAU1761_PLAY_MIXER_RIGHT1 0x401f 40 #define ADAU1761_PLAY_LR_MIXER_RIGHT 0x4021 41 #define ADAU1761_PLAY_MIXER_MONO 0x4022 42 #define ADAU1761_PLAY_HP_LEFT_VOL 0x4023 43 #define ADAU1761_PLAY_HP_RIGHT_VOL 0x4024 44 #define ADAU1761_PLAY_LINE_LEFT_VOL 0x4025 45 #define ADAU1761_PLAY_LINE_RIGHT_VOL 0x4026 46 #define ADAU1761_PLAY_MONO_OUTPUT_VOL 0x4027 47 #define ADAU1761_POP_CLICK_SUPPRESS 0x4028 48 #define ADAU1761_JACK_DETECT_PIN 0x4031 49 #define ADAU1761_DEJITTER 0x4036 50 #define ADAU1761_CLK_ENABLE0 0x40f9 51 #define ADAU1761_CLK_ENABLE1 0x40fa 52 53 #define ADAU1761_DIGMIC_JACKDETECT_ACTIVE_LOW BIT(0) 54 #define ADAU1761_DIGMIC_JACKDETECT_DIGMIC BIT(5) 55 56 #define ADAU1761_DIFF_INPUT_VOL_LDEN BIT(0) 57 58 #define ADAU1761_PLAY_MONO_OUTPUT_VOL_MODE_HP BIT(0) 59 #define ADAU1761_PLAY_MONO_OUTPUT_VOL_UNMUTE BIT(1) 60 61 #define ADAU1761_PLAY_HP_RIGHT_VOL_MODE_HP BIT(0) 62 63 #define ADAU1761_PLAY_LINE_LEFT_VOL_MODE_HP BIT(0) 64 65 #define ADAU1761_PLAY_LINE_RIGHT_VOL_MODE_HP BIT(0) 66 67 68 #define ADAU1761_FIRMWARE "adau1761.bin" 69 70 static const struct reg_default adau1761_reg_defaults[] = { 71 { ADAU1761_DEJITTER, 0x03 }, 72 { ADAU1761_DIGMIC_JACKDETECT, 0x00 }, 73 { ADAU1761_REC_MIXER_LEFT0, 0x00 }, 74 { ADAU1761_REC_MIXER_LEFT1, 0x00 }, 75 { ADAU1761_REC_MIXER_RIGHT0, 0x00 }, 76 { ADAU1761_REC_MIXER_RIGHT1, 0x00 }, 77 { ADAU1761_LEFT_DIFF_INPUT_VOL, 0x00 }, 78 { ADAU1761_ALC_CTRL0, 0x00 }, 79 { ADAU1761_ALC_CTRL1, 0x00 }, 80 { ADAU1761_ALC_CTRL2, 0x00 }, 81 { ADAU1761_ALC_CTRL3, 0x00 }, 82 { ADAU1761_RIGHT_DIFF_INPUT_VOL, 0x00 }, 83 { ADAU1761_PLAY_LR_MIXER_LEFT, 0x00 }, 84 { ADAU1761_PLAY_MIXER_LEFT0, 0x00 }, 85 { ADAU1761_PLAY_MIXER_LEFT1, 0x00 }, 86 { ADAU1761_PLAY_MIXER_RIGHT0, 0x00 }, 87 { ADAU1761_PLAY_MIXER_RIGHT1, 0x00 }, 88 { ADAU1761_PLAY_LR_MIXER_RIGHT, 0x00 }, 89 { ADAU1761_PLAY_MIXER_MONO, 0x00 }, 90 { ADAU1761_PLAY_HP_LEFT_VOL, 0x00 }, 91 { ADAU1761_PLAY_HP_RIGHT_VOL, 0x00 }, 92 { ADAU1761_PLAY_LINE_LEFT_VOL, 0x00 }, 93 { ADAU1761_PLAY_LINE_RIGHT_VOL, 0x00 }, 94 { ADAU1761_PLAY_MONO_OUTPUT_VOL, 0x00 }, 95 { ADAU1761_POP_CLICK_SUPPRESS, 0x00 }, 96 { ADAU1761_JACK_DETECT_PIN, 0x00 }, 97 { ADAU1761_CLK_ENABLE0, 0x00 }, 98 { ADAU1761_CLK_ENABLE1, 0x00 }, 99 { ADAU17X1_CLOCK_CONTROL, 0x00 }, 100 { ADAU17X1_PLL_CONTROL, 0x00 }, 101 { ADAU17X1_REC_POWER_MGMT, 0x00 }, 102 { ADAU17X1_MICBIAS, 0x00 }, 103 { ADAU17X1_SERIAL_PORT0, 0x00 }, 104 { ADAU17X1_SERIAL_PORT1, 0x00 }, 105 { ADAU17X1_CONVERTER0, 0x00 }, 106 { ADAU17X1_CONVERTER1, 0x00 }, 107 { ADAU17X1_LEFT_INPUT_DIGITAL_VOL, 0x00 }, 108 { ADAU17X1_RIGHT_INPUT_DIGITAL_VOL, 0x00 }, 109 { ADAU17X1_ADC_CONTROL, 0x00 }, 110 { ADAU17X1_PLAY_POWER_MGMT, 0x00 }, 111 { ADAU17X1_DAC_CONTROL0, 0x00 }, 112 { ADAU17X1_DAC_CONTROL1, 0x00 }, 113 { ADAU17X1_DAC_CONTROL2, 0x00 }, 114 { ADAU17X1_SERIAL_PORT_PAD, 0xaa }, 115 { ADAU17X1_CONTROL_PORT_PAD0, 0xaa }, 116 { ADAU17X1_CONTROL_PORT_PAD1, 0x00 }, 117 { ADAU17X1_DSP_SAMPLING_RATE, 0x01 }, 118 { ADAU17X1_SERIAL_INPUT_ROUTE, 0x00 }, 119 { ADAU17X1_SERIAL_OUTPUT_ROUTE, 0x00 }, 120 { ADAU17X1_DSP_ENABLE, 0x00 }, 121 { ADAU17X1_DSP_RUN, 0x00 }, 122 { ADAU17X1_SERIAL_SAMPLING_RATE, 0x00 }, 123 }; 124 125 static const DECLARE_TLV_DB_SCALE(adau1761_sing_in_tlv, -1500, 300, 1); 126 static const DECLARE_TLV_DB_SCALE(adau1761_diff_in_tlv, -1200, 75, 0); 127 static const DECLARE_TLV_DB_SCALE(adau1761_out_tlv, -5700, 100, 0); 128 static const DECLARE_TLV_DB_SCALE(adau1761_sidetone_tlv, -1800, 300, 1); 129 static const DECLARE_TLV_DB_SCALE(adau1761_boost_tlv, -600, 600, 1); 130 static const DECLARE_TLV_DB_SCALE(adau1761_pga_boost_tlv, -2000, 2000, 1); 131 132 static const DECLARE_TLV_DB_SCALE(adau1761_alc_max_gain_tlv, -1200, 600, 0); 133 static const DECLARE_TLV_DB_SCALE(adau1761_alc_target_tlv, -2850, 150, 0); 134 static const DECLARE_TLV_DB_SCALE(adau1761_alc_ng_threshold_tlv, -7650, 150, 0); 135 136 static const unsigned int adau1761_bias_select_values[] = { 137 0, 2, 3, 138 }; 139 140 static const char * const adau1761_bias_select_text[] = { 141 "Normal operation", "Enhanced performance", "Power saving", 142 }; 143 144 static const char * const adau1761_bias_select_extreme_text[] = { 145 "Normal operation", "Extreme power saving", "Enhanced performance", 146 "Power saving", 147 }; 148 149 static SOC_ENUM_SINGLE_DECL(adau1761_adc_bias_enum, 150 ADAU17X1_REC_POWER_MGMT, 3, adau1761_bias_select_extreme_text); 151 static SOC_ENUM_SINGLE_DECL(adau1761_hp_bias_enum, 152 ADAU17X1_PLAY_POWER_MGMT, 6, adau1761_bias_select_extreme_text); 153 static SOC_ENUM_SINGLE_DECL(adau1761_dac_bias_enum, 154 ADAU17X1_PLAY_POWER_MGMT, 4, adau1761_bias_select_extreme_text); 155 static SOC_VALUE_ENUM_SINGLE_DECL(adau1761_playback_bias_enum, 156 ADAU17X1_PLAY_POWER_MGMT, 2, 0x3, adau1761_bias_select_text, 157 adau1761_bias_select_values); 158 static SOC_VALUE_ENUM_SINGLE_DECL(adau1761_capture_bias_enum, 159 ADAU17X1_REC_POWER_MGMT, 1, 0x3, adau1761_bias_select_text, 160 adau1761_bias_select_values); 161 162 static const unsigned int adau1761_pga_slew_time_values[] = { 163 3, 0, 1, 2, 164 }; 165 166 static const char * const adau1761_pga_slew_time_text[] = { 167 "Off", 168 "24 ms", 169 "48 ms", 170 "96 ms", 171 }; 172 173 static const char * const adau1761_alc_function_text[] = { 174 "Off", 175 "Right", 176 "Left", 177 "Stereo", 178 "DSP control", 179 }; 180 181 static const char * const adau1761_alc_hold_time_text[] = { 182 "2.67 ms", 183 "5.34 ms", 184 "10.68 ms", 185 "21.36 ms", 186 "42.72 ms", 187 "85.44 ms", 188 "170.88 ms", 189 "341.76 ms", 190 "683.52 ms", 191 "1367 ms", 192 "2734.1 ms", 193 "5468.2 ms", 194 "10936 ms", 195 "21873 ms", 196 "43745 ms", 197 "87491 ms", 198 }; 199 200 static const char * const adau1761_alc_attack_time_text[] = { 201 "6 ms", 202 "12 ms", 203 "24 ms", 204 "48 ms", 205 "96 ms", 206 "192 ms", 207 "384 ms", 208 "768 ms", 209 "1540 ms", 210 "3070 ms", 211 "6140 ms", 212 "12290 ms", 213 "24580 ms", 214 "49150 ms", 215 "98300 ms", 216 "196610 ms", 217 }; 218 219 static const char * const adau1761_alc_decay_time_text[] = { 220 "24 ms", 221 "48 ms", 222 "96 ms", 223 "192 ms", 224 "384 ms", 225 "768 ms", 226 "15400 ms", 227 "30700 ms", 228 "61400 ms", 229 "12290 ms", 230 "24580 ms", 231 "49150 ms", 232 "98300 ms", 233 "196610 ms", 234 "393220 ms", 235 "786430 ms", 236 }; 237 238 static const char * const adau1761_alc_ng_type_text[] = { 239 "Hold", 240 "Mute", 241 "Fade", 242 "Fade + Mute", 243 }; 244 245 static SOC_VALUE_ENUM_SINGLE_DECL(adau1761_pga_slew_time_enum, 246 ADAU1761_ALC_CTRL0, 6, 0x3, adau1761_pga_slew_time_text, 247 adau1761_pga_slew_time_values); 248 static SOC_ENUM_SINGLE_DECL(adau1761_alc_function_enum, 249 ADAU1761_ALC_CTRL0, 0, adau1761_alc_function_text); 250 static SOC_ENUM_SINGLE_DECL(adau1761_alc_hold_time_enum, 251 ADAU1761_ALC_CTRL1, 4, adau1761_alc_hold_time_text); 252 static SOC_ENUM_SINGLE_DECL(adau1761_alc_attack_time_enum, 253 ADAU1761_ALC_CTRL2, 4, adau1761_alc_attack_time_text); 254 static SOC_ENUM_SINGLE_DECL(adau1761_alc_decay_time_enum, 255 ADAU1761_ALC_CTRL2, 0, adau1761_alc_decay_time_text); 256 static SOC_ENUM_SINGLE_DECL(adau1761_alc_ng_type_enum, 257 ADAU1761_ALC_CTRL3, 6, adau1761_alc_ng_type_text); 258 259 static const struct snd_kcontrol_new adau1761_jack_detect_controls[] = { 260 SOC_SINGLE("Speaker Auto-mute Switch", ADAU1761_DIGMIC_JACKDETECT, 261 4, 1, 0), 262 }; 263 264 static const struct snd_kcontrol_new adau1761_differential_mode_controls[] = { 265 SOC_DOUBLE_R_TLV("Capture Volume", ADAU1761_LEFT_DIFF_INPUT_VOL, 266 ADAU1761_RIGHT_DIFF_INPUT_VOL, 2, 0x3f, 0, 267 adau1761_diff_in_tlv), 268 SOC_DOUBLE_R("Capture Switch", ADAU1761_LEFT_DIFF_INPUT_VOL, 269 ADAU1761_RIGHT_DIFF_INPUT_VOL, 1, 1, 0), 270 271 SOC_DOUBLE_R_TLV("PGA Boost Capture Volume", ADAU1761_REC_MIXER_LEFT1, 272 ADAU1761_REC_MIXER_RIGHT1, 3, 2, 0, adau1761_pga_boost_tlv), 273 274 SOC_ENUM("PGA Capture Slew Time", adau1761_pga_slew_time_enum), 275 276 SOC_SINGLE_TLV("ALC Capture Max Gain Volume", ADAU1761_ALC_CTRL0, 277 3, 7, 0, adau1761_alc_max_gain_tlv), 278 SOC_ENUM("ALC Capture Function", adau1761_alc_function_enum), 279 SOC_ENUM("ALC Capture Hold Time", adau1761_alc_hold_time_enum), 280 SOC_SINGLE_TLV("ALC Capture Target Volume", ADAU1761_ALC_CTRL1, 281 0, 15, 0, adau1761_alc_target_tlv), 282 SOC_ENUM("ALC Capture Attack Time", adau1761_alc_decay_time_enum), 283 SOC_ENUM("ALC Capture Decay Time", adau1761_alc_attack_time_enum), 284 SOC_ENUM("ALC Capture Noise Gate Type", adau1761_alc_ng_type_enum), 285 SOC_SINGLE("ALC Capture Noise Gate Switch", 286 ADAU1761_ALC_CTRL3, 5, 1, 0), 287 SOC_SINGLE_TLV("ALC Capture Noise Gate Threshold Volume", 288 ADAU1761_ALC_CTRL3, 0, 31, 0, adau1761_alc_ng_threshold_tlv), 289 }; 290 291 static const struct snd_kcontrol_new adau1761_single_mode_controls[] = { 292 SOC_SINGLE_TLV("Input 1 Capture Volume", ADAU1761_REC_MIXER_LEFT0, 293 4, 7, 0, adau1761_sing_in_tlv), 294 SOC_SINGLE_TLV("Input 2 Capture Volume", ADAU1761_REC_MIXER_LEFT0, 295 1, 7, 0, adau1761_sing_in_tlv), 296 SOC_SINGLE_TLV("Input 3 Capture Volume", ADAU1761_REC_MIXER_RIGHT0, 297 4, 7, 0, adau1761_sing_in_tlv), 298 SOC_SINGLE_TLV("Input 4 Capture Volume", ADAU1761_REC_MIXER_RIGHT0, 299 1, 7, 0, adau1761_sing_in_tlv), 300 }; 301 302 static const struct snd_kcontrol_new adau1761_controls[] = { 303 SOC_DOUBLE_R_TLV("Aux Capture Volume", ADAU1761_REC_MIXER_LEFT1, 304 ADAU1761_REC_MIXER_RIGHT1, 0, 7, 0, adau1761_sing_in_tlv), 305 306 SOC_DOUBLE_R_TLV("Headphone Playback Volume", ADAU1761_PLAY_HP_LEFT_VOL, 307 ADAU1761_PLAY_HP_RIGHT_VOL, 2, 0x3f, 0, adau1761_out_tlv), 308 SOC_DOUBLE_R("Headphone Playback Switch", ADAU1761_PLAY_HP_LEFT_VOL, 309 ADAU1761_PLAY_HP_RIGHT_VOL, 1, 1, 0), 310 SOC_DOUBLE_R_TLV("Lineout Playback Volume", ADAU1761_PLAY_LINE_LEFT_VOL, 311 ADAU1761_PLAY_LINE_RIGHT_VOL, 2, 0x3f, 0, adau1761_out_tlv), 312 SOC_DOUBLE_R("Lineout Playback Switch", ADAU1761_PLAY_LINE_LEFT_VOL, 313 ADAU1761_PLAY_LINE_RIGHT_VOL, 1, 1, 0), 314 315 SOC_ENUM("ADC Bias", adau1761_adc_bias_enum), 316 SOC_ENUM("DAC Bias", adau1761_dac_bias_enum), 317 SOC_ENUM("Capture Bias", adau1761_capture_bias_enum), 318 SOC_ENUM("Playback Bias", adau1761_playback_bias_enum), 319 SOC_ENUM("Headphone Bias", adau1761_hp_bias_enum), 320 }; 321 322 static const struct snd_kcontrol_new adau1761_mono_controls[] = { 323 SOC_SINGLE_TLV("Mono Playback Volume", ADAU1761_PLAY_MONO_OUTPUT_VOL, 324 2, 0x3f, 0, adau1761_out_tlv), 325 SOC_SINGLE("Mono Playback Switch", ADAU1761_PLAY_MONO_OUTPUT_VOL, 326 1, 1, 0), 327 }; 328 329 static const struct snd_kcontrol_new adau1761_left_mixer_controls[] = { 330 SOC_DAPM_SINGLE_AUTODISABLE("Left DAC Switch", 331 ADAU1761_PLAY_MIXER_LEFT0, 5, 1, 0), 332 SOC_DAPM_SINGLE_AUTODISABLE("Right DAC Switch", 333 ADAU1761_PLAY_MIXER_LEFT0, 6, 1, 0), 334 SOC_DAPM_SINGLE_TLV("Aux Bypass Volume", 335 ADAU1761_PLAY_MIXER_LEFT0, 1, 8, 0, adau1761_sidetone_tlv), 336 SOC_DAPM_SINGLE_TLV("Right Bypass Volume", 337 ADAU1761_PLAY_MIXER_LEFT1, 4, 8, 0, adau1761_sidetone_tlv), 338 SOC_DAPM_SINGLE_TLV("Left Bypass Volume", 339 ADAU1761_PLAY_MIXER_LEFT1, 0, 8, 0, adau1761_sidetone_tlv), 340 }; 341 342 static const struct snd_kcontrol_new adau1761_right_mixer_controls[] = { 343 SOC_DAPM_SINGLE_AUTODISABLE("Left DAC Switch", 344 ADAU1761_PLAY_MIXER_RIGHT0, 5, 1, 0), 345 SOC_DAPM_SINGLE_AUTODISABLE("Right DAC Switch", 346 ADAU1761_PLAY_MIXER_RIGHT0, 6, 1, 0), 347 SOC_DAPM_SINGLE_TLV("Aux Bypass Volume", 348 ADAU1761_PLAY_MIXER_RIGHT0, 1, 8, 0, adau1761_sidetone_tlv), 349 SOC_DAPM_SINGLE_TLV("Right Bypass Volume", 350 ADAU1761_PLAY_MIXER_RIGHT1, 4, 8, 0, adau1761_sidetone_tlv), 351 SOC_DAPM_SINGLE_TLV("Left Bypass Volume", 352 ADAU1761_PLAY_MIXER_RIGHT1, 0, 8, 0, adau1761_sidetone_tlv), 353 }; 354 355 static const struct snd_kcontrol_new adau1761_left_lr_mixer_controls[] = { 356 SOC_DAPM_SINGLE_TLV("Left Volume", 357 ADAU1761_PLAY_LR_MIXER_LEFT, 1, 2, 0, adau1761_boost_tlv), 358 SOC_DAPM_SINGLE_TLV("Right Volume", 359 ADAU1761_PLAY_LR_MIXER_LEFT, 3, 2, 0, adau1761_boost_tlv), 360 }; 361 362 static const struct snd_kcontrol_new adau1761_right_lr_mixer_controls[] = { 363 SOC_DAPM_SINGLE_TLV("Left Volume", 364 ADAU1761_PLAY_LR_MIXER_RIGHT, 1, 2, 0, adau1761_boost_tlv), 365 SOC_DAPM_SINGLE_TLV("Right Volume", 366 ADAU1761_PLAY_LR_MIXER_RIGHT, 3, 2, 0, adau1761_boost_tlv), 367 }; 368 369 static const char * const adau1761_input_mux_text[] = { 370 "ADC", "DMIC", 371 }; 372 373 static SOC_ENUM_SINGLE_DECL(adau1761_input_mux_enum, 374 ADAU17X1_ADC_CONTROL, 2, adau1761_input_mux_text); 375 376 static const struct snd_kcontrol_new adau1761_input_mux_control = 377 SOC_DAPM_ENUM("Input Select", adau1761_input_mux_enum); 378 379 static int adau1761_dejitter_fixup(struct snd_soc_dapm_widget *w, 380 struct snd_kcontrol *kcontrol, int event) 381 { 382 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 383 struct adau *adau = snd_soc_component_get_drvdata(component); 384 385 /* After any power changes have been made the dejitter circuit 386 * has to be reinitialized. */ 387 regmap_write(adau->regmap, ADAU1761_DEJITTER, 0); 388 if (!adau->master) 389 regmap_write(adau->regmap, ADAU1761_DEJITTER, 3); 390 391 return 0; 392 } 393 394 static const struct snd_soc_dapm_widget adau1x61_dapm_widgets[] = { 395 SND_SOC_DAPM_MIXER("Left Input Mixer", ADAU1761_REC_MIXER_LEFT0, 0, 0, 396 NULL, 0), 397 SND_SOC_DAPM_MIXER("Right Input Mixer", ADAU1761_REC_MIXER_RIGHT0, 0, 0, 398 NULL, 0), 399 400 SOC_MIXER_ARRAY("Left Playback Mixer", ADAU1761_PLAY_MIXER_LEFT0, 401 0, 0, adau1761_left_mixer_controls), 402 SOC_MIXER_ARRAY("Right Playback Mixer", ADAU1761_PLAY_MIXER_RIGHT0, 403 0, 0, adau1761_right_mixer_controls), 404 SOC_MIXER_ARRAY("Left LR Playback Mixer", ADAU1761_PLAY_LR_MIXER_LEFT, 405 0, 0, adau1761_left_lr_mixer_controls), 406 SOC_MIXER_ARRAY("Right LR Playback Mixer", ADAU1761_PLAY_LR_MIXER_RIGHT, 407 0, 0, adau1761_right_lr_mixer_controls), 408 409 SND_SOC_DAPM_SUPPLY("Headphone", ADAU1761_PLAY_HP_LEFT_VOL, 410 0, 0, NULL, 0), 411 412 SND_SOC_DAPM_SUPPLY_S("SYSCLK", 2, SND_SOC_NOPM, 0, 0, NULL, 0), 413 414 SND_SOC_DAPM_POST("Dejitter fixup", adau1761_dejitter_fixup), 415 416 SND_SOC_DAPM_INPUT("LAUX"), 417 SND_SOC_DAPM_INPUT("RAUX"), 418 SND_SOC_DAPM_INPUT("LINP"), 419 SND_SOC_DAPM_INPUT("LINN"), 420 SND_SOC_DAPM_INPUT("RINP"), 421 SND_SOC_DAPM_INPUT("RINN"), 422 423 SND_SOC_DAPM_OUTPUT("LOUT"), 424 SND_SOC_DAPM_OUTPUT("ROUT"), 425 SND_SOC_DAPM_OUTPUT("LHP"), 426 SND_SOC_DAPM_OUTPUT("RHP"), 427 }; 428 429 static const struct snd_soc_dapm_widget adau1761_mono_dapm_widgets[] = { 430 SND_SOC_DAPM_MIXER("Mono Playback Mixer", ADAU1761_PLAY_MIXER_MONO, 431 0, 0, NULL, 0), 432 433 SND_SOC_DAPM_OUTPUT("MONOOUT"), 434 }; 435 436 static const struct snd_soc_dapm_widget adau1761_capless_dapm_widgets[] = { 437 SND_SOC_DAPM_SUPPLY_S("Headphone VGND", 1, ADAU1761_PLAY_MIXER_MONO, 438 0, 0, NULL, 0), 439 }; 440 441 static const struct snd_soc_dapm_route adau1x61_dapm_routes[] = { 442 { "Left Input Mixer", NULL, "LINP" }, 443 { "Left Input Mixer", NULL, "LINN" }, 444 { "Left Input Mixer", NULL, "LAUX" }, 445 446 { "Right Input Mixer", NULL, "RINP" }, 447 { "Right Input Mixer", NULL, "RINN" }, 448 { "Right Input Mixer", NULL, "RAUX" }, 449 450 { "Left Playback Mixer", NULL, "Left Playback Enable"}, 451 { "Right Playback Mixer", NULL, "Right Playback Enable"}, 452 { "Left LR Playback Mixer", NULL, "Left Playback Enable"}, 453 { "Right LR Playback Mixer", NULL, "Right Playback Enable"}, 454 455 { "Left Playback Mixer", "Left DAC Switch", "Left DAC" }, 456 { "Left Playback Mixer", "Right DAC Switch", "Right DAC" }, 457 458 { "Right Playback Mixer", "Left DAC Switch", "Left DAC" }, 459 { "Right Playback Mixer", "Right DAC Switch", "Right DAC" }, 460 461 { "Left LR Playback Mixer", "Left Volume", "Left Playback Mixer" }, 462 { "Left LR Playback Mixer", "Right Volume", "Right Playback Mixer" }, 463 464 { "Right LR Playback Mixer", "Left Volume", "Left Playback Mixer" }, 465 { "Right LR Playback Mixer", "Right Volume", "Right Playback Mixer" }, 466 467 { "LHP", NULL, "Left Playback Mixer" }, 468 { "RHP", NULL, "Right Playback Mixer" }, 469 470 { "LHP", NULL, "Headphone" }, 471 { "RHP", NULL, "Headphone" }, 472 473 { "LOUT", NULL, "Left LR Playback Mixer" }, 474 { "ROUT", NULL, "Right LR Playback Mixer" }, 475 476 { "Left Playback Mixer", "Aux Bypass Volume", "LAUX" }, 477 { "Left Playback Mixer", "Left Bypass Volume", "Left Input Mixer" }, 478 { "Left Playback Mixer", "Right Bypass Volume", "Right Input Mixer" }, 479 { "Right Playback Mixer", "Aux Bypass Volume", "RAUX" }, 480 { "Right Playback Mixer", "Left Bypass Volume", "Left Input Mixer" }, 481 { "Right Playback Mixer", "Right Bypass Volume", "Right Input Mixer" }, 482 }; 483 484 static const struct snd_soc_dapm_route adau1761_mono_dapm_routes[] = { 485 { "Mono Playback Mixer", NULL, "Left Playback Mixer" }, 486 { "Mono Playback Mixer", NULL, "Right Playback Mixer" }, 487 488 { "MONOOUT", NULL, "Mono Playback Mixer" }, 489 }; 490 491 static const struct snd_soc_dapm_route adau1761_capless_dapm_routes[] = { 492 { "Headphone", NULL, "Headphone VGND" }, 493 }; 494 495 static const struct snd_soc_dapm_widget adau1761_dmic_widgets[] = { 496 SND_SOC_DAPM_MUX("Left Decimator Mux", SND_SOC_NOPM, 0, 0, 497 &adau1761_input_mux_control), 498 SND_SOC_DAPM_MUX("Right Decimator Mux", SND_SOC_NOPM, 0, 0, 499 &adau1761_input_mux_control), 500 501 SND_SOC_DAPM_INPUT("DMIC"), 502 }; 503 504 static const struct snd_soc_dapm_route adau1761_dmic_routes[] = { 505 { "Left Decimator Mux", "ADC", "Left Input Mixer" }, 506 { "Left Decimator Mux", "DMIC", "DMIC" }, 507 { "Right Decimator Mux", "ADC", "Right Input Mixer" }, 508 { "Right Decimator Mux", "DMIC", "DMIC" }, 509 510 { "Left Decimator", NULL, "Left Decimator Mux" }, 511 { "Right Decimator", NULL, "Right Decimator Mux" }, 512 }; 513 514 static const struct snd_soc_dapm_route adau1761_no_dmic_routes[] = { 515 { "Left Decimator", NULL, "Left Input Mixer" }, 516 { "Right Decimator", NULL, "Right Input Mixer" }, 517 }; 518 519 static const struct snd_soc_dapm_widget adau1761_dapm_widgets[] = { 520 SND_SOC_DAPM_SUPPLY("Serial Port Clock", ADAU1761_CLK_ENABLE0, 521 0, 0, NULL, 0), 522 SND_SOC_DAPM_SUPPLY("Serial Input Routing Clock", ADAU1761_CLK_ENABLE0, 523 1, 0, NULL, 0), 524 SND_SOC_DAPM_SUPPLY("Serial Output Routing Clock", ADAU1761_CLK_ENABLE0, 525 3, 0, NULL, 0), 526 527 SND_SOC_DAPM_SUPPLY("Decimator Resync Clock", ADAU1761_CLK_ENABLE0, 528 4, 0, NULL, 0), 529 SND_SOC_DAPM_SUPPLY("Interpolator Resync Clock", ADAU1761_CLK_ENABLE0, 530 2, 0, NULL, 0), 531 532 SND_SOC_DAPM_SUPPLY("Slew Clock", ADAU1761_CLK_ENABLE0, 6, 0, NULL, 0), 533 SND_SOC_DAPM_SUPPLY("ALC Clock", ADAU1761_CLK_ENABLE0, 5, 0, NULL, 0), 534 535 SND_SOC_DAPM_SUPPLY_S("Digital Clock 0", 1, ADAU1761_CLK_ENABLE1, 536 0, 0, NULL, 0), 537 SND_SOC_DAPM_SUPPLY_S("Digital Clock 1", 1, ADAU1761_CLK_ENABLE1, 538 1, 0, NULL, 0), 539 }; 540 541 static const struct snd_soc_dapm_route adau1761_dapm_routes[] = { 542 { "Left Decimator", NULL, "Digital Clock 0", }, 543 { "Right Decimator", NULL, "Digital Clock 0", }, 544 { "Left DAC", NULL, "Digital Clock 0", }, 545 { "Right DAC", NULL, "Digital Clock 0", }, 546 547 { "AIFCLK", NULL, "Digital Clock 1" }, 548 549 { "Playback", NULL, "Serial Port Clock" }, 550 { "Capture", NULL, "Serial Port Clock" }, 551 { "Playback", NULL, "Serial Input Routing Clock" }, 552 { "Capture", NULL, "Serial Output Routing Clock" }, 553 554 { "Left Decimator", NULL, "Decimator Resync Clock" }, 555 { "Right Decimator", NULL, "Decimator Resync Clock" }, 556 { "Left DAC", NULL, "Interpolator Resync Clock" }, 557 { "Right DAC", NULL, "Interpolator Resync Clock" }, 558 559 { "Slew Clock", NULL, "Digital Clock 0" }, 560 { "Right Playback Mixer", NULL, "Slew Clock" }, 561 { "Left Playback Mixer", NULL, "Slew Clock" }, 562 563 { "Left Input Mixer", NULL, "ALC Clock" }, 564 { "Right Input Mixer", NULL, "ALC Clock" }, 565 566 { "Digital Clock 0", NULL, "SYSCLK" }, 567 { "Digital Clock 1", NULL, "SYSCLK" }, 568 }; 569 570 static const struct snd_soc_dapm_route adau1761_dapm_dsp_routes[] = { 571 { "DSP", NULL, "Digital Clock 0" }, 572 }; 573 574 static int adau1761_compatibility_probe(struct device *dev) 575 { 576 struct adau *adau = dev_get_drvdata(dev); 577 struct regmap *regmap = adau->regmap; 578 int val, ret = 0; 579 580 /* Only consider compatibility mode when ADAU1361 was specified. */ 581 if (adau->type != ADAU1361) 582 return 0; 583 584 regcache_cache_bypass(regmap, true); 585 586 /* 587 * This will enable the core clock and bypass the PLL, 588 * so that we can access the registers for probing purposes 589 * (without having to set up the PLL). 590 */ 591 regmap_write(regmap, ADAU17X1_CLOCK_CONTROL, 592 ADAU17X1_CLOCK_CONTROL_SYSCLK_EN); 593 594 /* 595 * ADAU17X1_SERIAL_SAMPLING_RATE doesn't exist in non-DSP chips; 596 * reading it results in zero at all times, and write is a no-op. 597 * Use this register to probe for ADAU1761. 598 */ 599 regmap_write(regmap, ADAU17X1_SERIAL_SAMPLING_RATE, 1); 600 ret = regmap_read(regmap, ADAU17X1_SERIAL_SAMPLING_RATE, &val); 601 if (ret) 602 goto exit; 603 if (val != 1) 604 goto exit; 605 regmap_write(regmap, ADAU17X1_SERIAL_SAMPLING_RATE, 0); 606 ret = regmap_read(regmap, ADAU17X1_SERIAL_SAMPLING_RATE, &val); 607 if (ret) 608 goto exit; 609 if (val != 0) 610 goto exit; 611 612 adau->type = ADAU1761_AS_1361; 613 exit: 614 /* Disable core clock after probing. */ 615 regmap_write(regmap, ADAU17X1_CLOCK_CONTROL, 0); 616 regcache_cache_bypass(regmap, false); 617 return ret; 618 } 619 620 static int adau1761_set_bias_level(struct snd_soc_component *component, 621 enum snd_soc_bias_level level) 622 { 623 struct adau *adau = snd_soc_component_get_drvdata(component); 624 625 switch (level) { 626 case SND_SOC_BIAS_ON: 627 break; 628 case SND_SOC_BIAS_PREPARE: 629 break; 630 case SND_SOC_BIAS_STANDBY: 631 regcache_cache_only(adau->regmap, false); 632 regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL, 633 ADAU17X1_CLOCK_CONTROL_SYSCLK_EN, 634 ADAU17X1_CLOCK_CONTROL_SYSCLK_EN); 635 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) 636 regcache_sync(adau->regmap); 637 break; 638 case SND_SOC_BIAS_OFF: 639 regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL, 640 ADAU17X1_CLOCK_CONTROL_SYSCLK_EN, 0); 641 regcache_cache_only(adau->regmap, true); 642 break; 643 644 } 645 return 0; 646 } 647 648 static enum adau1761_output_mode adau1761_get_lineout_mode( 649 struct snd_soc_component *component) 650 { 651 struct adau1761_platform_data *pdata = component->dev->platform_data; 652 653 if (pdata) 654 return pdata->lineout_mode; 655 656 return ADAU1761_OUTPUT_MODE_LINE; 657 } 658 659 static int adau1761_setup_digmic_jackdetect(struct snd_soc_component *component) 660 { 661 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component); 662 struct adau1761_platform_data *pdata = component->dev->platform_data; 663 struct adau *adau = snd_soc_component_get_drvdata(component); 664 enum adau1761_digmic_jackdet_pin_mode mode; 665 unsigned int val = 0; 666 int ret; 667 668 if (pdata) 669 mode = pdata->digmic_jackdetect_pin_mode; 670 else 671 mode = ADAU1761_DIGMIC_JACKDET_PIN_MODE_NONE; 672 673 switch (mode) { 674 case ADAU1761_DIGMIC_JACKDET_PIN_MODE_JACKDETECT: 675 switch (pdata->jackdetect_debounce_time) { 676 case ADAU1761_JACKDETECT_DEBOUNCE_5MS: 677 case ADAU1761_JACKDETECT_DEBOUNCE_10MS: 678 case ADAU1761_JACKDETECT_DEBOUNCE_20MS: 679 case ADAU1761_JACKDETECT_DEBOUNCE_40MS: 680 val |= pdata->jackdetect_debounce_time << 6; 681 break; 682 default: 683 return -EINVAL; 684 } 685 if (pdata->jackdetect_active_low) 686 val |= ADAU1761_DIGMIC_JACKDETECT_ACTIVE_LOW; 687 688 ret = snd_soc_add_component_controls(component, 689 adau1761_jack_detect_controls, 690 ARRAY_SIZE(adau1761_jack_detect_controls)); 691 if (ret) 692 return ret; 693 fallthrough; 694 case ADAU1761_DIGMIC_JACKDET_PIN_MODE_NONE: 695 ret = snd_soc_dapm_add_routes(dapm, adau1761_no_dmic_routes, 696 ARRAY_SIZE(adau1761_no_dmic_routes)); 697 if (ret) 698 return ret; 699 break; 700 case ADAU1761_DIGMIC_JACKDET_PIN_MODE_DIGMIC: 701 ret = snd_soc_dapm_new_controls(dapm, adau1761_dmic_widgets, 702 ARRAY_SIZE(adau1761_dmic_widgets)); 703 if (ret) 704 return ret; 705 706 ret = snd_soc_dapm_add_routes(dapm, adau1761_dmic_routes, 707 ARRAY_SIZE(adau1761_dmic_routes)); 708 if (ret) 709 return ret; 710 711 val |= ADAU1761_DIGMIC_JACKDETECT_DIGMIC; 712 break; 713 default: 714 return -EINVAL; 715 } 716 717 regmap_write(adau->regmap, ADAU1761_DIGMIC_JACKDETECT, val); 718 719 return 0; 720 } 721 722 static int adau1761_setup_headphone_mode(struct snd_soc_component *component) 723 { 724 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component); 725 struct adau *adau = snd_soc_component_get_drvdata(component); 726 struct adau1761_platform_data *pdata = component->dev->platform_data; 727 enum adau1761_output_mode mode; 728 int ret; 729 730 if (pdata) 731 mode = pdata->headphone_mode; 732 else 733 mode = ADAU1761_OUTPUT_MODE_HEADPHONE; 734 735 switch (mode) { 736 case ADAU1761_OUTPUT_MODE_LINE: 737 break; 738 case ADAU1761_OUTPUT_MODE_HEADPHONE_CAPLESS: 739 regmap_update_bits(adau->regmap, ADAU1761_PLAY_MONO_OUTPUT_VOL, 740 ADAU1761_PLAY_MONO_OUTPUT_VOL_MODE_HP | 741 ADAU1761_PLAY_MONO_OUTPUT_VOL_UNMUTE, 742 ADAU1761_PLAY_MONO_OUTPUT_VOL_MODE_HP | 743 ADAU1761_PLAY_MONO_OUTPUT_VOL_UNMUTE); 744 fallthrough; 745 case ADAU1761_OUTPUT_MODE_HEADPHONE: 746 regmap_update_bits(adau->regmap, ADAU1761_PLAY_HP_RIGHT_VOL, 747 ADAU1761_PLAY_HP_RIGHT_VOL_MODE_HP, 748 ADAU1761_PLAY_HP_RIGHT_VOL_MODE_HP); 749 break; 750 default: 751 return -EINVAL; 752 } 753 754 if (mode == ADAU1761_OUTPUT_MODE_HEADPHONE_CAPLESS) { 755 ret = snd_soc_dapm_new_controls(dapm, 756 adau1761_capless_dapm_widgets, 757 ARRAY_SIZE(adau1761_capless_dapm_widgets)); 758 if (ret) 759 return ret; 760 ret = snd_soc_dapm_add_routes(dapm, 761 adau1761_capless_dapm_routes, 762 ARRAY_SIZE(adau1761_capless_dapm_routes)); 763 } else { 764 ret = snd_soc_add_component_controls(component, adau1761_mono_controls, 765 ARRAY_SIZE(adau1761_mono_controls)); 766 if (ret) 767 return ret; 768 ret = snd_soc_dapm_new_controls(dapm, 769 adau1761_mono_dapm_widgets, 770 ARRAY_SIZE(adau1761_mono_dapm_widgets)); 771 if (ret) 772 return ret; 773 ret = snd_soc_dapm_add_routes(dapm, 774 adau1761_mono_dapm_routes, 775 ARRAY_SIZE(adau1761_mono_dapm_routes)); 776 } 777 778 return ret; 779 } 780 781 static bool adau1761_readable_register(struct device *dev, unsigned int reg) 782 { 783 switch (reg) { 784 case ADAU1761_DIGMIC_JACKDETECT: 785 case ADAU1761_REC_MIXER_LEFT0: 786 case ADAU1761_REC_MIXER_LEFT1: 787 case ADAU1761_REC_MIXER_RIGHT0: 788 case ADAU1761_REC_MIXER_RIGHT1: 789 case ADAU1761_LEFT_DIFF_INPUT_VOL: 790 case ADAU1761_RIGHT_DIFF_INPUT_VOL: 791 case ADAU1761_PLAY_LR_MIXER_LEFT: 792 case ADAU1761_PLAY_MIXER_LEFT0: 793 case ADAU1761_PLAY_MIXER_LEFT1: 794 case ADAU1761_PLAY_MIXER_RIGHT0: 795 case ADAU1761_PLAY_MIXER_RIGHT1: 796 case ADAU1761_PLAY_LR_MIXER_RIGHT: 797 case ADAU1761_PLAY_MIXER_MONO: 798 case ADAU1761_PLAY_HP_LEFT_VOL: 799 case ADAU1761_PLAY_HP_RIGHT_VOL: 800 case ADAU1761_PLAY_LINE_LEFT_VOL: 801 case ADAU1761_PLAY_LINE_RIGHT_VOL: 802 case ADAU1761_PLAY_MONO_OUTPUT_VOL: 803 case ADAU1761_POP_CLICK_SUPPRESS: 804 case ADAU1761_JACK_DETECT_PIN: 805 case ADAU1761_DEJITTER: 806 case ADAU1761_CLK_ENABLE0: 807 case ADAU1761_CLK_ENABLE1: 808 case ADAU1761_ALC_CTRL0: 809 case ADAU1761_ALC_CTRL1: 810 case ADAU1761_ALC_CTRL2: 811 case ADAU1761_ALC_CTRL3: 812 return true; 813 default: 814 break; 815 } 816 817 return adau17x1_readable_register(dev, reg); 818 } 819 820 static int adau1761_component_probe(struct snd_soc_component *component) 821 { 822 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component); 823 struct adau1761_platform_data *pdata = component->dev->platform_data; 824 struct adau *adau = snd_soc_component_get_drvdata(component); 825 int ret; 826 827 ret = adau17x1_add_widgets(component); 828 if (ret < 0) 829 return ret; 830 831 if (pdata && pdata->input_differential) { 832 regmap_update_bits(adau->regmap, ADAU1761_LEFT_DIFF_INPUT_VOL, 833 ADAU1761_DIFF_INPUT_VOL_LDEN, 834 ADAU1761_DIFF_INPUT_VOL_LDEN); 835 regmap_update_bits(adau->regmap, ADAU1761_RIGHT_DIFF_INPUT_VOL, 836 ADAU1761_DIFF_INPUT_VOL_LDEN, 837 ADAU1761_DIFF_INPUT_VOL_LDEN); 838 ret = snd_soc_add_component_controls(component, 839 adau1761_differential_mode_controls, 840 ARRAY_SIZE(adau1761_differential_mode_controls)); 841 if (ret) 842 return ret; 843 } else { 844 ret = snd_soc_add_component_controls(component, 845 adau1761_single_mode_controls, 846 ARRAY_SIZE(adau1761_single_mode_controls)); 847 if (ret) 848 return ret; 849 } 850 851 switch (adau1761_get_lineout_mode(component)) { 852 case ADAU1761_OUTPUT_MODE_LINE: 853 break; 854 case ADAU1761_OUTPUT_MODE_HEADPHONE: 855 regmap_update_bits(adau->regmap, ADAU1761_PLAY_LINE_LEFT_VOL, 856 ADAU1761_PLAY_LINE_LEFT_VOL_MODE_HP, 857 ADAU1761_PLAY_LINE_LEFT_VOL_MODE_HP); 858 regmap_update_bits(adau->regmap, ADAU1761_PLAY_LINE_RIGHT_VOL, 859 ADAU1761_PLAY_LINE_RIGHT_VOL_MODE_HP, 860 ADAU1761_PLAY_LINE_RIGHT_VOL_MODE_HP); 861 break; 862 default: 863 return -EINVAL; 864 } 865 866 ret = adau1761_setup_headphone_mode(component); 867 if (ret) 868 return ret; 869 870 ret = adau1761_setup_digmic_jackdetect(component); 871 if (ret) 872 return ret; 873 874 /* 875 * If we've got an ADAU1761, or an ADAU1761 operating as an 876 * ADAU1361, we need these non-DSP related DAPM widgets and routes. 877 */ 878 if (adau->type == ADAU1761 || adau->type == ADAU1761_AS_1361) { 879 ret = snd_soc_dapm_new_controls(dapm, adau1761_dapm_widgets, 880 ARRAY_SIZE(adau1761_dapm_widgets)); 881 if (ret) 882 return ret; 883 884 ret = snd_soc_dapm_add_routes(dapm, adau1761_dapm_routes, 885 ARRAY_SIZE(adau1761_dapm_routes)); 886 if (ret) 887 return ret; 888 } 889 /* 890 * These routes are DSP related and only used when we have a 891 * bona fide ADAU1761. 892 */ 893 if (adau->type == ADAU1761) { 894 ret = snd_soc_dapm_add_routes(dapm, adau1761_dapm_dsp_routes, 895 ARRAY_SIZE(adau1761_dapm_dsp_routes)); 896 if (ret) 897 return ret; 898 } 899 /* 900 * In the ADAU1761, by default, the AIF is routed to the DSP, whereas 901 * for the ADAU1361, the AIF is permanently routed to the ADC and DAC. 902 * Thus, if we have an ADAU1761 masquerading as an ADAU1361, 903 * we need to explicitly route the AIF to the ADC and DAC. 904 * For the ADAU1761, this is normally done by set_tdm_slot, but this 905 * function is not necessarily called during stream setup, so set up 906 * the compatible AIF routings here from the start. 907 */ 908 if (adau->type == ADAU1761_AS_1361) { 909 regmap_write(adau->regmap, ADAU17X1_SERIAL_INPUT_ROUTE, 0x01); 910 regmap_write(adau->regmap, ADAU17X1_SERIAL_OUTPUT_ROUTE, 0x01); 911 } 912 ret = adau17x1_add_routes(component); 913 if (ret < 0) 914 return ret; 915 916 return 0; 917 } 918 919 static const struct snd_soc_component_driver adau1761_component_driver = { 920 .probe = adau1761_component_probe, 921 .resume = adau17x1_resume, 922 .set_bias_level = adau1761_set_bias_level, 923 .controls = adau1761_controls, 924 .num_controls = ARRAY_SIZE(adau1761_controls), 925 .dapm_widgets = adau1x61_dapm_widgets, 926 .num_dapm_widgets = ARRAY_SIZE(adau1x61_dapm_widgets), 927 .dapm_routes = adau1x61_dapm_routes, 928 .num_dapm_routes = ARRAY_SIZE(adau1x61_dapm_routes), 929 .suspend_bias_off = 1, 930 .idle_bias_on = 1, 931 .use_pmdown_time = 1, 932 .endianness = 1, 933 }; 934 935 #define ADAU1761_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | \ 936 SNDRV_PCM_FMTBIT_S32_LE) 937 938 static struct snd_soc_dai_driver adau1361_dai_driver = { 939 .name = "adau-hifi", 940 .playback = { 941 .stream_name = "Playback", 942 .channels_min = 2, 943 .channels_max = 4, 944 .rates = SNDRV_PCM_RATE_8000_96000, 945 .formats = ADAU1761_FORMATS, 946 }, 947 .capture = { 948 .stream_name = "Capture", 949 .channels_min = 2, 950 .channels_max = 4, 951 .rates = SNDRV_PCM_RATE_8000_96000, 952 .formats = ADAU1761_FORMATS, 953 }, 954 .ops = &adau17x1_dai_ops, 955 }; 956 957 static struct snd_soc_dai_driver adau1761_dai_driver = { 958 .name = "adau-hifi", 959 .playback = { 960 .stream_name = "Playback", 961 .channels_min = 2, 962 .channels_max = 8, 963 .rates = SNDRV_PCM_RATE_8000_96000, 964 .formats = ADAU1761_FORMATS, 965 }, 966 .capture = { 967 .stream_name = "Capture", 968 .channels_min = 2, 969 .channels_max = 8, 970 .rates = SNDRV_PCM_RATE_8000_96000, 971 .formats = ADAU1761_FORMATS, 972 }, 973 .ops = &adau17x1_dai_ops, 974 }; 975 976 int adau1761_probe(struct device *dev, struct regmap *regmap, 977 enum adau17x1_type type, void (*switch_mode)(struct device *dev)) 978 { 979 struct snd_soc_dai_driver *dai_drv; 980 const char *firmware_name; 981 int ret; 982 983 if (type == ADAU1361) { 984 dai_drv = &adau1361_dai_driver; 985 firmware_name = NULL; 986 } else { 987 dai_drv = &adau1761_dai_driver; 988 firmware_name = ADAU1761_FIRMWARE; 989 } 990 991 ret = adau17x1_probe(dev, regmap, type, switch_mode, firmware_name); 992 if (ret) 993 return ret; 994 995 ret = adau1761_compatibility_probe(dev); 996 if (ret) 997 return ret; 998 999 /* Enable cache only mode as we could miss writes before bias level 1000 * reaches standby and the core clock is enabled */ 1001 regcache_cache_only(regmap, true); 1002 1003 return devm_snd_soc_register_component(dev, &adau1761_component_driver, 1004 dai_drv, 1); 1005 } 1006 EXPORT_SYMBOL_GPL(adau1761_probe); 1007 1008 const struct regmap_config adau1761_regmap_config = { 1009 .val_bits = 8, 1010 .reg_bits = 16, 1011 .max_register = 0x40fa, 1012 .reg_defaults = adau1761_reg_defaults, 1013 .num_reg_defaults = ARRAY_SIZE(adau1761_reg_defaults), 1014 .readable_reg = adau1761_readable_register, 1015 .volatile_reg = adau17x1_volatile_register, 1016 .precious_reg = adau17x1_precious_register, 1017 .cache_type = REGCACHE_RBTREE, 1018 }; 1019 EXPORT_SYMBOL_GPL(adau1761_regmap_config); 1020 1021 MODULE_DESCRIPTION("ASoC ADAU1361/ADAU1461/ADAU1761/ADAU1961 CODEC driver"); 1022 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>"); 1023 MODULE_LICENSE("GPL"); 1024