1 /* 2 * File: sound/soc/codecs/ad1836.c 3 * Author: Barry Song <Barry.Song@analog.com> 4 * 5 * Created: Aug 04 2009 6 * Description: Driver for AD1836 sound chip 7 * 8 * Modified: 9 * Copyright 2009 Analog Devices Inc. 10 * 11 * Bugs: Enter bugs at http://blackfin.uclinux.org/ 12 * 13 * This program is free software; you can redistribute it and/or modify 14 * it under the terms of the GNU General Public License as published by 15 * the Free Software Foundation; either version 2 of the License, or 16 * (at your option) any later version. 17 */ 18 19 #include <linux/init.h> 20 #include <linux/slab.h> 21 #include <linux/module.h> 22 #include <linux/kernel.h> 23 #include <linux/device.h> 24 #include <sound/core.h> 25 #include <sound/pcm.h> 26 #include <sound/pcm_params.h> 27 #include <sound/initval.h> 28 #include <sound/soc.h> 29 #include <sound/tlv.h> 30 #include <linux/spi/spi.h> 31 #include "ad1836.h" 32 33 /* codec private data */ 34 struct ad1836_priv { 35 enum snd_soc_control_type control_type; 36 void *control_data; 37 }; 38 39 /* 40 * AD1836 volume/mute/de-emphasis etc. controls 41 */ 42 static const char *ad1836_deemp[] = {"None", "44.1kHz", "32kHz", "48kHz"}; 43 44 static const struct soc_enum ad1836_deemp_enum = 45 SOC_ENUM_SINGLE(AD1836_DAC_CTRL1, 8, 4, ad1836_deemp); 46 47 static const struct snd_kcontrol_new ad1836_snd_controls[] = { 48 /* DAC volume control */ 49 SOC_DOUBLE_R("DAC1 Volume", AD1836_DAC_L1_VOL, 50 AD1836_DAC_R1_VOL, 0, 0x3FF, 0), 51 SOC_DOUBLE_R("DAC2 Volume", AD1836_DAC_L2_VOL, 52 AD1836_DAC_R2_VOL, 0, 0x3FF, 0), 53 SOC_DOUBLE_R("DAC3 Volume", AD1836_DAC_L3_VOL, 54 AD1836_DAC_R3_VOL, 0, 0x3FF, 0), 55 56 /* ADC switch control */ 57 SOC_DOUBLE("ADC1 Switch", AD1836_ADC_CTRL2, AD1836_ADCL1_MUTE, 58 AD1836_ADCR1_MUTE, 1, 1), 59 SOC_DOUBLE("ADC2 Switch", AD1836_ADC_CTRL2, AD1836_ADCL2_MUTE, 60 AD1836_ADCR2_MUTE, 1, 1), 61 62 /* DAC switch control */ 63 SOC_DOUBLE("DAC1 Switch", AD1836_DAC_CTRL2, AD1836_DACL1_MUTE, 64 AD1836_DACR1_MUTE, 1, 1), 65 SOC_DOUBLE("DAC2 Switch", AD1836_DAC_CTRL2, AD1836_DACL2_MUTE, 66 AD1836_DACR2_MUTE, 1, 1), 67 SOC_DOUBLE("DAC3 Switch", AD1836_DAC_CTRL2, AD1836_DACL3_MUTE, 68 AD1836_DACR3_MUTE, 1, 1), 69 70 /* ADC high-pass filter */ 71 SOC_SINGLE("ADC High Pass Filter Switch", AD1836_ADC_CTRL1, 72 AD1836_ADC_HIGHPASS_FILTER, 1, 0), 73 74 /* DAC de-emphasis */ 75 SOC_ENUM("Playback Deemphasis", ad1836_deemp_enum), 76 }; 77 78 static const struct snd_soc_dapm_widget ad1836_dapm_widgets[] = { 79 SND_SOC_DAPM_DAC("DAC", "Playback", AD1836_DAC_CTRL1, 80 AD1836_DAC_POWERDOWN, 1), 81 SND_SOC_DAPM_ADC("ADC", "Capture", SND_SOC_NOPM, 0, 0), 82 SND_SOC_DAPM_SUPPLY("ADC_PWR", AD1836_ADC_CTRL1, 83 AD1836_ADC_POWERDOWN, 1, NULL, 0), 84 SND_SOC_DAPM_OUTPUT("DAC1OUT"), 85 SND_SOC_DAPM_OUTPUT("DAC2OUT"), 86 SND_SOC_DAPM_OUTPUT("DAC3OUT"), 87 SND_SOC_DAPM_INPUT("ADC1IN"), 88 SND_SOC_DAPM_INPUT("ADC2IN"), 89 }; 90 91 static const struct snd_soc_dapm_route audio_paths[] = { 92 { "DAC", NULL, "ADC_PWR" }, 93 { "ADC", NULL, "ADC_PWR" }, 94 { "DAC1OUT", "DAC1 Switch", "DAC" }, 95 { "DAC2OUT", "DAC2 Switch", "DAC" }, 96 { "DAC3OUT", "DAC3 Switch", "DAC" }, 97 { "ADC", "ADC1 Switch", "ADC1IN" }, 98 { "ADC", "ADC2 Switch", "ADC2IN" }, 99 }; 100 101 /* 102 * DAI ops entries 103 */ 104 105 static int ad1836_set_dai_fmt(struct snd_soc_dai *codec_dai, 106 unsigned int fmt) 107 { 108 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 109 /* at present, we support adc aux mode to interface with 110 * blackfin sport tdm mode 111 */ 112 case SND_SOC_DAIFMT_DSP_A: 113 break; 114 default: 115 return -EINVAL; 116 } 117 118 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 119 case SND_SOC_DAIFMT_IB_IF: 120 break; 121 default: 122 return -EINVAL; 123 } 124 125 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 126 /* ALCLK,ABCLK are both output, AD1836 can only be master */ 127 case SND_SOC_DAIFMT_CBM_CFM: 128 break; 129 default: 130 return -EINVAL; 131 } 132 133 return 0; 134 } 135 136 static int ad1836_hw_params(struct snd_pcm_substream *substream, 137 struct snd_pcm_hw_params *params, 138 struct snd_soc_dai *dai) 139 { 140 int word_len = 0; 141 142 struct snd_soc_pcm_runtime *rtd = substream->private_data; 143 struct snd_soc_codec *codec = rtd->codec; 144 145 /* bit size */ 146 switch (params_format(params)) { 147 case SNDRV_PCM_FORMAT_S16_LE: 148 word_len = 3; 149 break; 150 case SNDRV_PCM_FORMAT_S20_3LE: 151 word_len = 1; 152 break; 153 case SNDRV_PCM_FORMAT_S24_LE: 154 case SNDRV_PCM_FORMAT_S32_LE: 155 word_len = 0; 156 break; 157 } 158 159 snd_soc_update_bits(codec, AD1836_DAC_CTRL1, 160 AD1836_DAC_WORD_LEN_MASK, word_len); 161 162 snd_soc_update_bits(codec, AD1836_ADC_CTRL2, 163 AD1836_ADC_WORD_LEN_MASK, word_len); 164 165 return 0; 166 } 167 168 #ifdef CONFIG_PM 169 static int ad1836_soc_suspend(struct snd_soc_codec *codec, 170 pm_message_t state) 171 { 172 /* reset clock control mode */ 173 u16 adc_ctrl2 = snd_soc_read(codec, AD1836_ADC_CTRL2); 174 adc_ctrl2 &= ~AD1836_ADC_SERFMT_MASK; 175 176 return snd_soc_write(codec, AD1836_ADC_CTRL2, adc_ctrl2); 177 } 178 179 static int ad1836_soc_resume(struct snd_soc_codec *codec) 180 { 181 /* restore clock control mode */ 182 u16 adc_ctrl2 = snd_soc_read(codec, AD1836_ADC_CTRL2); 183 adc_ctrl2 |= AD1836_ADC_AUX; 184 185 return snd_soc_write(codec, AD1836_ADC_CTRL2, adc_ctrl2); 186 } 187 #else 188 #define ad1836_soc_suspend NULL 189 #define ad1836_soc_resume NULL 190 #endif 191 192 static struct snd_soc_dai_ops ad1836_dai_ops = { 193 .hw_params = ad1836_hw_params, 194 .set_fmt = ad1836_set_dai_fmt, 195 }; 196 197 /* codec DAI instance */ 198 static struct snd_soc_dai_driver ad1836_dai = { 199 .name = "ad1836-hifi", 200 .playback = { 201 .stream_name = "Playback", 202 .channels_min = 2, 203 .channels_max = 6, 204 .rates = SNDRV_PCM_RATE_48000, 205 .formats = SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S16_LE | 206 SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S24_LE, 207 }, 208 .capture = { 209 .stream_name = "Capture", 210 .channels_min = 2, 211 .channels_max = 4, 212 .rates = SNDRV_PCM_RATE_48000, 213 .formats = SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S16_LE | 214 SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S24_LE, 215 }, 216 .ops = &ad1836_dai_ops, 217 }; 218 219 static int ad1836_probe(struct snd_soc_codec *codec) 220 { 221 struct ad1836_priv *ad1836 = snd_soc_codec_get_drvdata(codec); 222 struct snd_soc_dapm_context *dapm = &codec->dapm; 223 int ret = 0; 224 225 codec->control_data = ad1836->control_data; 226 ret = snd_soc_codec_set_cache_io(codec, 4, 12, SND_SOC_SPI); 227 if (ret < 0) { 228 dev_err(codec->dev, "failed to set cache I/O: %d\n", 229 ret); 230 return ret; 231 } 232 233 /* default setting for ad1836 */ 234 /* de-emphasis: 48kHz, power-on dac */ 235 snd_soc_write(codec, AD1836_DAC_CTRL1, 0x300); 236 /* unmute dac channels */ 237 snd_soc_write(codec, AD1836_DAC_CTRL2, 0x0); 238 /* high-pass filter enable, power-on adc */ 239 snd_soc_write(codec, AD1836_ADC_CTRL1, 0x100); 240 /* unmute adc channles, adc aux mode */ 241 snd_soc_write(codec, AD1836_ADC_CTRL2, 0x180); 242 /* left/right diff:PGA/MUX */ 243 snd_soc_write(codec, AD1836_ADC_CTRL3, 0x3A); 244 /* volume */ 245 snd_soc_write(codec, AD1836_DAC_L1_VOL, 0x3FF); 246 snd_soc_write(codec, AD1836_DAC_R1_VOL, 0x3FF); 247 snd_soc_write(codec, AD1836_DAC_L2_VOL, 0x3FF); 248 snd_soc_write(codec, AD1836_DAC_R2_VOL, 0x3FF); 249 snd_soc_write(codec, AD1836_DAC_L3_VOL, 0x3FF); 250 snd_soc_write(codec, AD1836_DAC_R3_VOL, 0x3FF); 251 252 snd_soc_add_controls(codec, ad1836_snd_controls, 253 ARRAY_SIZE(ad1836_snd_controls)); 254 snd_soc_dapm_new_controls(dapm, ad1836_dapm_widgets, 255 ARRAY_SIZE(ad1836_dapm_widgets)); 256 snd_soc_dapm_add_routes(dapm, audio_paths, ARRAY_SIZE(audio_paths)); 257 258 return ret; 259 } 260 261 /* power down chip */ 262 static int ad1836_remove(struct snd_soc_codec *codec) 263 { 264 /* reset clock control mode */ 265 u16 adc_ctrl2 = snd_soc_read(codec, AD1836_ADC_CTRL2); 266 adc_ctrl2 &= ~AD1836_ADC_SERFMT_MASK; 267 268 return snd_soc_write(codec, AD1836_ADC_CTRL2, adc_ctrl2); 269 } 270 271 static struct snd_soc_codec_driver soc_codec_dev_ad1836 = { 272 .probe = ad1836_probe, 273 .remove = ad1836_remove, 274 .suspend = ad1836_soc_suspend, 275 .resume = ad1836_soc_resume, 276 .reg_cache_size = AD1836_NUM_REGS, 277 .reg_word_size = sizeof(u16), 278 }; 279 280 static int __devinit ad1836_spi_probe(struct spi_device *spi) 281 { 282 struct ad1836_priv *ad1836; 283 int ret; 284 285 ad1836 = kzalloc(sizeof(struct ad1836_priv), GFP_KERNEL); 286 if (ad1836 == NULL) 287 return -ENOMEM; 288 289 spi_set_drvdata(spi, ad1836); 290 ad1836->control_data = spi; 291 ad1836->control_type = SND_SOC_SPI; 292 293 ret = snd_soc_register_codec(&spi->dev, 294 &soc_codec_dev_ad1836, &ad1836_dai, 1); 295 if (ret < 0) 296 kfree(ad1836); 297 return ret; 298 } 299 300 static int __devexit ad1836_spi_remove(struct spi_device *spi) 301 { 302 snd_soc_unregister_codec(&spi->dev); 303 kfree(spi_get_drvdata(spi)); 304 return 0; 305 } 306 307 static struct spi_driver ad1836_spi_driver = { 308 .driver = { 309 .name = "ad1836-codec", 310 .owner = THIS_MODULE, 311 }, 312 .probe = ad1836_spi_probe, 313 .remove = __devexit_p(ad1836_spi_remove), 314 }; 315 316 static int __init ad1836_init(void) 317 { 318 int ret; 319 320 ret = spi_register_driver(&ad1836_spi_driver); 321 if (ret != 0) { 322 printk(KERN_ERR "Failed to register ad1836 SPI driver: %d\n", 323 ret); 324 } 325 326 return ret; 327 } 328 module_init(ad1836_init); 329 330 static void __exit ad1836_exit(void) 331 { 332 spi_unregister_driver(&ad1836_spi_driver); 333 } 334 module_exit(ad1836_exit); 335 336 MODULE_DESCRIPTION("ASoC ad1836 driver"); 337 MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>"); 338 MODULE_LICENSE("GPL"); 339