1 /* 2 * Copyright (C) ST-Ericsson SA 2012 3 * 4 * Author: Ola Lilja <ola.o.lilja@stericsson.com>, 5 * Kristoffer Karlsson <kristoffer.karlsson@stericsson.com>, 6 * Roger Nilsson <roger.xr.nilsson@stericsson.com>, 7 * for ST-Ericsson. 8 * 9 * Based on the early work done by: 10 * Mikko J. Lehto <mikko.lehto@symbio.com>, 11 * Mikko Sarmanne <mikko.sarmanne@symbio.com>, 12 * for ST-Ericsson. 13 * 14 * License terms: 15 * 16 * This program is free software; you can redistribute it and/or modify it 17 * under the terms of the GNU General Public License version 2 as published 18 * by the Free Software Foundation. 19 */ 20 21 #ifndef AB8500_CODEC_REGISTERS_H 22 #define AB8500_CODEC_REGISTERS_H 23 24 #define AB8500_SUPPORTED_RATE (SNDRV_PCM_RATE_48000) 25 #define AB8500_SUPPORTED_FMT (SNDRV_PCM_FMTBIT_S16_LE) 26 27 /* AB8500 interface slot offset definitions */ 28 29 #define AB8500_AD_DATA0_OFFSET 0 30 #define AB8500_DA_DATA0_OFFSET 8 31 #define AB8500_AD_DATA1_OFFSET 16 32 #define AB8500_DA_DATA1_OFFSET 24 33 34 /* AB8500 audio bank (0x0d) register definitions */ 35 36 #define AB8500_POWERUP 0x00 37 #define AB8500_AUDSWRESET 0x01 38 #define AB8500_ADPATHENA 0x02 39 #define AB8500_DAPATHENA 0x03 40 #define AB8500_ANACONF1 0x04 41 #define AB8500_ANACONF2 0x05 42 #define AB8500_DIGMICCONF 0x06 43 #define AB8500_ANACONF3 0x07 44 #define AB8500_ANACONF4 0x08 45 #define AB8500_DAPATHCONF 0x09 46 #define AB8500_MUTECONF 0x0A 47 #define AB8500_SHORTCIRCONF 0x0B 48 #define AB8500_ANACONF5 0x0C 49 #define AB8500_ENVCPCONF 0x0D 50 #define AB8500_SIGENVCONF 0x0E 51 #define AB8500_PWMGENCONF1 0x0F 52 #define AB8500_PWMGENCONF2 0x10 53 #define AB8500_PWMGENCONF3 0x11 54 #define AB8500_PWMGENCONF4 0x12 55 #define AB8500_PWMGENCONF5 0x13 56 #define AB8500_ANAGAIN1 0x14 57 #define AB8500_ANAGAIN2 0x15 58 #define AB8500_ANAGAIN3 0x16 59 #define AB8500_ANAGAIN4 0x17 60 #define AB8500_DIGLINHSLGAIN 0x18 61 #define AB8500_DIGLINHSRGAIN 0x19 62 #define AB8500_ADFILTCONF 0x1A 63 #define AB8500_DIGIFCONF1 0x1B 64 #define AB8500_DIGIFCONF2 0x1C 65 #define AB8500_DIGIFCONF3 0x1D 66 #define AB8500_DIGIFCONF4 0x1E 67 #define AB8500_ADSLOTSEL1 0x1F 68 #define AB8500_ADSLOTSEL2 0x20 69 #define AB8500_ADSLOTSEL3 0x21 70 #define AB8500_ADSLOTSEL4 0x22 71 #define AB8500_ADSLOTSEL5 0x23 72 #define AB8500_ADSLOTSEL6 0x24 73 #define AB8500_ADSLOTSEL7 0x25 74 #define AB8500_ADSLOTSEL8 0x26 75 #define AB8500_ADSLOTSEL9 0x27 76 #define AB8500_ADSLOTSEL10 0x28 77 #define AB8500_ADSLOTSEL11 0x29 78 #define AB8500_ADSLOTSEL12 0x2A 79 #define AB8500_ADSLOTSEL13 0x2B 80 #define AB8500_ADSLOTSEL14 0x2C 81 #define AB8500_ADSLOTSEL15 0x2D 82 #define AB8500_ADSLOTSEL16 0x2E 83 #define AB8500_ADSLOTHIZCTRL1 0x2F 84 #define AB8500_ADSLOTHIZCTRL2 0x30 85 #define AB8500_ADSLOTHIZCTRL3 0x31 86 #define AB8500_ADSLOTHIZCTRL4 0x32 87 #define AB8500_DASLOTCONF1 0x33 88 #define AB8500_DASLOTCONF2 0x34 89 #define AB8500_DASLOTCONF3 0x35 90 #define AB8500_DASLOTCONF4 0x36 91 #define AB8500_DASLOTCONF5 0x37 92 #define AB8500_DASLOTCONF6 0x38 93 #define AB8500_DASLOTCONF7 0x39 94 #define AB8500_DASLOTCONF8 0x3A 95 #define AB8500_CLASSDCONF1 0x3B 96 #define AB8500_CLASSDCONF2 0x3C 97 #define AB8500_CLASSDCONF3 0x3D 98 #define AB8500_DMICFILTCONF 0x3E 99 #define AB8500_DIGMULTCONF1 0x3F 100 #define AB8500_DIGMULTCONF2 0x40 101 #define AB8500_ADDIGGAIN1 0x41 102 #define AB8500_ADDIGGAIN2 0x42 103 #define AB8500_ADDIGGAIN3 0x43 104 #define AB8500_ADDIGGAIN4 0x44 105 #define AB8500_ADDIGGAIN5 0x45 106 #define AB8500_ADDIGGAIN6 0x46 107 #define AB8500_DADIGGAIN1 0x47 108 #define AB8500_DADIGGAIN2 0x48 109 #define AB8500_DADIGGAIN3 0x49 110 #define AB8500_DADIGGAIN4 0x4A 111 #define AB8500_DADIGGAIN5 0x4B 112 #define AB8500_DADIGGAIN6 0x4C 113 #define AB8500_ADDIGLOOPGAIN1 0x4D 114 #define AB8500_ADDIGLOOPGAIN2 0x4E 115 #define AB8500_HSLEARDIGGAIN 0x4F 116 #define AB8500_HSRDIGGAIN 0x50 117 #define AB8500_SIDFIRGAIN1 0x51 118 #define AB8500_SIDFIRGAIN2 0x52 119 #define AB8500_ANCCONF1 0x53 120 #define AB8500_ANCCONF2 0x54 121 #define AB8500_ANCCONF3 0x55 122 #define AB8500_ANCCONF4 0x56 123 #define AB8500_ANCCONF5 0x57 124 #define AB8500_ANCCONF6 0x58 125 #define AB8500_ANCCONF7 0x59 126 #define AB8500_ANCCONF8 0x5A 127 #define AB8500_ANCCONF9 0x5B 128 #define AB8500_ANCCONF10 0x5C 129 #define AB8500_ANCCONF11 0x5D 130 #define AB8500_ANCCONF12 0x5E 131 #define AB8500_ANCCONF13 0x5F 132 #define AB8500_ANCCONF14 0x60 133 #define AB8500_SIDFIRADR 0x61 134 #define AB8500_SIDFIRCOEF1 0x62 135 #define AB8500_SIDFIRCOEF2 0x63 136 #define AB8500_SIDFIRCONF 0x64 137 #define AB8500_AUDINTMASK1 0x65 138 #define AB8500_AUDINTSOURCE1 0x66 139 #define AB8500_AUDINTMASK2 0x67 140 #define AB8500_AUDINTSOURCE2 0x68 141 #define AB8500_FIFOCONF1 0x69 142 #define AB8500_FIFOCONF2 0x6A 143 #define AB8500_FIFOCONF3 0x6B 144 #define AB8500_FIFOCONF4 0x6C 145 #define AB8500_FIFOCONF5 0x6D 146 #define AB8500_FIFOCONF6 0x6E 147 #define AB8500_AUDREV 0x6F 148 149 #define AB8500_FIRST_REG AB8500_POWERUP 150 #define AB8500_LAST_REG AB8500_AUDREV 151 #define AB8500_CACHEREGNUM (AB8500_LAST_REG + 1) 152 153 #define AB8500_MASK_ALL 0xFF 154 #define AB8500_MASK_NONE 0x00 155 156 /* AB8500_POWERUP */ 157 #define AB8500_POWERUP_POWERUP 7 158 #define AB8500_POWERUP_ENANA 3 159 160 /* AB8500_AUDSWRESET */ 161 #define AB8500_AUDSWRESET_SWRESET 7 162 163 /* AB8500_ADPATHENA */ 164 #define AB8500_ADPATHENA_ENAD12 7 165 #define AB8500_ADPATHENA_ENAD34 5 166 #define AB8500_ADPATHENA_ENAD5768 3 167 168 /* AB8500_DAPATHENA */ 169 #define AB8500_DAPATHENA_ENDA1 7 170 #define AB8500_DAPATHENA_ENDA2 6 171 #define AB8500_DAPATHENA_ENDA3 5 172 #define AB8500_DAPATHENA_ENDA4 4 173 #define AB8500_DAPATHENA_ENDA5 3 174 #define AB8500_DAPATHENA_ENDA6 2 175 176 /* AB8500_ANACONF1 */ 177 #define AB8500_ANACONF1_HSLOWPOW 7 178 #define AB8500_ANACONF1_DACLOWPOW1 6 179 #define AB8500_ANACONF1_DACLOWPOW0 5 180 #define AB8500_ANACONF1_EARDACLOWPOW 4 181 #define AB8500_ANACONF1_EARSELCM 2 182 #define AB8500_ANACONF1_HSHPEN 1 183 #define AB8500_ANACONF1_EARDRVLOWPOW 0 184 185 /* AB8500_ANACONF2 */ 186 #define AB8500_ANACONF2_ENMIC1 7 187 #define AB8500_ANACONF2_ENMIC2 6 188 #define AB8500_ANACONF2_ENLINL 5 189 #define AB8500_ANACONF2_ENLINR 4 190 #define AB8500_ANACONF2_MUTMIC1 3 191 #define AB8500_ANACONF2_MUTMIC2 2 192 #define AB8500_ANACONF2_MUTLINL 1 193 #define AB8500_ANACONF2_MUTLINR 0 194 195 /* AB8500_DIGMICCONF */ 196 #define AB8500_DIGMICCONF_ENDMIC1 7 197 #define AB8500_DIGMICCONF_ENDMIC2 6 198 #define AB8500_DIGMICCONF_ENDMIC3 5 199 #define AB8500_DIGMICCONF_ENDMIC4 4 200 #define AB8500_DIGMICCONF_ENDMIC5 3 201 #define AB8500_DIGMICCONF_ENDMIC6 2 202 #define AB8500_DIGMICCONF_HSFADSPEED 0 203 204 /* AB8500_ANACONF3 */ 205 #define AB8500_ANACONF3_MIC1SEL 7 206 #define AB8500_ANACONF3_LINRSEL 6 207 #define AB8500_ANACONF3_ENDRVHSL 5 208 #define AB8500_ANACONF3_ENDRVHSR 4 209 #define AB8500_ANACONF3_ENADCMIC 2 210 #define AB8500_ANACONF3_ENADCLINL 1 211 #define AB8500_ANACONF3_ENADCLINR 0 212 213 /* AB8500_ANACONF4 */ 214 #define AB8500_ANACONF4_DISPDVSS 7 215 #define AB8500_ANACONF4_ENEAR 6 216 #define AB8500_ANACONF4_ENHSL 5 217 #define AB8500_ANACONF4_ENHSR 4 218 #define AB8500_ANACONF4_ENHFL 3 219 #define AB8500_ANACONF4_ENHFR 2 220 #define AB8500_ANACONF4_ENVIB1 1 221 #define AB8500_ANACONF4_ENVIB2 0 222 223 /* AB8500_DAPATHCONF */ 224 #define AB8500_DAPATHCONF_ENDACEAR 6 225 #define AB8500_DAPATHCONF_ENDACHSL 5 226 #define AB8500_DAPATHCONF_ENDACHSR 4 227 #define AB8500_DAPATHCONF_ENDACHFL 3 228 #define AB8500_DAPATHCONF_ENDACHFR 2 229 #define AB8500_DAPATHCONF_ENDACVIB1 1 230 #define AB8500_DAPATHCONF_ENDACVIB2 0 231 232 /* AB8500_MUTECONF */ 233 #define AB8500_MUTECONF_MUTEAR 6 234 #define AB8500_MUTECONF_MUTHSL 5 235 #define AB8500_MUTECONF_MUTHSR 4 236 #define AB8500_MUTECONF_MUTDACEAR 2 237 #define AB8500_MUTECONF_MUTDACHSL 1 238 #define AB8500_MUTECONF_MUTDACHSR 0 239 240 /* AB8500_SHORTCIRCONF */ 241 #define AB8500_SHORTCIRCONF_ENSHORTPWD 7 242 #define AB8500_SHORTCIRCONF_EARSHORTDIS 6 243 #define AB8500_SHORTCIRCONF_HSSHORTDIS 5 244 #define AB8500_SHORTCIRCONF_HSPULLDEN 4 245 #define AB8500_SHORTCIRCONF_HSOSCEN 2 246 #define AB8500_SHORTCIRCONF_HSFADDIS 1 247 #define AB8500_SHORTCIRCONF_HSZCDDIS 0 248 /* Zero cross should be disabled */ 249 250 /* AB8500_ANACONF5 */ 251 #define AB8500_ANACONF5_ENCPHS 7 252 #define AB8500_ANACONF5_HSLDACTOLOL 5 253 #define AB8500_ANACONF5_HSRDACTOLOR 4 254 #define AB8500_ANACONF5_ENLOL 3 255 #define AB8500_ANACONF5_ENLOR 2 256 #define AB8500_ANACONF5_HSAUTOEN 0 257 258 /* AB8500_ENVCPCONF */ 259 #define AB8500_ENVCPCONF_ENVDETHTHRE 4 260 #define AB8500_ENVCPCONF_ENVDETLTHRE 0 261 #define AB8500_ENVCPCONF_ENVDETHTHRE_MAX 0x0F 262 #define AB8500_ENVCPCONF_ENVDETLTHRE_MAX 0x0F 263 264 /* AB8500_SIGENVCONF */ 265 #define AB8500_SIGENVCONF_CPLVEN 5 266 #define AB8500_SIGENVCONF_ENVDETCPEN 4 267 #define AB8500_SIGENVCONF_ENVDETTIME 0 268 #define AB8500_SIGENVCONF_ENVDETTIME_MAX 0x0F 269 270 /* AB8500_PWMGENCONF1 */ 271 #define AB8500_PWMGENCONF1_PWMTOVIB1 7 272 #define AB8500_PWMGENCONF1_PWMTOVIB2 6 273 #define AB8500_PWMGENCONF1_PWM1CTRL 5 274 #define AB8500_PWMGENCONF1_PWM2CTRL 4 275 #define AB8500_PWMGENCONF1_PWM1NCTRL 3 276 #define AB8500_PWMGENCONF1_PWM1PCTRL 2 277 #define AB8500_PWMGENCONF1_PWM2NCTRL 1 278 #define AB8500_PWMGENCONF1_PWM2PCTRL 0 279 280 /* AB8500_PWMGENCONF2 */ 281 /* AB8500_PWMGENCONF3 */ 282 /* AB8500_PWMGENCONF4 */ 283 /* AB8500_PWMGENCONF5 */ 284 #define AB8500_PWMGENCONFX_PWMVIBXPOL 7 285 #define AB8500_PWMGENCONFX_PWMVIBXDUTCYC 0 286 #define AB8500_PWMGENCONFX_PWMVIBXDUTCYC_MAX 0x64 287 288 /* AB8500_ANAGAIN1 */ 289 /* AB8500_ANAGAIN2 */ 290 #define AB8500_ANAGAINX_ENSEMICX 7 291 #define AB8500_ANAGAINX_LOWPOWMICX 6 292 #define AB8500_ANAGAINX_MICXGAIN 0 293 #define AB8500_ANAGAINX_MICXGAIN_MAX 0x1F 294 295 /* AB8500_ANAGAIN3 */ 296 #define AB8500_ANAGAIN3_HSLGAIN 4 297 #define AB8500_ANAGAIN3_HSRGAIN 0 298 #define AB8500_ANAGAIN3_HSXGAIN_MAX 0x0F 299 300 /* AB8500_ANAGAIN4 */ 301 #define AB8500_ANAGAIN4_LINLGAIN 4 302 #define AB8500_ANAGAIN4_LINRGAIN 0 303 #define AB8500_ANAGAIN4_LINXGAIN_MAX 0x0F 304 305 /* AB8500_DIGLINHSLGAIN */ 306 /* AB8500_DIGLINHSRGAIN */ 307 #define AB8500_DIGLINHSXGAIN_LINTOHSXGAIN 0 308 #define AB8500_DIGLINHSXGAIN_LINTOHSXGAIN_MAX 0x13 309 310 /* AB8500_ADFILTCONF */ 311 #define AB8500_ADFILTCONF_AD1NH 7 312 #define AB8500_ADFILTCONF_AD2NH 6 313 #define AB8500_ADFILTCONF_AD3NH 5 314 #define AB8500_ADFILTCONF_AD4NH 4 315 #define AB8500_ADFILTCONF_AD1VOICE 3 316 #define AB8500_ADFILTCONF_AD2VOICE 2 317 #define AB8500_ADFILTCONF_AD3VOICE 1 318 #define AB8500_ADFILTCONF_AD4VOICE 0 319 320 /* AB8500_DIGIFCONF1 */ 321 #define AB8500_DIGIFCONF1_ENMASTGEN 7 322 #define AB8500_DIGIFCONF1_IF1BITCLKOS1 6 323 #define AB8500_DIGIFCONF1_IF1BITCLKOS0 5 324 #define AB8500_DIGIFCONF1_ENFSBITCLK1 4 325 #define AB8500_DIGIFCONF1_IF0BITCLKOS1 2 326 #define AB8500_DIGIFCONF1_IF0BITCLKOS0 1 327 #define AB8500_DIGIFCONF1_ENFSBITCLK0 0 328 329 /* AB8500_DIGIFCONF2 */ 330 #define AB8500_DIGIFCONF2_FSYNC0P 6 331 #define AB8500_DIGIFCONF2_BITCLK0P 5 332 #define AB8500_DIGIFCONF2_IF0DEL 4 333 #define AB8500_DIGIFCONF2_IF0FORMAT1 3 334 #define AB8500_DIGIFCONF2_IF0FORMAT0 2 335 #define AB8500_DIGIFCONF2_IF0WL1 1 336 #define AB8500_DIGIFCONF2_IF0WL0 0 337 338 /* AB8500_DIGIFCONF3 */ 339 #define AB8500_DIGIFCONF3_IF0DATOIF1AD 7 340 #define AB8500_DIGIFCONF3_IF0CLKTOIF1CLK 6 341 #define AB8500_DIGIFCONF3_IF1MASTER 5 342 #define AB8500_DIGIFCONF3_IF1DATOIF0AD 3 343 #define AB8500_DIGIFCONF3_IF1CLKTOIF0CLK 2 344 #define AB8500_DIGIFCONF3_IF0MASTER 1 345 #define AB8500_DIGIFCONF3_IF0BFIFOEN 0 346 347 /* AB8500_DIGIFCONF4 */ 348 #define AB8500_DIGIFCONF4_FSYNC1P 6 349 #define AB8500_DIGIFCONF4_BITCLK1P 5 350 #define AB8500_DIGIFCONF4_IF1DEL 4 351 #define AB8500_DIGIFCONF4_IF1FORMAT1 3 352 #define AB8500_DIGIFCONF4_IF1FORMAT0 2 353 #define AB8500_DIGIFCONF4_IF1WL1 1 354 #define AB8500_DIGIFCONF4_IF1WL0 0 355 356 /* AB8500_ADSLOTSELX */ 357 #define AB8500_ADSLOTSELX_AD_OUT1_TO_SLOT_ODD 0x00 358 #define AB8500_ADSLOTSELX_AD_OUT2_TO_SLOT_ODD 0x10 359 #define AB8500_ADSLOTSELX_AD_OUT3_TO_SLOT_ODD 0x20 360 #define AB8500_ADSLOTSELX_AD_OUT4_TO_SLOT_ODD 0x30 361 #define AB8500_ADSLOTSELX_AD_OUT5_TO_SLOT_ODD 0x40 362 #define AB8500_ADSLOTSELX_AD_OUT6_TO_SLOT_ODD 0x50 363 #define AB8500_ADSLOTSELX_AD_OUT7_TO_SLOT_ODD 0x60 364 #define AB8500_ADSLOTSELX_AD_OUT8_TO_SLOT_ODD 0x70 365 #define AB8500_ADSLOTSELX_ZEROES_TO_SLOT_ODD 0x80 366 #define AB8500_ADSLOTSELX_TRISTATE_TO_SLOT_ODD 0xF0 367 #define AB8500_ADSLOTSELX_AD_OUT1_TO_SLOT_EVEN 0x00 368 #define AB8500_ADSLOTSELX_AD_OUT2_TO_SLOT_EVEN 0x01 369 #define AB8500_ADSLOTSELX_AD_OUT3_TO_SLOT_EVEN 0x02 370 #define AB8500_ADSLOTSELX_AD_OUT4_TO_SLOT_EVEN 0x03 371 #define AB8500_ADSLOTSELX_AD_OUT5_TO_SLOT_EVEN 0x04 372 #define AB8500_ADSLOTSELX_AD_OUT6_TO_SLOT_EVEN 0x05 373 #define AB8500_ADSLOTSELX_AD_OUT7_TO_SLOT_EVEN 0x06 374 #define AB8500_ADSLOTSELX_AD_OUT8_TO_SLOT_EVEN 0x07 375 #define AB8500_ADSLOTSELX_ZEROES_TO_SLOT_EVEN 0x08 376 #define AB8500_ADSLOTSELX_TRISTATE_TO_SLOT_EVEN 0x0F 377 #define AB8500_ADSLOTSELX_EVEN_SHIFT 0 378 #define AB8500_ADSLOTSELX_ODD_SHIFT 4 379 380 /* AB8500_ADSLOTHIZCTRL1 */ 381 /* AB8500_ADSLOTHIZCTRL2 */ 382 /* AB8500_ADSLOTHIZCTRL3 */ 383 /* AB8500_ADSLOTHIZCTRL4 */ 384 /* AB8500_DASLOTCONF1 */ 385 #define AB8500_DASLOTCONF1_DA12VOICE 7 386 #define AB8500_DASLOTCONF1_SWAPDA12_34 6 387 #define AB8500_DASLOTCONF1_DAI7TOADO1 5 388 389 /* AB8500_DASLOTCONF2 */ 390 #define AB8500_DASLOTCONF2_DAI8TOADO2 5 391 392 /* AB8500_DASLOTCONF3 */ 393 #define AB8500_DASLOTCONF3_DA34VOICE 7 394 #define AB8500_DASLOTCONF3_DAI7TOADO3 5 395 396 /* AB8500_DASLOTCONF4 */ 397 #define AB8500_DASLOTCONF4_DAI8TOADO4 5 398 399 /* AB8500_DASLOTCONF5 */ 400 #define AB8500_DASLOTCONF5_DA56VOICE 7 401 #define AB8500_DASLOTCONF5_DAI7TOADO5 5 402 403 /* AB8500_DASLOTCONF6 */ 404 #define AB8500_DASLOTCONF6_DAI8TOADO6 5 405 406 /* AB8500_DASLOTCONF7 */ 407 #define AB8500_DASLOTCONF7_DAI8TOADO7 5 408 409 /* AB8500_DASLOTCONF8 */ 410 #define AB8500_DASLOTCONF8_DAI7TOADO8 5 411 412 #define AB8500_DASLOTCONFX_SLTODAX_SHIFT 0 413 #define AB8500_DASLOTCONFX_SLTODAX_MASK 0x1F 414 415 /* AB8500_CLASSDCONF1 */ 416 #define AB8500_CLASSDCONF1_PARLHF 7 417 #define AB8500_CLASSDCONF1_PARLVIB 6 418 #define AB8500_CLASSDCONF1_VIB1SWAPEN 3 419 #define AB8500_CLASSDCONF1_VIB2SWAPEN 2 420 #define AB8500_CLASSDCONF1_HFLSWAPEN 1 421 #define AB8500_CLASSDCONF1_HFRSWAPEN 0 422 423 /* AB8500_CLASSDCONF2 */ 424 #define AB8500_CLASSDCONF2_FIRBYP3 7 425 #define AB8500_CLASSDCONF2_FIRBYP2 6 426 #define AB8500_CLASSDCONF2_FIRBYP1 5 427 #define AB8500_CLASSDCONF2_FIRBYP0 4 428 #define AB8500_CLASSDCONF2_HIGHVOLEN3 3 429 #define AB8500_CLASSDCONF2_HIGHVOLEN2 2 430 #define AB8500_CLASSDCONF2_HIGHVOLEN1 1 431 #define AB8500_CLASSDCONF2_HIGHVOLEN0 0 432 433 /* AB8500_CLASSDCONF3 */ 434 #define AB8500_CLASSDCONF3_DITHHPGAIN 4 435 #define AB8500_CLASSDCONF3_DITHHPGAIN_MAX 0x0A 436 #define AB8500_CLASSDCONF3_DITHWGAIN 0 437 #define AB8500_CLASSDCONF3_DITHWGAIN_MAX 0x0A 438 439 /* AB8500_DMICFILTCONF */ 440 #define AB8500_DMICFILTCONF_ANCINSEL 7 441 #define AB8500_DMICFILTCONF_DA3TOEAR 6 442 #define AB8500_DMICFILTCONF_DMIC1SINC3 5 443 #define AB8500_DMICFILTCONF_DMIC2SINC3 4 444 #define AB8500_DMICFILTCONF_DMIC3SINC3 3 445 #define AB8500_DMICFILTCONF_DMIC4SINC3 2 446 #define AB8500_DMICFILTCONF_DMIC5SINC3 1 447 #define AB8500_DMICFILTCONF_DMIC6SINC3 0 448 449 /* AB8500_DIGMULTCONF1 */ 450 #define AB8500_DIGMULTCONF1_DATOHSLEN 7 451 #define AB8500_DIGMULTCONF1_DATOHSREN 6 452 #define AB8500_DIGMULTCONF1_AD1SEL 5 453 #define AB8500_DIGMULTCONF1_AD2SEL 4 454 #define AB8500_DIGMULTCONF1_AD3SEL 3 455 #define AB8500_DIGMULTCONF1_AD5SEL 2 456 #define AB8500_DIGMULTCONF1_AD6SEL 1 457 #define AB8500_DIGMULTCONF1_ANCSEL 0 458 459 /* AB8500_DIGMULTCONF2 */ 460 #define AB8500_DIGMULTCONF2_DATOHFREN 7 461 #define AB8500_DIGMULTCONF2_DATOHFLEN 6 462 #define AB8500_DIGMULTCONF2_HFRSEL 5 463 #define AB8500_DIGMULTCONF2_HFLSEL 4 464 #define AB8500_DIGMULTCONF2_FIRSID1SEL 2 465 #define AB8500_DIGMULTCONF2_FIRSID2SEL 0 466 467 /* AB8500_ADDIGGAIN1 */ 468 /* AB8500_ADDIGGAIN2 */ 469 /* AB8500_ADDIGGAIN3 */ 470 /* AB8500_ADDIGGAIN4 */ 471 /* AB8500_ADDIGGAIN5 */ 472 /* AB8500_ADDIGGAIN6 */ 473 #define AB8500_ADDIGGAINX_FADEDISADX 6 474 #define AB8500_ADDIGGAINX_ADXGAIN_MAX 0x3F 475 476 /* AB8500_DADIGGAIN1 */ 477 /* AB8500_DADIGGAIN2 */ 478 /* AB8500_DADIGGAIN3 */ 479 /* AB8500_DADIGGAIN4 */ 480 /* AB8500_DADIGGAIN5 */ 481 /* AB8500_DADIGGAIN6 */ 482 #define AB8500_DADIGGAINX_FADEDISDAX 6 483 #define AB8500_DADIGGAINX_DAXGAIN_MAX 0x3F 484 485 /* AB8500_ADDIGLOOPGAIN1 */ 486 /* AB8500_ADDIGLOOPGAIN2 */ 487 #define AB8500_ADDIGLOOPGAINX_FADEDISADXL 6 488 #define AB8500_ADDIGLOOPGAINX_ADXLBGAIN_MAX 0x3F 489 490 /* AB8500_HSLEARDIGGAIN */ 491 #define AB8500_HSLEARDIGGAIN_HSSINC1 7 492 #define AB8500_HSLEARDIGGAIN_FADEDISHSL 4 493 #define AB8500_HSLEARDIGGAIN_HSLDGAIN_MAX 0x09 494 495 /* AB8500_HSRDIGGAIN */ 496 #define AB8500_HSRDIGGAIN_FADESPEED 6 497 #define AB8500_HSRDIGGAIN_FADEDISHSR 4 498 #define AB8500_HSRDIGGAIN_HSRDGAIN_MAX 0x09 499 500 /* AB8500_SIDFIRGAIN1 */ 501 /* AB8500_SIDFIRGAIN2 */ 502 #define AB8500_SIDFIRGAINX_FIRSIDXGAIN_MAX 0x1F 503 504 /* AB8500_ANCCONF1 */ 505 #define AB8500_ANCCONF1_ANCIIRUPDATE 3 506 #define AB8500_ANCCONF1_ENANC 2 507 #define AB8500_ANCCONF1_ANCIIRINIT 1 508 #define AB8500_ANCCONF1_ANCFIRUPDATE 0 509 510 /* AB8500_ANCCONF2 */ 511 #define AB8500_ANCCONF2_SHIFT 5 512 #define AB8500_ANCCONF2_MIN -0x10 513 #define AB8500_ANCCONF2_MAX 0xF 514 515 /* AB8500_ANCCONF3 */ 516 #define AB8500_ANCCONF3_SHIFT 5 517 #define AB8500_ANCCONF3_MIN -0x10 518 #define AB8500_ANCCONF3_MAX 0xF 519 520 /* AB8500_ANCCONF4 */ 521 #define AB8500_ANCCONF4_SHIFT 5 522 #define AB8500_ANCCONF4_MIN -0x10 523 #define AB8500_ANCCONF4_MAX 0xF 524 525 /* AB8500_ANC_FIR_COEFFS */ 526 #define AB8500_ANC_FIR_COEFF_MIN -0x8000 527 #define AB8500_ANC_FIR_COEFF_MAX 0x7FFF 528 #define AB8500_ANC_FIR_COEFFS 15 529 530 /* AB8500_ANC_IIR_COEFFS */ 531 #define AB8500_ANC_IIR_COEFF_MIN -0x800000 532 #define AB8500_ANC_IIR_COEFF_MAX 0x7FFFFF 533 #define AB8500_ANC_IIR_COEFFS 24 534 /* AB8500_ANC_WARP_DELAY */ 535 #define AB8500_ANC_WARP_DELAY_SHIFT 16 536 #define AB8500_ANC_WARP_DELAY_MIN 0x0000 537 #define AB8500_ANC_WARP_DELAY_MAX 0xFFFF 538 539 /* AB8500_ANCCONF11 */ 540 /* AB8500_ANCCONF12 */ 541 /* AB8500_ANCCONF13 */ 542 /* AB8500_ANCCONF14 */ 543 544 /* AB8500_SIDFIRADR */ 545 #define AB8500_SIDFIRADR_FIRSIDSET 7 546 #define AB8500_SIDFIRADR_ADDRESS_SHIFT 0 547 #define AB8500_SIDFIRADR_ADDRESS_MAX 0x7F 548 549 /* AB8500_SIDFIRCOEF1 */ 550 /* AB8500_SIDFIRCOEF2 */ 551 #define AB8500_SID_FIR_COEFF_MIN 0 552 #define AB8500_SID_FIR_COEFF_MAX 0xFFFF 553 #define AB8500_SID_FIR_COEFFS 128 554 555 /* AB8500_SIDFIRCONF */ 556 #define AB8500_SIDFIRCONF_ENFIRSIDS 2 557 #define AB8500_SIDFIRCONF_FIRSIDSTOIF1 1 558 #define AB8500_SIDFIRCONF_FIRSIDBUSY 0 559 560 /* AB8500_AUDINTMASK1 */ 561 /* AB8500_AUDINTSOURCE1 */ 562 /* AB8500_AUDINTMASK2 */ 563 /* AB8500_AUDINTSOURCE2 */ 564 565 /* AB8500_FIFOCONF1 */ 566 #define AB8500_FIFOCONF1_BFIFOMASK 0x80 567 #define AB8500_FIFOCONF1_BFIFO19M2 0x40 568 #define AB8500_FIFOCONF1_BFIFOINT_SHIFT 0 569 #define AB8500_FIFOCONF1_BFIFOINT_MAX 0x3F 570 571 /* AB8500_FIFOCONF2 */ 572 #define AB8500_FIFOCONF2_BFIFOTX_SHIFT 0 573 #define AB8500_FIFOCONF2_BFIFOTX_MAX 0xFF 574 575 /* AB8500_FIFOCONF3 */ 576 #define AB8500_FIFOCONF3_BFIFOEXSL_SHIFT 5 577 #define AB8500_FIFOCONF3_BFIFOEXSL_MAX 0x5 578 #define AB8500_FIFOCONF3_PREBITCLK0_SHIFT 2 579 #define AB8500_FIFOCONF3_PREBITCLK0_MAX 0x7 580 #define AB8500_FIFOCONF3_BFIFOMAST_SHIFT 1 581 #define AB8500_FIFOCONF3_BFIFORUN_SHIFT 0 582 583 /* AB8500_FIFOCONF4 */ 584 #define AB8500_FIFOCONF4_BFIFOFRAMSW_SHIFT 0 585 #define AB8500_FIFOCONF4_BFIFOFRAMSW_MAX 0xFF 586 587 /* AB8500_FIFOCONF5 */ 588 #define AB8500_FIFOCONF5_BFIFOWAKEUP_SHIFT 0 589 #define AB8500_FIFOCONF5_BFIFOWAKEUP_MAX 0xFF 590 591 /* AB8500_FIFOCONF6 */ 592 #define AB8500_FIFOCONF6_BFIFOSAMPLE_SHIFT 0 593 #define AB8500_FIFOCONF6_BFIFOSAMPLE_MAX 0xFF 594 595 /* AB8500_AUDREV */ 596 597 #endif 598