1 /* 2 * Copyright (C) ST-Ericsson SA 2012 3 * 4 * Author: Ola Lilja <ola.o.lilja@stericsson.com>, 5 * Kristoffer Karlsson <kristoffer.karlsson@stericsson.com>, 6 * Roger Nilsson <roger.xr.nilsson@stericsson.com>, 7 * for ST-Ericsson. 8 * 9 * Based on the early work done by: 10 * Mikko J. Lehto <mikko.lehto@symbio.com>, 11 * Mikko Sarmanne <mikko.sarmanne@symbio.com>, 12 * for ST-Ericsson. 13 * 14 * License terms: 15 * 16 * This program is free software; you can redistribute it and/or modify it 17 * under the terms of the GNU General Public License version 2 as published 18 * by the Free Software Foundation. 19 */ 20 21 #ifndef AB8500_CODEC_REGISTERS_H 22 #define AB8500_CODEC_REGISTERS_H 23 24 #define AB8500_SUPPORTED_RATE (SNDRV_PCM_RATE_48000) 25 #define AB8500_SUPPORTED_FMT (SNDRV_PCM_FMTBIT_S16_LE) 26 27 /* AB8500 audio bank (0x0d) register definitions */ 28 29 #define AB8500_POWERUP 0x00 30 #define AB8500_AUDSWRESET 0x01 31 #define AB8500_ADPATHENA 0x02 32 #define AB8500_DAPATHENA 0x03 33 #define AB8500_ANACONF1 0x04 34 #define AB8500_ANACONF2 0x05 35 #define AB8500_DIGMICCONF 0x06 36 #define AB8500_ANACONF3 0x07 37 #define AB8500_ANACONF4 0x08 38 #define AB8500_DAPATHCONF 0x09 39 #define AB8500_MUTECONF 0x0A 40 #define AB8500_SHORTCIRCONF 0x0B 41 #define AB8500_ANACONF5 0x0C 42 #define AB8500_ENVCPCONF 0x0D 43 #define AB8500_SIGENVCONF 0x0E 44 #define AB8500_PWMGENCONF1 0x0F 45 #define AB8500_PWMGENCONF2 0x10 46 #define AB8500_PWMGENCONF3 0x11 47 #define AB8500_PWMGENCONF4 0x12 48 #define AB8500_PWMGENCONF5 0x13 49 #define AB8500_ANAGAIN1 0x14 50 #define AB8500_ANAGAIN2 0x15 51 #define AB8500_ANAGAIN3 0x16 52 #define AB8500_ANAGAIN4 0x17 53 #define AB8500_DIGLINHSLGAIN 0x18 54 #define AB8500_DIGLINHSRGAIN 0x19 55 #define AB8500_ADFILTCONF 0x1A 56 #define AB8500_DIGIFCONF1 0x1B 57 #define AB8500_DIGIFCONF2 0x1C 58 #define AB8500_DIGIFCONF3 0x1D 59 #define AB8500_DIGIFCONF4 0x1E 60 #define AB8500_ADSLOTSEL1 0x1F 61 #define AB8500_ADSLOTSEL2 0x20 62 #define AB8500_ADSLOTSEL3 0x21 63 #define AB8500_ADSLOTSEL4 0x22 64 #define AB8500_ADSLOTSEL5 0x23 65 #define AB8500_ADSLOTSEL6 0x24 66 #define AB8500_ADSLOTSEL7 0x25 67 #define AB8500_ADSLOTSEL8 0x26 68 #define AB8500_ADSLOTSEL9 0x27 69 #define AB8500_ADSLOTSEL10 0x28 70 #define AB8500_ADSLOTSEL11 0x29 71 #define AB8500_ADSLOTSEL12 0x2A 72 #define AB8500_ADSLOTSEL13 0x2B 73 #define AB8500_ADSLOTSEL14 0x2C 74 #define AB8500_ADSLOTSEL15 0x2D 75 #define AB8500_ADSLOTSEL16 0x2E 76 #define AB8500_ADSLOTHIZCTRL1 0x2F 77 #define AB8500_ADSLOTHIZCTRL2 0x30 78 #define AB8500_ADSLOTHIZCTRL3 0x31 79 #define AB8500_ADSLOTHIZCTRL4 0x32 80 #define AB8500_DASLOTCONF1 0x33 81 #define AB8500_DASLOTCONF2 0x34 82 #define AB8500_DASLOTCONF3 0x35 83 #define AB8500_DASLOTCONF4 0x36 84 #define AB8500_DASLOTCONF5 0x37 85 #define AB8500_DASLOTCONF6 0x38 86 #define AB8500_DASLOTCONF7 0x39 87 #define AB8500_DASLOTCONF8 0x3A 88 #define AB8500_CLASSDCONF1 0x3B 89 #define AB8500_CLASSDCONF2 0x3C 90 #define AB8500_CLASSDCONF3 0x3D 91 #define AB8500_DMICFILTCONF 0x3E 92 #define AB8500_DIGMULTCONF1 0x3F 93 #define AB8500_DIGMULTCONF2 0x40 94 #define AB8500_ADDIGGAIN1 0x41 95 #define AB8500_ADDIGGAIN2 0x42 96 #define AB8500_ADDIGGAIN3 0x43 97 #define AB8500_ADDIGGAIN4 0x44 98 #define AB8500_ADDIGGAIN5 0x45 99 #define AB8500_ADDIGGAIN6 0x46 100 #define AB8500_DADIGGAIN1 0x47 101 #define AB8500_DADIGGAIN2 0x48 102 #define AB8500_DADIGGAIN3 0x49 103 #define AB8500_DADIGGAIN4 0x4A 104 #define AB8500_DADIGGAIN5 0x4B 105 #define AB8500_DADIGGAIN6 0x4C 106 #define AB8500_ADDIGLOOPGAIN1 0x4D 107 #define AB8500_ADDIGLOOPGAIN2 0x4E 108 #define AB8500_HSLEARDIGGAIN 0x4F 109 #define AB8500_HSRDIGGAIN 0x50 110 #define AB8500_SIDFIRGAIN1 0x51 111 #define AB8500_SIDFIRGAIN2 0x52 112 #define AB8500_ANCCONF1 0x53 113 #define AB8500_ANCCONF2 0x54 114 #define AB8500_ANCCONF3 0x55 115 #define AB8500_ANCCONF4 0x56 116 #define AB8500_ANCCONF5 0x57 117 #define AB8500_ANCCONF6 0x58 118 #define AB8500_ANCCONF7 0x59 119 #define AB8500_ANCCONF8 0x5A 120 #define AB8500_ANCCONF9 0x5B 121 #define AB8500_ANCCONF10 0x5C 122 #define AB8500_ANCCONF11 0x5D 123 #define AB8500_ANCCONF12 0x5E 124 #define AB8500_ANCCONF13 0x5F 125 #define AB8500_ANCCONF14 0x60 126 #define AB8500_SIDFIRADR 0x61 127 #define AB8500_SIDFIRCOEF1 0x62 128 #define AB8500_SIDFIRCOEF2 0x63 129 #define AB8500_SIDFIRCONF 0x64 130 #define AB8500_AUDINTMASK1 0x65 131 #define AB8500_AUDINTSOURCE1 0x66 132 #define AB8500_AUDINTMASK2 0x67 133 #define AB8500_AUDINTSOURCE2 0x68 134 #define AB8500_FIFOCONF1 0x69 135 #define AB8500_FIFOCONF2 0x6A 136 #define AB8500_FIFOCONF3 0x6B 137 #define AB8500_FIFOCONF4 0x6C 138 #define AB8500_FIFOCONF5 0x6D 139 #define AB8500_FIFOCONF6 0x6E 140 #define AB8500_AUDREV 0x6F 141 142 #define AB8500_FIRST_REG AB8500_POWERUP 143 #define AB8500_LAST_REG AB8500_AUDREV 144 #define AB8500_CACHEREGNUM (AB8500_LAST_REG + 1) 145 146 #define AB8500_MASK_ALL 0xFF 147 #define AB8500_MASK_NONE 0x00 148 149 /* AB8500_POWERUP */ 150 #define AB8500_POWERUP_POWERUP 7 151 #define AB8500_POWERUP_ENANA 3 152 153 /* AB8500_AUDSWRESET */ 154 #define AB8500_AUDSWRESET_SWRESET 7 155 156 /* AB8500_ADPATHENA */ 157 #define AB8500_ADPATHENA_ENAD12 7 158 #define AB8500_ADPATHENA_ENAD34 5 159 #define AB8500_ADPATHENA_ENAD5768 3 160 161 /* AB8500_DAPATHENA */ 162 #define AB8500_DAPATHENA_ENDA1 7 163 #define AB8500_DAPATHENA_ENDA2 6 164 #define AB8500_DAPATHENA_ENDA3 5 165 #define AB8500_DAPATHENA_ENDA4 4 166 #define AB8500_DAPATHENA_ENDA5 3 167 #define AB8500_DAPATHENA_ENDA6 2 168 169 /* AB8500_ANACONF1 */ 170 #define AB8500_ANACONF1_HSLOWPOW 7 171 #define AB8500_ANACONF1_DACLOWPOW1 6 172 #define AB8500_ANACONF1_DACLOWPOW0 5 173 #define AB8500_ANACONF1_EARDACLOWPOW 4 174 #define AB8500_ANACONF1_EARSELCM 2 175 #define AB8500_ANACONF1_HSHPEN 1 176 #define AB8500_ANACONF1_EARDRVLOWPOW 0 177 178 /* AB8500_ANACONF2 */ 179 #define AB8500_ANACONF2_ENMIC1 7 180 #define AB8500_ANACONF2_ENMIC2 6 181 #define AB8500_ANACONF2_ENLINL 5 182 #define AB8500_ANACONF2_ENLINR 4 183 #define AB8500_ANACONF2_MUTMIC1 3 184 #define AB8500_ANACONF2_MUTMIC2 2 185 #define AB8500_ANACONF2_MUTLINL 1 186 #define AB8500_ANACONF2_MUTLINR 0 187 188 /* AB8500_DIGMICCONF */ 189 #define AB8500_DIGMICCONF_ENDMIC1 7 190 #define AB8500_DIGMICCONF_ENDMIC2 6 191 #define AB8500_DIGMICCONF_ENDMIC3 5 192 #define AB8500_DIGMICCONF_ENDMIC4 4 193 #define AB8500_DIGMICCONF_ENDMIC5 3 194 #define AB8500_DIGMICCONF_ENDMIC6 2 195 #define AB8500_DIGMICCONF_HSFADSPEED 0 196 197 /* AB8500_ANACONF3 */ 198 #define AB8500_ANACONF3_MIC1SEL 7 199 #define AB8500_ANACONF3_LINRSEL 6 200 #define AB8500_ANACONF3_ENDRVHSL 5 201 #define AB8500_ANACONF3_ENDRVHSR 4 202 #define AB8500_ANACONF3_ENADCMIC 2 203 #define AB8500_ANACONF3_ENADCLINL 1 204 #define AB8500_ANACONF3_ENADCLINR 0 205 206 /* AB8500_ANACONF4 */ 207 #define AB8500_ANACONF4_DISPDVSS 7 208 #define AB8500_ANACONF4_ENEAR 6 209 #define AB8500_ANACONF4_ENHSL 5 210 #define AB8500_ANACONF4_ENHSR 4 211 #define AB8500_ANACONF4_ENHFL 3 212 #define AB8500_ANACONF4_ENHFR 2 213 #define AB8500_ANACONF4_ENVIB1 1 214 #define AB8500_ANACONF4_ENVIB2 0 215 216 /* AB8500_DAPATHCONF */ 217 #define AB8500_DAPATHCONF_ENDACEAR 6 218 #define AB8500_DAPATHCONF_ENDACHSL 5 219 #define AB8500_DAPATHCONF_ENDACHSR 4 220 #define AB8500_DAPATHCONF_ENDACHFL 3 221 #define AB8500_DAPATHCONF_ENDACHFR 2 222 #define AB8500_DAPATHCONF_ENDACVIB1 1 223 #define AB8500_DAPATHCONF_ENDACVIB2 0 224 225 /* AB8500_MUTECONF */ 226 #define AB8500_MUTECONF_MUTEAR 6 227 #define AB8500_MUTECONF_MUTHSL 5 228 #define AB8500_MUTECONF_MUTHSR 4 229 #define AB8500_MUTECONF_MUTDACEAR 2 230 #define AB8500_MUTECONF_MUTDACHSL 1 231 #define AB8500_MUTECONF_MUTDACHSR 0 232 233 /* AB8500_SHORTCIRCONF */ 234 #define AB8500_SHORTCIRCONF_ENSHORTPWD 7 235 #define AB8500_SHORTCIRCONF_EARSHORTDIS 6 236 #define AB8500_SHORTCIRCONF_HSSHORTDIS 5 237 #define AB8500_SHORTCIRCONF_HSPULLDEN 4 238 #define AB8500_SHORTCIRCONF_HSOSCEN 2 239 #define AB8500_SHORTCIRCONF_HSFADDIS 1 240 #define AB8500_SHORTCIRCONF_HSZCDDIS 0 241 /* Zero cross should be disabled */ 242 243 /* AB8500_ANACONF5 */ 244 #define AB8500_ANACONF5_ENCPHS 7 245 #define AB8500_ANACONF5_HSLDACTOLOL 5 246 #define AB8500_ANACONF5_HSRDACTOLOR 4 247 #define AB8500_ANACONF5_ENLOL 3 248 #define AB8500_ANACONF5_ENLOR 2 249 #define AB8500_ANACONF5_HSAUTOEN 0 250 251 /* AB8500_ENVCPCONF */ 252 #define AB8500_ENVCPCONF_ENVDETHTHRE 4 253 #define AB8500_ENVCPCONF_ENVDETLTHRE 0 254 #define AB8500_ENVCPCONF_ENVDETHTHRE_MAX 0x0F 255 #define AB8500_ENVCPCONF_ENVDETLTHRE_MAX 0x0F 256 257 /* AB8500_SIGENVCONF */ 258 #define AB8500_SIGENVCONF_CPLVEN 5 259 #define AB8500_SIGENVCONF_ENVDETCPEN 4 260 #define AB8500_SIGENVCONF_ENVDETTIME 0 261 #define AB8500_SIGENVCONF_ENVDETTIME_MAX 0x0F 262 263 /* AB8500_PWMGENCONF1 */ 264 #define AB8500_PWMGENCONF1_PWMTOVIB1 7 265 #define AB8500_PWMGENCONF1_PWMTOVIB2 6 266 #define AB8500_PWMGENCONF1_PWM1CTRL 5 267 #define AB8500_PWMGENCONF1_PWM2CTRL 4 268 #define AB8500_PWMGENCONF1_PWM1NCTRL 3 269 #define AB8500_PWMGENCONF1_PWM1PCTRL 2 270 #define AB8500_PWMGENCONF1_PWM2NCTRL 1 271 #define AB8500_PWMGENCONF1_PWM2PCTRL 0 272 273 /* AB8500_PWMGENCONF2 */ 274 /* AB8500_PWMGENCONF3 */ 275 /* AB8500_PWMGENCONF4 */ 276 /* AB8500_PWMGENCONF5 */ 277 #define AB8500_PWMGENCONFX_PWMVIBXPOL 7 278 #define AB8500_PWMGENCONFX_PWMVIBXDUTCYC 0 279 #define AB8500_PWMGENCONFX_PWMVIBXDUTCYC_MAX 0x64 280 281 /* AB8500_ANAGAIN1 */ 282 /* AB8500_ANAGAIN2 */ 283 #define AB8500_ANAGAINX_ENSEMICX 7 284 #define AB8500_ANAGAINX_LOWPOWMICX 6 285 #define AB8500_ANAGAINX_MICXGAIN 0 286 #define AB8500_ANAGAINX_MICXGAIN_MAX 0x1F 287 288 /* AB8500_ANAGAIN3 */ 289 #define AB8500_ANAGAIN3_HSLGAIN 4 290 #define AB8500_ANAGAIN3_HSRGAIN 0 291 #define AB8500_ANAGAIN3_HSXGAIN_MAX 0x0F 292 293 /* AB8500_ANAGAIN4 */ 294 #define AB8500_ANAGAIN4_LINLGAIN 4 295 #define AB8500_ANAGAIN4_LINRGAIN 0 296 #define AB8500_ANAGAIN4_LINXGAIN_MAX 0x0F 297 298 /* AB8500_DIGLINHSLGAIN */ 299 /* AB8500_DIGLINHSRGAIN */ 300 #define AB8500_DIGLINHSXGAIN_LINTOHSXGAIN 0 301 #define AB8500_DIGLINHSXGAIN_LINTOHSXGAIN_MAX 0x13 302 303 /* AB8500_ADFILTCONF */ 304 #define AB8500_ADFILTCONF_AD1NH 7 305 #define AB8500_ADFILTCONF_AD2NH 6 306 #define AB8500_ADFILTCONF_AD3NH 5 307 #define AB8500_ADFILTCONF_AD4NH 4 308 #define AB8500_ADFILTCONF_AD1VOICE 3 309 #define AB8500_ADFILTCONF_AD2VOICE 2 310 #define AB8500_ADFILTCONF_AD3VOICE 1 311 #define AB8500_ADFILTCONF_AD4VOICE 0 312 313 /* AB8500_DIGIFCONF1 */ 314 #define AB8500_DIGIFCONF1_ENMASTGEN 7 315 #define AB8500_DIGIFCONF1_IF1BITCLKOS1 6 316 #define AB8500_DIGIFCONF1_IF1BITCLKOS0 5 317 #define AB8500_DIGIFCONF1_ENFSBITCLK1 4 318 #define AB8500_DIGIFCONF1_IF0BITCLKOS1 2 319 #define AB8500_DIGIFCONF1_IF0BITCLKOS0 1 320 #define AB8500_DIGIFCONF1_ENFSBITCLK0 0 321 322 /* AB8500_DIGIFCONF2 */ 323 #define AB8500_DIGIFCONF2_FSYNC0P 6 324 #define AB8500_DIGIFCONF2_BITCLK0P 5 325 #define AB8500_DIGIFCONF2_IF0DEL 4 326 #define AB8500_DIGIFCONF2_IF0FORMAT1 3 327 #define AB8500_DIGIFCONF2_IF0FORMAT0 2 328 #define AB8500_DIGIFCONF2_IF0WL1 1 329 #define AB8500_DIGIFCONF2_IF0WL0 0 330 331 /* AB8500_DIGIFCONF3 */ 332 #define AB8500_DIGIFCONF3_IF0DATOIF1AD 7 333 #define AB8500_DIGIFCONF3_IF0CLKTOIF1CLK 6 334 #define AB8500_DIGIFCONF3_IF1MASTER 5 335 #define AB8500_DIGIFCONF3_IF1DATOIF0AD 3 336 #define AB8500_DIGIFCONF3_IF1CLKTOIF0CLK 2 337 #define AB8500_DIGIFCONF3_IF0MASTER 1 338 #define AB8500_DIGIFCONF3_IF0BFIFOEN 0 339 340 /* AB8500_DIGIFCONF4 */ 341 #define AB8500_DIGIFCONF4_FSYNC1P 6 342 #define AB8500_DIGIFCONF4_BITCLK1P 5 343 #define AB8500_DIGIFCONF4_IF1DEL 4 344 #define AB8500_DIGIFCONF4_IF1FORMAT1 3 345 #define AB8500_DIGIFCONF4_IF1FORMAT0 2 346 #define AB8500_DIGIFCONF4_IF1WL1 1 347 #define AB8500_DIGIFCONF4_IF1WL0 0 348 349 /* AB8500_ADSLOTSELX */ 350 #define AB8500_ADSLOTSELX_AD_OUT1_TO_SLOT_ODD 0x00 351 #define AB8500_ADSLOTSELX_AD_OUT2_TO_SLOT_ODD 0x01 352 #define AB8500_ADSLOTSELX_AD_OUT3_TO_SLOT_ODD 0x02 353 #define AB8500_ADSLOTSELX_AD_OUT4_TO_SLOT_ODD 0x03 354 #define AB8500_ADSLOTSELX_AD_OUT5_TO_SLOT_ODD 0x04 355 #define AB8500_ADSLOTSELX_AD_OUT6_TO_SLOT_ODD 0x05 356 #define AB8500_ADSLOTSELX_AD_OUT7_TO_SLOT_ODD 0x06 357 #define AB8500_ADSLOTSELX_AD_OUT8_TO_SLOT_ODD 0x07 358 #define AB8500_ADSLOTSELX_ZEROES_TO_SLOT_ODD 0x08 359 #define AB8500_ADSLOTSELX_TRISTATE_TO_SLOT_ODD 0x0F 360 #define AB8500_ADSLOTSELX_AD_OUT1_TO_SLOT_EVEN 0x00 361 #define AB8500_ADSLOTSELX_AD_OUT2_TO_SLOT_EVEN 0x10 362 #define AB8500_ADSLOTSELX_AD_OUT3_TO_SLOT_EVEN 0x20 363 #define AB8500_ADSLOTSELX_AD_OUT4_TO_SLOT_EVEN 0x30 364 #define AB8500_ADSLOTSELX_AD_OUT5_TO_SLOT_EVEN 0x40 365 #define AB8500_ADSLOTSELX_AD_OUT6_TO_SLOT_EVEN 0x50 366 #define AB8500_ADSLOTSELX_AD_OUT7_TO_SLOT_EVEN 0x60 367 #define AB8500_ADSLOTSELX_AD_OUT8_TO_SLOT_EVEN 0x70 368 #define AB8500_ADSLOTSELX_ZEROES_TO_SLOT_EVEN 0x80 369 #define AB8500_ADSLOTSELX_TRISTATE_TO_SLOT_EVEN 0xF0 370 #define AB8500_ADSLOTSELX_EVEN_SHIFT 0 371 #define AB8500_ADSLOTSELX_ODD_SHIFT 4 372 373 /* AB8500_ADSLOTHIZCTRL1 */ 374 /* AB8500_ADSLOTHIZCTRL2 */ 375 /* AB8500_ADSLOTHIZCTRL3 */ 376 /* AB8500_ADSLOTHIZCTRL4 */ 377 /* AB8500_DASLOTCONF1 */ 378 #define AB8500_DASLOTCONF1_DA12VOICE 7 379 #define AB8500_DASLOTCONF1_SWAPDA12_34 6 380 #define AB8500_DASLOTCONF1_DAI7TOADO1 5 381 382 /* AB8500_DASLOTCONF2 */ 383 #define AB8500_DASLOTCONF2_DAI8TOADO2 5 384 385 /* AB8500_DASLOTCONF3 */ 386 #define AB8500_DASLOTCONF3_DA34VOICE 7 387 #define AB8500_DASLOTCONF3_DAI7TOADO3 5 388 389 /* AB8500_DASLOTCONF4 */ 390 #define AB8500_DASLOTCONF4_DAI8TOADO4 5 391 392 /* AB8500_DASLOTCONF5 */ 393 #define AB8500_DASLOTCONF5_DA56VOICE 7 394 #define AB8500_DASLOTCONF5_DAI7TOADO5 5 395 396 /* AB8500_DASLOTCONF6 */ 397 #define AB8500_DASLOTCONF6_DAI8TOADO6 5 398 399 /* AB8500_DASLOTCONF7 */ 400 #define AB8500_DASLOTCONF7_DAI8TOADO7 5 401 402 /* AB8500_DASLOTCONF8 */ 403 #define AB8500_DASLOTCONF8_DAI7TOADO8 5 404 405 #define AB8500_DASLOTCONFX_SLTODAX_SHIFT 0 406 #define AB8500_DASLOTCONFX_SLTODAX_MASK 0x1F 407 408 /* AB8500_CLASSDCONF1 */ 409 #define AB8500_CLASSDCONF1_PARLHF 7 410 #define AB8500_CLASSDCONF1_PARLVIB 6 411 #define AB8500_CLASSDCONF1_VIB1SWAPEN 3 412 #define AB8500_CLASSDCONF1_VIB2SWAPEN 2 413 #define AB8500_CLASSDCONF1_HFLSWAPEN 1 414 #define AB8500_CLASSDCONF1_HFRSWAPEN 0 415 416 /* AB8500_CLASSDCONF2 */ 417 #define AB8500_CLASSDCONF2_FIRBYP3 7 418 #define AB8500_CLASSDCONF2_FIRBYP2 6 419 #define AB8500_CLASSDCONF2_FIRBYP1 5 420 #define AB8500_CLASSDCONF2_FIRBYP0 4 421 #define AB8500_CLASSDCONF2_HIGHVOLEN3 3 422 #define AB8500_CLASSDCONF2_HIGHVOLEN2 2 423 #define AB8500_CLASSDCONF2_HIGHVOLEN1 1 424 #define AB8500_CLASSDCONF2_HIGHVOLEN0 0 425 426 /* AB8500_CLASSDCONF3 */ 427 #define AB8500_CLASSDCONF3_DITHHPGAIN 4 428 #define AB8500_CLASSDCONF3_DITHHPGAIN_MAX 0x0A 429 #define AB8500_CLASSDCONF3_DITHWGAIN 0 430 #define AB8500_CLASSDCONF3_DITHWGAIN_MAX 0x0A 431 432 /* AB8500_DMICFILTCONF */ 433 #define AB8500_DMICFILTCONF_ANCINSEL 7 434 #define AB8500_DMICFILTCONF_DA3TOEAR 6 435 #define AB8500_DMICFILTCONF_DMIC1SINC3 5 436 #define AB8500_DMICFILTCONF_DMIC2SINC3 4 437 #define AB8500_DMICFILTCONF_DMIC3SINC3 3 438 #define AB8500_DMICFILTCONF_DMIC4SINC3 2 439 #define AB8500_DMICFILTCONF_DMIC5SINC3 1 440 #define AB8500_DMICFILTCONF_DMIC6SINC3 0 441 442 /* AB8500_DIGMULTCONF1 */ 443 #define AB8500_DIGMULTCONF1_DATOHSLEN 7 444 #define AB8500_DIGMULTCONF1_DATOHSREN 6 445 #define AB8500_DIGMULTCONF1_AD1SEL 5 446 #define AB8500_DIGMULTCONF1_AD2SEL 4 447 #define AB8500_DIGMULTCONF1_AD3SEL 3 448 #define AB8500_DIGMULTCONF1_AD5SEL 2 449 #define AB8500_DIGMULTCONF1_AD6SEL 1 450 #define AB8500_DIGMULTCONF1_ANCSEL 0 451 452 /* AB8500_DIGMULTCONF2 */ 453 #define AB8500_DIGMULTCONF2_DATOHFREN 7 454 #define AB8500_DIGMULTCONF2_DATOHFLEN 6 455 #define AB8500_DIGMULTCONF2_HFRSEL 5 456 #define AB8500_DIGMULTCONF2_HFLSEL 4 457 #define AB8500_DIGMULTCONF2_FIRSID1SEL 2 458 #define AB8500_DIGMULTCONF2_FIRSID2SEL 0 459 460 /* AB8500_ADDIGGAIN1 */ 461 /* AB8500_ADDIGGAIN2 */ 462 /* AB8500_ADDIGGAIN3 */ 463 /* AB8500_ADDIGGAIN4 */ 464 /* AB8500_ADDIGGAIN5 */ 465 /* AB8500_ADDIGGAIN6 */ 466 #define AB8500_ADDIGGAINX_FADEDISADX 6 467 #define AB8500_ADDIGGAINX_ADXGAIN_MAX 0x3F 468 469 /* AB8500_DADIGGAIN1 */ 470 /* AB8500_DADIGGAIN2 */ 471 /* AB8500_DADIGGAIN3 */ 472 /* AB8500_DADIGGAIN4 */ 473 /* AB8500_DADIGGAIN5 */ 474 /* AB8500_DADIGGAIN6 */ 475 #define AB8500_DADIGGAINX_FADEDISDAX 6 476 #define AB8500_DADIGGAINX_DAXGAIN_MAX 0x3F 477 478 /* AB8500_ADDIGLOOPGAIN1 */ 479 /* AB8500_ADDIGLOOPGAIN2 */ 480 #define AB8500_ADDIGLOOPGAINX_FADEDISADXL 6 481 #define AB8500_ADDIGLOOPGAINX_ADXLBGAIN_MAX 0x3F 482 483 /* AB8500_HSLEARDIGGAIN */ 484 #define AB8500_HSLEARDIGGAIN_HSSINC1 7 485 #define AB8500_HSLEARDIGGAIN_FADEDISHSL 4 486 #define AB8500_HSLEARDIGGAIN_HSLDGAIN_MAX 0x09 487 488 /* AB8500_HSRDIGGAIN */ 489 #define AB8500_HSRDIGGAIN_FADESPEED 6 490 #define AB8500_HSRDIGGAIN_FADEDISHSR 4 491 #define AB8500_HSRDIGGAIN_HSRDGAIN_MAX 0x09 492 493 /* AB8500_SIDFIRGAIN1 */ 494 /* AB8500_SIDFIRGAIN2 */ 495 #define AB8500_SIDFIRGAINX_FIRSIDXGAIN_MAX 0x1F 496 497 /* AB8500_ANCCONF1 */ 498 #define AB8500_ANCCONF1_ANCIIRUPDATE 3 499 #define AB8500_ANCCONF1_ENANC 2 500 #define AB8500_ANCCONF1_ANCIIRINIT 1 501 #define AB8500_ANCCONF1_ANCFIRUPDATE 0 502 503 /* AB8500_ANCCONF2 */ 504 #define AB8500_ANCCONF2_SHIFT 5 505 #define AB8500_ANCCONF2_MIN -0x10 506 #define AB8500_ANCCONF2_MAX 0xF 507 508 /* AB8500_ANCCONF3 */ 509 #define AB8500_ANCCONF3_SHIFT 5 510 #define AB8500_ANCCONF3_MIN -0x10 511 #define AB8500_ANCCONF3_MAX 0xF 512 513 /* AB8500_ANCCONF4 */ 514 #define AB8500_ANCCONF4_SHIFT 5 515 #define AB8500_ANCCONF4_MIN -0x10 516 #define AB8500_ANCCONF4_MAX 0xF 517 518 /* AB8500_ANC_FIR_COEFFS */ 519 #define AB8500_ANC_FIR_COEFF_MIN -0x8000 520 #define AB8500_ANC_FIR_COEFF_MAX 0x7FFF 521 #define AB8500_ANC_FIR_COEFFS 15 522 523 /* AB8500_ANC_IIR_COEFFS */ 524 #define AB8500_ANC_IIR_COEFF_MIN -0x800000 525 #define AB8500_ANC_IIR_COEFF_MAX 0x7FFFFF 526 #define AB8500_ANC_IIR_COEFFS 24 527 /* AB8500_ANC_WARP_DELAY */ 528 #define AB8500_ANC_WARP_DELAY_SHIFT 16 529 #define AB8500_ANC_WARP_DELAY_MIN 0x0000 530 #define AB8500_ANC_WARP_DELAY_MAX 0xFFFF 531 532 /* AB8500_ANCCONF11 */ 533 /* AB8500_ANCCONF12 */ 534 /* AB8500_ANCCONF13 */ 535 /* AB8500_ANCCONF14 */ 536 537 /* AB8500_SIDFIRADR */ 538 #define AB8500_SIDFIRADR_FIRSIDSET 7 539 #define AB8500_SIDFIRADR_ADDRESS_SHIFT 0 540 #define AB8500_SIDFIRADR_ADDRESS_MAX 0x7F 541 542 /* AB8500_SIDFIRCOEF1 */ 543 /* AB8500_SIDFIRCOEF2 */ 544 #define AB8500_SID_FIR_COEFF_MIN 0 545 #define AB8500_SID_FIR_COEFF_MAX 0xFFFF 546 #define AB8500_SID_FIR_COEFFS 128 547 548 /* AB8500_SIDFIRCONF */ 549 #define AB8500_SIDFIRCONF_ENFIRSIDS 2 550 #define AB8500_SIDFIRCONF_FIRSIDSTOIF1 1 551 #define AB8500_SIDFIRCONF_FIRSIDBUSY 0 552 553 /* AB8500_AUDINTMASK1 */ 554 /* AB8500_AUDINTSOURCE1 */ 555 /* AB8500_AUDINTMASK2 */ 556 /* AB8500_AUDINTSOURCE2 */ 557 558 /* AB8500_FIFOCONF1 */ 559 #define AB8500_FIFOCONF1_BFIFOMASK 0x80 560 #define AB8500_FIFOCONF1_BFIFO19M2 0x40 561 #define AB8500_FIFOCONF1_BFIFOINT_SHIFT 0 562 #define AB8500_FIFOCONF1_BFIFOINT_MAX 0x3F 563 564 /* AB8500_FIFOCONF2 */ 565 #define AB8500_FIFOCONF2_BFIFOTX_SHIFT 0 566 #define AB8500_FIFOCONF2_BFIFOTX_MAX 0xFF 567 568 /* AB8500_FIFOCONF3 */ 569 #define AB8500_FIFOCONF3_BFIFOEXSL_SHIFT 5 570 #define AB8500_FIFOCONF3_BFIFOEXSL_MAX 0x5 571 #define AB8500_FIFOCONF3_PREBITCLK0_SHIFT 2 572 #define AB8500_FIFOCONF3_PREBITCLK0_MAX 0x7 573 #define AB8500_FIFOCONF3_BFIFOMAST_SHIFT 1 574 #define AB8500_FIFOCONF3_BFIFORUN_SHIFT 0 575 576 /* AB8500_FIFOCONF4 */ 577 #define AB8500_FIFOCONF4_BFIFOFRAMSW_SHIFT 0 578 #define AB8500_FIFOCONF4_BFIFOFRAMSW_MAX 0xFF 579 580 /* AB8500_FIFOCONF5 */ 581 #define AB8500_FIFOCONF5_BFIFOWAKEUP_SHIFT 0 582 #define AB8500_FIFOCONF5_BFIFOWAKEUP_MAX 0xFF 583 584 /* AB8500_FIFOCONF6 */ 585 #define AB8500_FIFOCONF6_BFIFOSAMPLE_SHIFT 0 586 #define AB8500_FIFOCONF6_BFIFOSAMPLE_MAX 0xFF 587 588 /* AB8500_AUDREV */ 589 590 #endif 591