1 /* 2 * Au12x0/Au1550 PSC ALSA ASoC audio support. 3 * 4 * (c) 2007-2008 MSC Vertriebsges.m.b.H., 5 * Manuel Lauss <mano@roarinelk.homelinux.net> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 * 11 * Au1xxx-PSC I2S glue. 12 * 13 * NOTE: all of these drivers can only work with a SINGLE instance 14 * of a PSC. Multiple independent audio devices are impossible 15 * with ASoC v1. 16 * NOTE: so far only PSC slave mode (bit- and frameclock) is supported. 17 */ 18 19 #include <linux/init.h> 20 #include <linux/module.h> 21 #include <linux/suspend.h> 22 #include <sound/core.h> 23 #include <sound/pcm.h> 24 #include <sound/initval.h> 25 #include <sound/soc.h> 26 #include <asm/mach-au1x00/au1000.h> 27 #include <asm/mach-au1x00/au1xxx_psc.h> 28 29 #include "psc.h" 30 31 /* supported I2S DAI hardware formats */ 32 #define AU1XPSC_I2S_DAIFMT \ 33 (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_LEFT_J | \ 34 SND_SOC_DAIFMT_NB_NF) 35 36 /* supported I2S direction */ 37 #define AU1XPSC_I2S_DIR \ 38 (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE) 39 40 #define AU1XPSC_I2S_RATES \ 41 SNDRV_PCM_RATE_8000_192000 42 43 #define AU1XPSC_I2S_FMTS \ 44 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE) 45 46 #define I2SSTAT_BUSY(stype) \ 47 ((stype) == PCM_TX ? PSC_I2SSTAT_TB : PSC_I2SSTAT_RB) 48 #define I2SPCR_START(stype) \ 49 ((stype) == PCM_TX ? PSC_I2SPCR_TS : PSC_I2SPCR_RS) 50 #define I2SPCR_STOP(stype) \ 51 ((stype) == PCM_TX ? PSC_I2SPCR_TP : PSC_I2SPCR_RP) 52 #define I2SPCR_CLRFIFO(stype) \ 53 ((stype) == PCM_TX ? PSC_I2SPCR_TC : PSC_I2SPCR_RC) 54 55 56 /* instance data. There can be only one, MacLeod!!!! */ 57 static struct au1xpsc_audio_data *au1xpsc_i2s_workdata; 58 59 static int au1xpsc_i2s_set_fmt(struct snd_soc_dai *cpu_dai, 60 unsigned int fmt) 61 { 62 struct au1xpsc_audio_data *pscdata = au1xpsc_i2s_workdata; 63 unsigned long ct; 64 int ret; 65 66 ret = -EINVAL; 67 68 ct = pscdata->cfg; 69 70 ct &= ~(PSC_I2SCFG_XM | PSC_I2SCFG_MLJ); /* left-justified */ 71 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 72 case SND_SOC_DAIFMT_I2S: 73 ct |= PSC_I2SCFG_XM; /* enable I2S mode */ 74 break; 75 case SND_SOC_DAIFMT_MSB: 76 break; 77 case SND_SOC_DAIFMT_LSB: 78 ct |= PSC_I2SCFG_MLJ; /* LSB (right-) justified */ 79 break; 80 default: 81 goto out; 82 } 83 84 ct &= ~(PSC_I2SCFG_BI | PSC_I2SCFG_WI); /* IB-IF */ 85 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 86 case SND_SOC_DAIFMT_NB_NF: 87 ct |= PSC_I2SCFG_BI | PSC_I2SCFG_WI; 88 break; 89 case SND_SOC_DAIFMT_NB_IF: 90 ct |= PSC_I2SCFG_BI; 91 break; 92 case SND_SOC_DAIFMT_IB_NF: 93 ct |= PSC_I2SCFG_WI; 94 break; 95 case SND_SOC_DAIFMT_IB_IF: 96 break; 97 default: 98 goto out; 99 } 100 101 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 102 case SND_SOC_DAIFMT_CBM_CFM: /* CODEC master */ 103 ct |= PSC_I2SCFG_MS; /* PSC I2S slave mode */ 104 break; 105 case SND_SOC_DAIFMT_CBS_CFS: /* CODEC slave */ 106 ct &= ~PSC_I2SCFG_MS; /* PSC I2S Master mode */ 107 break; 108 default: 109 goto out; 110 } 111 112 pscdata->cfg = ct; 113 ret = 0; 114 out: 115 return ret; 116 } 117 118 static int au1xpsc_i2s_hw_params(struct snd_pcm_substream *substream, 119 struct snd_pcm_hw_params *params) 120 { 121 struct au1xpsc_audio_data *pscdata = au1xpsc_i2s_workdata; 122 123 int cfgbits; 124 unsigned long stat; 125 126 /* check if the PSC is already streaming data */ 127 stat = au_readl(I2S_STAT(pscdata)); 128 if (stat & (PSC_I2SSTAT_TB | PSC_I2SSTAT_RB)) { 129 /* reject parameters not currently set up in hardware */ 130 cfgbits = au_readl(I2S_CFG(pscdata)); 131 if ((PSC_I2SCFG_GET_LEN(cfgbits) != params->msbits) || 132 (params_rate(params) != pscdata->rate)) 133 return -EINVAL; 134 } else { 135 /* set sample bitdepth */ 136 pscdata->cfg &= ~(0x1f << 4); 137 pscdata->cfg |= PSC_I2SCFG_SET_LEN(params->msbits); 138 /* remember current rate for other stream */ 139 pscdata->rate = params_rate(params); 140 } 141 return 0; 142 } 143 144 /* Configure PSC late: on my devel systems the codec is I2S master and 145 * supplies the i2sbitclock __AND__ i2sMclk (!) to the PSC unit. ASoC 146 * uses aggressive PM and switches the codec off when it is not in use 147 * which also means the PSC unit doesn't get any clocks and is therefore 148 * dead. That's why this chunk here gets called from the trigger callback 149 * because I can be reasonably certain the codec is driving the clocks. 150 */ 151 static int au1xpsc_i2s_configure(struct au1xpsc_audio_data *pscdata) 152 { 153 unsigned long tmo; 154 155 /* bring PSC out of sleep, and configure I2S unit */ 156 au_writel(PSC_CTRL_ENABLE, PSC_CTRL(pscdata)); 157 au_sync(); 158 159 tmo = 1000000; 160 while (!(au_readl(I2S_STAT(pscdata)) & PSC_I2SSTAT_SR) && tmo) 161 tmo--; 162 163 if (!tmo) 164 goto psc_err; 165 166 au_writel(0, I2S_CFG(pscdata)); 167 au_sync(); 168 au_writel(pscdata->cfg | PSC_I2SCFG_DE_ENABLE, I2S_CFG(pscdata)); 169 au_sync(); 170 171 /* wait for I2S controller to become ready */ 172 tmo = 1000000; 173 while (!(au_readl(I2S_STAT(pscdata)) & PSC_I2SSTAT_DR) && tmo) 174 tmo--; 175 176 if (tmo) 177 return 0; 178 179 psc_err: 180 au_writel(0, I2S_CFG(pscdata)); 181 au_writel(PSC_CTRL_SUSPEND, PSC_CTRL(pscdata)); 182 au_sync(); 183 return -ETIMEDOUT; 184 } 185 186 static int au1xpsc_i2s_start(struct au1xpsc_audio_data *pscdata, int stype) 187 { 188 unsigned long tmo, stat; 189 int ret; 190 191 ret = 0; 192 193 /* if both TX and RX are idle, configure the PSC */ 194 stat = au_readl(I2S_STAT(pscdata)); 195 if (!(stat & (PSC_I2SSTAT_TB | PSC_I2SSTAT_RB))) { 196 ret = au1xpsc_i2s_configure(pscdata); 197 if (ret) 198 goto out; 199 } 200 201 au_writel(I2SPCR_CLRFIFO(stype), I2S_PCR(pscdata)); 202 au_sync(); 203 au_writel(I2SPCR_START(stype), I2S_PCR(pscdata)); 204 au_sync(); 205 206 /* wait for start confirmation */ 207 tmo = 1000000; 208 while (!(au_readl(I2S_STAT(pscdata)) & I2SSTAT_BUSY(stype)) && tmo) 209 tmo--; 210 211 if (!tmo) { 212 au_writel(I2SPCR_STOP(stype), I2S_PCR(pscdata)); 213 au_sync(); 214 ret = -ETIMEDOUT; 215 } 216 out: 217 return ret; 218 } 219 220 static int au1xpsc_i2s_stop(struct au1xpsc_audio_data *pscdata, int stype) 221 { 222 unsigned long tmo, stat; 223 224 au_writel(I2SPCR_STOP(stype), I2S_PCR(pscdata)); 225 au_sync(); 226 227 /* wait for stop confirmation */ 228 tmo = 1000000; 229 while ((au_readl(I2S_STAT(pscdata)) & I2SSTAT_BUSY(stype)) && tmo) 230 tmo--; 231 232 /* if both TX and RX are idle, disable PSC */ 233 stat = au_readl(I2S_STAT(pscdata)); 234 if (!(stat & (PSC_I2SSTAT_TB | PSC_I2SSTAT_RB))) { 235 au_writel(0, I2S_CFG(pscdata)); 236 au_sync(); 237 au_writel(PSC_CTRL_SUSPEND, PSC_CTRL(pscdata)); 238 au_sync(); 239 } 240 return 0; 241 } 242 243 static int au1xpsc_i2s_trigger(struct snd_pcm_substream *substream, int cmd) 244 { 245 struct au1xpsc_audio_data *pscdata = au1xpsc_i2s_workdata; 246 int ret, stype = SUBSTREAM_TYPE(substream); 247 248 switch (cmd) { 249 case SNDRV_PCM_TRIGGER_START: 250 case SNDRV_PCM_TRIGGER_RESUME: 251 ret = au1xpsc_i2s_start(pscdata, stype); 252 break; 253 case SNDRV_PCM_TRIGGER_STOP: 254 case SNDRV_PCM_TRIGGER_SUSPEND: 255 ret = au1xpsc_i2s_stop(pscdata, stype); 256 break; 257 default: 258 ret = -EINVAL; 259 } 260 return ret; 261 } 262 263 static int au1xpsc_i2s_probe(struct platform_device *pdev, 264 struct snd_soc_dai *dai) 265 { 266 struct resource *r; 267 unsigned long sel; 268 int ret; 269 270 if (au1xpsc_i2s_workdata) 271 return -EBUSY; 272 273 au1xpsc_i2s_workdata = 274 kzalloc(sizeof(struct au1xpsc_audio_data), GFP_KERNEL); 275 if (!au1xpsc_i2s_workdata) 276 return -ENOMEM; 277 278 r = platform_get_resource(pdev, IORESOURCE_MEM, 0); 279 if (!r) { 280 ret = -ENODEV; 281 goto out0; 282 } 283 284 ret = -EBUSY; 285 au1xpsc_i2s_workdata->ioarea = 286 request_mem_region(r->start, r->end - r->start + 1, 287 "au1xpsc_i2s"); 288 if (!au1xpsc_i2s_workdata->ioarea) 289 goto out0; 290 291 au1xpsc_i2s_workdata->mmio = ioremap(r->start, 0xffff); 292 if (!au1xpsc_i2s_workdata->mmio) 293 goto out1; 294 295 /* preserve PSC clock source set up by platform (dev.platform_data 296 * is already occupied by soc layer) 297 */ 298 sel = au_readl(PSC_SEL(au1xpsc_i2s_workdata)) & PSC_SEL_CLK_MASK; 299 au_writel(PSC_CTRL_DISABLE, PSC_CTRL(au1xpsc_i2s_workdata)); 300 au_sync(); 301 au_writel(PSC_SEL_PS_I2SMODE | sel, PSC_SEL(au1xpsc_i2s_workdata)); 302 au_writel(0, I2S_CFG(au1xpsc_i2s_workdata)); 303 au_sync(); 304 305 /* preconfigure: set max rx/tx fifo depths */ 306 au1xpsc_i2s_workdata->cfg |= 307 PSC_I2SCFG_RT_FIFO8 | PSC_I2SCFG_TT_FIFO8; 308 309 /* don't wait for I2S core to become ready now; clocks may not 310 * be running yet; depending on clock input for PSC a wait might 311 * time out. 312 */ 313 314 return 0; 315 316 out1: 317 release_resource(au1xpsc_i2s_workdata->ioarea); 318 kfree(au1xpsc_i2s_workdata->ioarea); 319 out0: 320 kfree(au1xpsc_i2s_workdata); 321 au1xpsc_i2s_workdata = NULL; 322 return ret; 323 } 324 325 static void au1xpsc_i2s_remove(struct platform_device *pdev, 326 struct snd_soc_dai *dai) 327 { 328 au_writel(0, I2S_CFG(au1xpsc_i2s_workdata)); 329 au_sync(); 330 au_writel(PSC_CTRL_DISABLE, PSC_CTRL(au1xpsc_i2s_workdata)); 331 au_sync(); 332 333 iounmap(au1xpsc_i2s_workdata->mmio); 334 release_resource(au1xpsc_i2s_workdata->ioarea); 335 kfree(au1xpsc_i2s_workdata->ioarea); 336 kfree(au1xpsc_i2s_workdata); 337 au1xpsc_i2s_workdata = NULL; 338 } 339 340 static int au1xpsc_i2s_suspend(struct platform_device *pdev, 341 struct snd_soc_dai *cpu_dai) 342 { 343 /* save interesting register and disable PSC */ 344 au1xpsc_i2s_workdata->pm[0] = 345 au_readl(PSC_SEL(au1xpsc_i2s_workdata)); 346 347 au_writel(0, I2S_CFG(au1xpsc_i2s_workdata)); 348 au_sync(); 349 au_writel(PSC_CTRL_DISABLE, PSC_CTRL(au1xpsc_i2s_workdata)); 350 au_sync(); 351 352 return 0; 353 } 354 355 static int au1xpsc_i2s_resume(struct platform_device *pdev, 356 struct snd_soc_dai *cpu_dai) 357 { 358 /* select I2S mode and PSC clock */ 359 au_writel(PSC_CTRL_DISABLE, PSC_CTRL(au1xpsc_i2s_workdata)); 360 au_sync(); 361 au_writel(0, PSC_SEL(au1xpsc_i2s_workdata)); 362 au_sync(); 363 au_writel(au1xpsc_i2s_workdata->pm[0], 364 PSC_SEL(au1xpsc_i2s_workdata)); 365 au_sync(); 366 367 return 0; 368 } 369 370 struct snd_soc_dai au1xpsc_i2s_dai = { 371 .name = "au1xpsc_i2s", 372 .type = SND_SOC_DAI_I2S, 373 .probe = au1xpsc_i2s_probe, 374 .remove = au1xpsc_i2s_remove, 375 .suspend = au1xpsc_i2s_suspend, 376 .resume = au1xpsc_i2s_resume, 377 .playback = { 378 .rates = AU1XPSC_I2S_RATES, 379 .formats = AU1XPSC_I2S_FMTS, 380 .channels_min = 2, 381 .channels_max = 8, /* 2 without external help */ 382 }, 383 .capture = { 384 .rates = AU1XPSC_I2S_RATES, 385 .formats = AU1XPSC_I2S_FMTS, 386 .channels_min = 2, 387 .channels_max = 8, /* 2 without external help */ 388 }, 389 .ops = { 390 .trigger = au1xpsc_i2s_trigger, 391 .hw_params = au1xpsc_i2s_hw_params, 392 }, 393 .dai_ops = { 394 .set_fmt = au1xpsc_i2s_set_fmt, 395 }, 396 }; 397 EXPORT_SYMBOL(au1xpsc_i2s_dai); 398 399 static int __init au1xpsc_i2s_init(void) 400 { 401 au1xpsc_i2s_workdata = NULL; 402 return 0; 403 } 404 405 static void __exit au1xpsc_i2s_exit(void) 406 { 407 } 408 409 module_init(au1xpsc_i2s_init); 410 module_exit(au1xpsc_i2s_exit); 411 412 MODULE_LICENSE("GPL"); 413 MODULE_DESCRIPTION("Au12x0/Au1550 PSC I2S ALSA ASoC audio driver"); 414 MODULE_AUTHOR("Manuel Lauss <mano@roarinelk.homelinux.net>"); 415