1 /* 2 * Au12x0/Au1550 PSC ALSA ASoC audio support. 3 * 4 * (c) 2007-2009 MSC Vertriebsges.m.b.H., 5 * Manuel Lauss <manuel.lauss@gmail.com> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 * 11 * Au1xxx-PSC AC97 glue. 12 * 13 * NOTE: all of these drivers can only work with a SINGLE instance 14 * of a PSC. Multiple independent audio devices are impossible 15 * with ASoC v1. 16 */ 17 18 #include <linux/init.h> 19 #include <linux/module.h> 20 #include <linux/device.h> 21 #include <linux/delay.h> 22 #include <linux/mutex.h> 23 #include <linux/suspend.h> 24 #include <sound/core.h> 25 #include <sound/pcm.h> 26 #include <sound/initval.h> 27 #include <sound/soc.h> 28 #include <asm/mach-au1x00/au1000.h> 29 #include <asm/mach-au1x00/au1xxx_psc.h> 30 31 #include "psc.h" 32 33 /* how often to retry failed codec register reads/writes */ 34 #define AC97_RW_RETRIES 5 35 36 #define AC97_DIR \ 37 (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE) 38 39 #define AC97_RATES \ 40 SNDRV_PCM_RATE_8000_48000 41 42 #define AC97_FMTS \ 43 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3BE) 44 45 #define AC97PCR_START(stype) \ 46 ((stype) == PCM_TX ? PSC_AC97PCR_TS : PSC_AC97PCR_RS) 47 #define AC97PCR_STOP(stype) \ 48 ((stype) == PCM_TX ? PSC_AC97PCR_TP : PSC_AC97PCR_RP) 49 #define AC97PCR_CLRFIFO(stype) \ 50 ((stype) == PCM_TX ? PSC_AC97PCR_TC : PSC_AC97PCR_RC) 51 52 #define AC97STAT_BUSY(stype) \ 53 ((stype) == PCM_TX ? PSC_AC97STAT_TB : PSC_AC97STAT_RB) 54 55 /* instance data. There can be only one, MacLeod!!!! */ 56 static struct au1xpsc_audio_data *au1xpsc_ac97_workdata; 57 58 /* AC97 controller reads codec register */ 59 static unsigned short au1xpsc_ac97_read(struct snd_ac97 *ac97, 60 unsigned short reg) 61 { 62 /* FIXME */ 63 struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata; 64 unsigned short retry, tmo; 65 unsigned long data; 66 67 au_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata)); 68 au_sync(); 69 70 retry = AC97_RW_RETRIES; 71 do { 72 mutex_lock(&pscdata->lock); 73 74 au_writel(PSC_AC97CDC_RD | PSC_AC97CDC_INDX(reg), 75 AC97_CDC(pscdata)); 76 au_sync(); 77 78 tmo = 20; 79 do { 80 udelay(21); 81 if (au_readl(AC97_EVNT(pscdata)) & PSC_AC97EVNT_CD) 82 break; 83 } while (--tmo); 84 85 data = au_readl(AC97_CDC(pscdata)); 86 87 au_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata)); 88 au_sync(); 89 90 mutex_unlock(&pscdata->lock); 91 92 if (reg != ((data >> 16) & 0x7f)) 93 tmo = 1; /* wrong register, try again */ 94 95 } while (--retry && !tmo); 96 97 return retry ? data & 0xffff : 0xffff; 98 } 99 100 /* AC97 controller writes to codec register */ 101 static void au1xpsc_ac97_write(struct snd_ac97 *ac97, unsigned short reg, 102 unsigned short val) 103 { 104 /* FIXME */ 105 struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata; 106 unsigned int tmo, retry; 107 108 au_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata)); 109 au_sync(); 110 111 retry = AC97_RW_RETRIES; 112 do { 113 mutex_lock(&pscdata->lock); 114 115 au_writel(PSC_AC97CDC_INDX(reg) | (val & 0xffff), 116 AC97_CDC(pscdata)); 117 au_sync(); 118 119 tmo = 20; 120 do { 121 udelay(21); 122 if (au_readl(AC97_EVNT(pscdata)) & PSC_AC97EVNT_CD) 123 break; 124 } while (--tmo); 125 126 au_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata)); 127 au_sync(); 128 129 mutex_unlock(&pscdata->lock); 130 } while (--retry && !tmo); 131 } 132 133 /* AC97 controller asserts a warm reset */ 134 static void au1xpsc_ac97_warm_reset(struct snd_ac97 *ac97) 135 { 136 /* FIXME */ 137 struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata; 138 139 au_writel(PSC_AC97RST_SNC, AC97_RST(pscdata)); 140 au_sync(); 141 msleep(10); 142 au_writel(0, AC97_RST(pscdata)); 143 au_sync(); 144 } 145 146 static void au1xpsc_ac97_cold_reset(struct snd_ac97 *ac97) 147 { 148 /* FIXME */ 149 struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata; 150 int i; 151 152 /* disable PSC during cold reset */ 153 au_writel(0, AC97_CFG(au1xpsc_ac97_workdata)); 154 au_sync(); 155 au_writel(PSC_CTRL_DISABLE, PSC_CTRL(pscdata)); 156 au_sync(); 157 158 /* issue cold reset */ 159 au_writel(PSC_AC97RST_RST, AC97_RST(pscdata)); 160 au_sync(); 161 msleep(500); 162 au_writel(0, AC97_RST(pscdata)); 163 au_sync(); 164 165 /* enable PSC */ 166 au_writel(PSC_CTRL_ENABLE, PSC_CTRL(pscdata)); 167 au_sync(); 168 169 /* wait for PSC to indicate it's ready */ 170 i = 1000; 171 while (!((au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_SR)) && (--i)) 172 msleep(1); 173 174 if (i == 0) { 175 printk(KERN_ERR "au1xpsc-ac97: PSC not ready!\n"); 176 return; 177 } 178 179 /* enable the ac97 function */ 180 au_writel(pscdata->cfg | PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata)); 181 au_sync(); 182 183 /* wait for AC97 core to become ready */ 184 i = 1000; 185 while (!((au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_DR)) && (--i)) 186 msleep(1); 187 if (i == 0) 188 printk(KERN_ERR "au1xpsc-ac97: AC97 ctrl not ready\n"); 189 } 190 191 /* AC97 controller operations */ 192 struct snd_ac97_bus_ops soc_ac97_ops = { 193 .read = au1xpsc_ac97_read, 194 .write = au1xpsc_ac97_write, 195 .reset = au1xpsc_ac97_cold_reset, 196 .warm_reset = au1xpsc_ac97_warm_reset, 197 }; 198 EXPORT_SYMBOL_GPL(soc_ac97_ops); 199 200 static int au1xpsc_ac97_hw_params(struct snd_pcm_substream *substream, 201 struct snd_pcm_hw_params *params, 202 struct snd_soc_dai *dai) 203 { 204 /* FIXME */ 205 struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata; 206 unsigned long r, ro, stat; 207 int chans, t, stype = SUBSTREAM_TYPE(substream); 208 209 chans = params_channels(params); 210 211 r = ro = au_readl(AC97_CFG(pscdata)); 212 stat = au_readl(AC97_STAT(pscdata)); 213 214 /* already active? */ 215 if (stat & (PSC_AC97STAT_TB | PSC_AC97STAT_RB)) { 216 /* reject parameters not currently set up */ 217 if ((PSC_AC97CFG_GET_LEN(r) != params->msbits) || 218 (pscdata->rate != params_rate(params))) 219 return -EINVAL; 220 } else { 221 222 /* set sample bitdepth: REG[24:21]=(BITS-2)/2 */ 223 r &= ~PSC_AC97CFG_LEN_MASK; 224 r |= PSC_AC97CFG_SET_LEN(params->msbits); 225 226 /* channels: enable slots for front L/R channel */ 227 if (stype == PCM_TX) { 228 r &= ~PSC_AC97CFG_TXSLOT_MASK; 229 r |= PSC_AC97CFG_TXSLOT_ENA(3); 230 r |= PSC_AC97CFG_TXSLOT_ENA(4); 231 } else { 232 r &= ~PSC_AC97CFG_RXSLOT_MASK; 233 r |= PSC_AC97CFG_RXSLOT_ENA(3); 234 r |= PSC_AC97CFG_RXSLOT_ENA(4); 235 } 236 237 /* do we need to poke the hardware? */ 238 if (!(r ^ ro)) 239 goto out; 240 241 /* ac97 engine is about to be disabled */ 242 mutex_lock(&pscdata->lock); 243 244 /* disable AC97 device controller first... */ 245 au_writel(r & ~PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata)); 246 au_sync(); 247 248 /* ...wait for it... */ 249 t = 100; 250 while ((au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_DR) && --t) 251 msleep(1); 252 253 if (!t) 254 printk(KERN_ERR "PSC-AC97: can't disable!\n"); 255 256 /* ...write config... */ 257 au_writel(r, AC97_CFG(pscdata)); 258 au_sync(); 259 260 /* ...enable the AC97 controller again... */ 261 au_writel(r | PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata)); 262 au_sync(); 263 264 /* ...and wait for ready bit */ 265 t = 100; 266 while ((!(au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_DR)) && --t) 267 msleep(1); 268 269 if (!t) 270 printk(KERN_ERR "PSC-AC97: can't enable!\n"); 271 272 mutex_unlock(&pscdata->lock); 273 274 pscdata->cfg = r; 275 pscdata->rate = params_rate(params); 276 } 277 278 out: 279 return 0; 280 } 281 282 static int au1xpsc_ac97_trigger(struct snd_pcm_substream *substream, 283 int cmd, struct snd_soc_dai *dai) 284 { 285 /* FIXME */ 286 struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata; 287 int ret, stype = SUBSTREAM_TYPE(substream); 288 289 ret = 0; 290 291 switch (cmd) { 292 case SNDRV_PCM_TRIGGER_START: 293 case SNDRV_PCM_TRIGGER_RESUME: 294 au_writel(AC97PCR_CLRFIFO(stype), AC97_PCR(pscdata)); 295 au_sync(); 296 au_writel(AC97PCR_START(stype), AC97_PCR(pscdata)); 297 au_sync(); 298 break; 299 case SNDRV_PCM_TRIGGER_STOP: 300 case SNDRV_PCM_TRIGGER_SUSPEND: 301 au_writel(AC97PCR_STOP(stype), AC97_PCR(pscdata)); 302 au_sync(); 303 304 while (au_readl(AC97_STAT(pscdata)) & AC97STAT_BUSY(stype)) 305 asm volatile ("nop"); 306 307 au_writel(AC97PCR_CLRFIFO(stype), AC97_PCR(pscdata)); 308 au_sync(); 309 310 break; 311 default: 312 ret = -EINVAL; 313 } 314 return ret; 315 } 316 317 static int au1xpsc_ac97_probe(struct platform_device *pdev, 318 struct snd_soc_dai *dai) 319 { 320 return au1xpsc_ac97_workdata ? 0 : -ENODEV; 321 } 322 323 static void au1xpsc_ac97_remove(struct platform_device *pdev, 324 struct snd_soc_dai *dai) 325 { 326 } 327 328 static struct snd_soc_dai_ops au1xpsc_ac97_dai_ops = { 329 .trigger = au1xpsc_ac97_trigger, 330 .hw_params = au1xpsc_ac97_hw_params, 331 }; 332 333 struct snd_soc_dai au1xpsc_ac97_dai = { 334 .name = "au1xpsc_ac97", 335 .ac97_control = 1, 336 .probe = au1xpsc_ac97_probe, 337 .remove = au1xpsc_ac97_remove, 338 .playback = { 339 .rates = AC97_RATES, 340 .formats = AC97_FMTS, 341 .channels_min = 2, 342 .channels_max = 2, 343 }, 344 .capture = { 345 .rates = AC97_RATES, 346 .formats = AC97_FMTS, 347 .channels_min = 2, 348 .channels_max = 2, 349 }, 350 .ops = &au1xpsc_ac97_dai_ops, 351 }; 352 EXPORT_SYMBOL_GPL(au1xpsc_ac97_dai); 353 354 static int __devinit au1xpsc_ac97_drvprobe(struct platform_device *pdev) 355 { 356 int ret; 357 struct resource *r; 358 unsigned long sel; 359 struct au1xpsc_audio_data *wd; 360 361 if (au1xpsc_ac97_workdata) 362 return -EBUSY; 363 364 wd = kzalloc(sizeof(struct au1xpsc_audio_data), GFP_KERNEL); 365 if (!wd) 366 return -ENOMEM; 367 368 mutex_init(&wd->lock); 369 370 r = platform_get_resource(pdev, IORESOURCE_MEM, 0); 371 if (!r) { 372 ret = -ENODEV; 373 goto out0; 374 } 375 376 ret = -EBUSY; 377 wd->ioarea = request_mem_region(r->start, r->end - r->start + 1, 378 "au1xpsc_ac97"); 379 if (!wd->ioarea) 380 goto out0; 381 382 wd->mmio = ioremap(r->start, 0xffff); 383 if (!wd->mmio) 384 goto out1; 385 386 /* configuration: max dma trigger threshold, enable ac97 */ 387 wd->cfg = PSC_AC97CFG_RT_FIFO8 | PSC_AC97CFG_TT_FIFO8 | 388 PSC_AC97CFG_DE_ENABLE; 389 390 /* preserve PSC clock source set up by platform */ 391 sel = au_readl(PSC_SEL(wd)) & PSC_SEL_CLK_MASK; 392 au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd)); 393 au_sync(); 394 au_writel(0, PSC_SEL(wd)); 395 au_sync(); 396 au_writel(PSC_SEL_PS_AC97MODE | sel, PSC_SEL(wd)); 397 au_sync(); 398 399 ret = snd_soc_register_dai(&au1xpsc_ac97_dai); 400 if (ret) 401 goto out1; 402 403 wd->dmapd = au1xpsc_pcm_add(pdev); 404 if (wd->dmapd) { 405 platform_set_drvdata(pdev, wd); 406 au1xpsc_ac97_workdata = wd; /* MDEV */ 407 return 0; 408 } 409 410 snd_soc_unregister_dai(&au1xpsc_ac97_dai); 411 out1: 412 release_resource(wd->ioarea); 413 kfree(wd->ioarea); 414 out0: 415 kfree(wd); 416 return ret; 417 } 418 419 static int __devexit au1xpsc_ac97_drvremove(struct platform_device *pdev) 420 { 421 struct au1xpsc_audio_data *wd = platform_get_drvdata(pdev); 422 423 if (wd->dmapd) 424 au1xpsc_pcm_destroy(wd->dmapd); 425 426 snd_soc_unregister_dai(&au1xpsc_ac97_dai); 427 428 /* disable PSC completely */ 429 au_writel(0, AC97_CFG(wd)); 430 au_sync(); 431 au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd)); 432 au_sync(); 433 434 iounmap(wd->mmio); 435 release_resource(wd->ioarea); 436 kfree(wd->ioarea); 437 kfree(wd); 438 439 au1xpsc_ac97_workdata = NULL; /* MDEV */ 440 441 return 0; 442 } 443 444 #ifdef CONFIG_PM 445 static int au1xpsc_ac97_drvsuspend(struct device *dev) 446 { 447 struct au1xpsc_audio_data *wd = dev_get_drvdata(dev); 448 449 /* save interesting registers and disable PSC */ 450 wd->pm[0] = au_readl(PSC_SEL(wd)); 451 452 au_writel(0, AC97_CFG(wd)); 453 au_sync(); 454 au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd)); 455 au_sync(); 456 457 return 0; 458 } 459 460 static int au1xpsc_ac97_drvresume(struct device *dev) 461 { 462 struct au1xpsc_audio_data *wd = dev_get_drvdata(dev); 463 464 /* restore PSC clock config */ 465 au_writel(wd->pm[0] | PSC_SEL_PS_AC97MODE, PSC_SEL(wd)); 466 au_sync(); 467 468 /* after this point the ac97 core will cold-reset the codec. 469 * During cold-reset the PSC is reinitialized and the last 470 * configuration set up in hw_params() is restored. 471 */ 472 return 0; 473 } 474 475 static struct dev_pm_ops au1xpscac97_pmops = { 476 .suspend = au1xpsc_ac97_drvsuspend, 477 .resume = au1xpsc_ac97_drvresume, 478 }; 479 480 #define AU1XPSCAC97_PMOPS &au1xpscac97_pmops 481 482 #else 483 484 #define AU1XPSCAC97_PMOPS NULL 485 486 #endif 487 488 static struct platform_driver au1xpsc_ac97_driver = { 489 .driver = { 490 .name = "au1xpsc_ac97", 491 .owner = THIS_MODULE, 492 .pm = AU1XPSCAC97_PMOPS, 493 }, 494 .probe = au1xpsc_ac97_drvprobe, 495 .remove = __devexit_p(au1xpsc_ac97_drvremove), 496 }; 497 498 static int __init au1xpsc_ac97_load(void) 499 { 500 au1xpsc_ac97_workdata = NULL; 501 return platform_driver_register(&au1xpsc_ac97_driver); 502 } 503 504 static void __exit au1xpsc_ac97_unload(void) 505 { 506 platform_driver_unregister(&au1xpsc_ac97_driver); 507 } 508 509 module_init(au1xpsc_ac97_load); 510 module_exit(au1xpsc_ac97_unload); 511 512 MODULE_LICENSE("GPL"); 513 MODULE_DESCRIPTION("Au12x0/Au1550 PSC AC97 ALSA ASoC audio driver"); 514 MODULE_AUTHOR("Manuel Lauss"); 515 516