1 /* 2 * Au12x0/Au1550 PSC ALSA ASoC audio support. 3 * 4 * (c) 2007-2009 MSC Vertriebsges.m.b.H., 5 * Manuel Lauss <manuel.lauss@gmail.com> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 * 11 * Au1xxx-PSC AC97 glue. 12 * 13 */ 14 15 #include <linux/init.h> 16 #include <linux/module.h> 17 #include <linux/slab.h> 18 #include <linux/device.h> 19 #include <linux/delay.h> 20 #include <linux/mutex.h> 21 #include <linux/suspend.h> 22 #include <sound/core.h> 23 #include <sound/pcm.h> 24 #include <sound/initval.h> 25 #include <sound/soc.h> 26 #include <asm/mach-au1x00/au1000.h> 27 #include <asm/mach-au1x00/au1xxx_psc.h> 28 29 #include "psc.h" 30 31 /* how often to retry failed codec register reads/writes */ 32 #define AC97_RW_RETRIES 5 33 34 #define AC97_DIR \ 35 (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE) 36 37 #define AC97_RATES \ 38 SNDRV_PCM_RATE_8000_48000 39 40 #define AC97_FMTS \ 41 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3BE) 42 43 #define AC97PCR_START(stype) \ 44 ((stype) == PCM_TX ? PSC_AC97PCR_TS : PSC_AC97PCR_RS) 45 #define AC97PCR_STOP(stype) \ 46 ((stype) == PCM_TX ? PSC_AC97PCR_TP : PSC_AC97PCR_RP) 47 #define AC97PCR_CLRFIFO(stype) \ 48 ((stype) == PCM_TX ? PSC_AC97PCR_TC : PSC_AC97PCR_RC) 49 50 #define AC97STAT_BUSY(stype) \ 51 ((stype) == PCM_TX ? PSC_AC97STAT_TB : PSC_AC97STAT_RB) 52 53 /* instance data. There can be only one, MacLeod!!!! */ 54 static struct au1xpsc_audio_data *au1xpsc_ac97_workdata; 55 56 #if 0 57 58 /* this could theoretically work, but ac97->bus->card->private_data can be NULL 59 * when snd_ac97_mixer() is called; I don't know if the rest further down the 60 * chain are always valid either. 61 */ 62 static inline struct au1xpsc_audio_data *ac97_to_pscdata(struct snd_ac97 *x) 63 { 64 struct snd_soc_card *c = x->bus->card->private_data; 65 return snd_soc_dai_get_drvdata(c->rtd->cpu_dai); 66 } 67 68 #else 69 70 #define ac97_to_pscdata(x) au1xpsc_ac97_workdata 71 72 #endif 73 74 /* AC97 controller reads codec register */ 75 static unsigned short au1xpsc_ac97_read(struct snd_ac97 *ac97, 76 unsigned short reg) 77 { 78 struct au1xpsc_audio_data *pscdata = ac97_to_pscdata(ac97); 79 unsigned short retry, tmo; 80 unsigned long data; 81 82 au_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata)); 83 au_sync(); 84 85 retry = AC97_RW_RETRIES; 86 do { 87 mutex_lock(&pscdata->lock); 88 89 au_writel(PSC_AC97CDC_RD | PSC_AC97CDC_INDX(reg), 90 AC97_CDC(pscdata)); 91 au_sync(); 92 93 tmo = 20; 94 do { 95 udelay(21); 96 if (au_readl(AC97_EVNT(pscdata)) & PSC_AC97EVNT_CD) 97 break; 98 } while (--tmo); 99 100 data = au_readl(AC97_CDC(pscdata)); 101 102 au_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata)); 103 au_sync(); 104 105 mutex_unlock(&pscdata->lock); 106 107 if (reg != ((data >> 16) & 0x7f)) 108 tmo = 1; /* wrong register, try again */ 109 110 } while (--retry && !tmo); 111 112 return retry ? data & 0xffff : 0xffff; 113 } 114 115 /* AC97 controller writes to codec register */ 116 static void au1xpsc_ac97_write(struct snd_ac97 *ac97, unsigned short reg, 117 unsigned short val) 118 { 119 struct au1xpsc_audio_data *pscdata = ac97_to_pscdata(ac97); 120 unsigned int tmo, retry; 121 122 au_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata)); 123 au_sync(); 124 125 retry = AC97_RW_RETRIES; 126 do { 127 mutex_lock(&pscdata->lock); 128 129 au_writel(PSC_AC97CDC_INDX(reg) | (val & 0xffff), 130 AC97_CDC(pscdata)); 131 au_sync(); 132 133 tmo = 20; 134 do { 135 udelay(21); 136 if (au_readl(AC97_EVNT(pscdata)) & PSC_AC97EVNT_CD) 137 break; 138 } while (--tmo); 139 140 au_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata)); 141 au_sync(); 142 143 mutex_unlock(&pscdata->lock); 144 } while (--retry && !tmo); 145 } 146 147 /* AC97 controller asserts a warm reset */ 148 static void au1xpsc_ac97_warm_reset(struct snd_ac97 *ac97) 149 { 150 struct au1xpsc_audio_data *pscdata = ac97_to_pscdata(ac97); 151 152 au_writel(PSC_AC97RST_SNC, AC97_RST(pscdata)); 153 au_sync(); 154 msleep(10); 155 au_writel(0, AC97_RST(pscdata)); 156 au_sync(); 157 } 158 159 static void au1xpsc_ac97_cold_reset(struct snd_ac97 *ac97) 160 { 161 struct au1xpsc_audio_data *pscdata = ac97_to_pscdata(ac97); 162 int i; 163 164 /* disable PSC during cold reset */ 165 au_writel(0, AC97_CFG(au1xpsc_ac97_workdata)); 166 au_sync(); 167 au_writel(PSC_CTRL_DISABLE, PSC_CTRL(pscdata)); 168 au_sync(); 169 170 /* issue cold reset */ 171 au_writel(PSC_AC97RST_RST, AC97_RST(pscdata)); 172 au_sync(); 173 msleep(500); 174 au_writel(0, AC97_RST(pscdata)); 175 au_sync(); 176 177 /* enable PSC */ 178 au_writel(PSC_CTRL_ENABLE, PSC_CTRL(pscdata)); 179 au_sync(); 180 181 /* wait for PSC to indicate it's ready */ 182 i = 1000; 183 while (!((au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_SR)) && (--i)) 184 msleep(1); 185 186 if (i == 0) { 187 printk(KERN_ERR "au1xpsc-ac97: PSC not ready!\n"); 188 return; 189 } 190 191 /* enable the ac97 function */ 192 au_writel(pscdata->cfg | PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata)); 193 au_sync(); 194 195 /* wait for AC97 core to become ready */ 196 i = 1000; 197 while (!((au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_DR)) && (--i)) 198 msleep(1); 199 if (i == 0) 200 printk(KERN_ERR "au1xpsc-ac97: AC97 ctrl not ready\n"); 201 } 202 203 /* AC97 controller operations */ 204 struct snd_ac97_bus_ops soc_ac97_ops = { 205 .read = au1xpsc_ac97_read, 206 .write = au1xpsc_ac97_write, 207 .reset = au1xpsc_ac97_cold_reset, 208 .warm_reset = au1xpsc_ac97_warm_reset, 209 }; 210 EXPORT_SYMBOL_GPL(soc_ac97_ops); 211 212 static int au1xpsc_ac97_hw_params(struct snd_pcm_substream *substream, 213 struct snd_pcm_hw_params *params, 214 struct snd_soc_dai *dai) 215 { 216 struct au1xpsc_audio_data *pscdata = snd_soc_dai_get_drvdata(dai); 217 unsigned long r, ro, stat; 218 int chans, t, stype = SUBSTREAM_TYPE(substream); 219 220 chans = params_channels(params); 221 222 r = ro = au_readl(AC97_CFG(pscdata)); 223 stat = au_readl(AC97_STAT(pscdata)); 224 225 /* already active? */ 226 if (stat & (PSC_AC97STAT_TB | PSC_AC97STAT_RB)) { 227 /* reject parameters not currently set up */ 228 if ((PSC_AC97CFG_GET_LEN(r) != params->msbits) || 229 (pscdata->rate != params_rate(params))) 230 return -EINVAL; 231 } else { 232 233 /* set sample bitdepth: REG[24:21]=(BITS-2)/2 */ 234 r &= ~PSC_AC97CFG_LEN_MASK; 235 r |= PSC_AC97CFG_SET_LEN(params->msbits); 236 237 /* channels: enable slots for front L/R channel */ 238 if (stype == PCM_TX) { 239 r &= ~PSC_AC97CFG_TXSLOT_MASK; 240 r |= PSC_AC97CFG_TXSLOT_ENA(3); 241 r |= PSC_AC97CFG_TXSLOT_ENA(4); 242 } else { 243 r &= ~PSC_AC97CFG_RXSLOT_MASK; 244 r |= PSC_AC97CFG_RXSLOT_ENA(3); 245 r |= PSC_AC97CFG_RXSLOT_ENA(4); 246 } 247 248 /* do we need to poke the hardware? */ 249 if (!(r ^ ro)) 250 goto out; 251 252 /* ac97 engine is about to be disabled */ 253 mutex_lock(&pscdata->lock); 254 255 /* disable AC97 device controller first... */ 256 au_writel(r & ~PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata)); 257 au_sync(); 258 259 /* ...wait for it... */ 260 t = 100; 261 while ((au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_DR) && --t) 262 msleep(1); 263 264 if (!t) 265 printk(KERN_ERR "PSC-AC97: can't disable!\n"); 266 267 /* ...write config... */ 268 au_writel(r, AC97_CFG(pscdata)); 269 au_sync(); 270 271 /* ...enable the AC97 controller again... */ 272 au_writel(r | PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata)); 273 au_sync(); 274 275 /* ...and wait for ready bit */ 276 t = 100; 277 while ((!(au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_DR)) && --t) 278 msleep(1); 279 280 if (!t) 281 printk(KERN_ERR "PSC-AC97: can't enable!\n"); 282 283 mutex_unlock(&pscdata->lock); 284 285 pscdata->cfg = r; 286 pscdata->rate = params_rate(params); 287 } 288 289 out: 290 return 0; 291 } 292 293 static int au1xpsc_ac97_trigger(struct snd_pcm_substream *substream, 294 int cmd, struct snd_soc_dai *dai) 295 { 296 struct au1xpsc_audio_data *pscdata = snd_soc_dai_get_drvdata(dai); 297 int ret, stype = SUBSTREAM_TYPE(substream); 298 299 ret = 0; 300 301 switch (cmd) { 302 case SNDRV_PCM_TRIGGER_START: 303 case SNDRV_PCM_TRIGGER_RESUME: 304 au_writel(AC97PCR_CLRFIFO(stype), AC97_PCR(pscdata)); 305 au_sync(); 306 au_writel(AC97PCR_START(stype), AC97_PCR(pscdata)); 307 au_sync(); 308 break; 309 case SNDRV_PCM_TRIGGER_STOP: 310 case SNDRV_PCM_TRIGGER_SUSPEND: 311 au_writel(AC97PCR_STOP(stype), AC97_PCR(pscdata)); 312 au_sync(); 313 314 while (au_readl(AC97_STAT(pscdata)) & AC97STAT_BUSY(stype)) 315 asm volatile ("nop"); 316 317 au_writel(AC97PCR_CLRFIFO(stype), AC97_PCR(pscdata)); 318 au_sync(); 319 320 break; 321 default: 322 ret = -EINVAL; 323 } 324 return ret; 325 } 326 327 static int au1xpsc_ac97_probe(struct snd_soc_dai *dai) 328 { 329 return au1xpsc_ac97_workdata ? 0 : -ENODEV; 330 } 331 332 static struct snd_soc_dai_ops au1xpsc_ac97_dai_ops = { 333 .trigger = au1xpsc_ac97_trigger, 334 .hw_params = au1xpsc_ac97_hw_params, 335 }; 336 337 static const struct snd_soc_dai_driver au1xpsc_ac97_dai_template = { 338 .ac97_control = 1, 339 .probe = au1xpsc_ac97_probe, 340 .playback = { 341 .rates = AC97_RATES, 342 .formats = AC97_FMTS, 343 .channels_min = 2, 344 .channels_max = 2, 345 }, 346 .capture = { 347 .rates = AC97_RATES, 348 .formats = AC97_FMTS, 349 .channels_min = 2, 350 .channels_max = 2, 351 }, 352 .ops = &au1xpsc_ac97_dai_ops, 353 }; 354 355 static int __devinit au1xpsc_ac97_drvprobe(struct platform_device *pdev) 356 { 357 int ret; 358 struct resource *r; 359 unsigned long sel; 360 struct au1xpsc_audio_data *wd; 361 362 wd = kzalloc(sizeof(struct au1xpsc_audio_data), GFP_KERNEL); 363 if (!wd) 364 return -ENOMEM; 365 366 mutex_init(&wd->lock); 367 368 r = platform_get_resource(pdev, IORESOURCE_MEM, 0); 369 if (!r) { 370 ret = -ENODEV; 371 goto out0; 372 } 373 374 ret = -EBUSY; 375 if (!request_mem_region(r->start, resource_size(r), pdev->name)) 376 goto out0; 377 378 wd->mmio = ioremap(r->start, resource_size(r)); 379 if (!wd->mmio) 380 goto out1; 381 382 /* configuration: max dma trigger threshold, enable ac97 */ 383 wd->cfg = PSC_AC97CFG_RT_FIFO8 | PSC_AC97CFG_TT_FIFO8 | 384 PSC_AC97CFG_DE_ENABLE; 385 386 /* preserve PSC clock source set up by platform */ 387 sel = au_readl(PSC_SEL(wd)) & PSC_SEL_CLK_MASK; 388 au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd)); 389 au_sync(); 390 au_writel(0, PSC_SEL(wd)); 391 au_sync(); 392 au_writel(PSC_SEL_PS_AC97MODE | sel, PSC_SEL(wd)); 393 au_sync(); 394 395 /* name the DAI like this device instance ("au1xpsc-ac97.PSCINDEX") */ 396 memcpy(&wd->dai_drv, &au1xpsc_ac97_dai_template, 397 sizeof(struct snd_soc_dai_driver)); 398 wd->dai_drv.name = dev_name(&pdev->dev); 399 400 platform_set_drvdata(pdev, wd); 401 402 ret = snd_soc_register_dai(&pdev->dev, &wd->dai_drv); 403 if (ret) 404 goto out1; 405 406 wd->dmapd = au1xpsc_pcm_add(pdev); 407 if (wd->dmapd) { 408 au1xpsc_ac97_workdata = wd; 409 return 0; 410 } 411 412 snd_soc_unregister_dai(&pdev->dev); 413 out1: 414 release_mem_region(r->start, resource_size(r)); 415 out0: 416 kfree(wd); 417 return ret; 418 } 419 420 static int __devexit au1xpsc_ac97_drvremove(struct platform_device *pdev) 421 { 422 struct au1xpsc_audio_data *wd = platform_get_drvdata(pdev); 423 struct resource *r = platform_get_resource(pdev, IORESOURCE_MEM, 0); 424 425 if (wd->dmapd) 426 au1xpsc_pcm_destroy(wd->dmapd); 427 428 snd_soc_unregister_dai(&pdev->dev); 429 430 /* disable PSC completely */ 431 au_writel(0, AC97_CFG(wd)); 432 au_sync(); 433 au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd)); 434 au_sync(); 435 436 iounmap(wd->mmio); 437 release_mem_region(r->start, resource_size(r)); 438 kfree(wd); 439 440 au1xpsc_ac97_workdata = NULL; /* MDEV */ 441 442 return 0; 443 } 444 445 #ifdef CONFIG_PM 446 static int au1xpsc_ac97_drvsuspend(struct device *dev) 447 { 448 struct au1xpsc_audio_data *wd = dev_get_drvdata(dev); 449 450 /* save interesting registers and disable PSC */ 451 wd->pm[0] = au_readl(PSC_SEL(wd)); 452 453 au_writel(0, AC97_CFG(wd)); 454 au_sync(); 455 au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd)); 456 au_sync(); 457 458 return 0; 459 } 460 461 static int au1xpsc_ac97_drvresume(struct device *dev) 462 { 463 struct au1xpsc_audio_data *wd = dev_get_drvdata(dev); 464 465 /* restore PSC clock config */ 466 au_writel(wd->pm[0] | PSC_SEL_PS_AC97MODE, PSC_SEL(wd)); 467 au_sync(); 468 469 /* after this point the ac97 core will cold-reset the codec. 470 * During cold-reset the PSC is reinitialized and the last 471 * configuration set up in hw_params() is restored. 472 */ 473 return 0; 474 } 475 476 static struct dev_pm_ops au1xpscac97_pmops = { 477 .suspend = au1xpsc_ac97_drvsuspend, 478 .resume = au1xpsc_ac97_drvresume, 479 }; 480 481 #define AU1XPSCAC97_PMOPS &au1xpscac97_pmops 482 483 #else 484 485 #define AU1XPSCAC97_PMOPS NULL 486 487 #endif 488 489 static struct platform_driver au1xpsc_ac97_driver = { 490 .driver = { 491 .name = "au1xpsc_ac97", 492 .owner = THIS_MODULE, 493 .pm = AU1XPSCAC97_PMOPS, 494 }, 495 .probe = au1xpsc_ac97_drvprobe, 496 .remove = __devexit_p(au1xpsc_ac97_drvremove), 497 }; 498 499 static int __init au1xpsc_ac97_load(void) 500 { 501 au1xpsc_ac97_workdata = NULL; 502 return platform_driver_register(&au1xpsc_ac97_driver); 503 } 504 505 static void __exit au1xpsc_ac97_unload(void) 506 { 507 platform_driver_unregister(&au1xpsc_ac97_driver); 508 } 509 510 module_init(au1xpsc_ac97_load); 511 module_exit(au1xpsc_ac97_unload); 512 513 MODULE_LICENSE("GPL"); 514 MODULE_DESCRIPTION("Au12x0/Au1550 PSC AC97 ALSA ASoC audio driver"); 515 MODULE_AUTHOR("Manuel Lauss"); 516 517