1 /* 2 * sam9g20_wm8731 -- SoC audio for AT91SAM9G20-based 3 * ATMEL AT91SAM9G20ek board. 4 * 5 * Copyright (C) 2005 SAN People 6 * Copyright (C) 2008 Atmel 7 * 8 * Authors: Sedji Gaouaou <sedji.gaouaou@atmel.com> 9 * 10 * Based on ati_b1_wm8731.c by: 11 * Frank Mandarino <fmandarino@endrelia.com> 12 * Copyright 2006 Endrelia Technologies Inc. 13 * Based on corgi.c by: 14 * Copyright 2005 Wolfson Microelectronics PLC. 15 * Copyright 2005 Openedhand Ltd. 16 * 17 * This program is free software; you can redistribute it and/or modify 18 * it under the terms of the GNU General Public License as published by 19 * the Free Software Foundation; either version 2 of the License, or 20 * (at your option) any later version. 21 * 22 * This program is distributed in the hope that it will be useful, 23 * but WITHOUT ANY WARRANTY; without even the implied warranty of 24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 25 * GNU General Public License for more details. 26 * 27 * You should have received a copy of the GNU General Public License 28 * along with this program; if not, write to the Free Software 29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 30 */ 31 32 #include <linux/module.h> 33 #include <linux/moduleparam.h> 34 #include <linux/kernel.h> 35 #include <linux/clk.h> 36 #include <linux/timer.h> 37 #include <linux/interrupt.h> 38 #include <linux/platform_device.h> 39 #include <linux/i2c.h> 40 41 #include <linux/atmel-ssc.h> 42 43 #include <sound/core.h> 44 #include <sound/pcm.h> 45 #include <sound/pcm_params.h> 46 #include <sound/soc.h> 47 #include <sound/soc-dapm.h> 48 49 #include <asm/mach-types.h> 50 #include <mach/hardware.h> 51 #include <mach/gpio.h> 52 53 #include "../codecs/wm8731.h" 54 #include "atmel-pcm.h" 55 #include "atmel_ssc_dai.h" 56 57 #define MCLK_RATE 12000000 58 59 static struct clk *mclk; 60 61 static int at91sam9g20ek_startup(struct snd_pcm_substream *substream) 62 { 63 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream); 64 struct snd_soc_dai *codec_dai = rtd->dai->codec_dai; 65 int ret; 66 67 ret = snd_soc_dai_set_sysclk(codec_dai, WM8731_SYSCLK, 68 MCLK_RATE, SND_SOC_CLOCK_IN); 69 if (ret < 0) { 70 clk_disable(mclk); 71 return ret; 72 } 73 74 return 0; 75 } 76 77 static void at91sam9g20ek_shutdown(struct snd_pcm_substream *substream) 78 { 79 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream); 80 81 dev_dbg(rtd->socdev->dev, "shutdown"); 82 } 83 84 static int at91sam9g20ek_hw_params(struct snd_pcm_substream *substream, 85 struct snd_pcm_hw_params *params) 86 { 87 struct snd_soc_pcm_runtime *rtd = substream->private_data; 88 struct snd_soc_dai *codec_dai = rtd->dai->codec_dai; 89 struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; 90 struct atmel_ssc_info *ssc_p = cpu_dai->private_data; 91 struct ssc_device *ssc = ssc_p->ssc; 92 int ret; 93 94 unsigned int rate; 95 int cmr_div, period; 96 97 if (ssc == NULL) { 98 printk(KERN_INFO "at91sam9g20ek_hw_params: ssc is NULL!\n"); 99 return -EINVAL; 100 } 101 102 /* set codec DAI configuration */ 103 ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_I2S | 104 SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS); 105 if (ret < 0) 106 return ret; 107 108 /* set cpu DAI configuration */ 109 ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S | 110 SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS); 111 if (ret < 0) 112 return ret; 113 114 /* 115 * The SSC clock dividers depend on the sample rate. The CMR.DIV 116 * field divides the system master clock MCK to drive the SSC TK 117 * signal which provides the codec BCLK. The TCMR.PERIOD and 118 * RCMR.PERIOD fields further divide the BCLK signal to drive 119 * the SSC TF and RF signals which provide the codec DACLRC and 120 * ADCLRC clocks. 121 * 122 * The dividers were determined through trial and error, where a 123 * CMR.DIV value is chosen such that the resulting BCLK value is 124 * divisible, or almost divisible, by (2 * sample rate), and then 125 * the TCMR.PERIOD or RCMR.PERIOD is BCLK / (2 * sample rate) - 1. 126 */ 127 rate = params_rate(params); 128 129 switch (rate) { 130 case 8000: 131 cmr_div = 55; /* BCLK = 133MHz/(2*55) = 1.209MHz */ 132 period = 74; /* LRC = BCLK/(2*(74+1)) ~= 8060,6Hz */ 133 break; 134 case 11025: 135 cmr_div = 67; /* BCLK = 133MHz/(2*60) = 1.108MHz */ 136 period = 45; /* LRC = BCLK/(2*(49+1)) = 11083,3Hz */ 137 break; 138 case 16000: 139 cmr_div = 63; /* BCLK = 133MHz/(2*63) = 1.055MHz */ 140 period = 32; /* LRC = BCLK/(2*(32+1)) = 15993,2Hz */ 141 break; 142 case 22050: 143 cmr_div = 52; /* BCLK = 133MHz/(2*52) = 1.278MHz */ 144 period = 28; /* LRC = BCLK/(2*(28+1)) = 22049Hz */ 145 break; 146 case 32000: 147 cmr_div = 66; /* BCLK = 133MHz/(2*66) = 1.007MHz */ 148 period = 15; /* LRC = BCLK/(2*(15+1)) = 31486,742Hz */ 149 break; 150 case 44100: 151 cmr_div = 29; /* BCLK = 133MHz/(2*29) = 2.293MHz */ 152 period = 25; /* LRC = BCLK/(2*(25+1)) = 44098Hz */ 153 break; 154 case 48000: 155 cmr_div = 33; /* BCLK = 133MHz/(2*33) = 2.015MHz */ 156 period = 20; /* LRC = BCLK/(2*(20+1)) = 47979,79Hz */ 157 break; 158 case 88200: 159 cmr_div = 29; /* BCLK = 133MHz/(2*29) = 2.293MHz */ 160 period = 12; /* LRC = BCLK/(2*(12+1)) = 88196Hz */ 161 break; 162 case 96000: 163 cmr_div = 23; /* BCLK = 133MHz/(2*23) = 2.891MHz */ 164 period = 14; /* LRC = BCLK/(2*(14+1)) = 96376Hz */ 165 break; 166 default: 167 printk(KERN_WARNING "unsupported rate %d" 168 " on at91sam9g20ek board\n", rate); 169 return -EINVAL; 170 } 171 172 /* set the MCK divider for BCLK */ 173 ret = snd_soc_dai_set_clkdiv(cpu_dai, ATMEL_SSC_CMR_DIV, cmr_div); 174 if (ret < 0) 175 return ret; 176 177 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 178 /* set the BCLK divider for DACLRC */ 179 ret = snd_soc_dai_set_clkdiv(cpu_dai, 180 ATMEL_SSC_TCMR_PERIOD, period); 181 } else { 182 /* set the BCLK divider for ADCLRC */ 183 ret = snd_soc_dai_set_clkdiv(cpu_dai, 184 ATMEL_SSC_RCMR_PERIOD, period); 185 } 186 if (ret < 0) 187 return ret; 188 189 return 0; 190 } 191 192 static struct snd_soc_ops at91sam9g20ek_ops = { 193 .startup = at91sam9g20ek_startup, 194 .hw_params = at91sam9g20ek_hw_params, 195 .shutdown = at91sam9g20ek_shutdown, 196 }; 197 198 static int at91sam9g20ek_set_bias_level(struct snd_soc_card *card, 199 enum snd_soc_bias_level level) 200 { 201 static int mclk_on; 202 int ret = 0; 203 204 switch (level) { 205 case SND_SOC_BIAS_ON: 206 case SND_SOC_BIAS_PREPARE: 207 if (!mclk_on) 208 ret = clk_enable(mclk); 209 if (ret == 0) 210 mclk_on = 1; 211 break; 212 213 case SND_SOC_BIAS_OFF: 214 case SND_SOC_BIAS_STANDBY: 215 if (mclk_on) 216 clk_disable(mclk); 217 mclk_on = 0; 218 break; 219 } 220 221 return ret; 222 } 223 224 static const struct snd_soc_dapm_widget at91sam9g20ek_dapm_widgets[] = { 225 SND_SOC_DAPM_MIC("Int Mic", NULL), 226 SND_SOC_DAPM_SPK("Ext Spk", NULL), 227 }; 228 229 static const struct snd_soc_dapm_route intercon[] = { 230 231 /* speaker connected to LHPOUT */ 232 {"Ext Spk", NULL, "LHPOUT"}, 233 234 /* mic is connected to Mic Jack, with WM8731 Mic Bias */ 235 {"MICIN", NULL, "Mic Bias"}, 236 {"Mic Bias", NULL, "Int Mic"}, 237 }; 238 239 /* 240 * Logic for a wm8731 as connected on a at91sam9g20ek board. 241 */ 242 static int at91sam9g20ek_wm8731_init(struct snd_soc_codec *codec) 243 { 244 printk(KERN_DEBUG 245 "at91sam9g20ek_wm8731 " 246 ": at91sam9g20ek_wm8731_init() called\n"); 247 248 /* Add specific widgets */ 249 snd_soc_dapm_new_controls(codec, at91sam9g20ek_dapm_widgets, 250 ARRAY_SIZE(at91sam9g20ek_dapm_widgets)); 251 /* Set up specific audio path interconnects */ 252 snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon)); 253 254 /* not connected */ 255 snd_soc_dapm_nc_pin(codec, "RLINEIN"); 256 snd_soc_dapm_nc_pin(codec, "LLINEIN"); 257 258 /* always connected */ 259 snd_soc_dapm_enable_pin(codec, "Int Mic"); 260 snd_soc_dapm_enable_pin(codec, "Ext Spk"); 261 262 snd_soc_dapm_sync(codec); 263 264 return 0; 265 } 266 267 static struct snd_soc_dai_link at91sam9g20ek_dai = { 268 .name = "WM8731", 269 .stream_name = "WM8731 PCM", 270 .cpu_dai = &atmel_ssc_dai[0], 271 .codec_dai = &wm8731_dai, 272 .init = at91sam9g20ek_wm8731_init, 273 .ops = &at91sam9g20ek_ops, 274 }; 275 276 static struct snd_soc_card snd_soc_at91sam9g20ek = { 277 .name = "AT91SAMG20-EK", 278 .platform = &atmel_soc_platform, 279 .dai_link = &at91sam9g20ek_dai, 280 .num_links = 1, 281 .set_bias_level = at91sam9g20ek_set_bias_level, 282 }; 283 284 /* 285 * FIXME: This is a temporary bodge to avoid cross-tree merge issues. 286 * New drivers should register the wm8731 I2C device in the machine 287 * setup code (under arch/arm for ARM systems). 288 */ 289 static int wm8731_i2c_register(void) 290 { 291 struct i2c_board_info info; 292 struct i2c_adapter *adapter; 293 struct i2c_client *client; 294 295 memset(&info, 0, sizeof(struct i2c_board_info)); 296 info.addr = 0x1b; 297 strlcpy(info.type, "wm8731", I2C_NAME_SIZE); 298 299 adapter = i2c_get_adapter(0); 300 if (!adapter) { 301 printk(KERN_ERR "can't get i2c adapter 0\n"); 302 return -ENODEV; 303 } 304 305 client = i2c_new_device(adapter, &info); 306 i2c_put_adapter(adapter); 307 if (!client) { 308 printk(KERN_ERR "can't add i2c device at 0x%x\n", 309 (unsigned int)info.addr); 310 return -ENODEV; 311 } 312 313 return 0; 314 } 315 316 static struct snd_soc_device at91sam9g20ek_snd_devdata = { 317 .card = &snd_soc_at91sam9g20ek, 318 .codec_dev = &soc_codec_dev_wm8731, 319 }; 320 321 static struct platform_device *at91sam9g20ek_snd_device; 322 323 static int __init at91sam9g20ek_init(void) 324 { 325 struct atmel_ssc_info *ssc_p = at91sam9g20ek_dai.cpu_dai->private_data; 326 struct ssc_device *ssc = NULL; 327 struct clk *pllb; 328 int ret; 329 330 if (!machine_is_at91sam9g20ek()) 331 return -ENODEV; 332 333 /* 334 * Codec MCLK is supplied by PCK0 - set it up. 335 */ 336 mclk = clk_get(NULL, "pck0"); 337 if (IS_ERR(mclk)) { 338 printk(KERN_ERR "ASoC: Failed to get MCLK\n"); 339 ret = PTR_ERR(mclk); 340 goto err; 341 } 342 343 pllb = clk_get(NULL, "pllb"); 344 if (IS_ERR(mclk)) { 345 printk(KERN_ERR "ASoC: Failed to get PLLB\n"); 346 ret = PTR_ERR(mclk); 347 goto err_mclk; 348 } 349 ret = clk_set_parent(mclk, pllb); 350 clk_put(pllb); 351 if (ret != 0) { 352 printk(KERN_ERR "ASoC: Failed to set MCLK parent\n"); 353 goto err_mclk; 354 } 355 356 clk_set_rate(mclk, MCLK_RATE); 357 358 /* 359 * Request SSC device 360 */ 361 ssc = ssc_request(0); 362 if (IS_ERR(ssc)) { 363 printk(KERN_ERR "ASoC: Failed to request SSC 0\n"); 364 ret = PTR_ERR(ssc); 365 ssc = NULL; 366 goto err_ssc; 367 } 368 ssc_p->ssc = ssc; 369 370 ret = wm8731_i2c_register(); 371 if (ret != 0) 372 goto err_ssc; 373 374 at91sam9g20ek_snd_device = platform_device_alloc("soc-audio", -1); 375 if (!at91sam9g20ek_snd_device) { 376 printk(KERN_ERR "ASoC: Platform device allocation failed\n"); 377 ret = -ENOMEM; 378 } 379 380 platform_set_drvdata(at91sam9g20ek_snd_device, 381 &at91sam9g20ek_snd_devdata); 382 at91sam9g20ek_snd_devdata.dev = &at91sam9g20ek_snd_device->dev; 383 384 ret = platform_device_add(at91sam9g20ek_snd_device); 385 if (ret) { 386 printk(KERN_ERR "ASoC: Platform device allocation failed\n"); 387 platform_device_put(at91sam9g20ek_snd_device); 388 } 389 390 return ret; 391 392 err_ssc: 393 ssc_free(ssc); 394 ssc_p->ssc = NULL; 395 err_mclk: 396 clk_put(mclk); 397 mclk = NULL; 398 err: 399 return ret; 400 } 401 402 static void __exit at91sam9g20ek_exit(void) 403 { 404 struct atmel_ssc_info *ssc_p = at91sam9g20ek_dai.cpu_dai->private_data; 405 struct ssc_device *ssc; 406 407 if (ssc_p != NULL) { 408 ssc = ssc_p->ssc; 409 if (ssc != NULL) 410 ssc_free(ssc); 411 ssc_p->ssc = NULL; 412 } 413 414 platform_device_unregister(at91sam9g20ek_snd_device); 415 at91sam9g20ek_snd_device = NULL; 416 clk_put(mclk); 417 mclk = NULL; 418 } 419 420 module_init(at91sam9g20ek_init); 421 module_exit(at91sam9g20ek_exit); 422 423 /* Module information */ 424 MODULE_AUTHOR("Sedji Gaouaou <sedji.gaouaou@atmel.com>"); 425 MODULE_DESCRIPTION("ALSA SoC AT91SAM9G20EK_WM8731"); 426 MODULE_LICENSE("GPL"); 427