1a7664ab2SSongjun Wu /* Atmel PDMIC driver 2a7664ab2SSongjun Wu * 3a7664ab2SSongjun Wu * Copyright (C) 2015 Atmel 4a7664ab2SSongjun Wu * 5a7664ab2SSongjun Wu * Author: Songjun Wu <songjun.wu@atmel.com> 6a7664ab2SSongjun Wu * 7a7664ab2SSongjun Wu * This program is free software; you can redistribute it and/or modify 8a7664ab2SSongjun Wu * it under the terms of the GNU General Public License version 2 or later 9a7664ab2SSongjun Wu * as published by the Free Software Foundation. 10a7664ab2SSongjun Wu */ 11a7664ab2SSongjun Wu 12a7664ab2SSongjun Wu #include <linux/of.h> 13a7664ab2SSongjun Wu #include <linux/clk.h> 14a7664ab2SSongjun Wu #include <linux/module.h> 15a7664ab2SSongjun Wu #include <linux/platform_device.h> 16a7664ab2SSongjun Wu #include <linux/regmap.h> 17a7664ab2SSongjun Wu #include <sound/core.h> 18a7664ab2SSongjun Wu #include <sound/dmaengine_pcm.h> 19a7664ab2SSongjun Wu #include <sound/pcm_params.h> 20a7664ab2SSongjun Wu #include <sound/tlv.h> 21a7664ab2SSongjun Wu #include "atmel-pdmic.h" 22a7664ab2SSongjun Wu 23a7664ab2SSongjun Wu struct atmel_pdmic_pdata { 24a7664ab2SSongjun Wu u32 mic_min_freq; 25a7664ab2SSongjun Wu u32 mic_max_freq; 26a7664ab2SSongjun Wu s32 mic_offset; 27a7664ab2SSongjun Wu const char *card_name; 28a7664ab2SSongjun Wu }; 29a7664ab2SSongjun Wu 30a7664ab2SSongjun Wu struct atmel_pdmic { 31a7664ab2SSongjun Wu dma_addr_t phy_base; 32a7664ab2SSongjun Wu struct regmap *regmap; 33a7664ab2SSongjun Wu struct clk *pclk; 34a7664ab2SSongjun Wu struct clk *gclk; 35a7664ab2SSongjun Wu int irq; 36a7664ab2SSongjun Wu struct snd_pcm_substream *substream; 37a7664ab2SSongjun Wu const struct atmel_pdmic_pdata *pdata; 38a7664ab2SSongjun Wu }; 39a7664ab2SSongjun Wu 40a7664ab2SSongjun Wu static const struct of_device_id atmel_pdmic_of_match[] = { 41a7664ab2SSongjun Wu { 42a7664ab2SSongjun Wu .compatible = "atmel,sama5d2-pdmic", 43a7664ab2SSongjun Wu }, { 44a7664ab2SSongjun Wu /* sentinel */ 45a7664ab2SSongjun Wu } 46a7664ab2SSongjun Wu }; 47a7664ab2SSongjun Wu MODULE_DEVICE_TABLE(of, atmel_pdmic_of_match); 48a7664ab2SSongjun Wu 49a7664ab2SSongjun Wu #define PDMIC_OFFSET_MAX_VAL S16_MAX 50a7664ab2SSongjun Wu #define PDMIC_OFFSET_MIN_VAL S16_MIN 51a7664ab2SSongjun Wu 52a7664ab2SSongjun Wu static struct atmel_pdmic_pdata *atmel_pdmic_dt_init(struct device *dev) 53a7664ab2SSongjun Wu { 54a7664ab2SSongjun Wu struct device_node *np = dev->of_node; 55a7664ab2SSongjun Wu struct atmel_pdmic_pdata *pdata; 56a7664ab2SSongjun Wu 57a7664ab2SSongjun Wu if (!np) { 58a7664ab2SSongjun Wu dev_err(dev, "device node not found\n"); 59a7664ab2SSongjun Wu return ERR_PTR(-EINVAL); 60a7664ab2SSongjun Wu } 61a7664ab2SSongjun Wu 62a7664ab2SSongjun Wu pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); 63a7664ab2SSongjun Wu if (!pdata) 64a7664ab2SSongjun Wu return ERR_PTR(-ENOMEM); 65a7664ab2SSongjun Wu 66a7664ab2SSongjun Wu if (of_property_read_string(np, "atmel,model", &pdata->card_name)) 67a7664ab2SSongjun Wu pdata->card_name = "PDMIC"; 68a7664ab2SSongjun Wu 69a7664ab2SSongjun Wu if (of_property_read_u32(np, "atmel,mic-min-freq", 70a7664ab2SSongjun Wu &pdata->mic_min_freq)) { 71a7664ab2SSongjun Wu dev_err(dev, "failed to get mic-min-freq\n"); 72a7664ab2SSongjun Wu return ERR_PTR(-EINVAL); 73a7664ab2SSongjun Wu } 74a7664ab2SSongjun Wu 75a7664ab2SSongjun Wu if (of_property_read_u32(np, "atmel,mic-max-freq", 76a7664ab2SSongjun Wu &pdata->mic_max_freq)) { 77a7664ab2SSongjun Wu dev_err(dev, "failed to get mic-max-freq\n"); 78a7664ab2SSongjun Wu return ERR_PTR(-EINVAL); 79a7664ab2SSongjun Wu } 80a7664ab2SSongjun Wu 81a7664ab2SSongjun Wu if (pdata->mic_max_freq < pdata->mic_min_freq) { 82a7664ab2SSongjun Wu dev_err(dev, 83a7664ab2SSongjun Wu "mic-max-freq should not less than mic-min-freq\n"); 84a7664ab2SSongjun Wu return ERR_PTR(-EINVAL); 85a7664ab2SSongjun Wu } 86a7664ab2SSongjun Wu 87a7664ab2SSongjun Wu if (of_property_read_s32(np, "atmel,mic-offset", &pdata->mic_offset)) 88a7664ab2SSongjun Wu pdata->mic_offset = 0; 89a7664ab2SSongjun Wu 90a7664ab2SSongjun Wu if (pdata->mic_offset > PDMIC_OFFSET_MAX_VAL) { 91a7664ab2SSongjun Wu dev_warn(dev, 92a7664ab2SSongjun Wu "mic-offset value %d is larger than the max value %d, the max value is specified\n", 93a7664ab2SSongjun Wu pdata->mic_offset, PDMIC_OFFSET_MAX_VAL); 94a7664ab2SSongjun Wu pdata->mic_offset = PDMIC_OFFSET_MAX_VAL; 95a7664ab2SSongjun Wu } else if (pdata->mic_offset < PDMIC_OFFSET_MIN_VAL) { 96a7664ab2SSongjun Wu dev_warn(dev, 97a7664ab2SSongjun Wu "mic-offset value %d is less than the min value %d, the min value is specified\n", 98a7664ab2SSongjun Wu pdata->mic_offset, PDMIC_OFFSET_MIN_VAL); 99a7664ab2SSongjun Wu pdata->mic_offset = PDMIC_OFFSET_MIN_VAL; 100a7664ab2SSongjun Wu } 101a7664ab2SSongjun Wu 102a7664ab2SSongjun Wu return pdata; 103a7664ab2SSongjun Wu } 104a7664ab2SSongjun Wu 105a7664ab2SSongjun Wu /* cpu dai component */ 106a7664ab2SSongjun Wu static int atmel_pdmic_cpu_dai_startup(struct snd_pcm_substream *substream, 107a7664ab2SSongjun Wu struct snd_soc_dai *cpu_dai) 108a7664ab2SSongjun Wu { 109a7664ab2SSongjun Wu struct snd_soc_pcm_runtime *rtd = substream->private_data; 110a7664ab2SSongjun Wu struct atmel_pdmic *dd = snd_soc_card_get_drvdata(rtd->card); 111a7664ab2SSongjun Wu int ret; 112a7664ab2SSongjun Wu 113a7664ab2SSongjun Wu ret = clk_prepare_enable(dd->gclk); 114a7664ab2SSongjun Wu if (ret) 115a7664ab2SSongjun Wu return ret; 116a7664ab2SSongjun Wu 117a7664ab2SSongjun Wu ret = clk_prepare_enable(dd->pclk); 118a7664ab2SSongjun Wu if (ret) 119a7664ab2SSongjun Wu return ret; 120a7664ab2SSongjun Wu 121a7664ab2SSongjun Wu /* Clear all bits in the Control Register(PDMIC_CR) */ 122a7664ab2SSongjun Wu regmap_write(dd->regmap, PDMIC_CR, 0); 123a7664ab2SSongjun Wu 124a7664ab2SSongjun Wu dd->substream = substream; 125a7664ab2SSongjun Wu 126a7664ab2SSongjun Wu /* Enable the overrun error interrupt */ 127a7664ab2SSongjun Wu regmap_write(dd->regmap, PDMIC_IER, PDMIC_IER_OVRE); 128a7664ab2SSongjun Wu 129a7664ab2SSongjun Wu return 0; 130a7664ab2SSongjun Wu } 131a7664ab2SSongjun Wu 132a7664ab2SSongjun Wu static void atmel_pdmic_cpu_dai_shutdown(struct snd_pcm_substream *substream, 133a7664ab2SSongjun Wu struct snd_soc_dai *cpu_dai) 134a7664ab2SSongjun Wu { 135a7664ab2SSongjun Wu struct snd_soc_pcm_runtime *rtd = substream->private_data; 136a7664ab2SSongjun Wu struct atmel_pdmic *dd = snd_soc_card_get_drvdata(rtd->card); 137a7664ab2SSongjun Wu 138a7664ab2SSongjun Wu /* Disable the overrun error interrupt */ 139a7664ab2SSongjun Wu regmap_write(dd->regmap, PDMIC_IDR, PDMIC_IDR_OVRE); 140a7664ab2SSongjun Wu 141a7664ab2SSongjun Wu clk_disable_unprepare(dd->gclk); 142a7664ab2SSongjun Wu clk_disable_unprepare(dd->pclk); 143a7664ab2SSongjun Wu } 144a7664ab2SSongjun Wu 145a7664ab2SSongjun Wu static int atmel_pdmic_cpu_dai_prepare(struct snd_pcm_substream *substream, 146a7664ab2SSongjun Wu struct snd_soc_dai *cpu_dai) 147a7664ab2SSongjun Wu { 148a7664ab2SSongjun Wu struct snd_soc_pcm_runtime *rtd = substream->private_data; 149a7664ab2SSongjun Wu struct atmel_pdmic *dd = snd_soc_card_get_drvdata(rtd->card); 150a7664ab2SSongjun Wu u32 val; 151a7664ab2SSongjun Wu 152a7664ab2SSongjun Wu /* Clean the PDMIC Converted Data Register */ 153a7664ab2SSongjun Wu return regmap_read(dd->regmap, PDMIC_CDR, &val); 154a7664ab2SSongjun Wu } 155a7664ab2SSongjun Wu 156a7664ab2SSongjun Wu static const struct snd_soc_dai_ops atmel_pdmic_cpu_dai_ops = { 157a7664ab2SSongjun Wu .startup = atmel_pdmic_cpu_dai_startup, 158a7664ab2SSongjun Wu .shutdown = atmel_pdmic_cpu_dai_shutdown, 159a7664ab2SSongjun Wu .prepare = atmel_pdmic_cpu_dai_prepare, 160a7664ab2SSongjun Wu }; 161a7664ab2SSongjun Wu 162a7664ab2SSongjun Wu #define ATMEL_PDMIC_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE) 163a7664ab2SSongjun Wu 164a7664ab2SSongjun Wu static struct snd_soc_dai_driver atmel_pdmic_cpu_dai = { 165a7664ab2SSongjun Wu .capture = { 166a7664ab2SSongjun Wu .channels_min = 1, 167a7664ab2SSongjun Wu .channels_max = 1, 168a7664ab2SSongjun Wu .rates = SNDRV_PCM_RATE_KNOT, 169a7664ab2SSongjun Wu .formats = ATMEL_PDMIC_FORMATS,}, 170a7664ab2SSongjun Wu .ops = &atmel_pdmic_cpu_dai_ops, 171a7664ab2SSongjun Wu }; 172a7664ab2SSongjun Wu 173a7664ab2SSongjun Wu static const struct snd_soc_component_driver atmel_pdmic_cpu_dai_component = { 174a7664ab2SSongjun Wu .name = "atmel-pdmic", 175a7664ab2SSongjun Wu }; 176a7664ab2SSongjun Wu 177a7664ab2SSongjun Wu /* platform */ 178a7664ab2SSongjun Wu #define ATMEL_PDMIC_MAX_BUF_SIZE (64 * 1024) 179a7664ab2SSongjun Wu #define ATMEL_PDMIC_PREALLOC_BUF_SIZE ATMEL_PDMIC_MAX_BUF_SIZE 180a7664ab2SSongjun Wu 181a7664ab2SSongjun Wu static const struct snd_pcm_hardware atmel_pdmic_hw = { 182a7664ab2SSongjun Wu .info = SNDRV_PCM_INFO_MMAP 183a7664ab2SSongjun Wu | SNDRV_PCM_INFO_MMAP_VALID 184a7664ab2SSongjun Wu | SNDRV_PCM_INFO_INTERLEAVED 185a7664ab2SSongjun Wu | SNDRV_PCM_INFO_RESUME 186a7664ab2SSongjun Wu | SNDRV_PCM_INFO_PAUSE, 187a7664ab2SSongjun Wu .formats = ATMEL_PDMIC_FORMATS, 188a7664ab2SSongjun Wu .buffer_bytes_max = ATMEL_PDMIC_MAX_BUF_SIZE, 189a7664ab2SSongjun Wu .period_bytes_min = 256, 190a7664ab2SSongjun Wu .period_bytes_max = 32 * 1024, 191a7664ab2SSongjun Wu .periods_min = 2, 192a7664ab2SSongjun Wu .periods_max = 256, 193a7664ab2SSongjun Wu }; 194a7664ab2SSongjun Wu 195a7664ab2SSongjun Wu static int 196a7664ab2SSongjun Wu atmel_pdmic_platform_configure_dma(struct snd_pcm_substream *substream, 197a7664ab2SSongjun Wu struct snd_pcm_hw_params *params, 198a7664ab2SSongjun Wu struct dma_slave_config *slave_config) 199a7664ab2SSongjun Wu { 200a7664ab2SSongjun Wu struct snd_soc_pcm_runtime *rtd = substream->private_data; 201a7664ab2SSongjun Wu struct atmel_pdmic *dd = snd_soc_card_get_drvdata(rtd->card); 202a7664ab2SSongjun Wu int ret; 203a7664ab2SSongjun Wu 204a7664ab2SSongjun Wu ret = snd_hwparams_to_dma_slave_config(substream, params, 205a7664ab2SSongjun Wu slave_config); 206a7664ab2SSongjun Wu if (ret) { 207a7664ab2SSongjun Wu dev_err(rtd->platform->dev, 208a7664ab2SSongjun Wu "hw params to dma slave configure failed\n"); 209a7664ab2SSongjun Wu return ret; 210a7664ab2SSongjun Wu } 211a7664ab2SSongjun Wu 212a7664ab2SSongjun Wu slave_config->src_addr = dd->phy_base + PDMIC_CDR; 213a7664ab2SSongjun Wu slave_config->src_maxburst = 1; 214a7664ab2SSongjun Wu slave_config->dst_maxburst = 1; 215a7664ab2SSongjun Wu 216a7664ab2SSongjun Wu return 0; 217a7664ab2SSongjun Wu } 218a7664ab2SSongjun Wu 219a7664ab2SSongjun Wu static const struct snd_dmaengine_pcm_config 220a7664ab2SSongjun Wu atmel_pdmic_dmaengine_pcm_config = { 221a7664ab2SSongjun Wu .prepare_slave_config = atmel_pdmic_platform_configure_dma, 222a7664ab2SSongjun Wu .pcm_hardware = &atmel_pdmic_hw, 223a7664ab2SSongjun Wu .prealloc_buffer_size = ATMEL_PDMIC_PREALLOC_BUF_SIZE, 224a7664ab2SSongjun Wu }; 225a7664ab2SSongjun Wu 226a7664ab2SSongjun Wu /* codec */ 227a7664ab2SSongjun Wu /* Mic Gain = dgain * 2^(-scale) */ 228a7664ab2SSongjun Wu struct mic_gain { 229a7664ab2SSongjun Wu unsigned int dgain; 230a7664ab2SSongjun Wu unsigned int scale; 231a7664ab2SSongjun Wu }; 232a7664ab2SSongjun Wu 233a7664ab2SSongjun Wu /* range from -90 dB to 90 dB */ 234a7664ab2SSongjun Wu static const struct mic_gain mic_gain_table[] = { 235a7664ab2SSongjun Wu { 1, 15}, { 1, 14}, /* -90, -84 dB */ 236a7664ab2SSongjun Wu { 3, 15}, { 1, 13}, { 3, 14}, { 1, 12}, /* -81, -78, -75, -72 dB */ 237a7664ab2SSongjun Wu { 5, 14}, { 13, 15}, /* -70, -68 dB */ 238a7664ab2SSongjun Wu { 9, 14}, { 21, 15}, { 23, 15}, { 13, 14}, /* -65 ~ -62 dB */ 239a7664ab2SSongjun Wu { 29, 15}, { 33, 15}, { 37, 15}, { 41, 15}, /* -61 ~ -58 dB */ 240a7664ab2SSongjun Wu { 23, 14}, { 13, 13}, { 58, 15}, { 65, 15}, /* -57 ~ -54 dB */ 241a7664ab2SSongjun Wu { 73, 15}, { 41, 14}, { 23, 13}, { 13, 12}, /* -53 ~ -50 dB */ 242a7664ab2SSongjun Wu { 29, 13}, { 65, 14}, { 73, 14}, { 41, 13}, /* -49 ~ -46 dB */ 243a7664ab2SSongjun Wu { 23, 12}, { 207, 15}, { 29, 12}, { 65, 13}, /* -45 ~ -42 dB */ 244a7664ab2SSongjun Wu { 73, 13}, { 41, 12}, { 23, 11}, { 413, 15}, /* -41 ~ -38 dB */ 245a7664ab2SSongjun Wu { 463, 15}, { 519, 15}, { 583, 15}, { 327, 14}, /* -37 ~ -34 dB */ 246a7664ab2SSongjun Wu { 367, 14}, { 823, 15}, { 231, 13}, { 1036, 15}, /* -33 ~ -30 dB */ 247a7664ab2SSongjun Wu { 1163, 15}, { 1305, 15}, { 183, 12}, { 1642, 15}, /* -29 ~ -26 dB */ 248a7664ab2SSongjun Wu { 1843, 15}, { 2068, 15}, { 145, 11}, { 2603, 15}, /* -25 ~ -22 dB */ 249a7664ab2SSongjun Wu { 365, 12}, { 3277, 15}, { 3677, 15}, { 4125, 15}, /* -21 ~ -18 dB */ 250a7664ab2SSongjun Wu { 4629, 15}, { 5193, 15}, { 5827, 15}, { 3269, 14}, /* -17 ~ -14 dB */ 251a7664ab2SSongjun Wu { 917, 12}, { 8231, 15}, { 9235, 15}, { 5181, 14}, /* -13 ~ -10 dB */ 252a7664ab2SSongjun Wu {11627, 15}, {13045, 15}, {14637, 15}, {16423, 15}, /* -9 ~ -6 dB */ 253a7664ab2SSongjun Wu {18427, 15}, {20675, 15}, { 5799, 13}, {26029, 15}, /* -5 ~ -2 dB */ 254a7664ab2SSongjun Wu { 7301, 13}, { 1, 0}, {18383, 14}, {10313, 13}, /* -1 ~ 2 dB */ 255a7664ab2SSongjun Wu {23143, 14}, {25967, 14}, {29135, 14}, {16345, 13}, /* 3 ~ 6 dB */ 256a7664ab2SSongjun Wu { 4585, 11}, {20577, 13}, { 1443, 9}, {25905, 13}, /* 7 ~ 10 dB */ 257a7664ab2SSongjun Wu {14533, 12}, { 8153, 11}, { 2287, 9}, {20529, 12}, /* 11 ~ 14 dB */ 258a7664ab2SSongjun Wu {11517, 11}, { 6461, 10}, {28997, 12}, { 4067, 9}, /* 15 ~ 18 dB */ 259a7664ab2SSongjun Wu {18253, 11}, { 10, 0}, {22979, 11}, {25783, 11}, /* 19 ~ 22 dB */ 260a7664ab2SSongjun Wu {28929, 11}, {32459, 11}, { 9105, 9}, {20431, 10}, /* 23 ~ 26 dB */ 261a7664ab2SSongjun Wu {22925, 10}, {12861, 9}, { 7215, 8}, {16191, 9}, /* 27 ~ 30 dB */ 262a7664ab2SSongjun Wu { 9083, 8}, {20383, 9}, {11435, 8}, { 6145, 7}, /* 31 ~ 34 dB */ 263a7664ab2SSongjun Wu { 3599, 6}, {32305, 9}, {18123, 8}, {20335, 8}, /* 35 ~ 38 dB */ 264a7664ab2SSongjun Wu { 713, 3}, { 100, 0}, { 7181, 6}, { 8057, 6}, /* 39 ~ 42 dB */ 265a7664ab2SSongjun Wu { 565, 2}, {20287, 7}, {11381, 6}, {25539, 7}, /* 43 ~ 46 dB */ 266a7664ab2SSongjun Wu { 1791, 3}, { 4019, 4}, { 9019, 5}, {20239, 6}, /* 47 ~ 50 dB */ 267a7664ab2SSongjun Wu { 5677, 4}, {25479, 6}, { 7147, 4}, { 8019, 4}, /* 51 ~ 54 dB */ 268a7664ab2SSongjun Wu {17995, 5}, {20191, 5}, {11327, 4}, {12709, 4}, /* 55 ~ 58 dB */ 269a7664ab2SSongjun Wu { 3565, 2}, { 1000, 0}, { 1122, 0}, { 1259, 0}, /* 59 ~ 62 dB */ 270a7664ab2SSongjun Wu { 2825, 1}, {12679, 3}, { 7113, 2}, { 7981, 2}, /* 63 ~ 66 dB */ 271a7664ab2SSongjun Wu { 8955, 2}, {20095, 3}, {22547, 3}, {12649, 2}, /* 67 ~ 70 dB */ 272a7664ab2SSongjun Wu {28385, 3}, { 3981, 0}, {17867, 2}, {20047, 2}, /* 71 ~ 74 dB */ 273a7664ab2SSongjun Wu {11247, 1}, {12619, 1}, {14159, 1}, {31773, 2}, /* 75 ~ 78 dB */ 274a7664ab2SSongjun Wu {17825, 1}, {10000, 0}, {11220, 0}, {12589, 0}, /* 79 ~ 82 dB */ 275a7664ab2SSongjun Wu {28251, 1}, {15849, 0}, {17783, 0}, {19953, 0}, /* 83 ~ 86 dB */ 276a7664ab2SSongjun Wu {22387, 0}, {25119, 0}, {28184, 0}, {31623, 0}, /* 87 ~ 90 dB */ 277a7664ab2SSongjun Wu }; 278a7664ab2SSongjun Wu 279a7664ab2SSongjun Wu static const DECLARE_TLV_DB_RANGE(mic_gain_tlv, 280a7664ab2SSongjun Wu 0, 1, TLV_DB_SCALE_ITEM(-9000, 600, 0), 281a7664ab2SSongjun Wu 2, 5, TLV_DB_SCALE_ITEM(-8100, 300, 0), 282a7664ab2SSongjun Wu 6, 7, TLV_DB_SCALE_ITEM(-7000, 200, 0), 283a7664ab2SSongjun Wu 8, ARRAY_SIZE(mic_gain_table)-1, TLV_DB_SCALE_ITEM(-6500, 100, 0), 284a7664ab2SSongjun Wu ); 285a7664ab2SSongjun Wu 286a7664ab2SSongjun Wu int pdmic_get_mic_volsw(struct snd_kcontrol *kcontrol, 287a7664ab2SSongjun Wu struct snd_ctl_elem_value *ucontrol) 288a7664ab2SSongjun Wu { 289a7664ab2SSongjun Wu struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 290a7664ab2SSongjun Wu unsigned int dgain_val, scale_val; 291a7664ab2SSongjun Wu int i; 292a7664ab2SSongjun Wu 293a7664ab2SSongjun Wu dgain_val = (snd_soc_read(codec, PDMIC_DSPR1) & PDMIC_DSPR1_DGAIN_MASK) 294a7664ab2SSongjun Wu >> PDMIC_DSPR1_DGAIN_SHIFT; 295a7664ab2SSongjun Wu 296a7664ab2SSongjun Wu scale_val = (snd_soc_read(codec, PDMIC_DSPR0) & PDMIC_DSPR0_SCALE_MASK) 297a7664ab2SSongjun Wu >> PDMIC_DSPR0_SCALE_SHIFT; 298a7664ab2SSongjun Wu 299a7664ab2SSongjun Wu for (i = 0; i < ARRAY_SIZE(mic_gain_table); i++) { 300a7664ab2SSongjun Wu if ((mic_gain_table[i].dgain == dgain_val) && 301a7664ab2SSongjun Wu (mic_gain_table[i].scale == scale_val)) 302a7664ab2SSongjun Wu ucontrol->value.integer.value[0] = i; 303a7664ab2SSongjun Wu } 304a7664ab2SSongjun Wu 305a7664ab2SSongjun Wu return 0; 306a7664ab2SSongjun Wu } 307a7664ab2SSongjun Wu 308a7664ab2SSongjun Wu static int pdmic_put_mic_volsw(struct snd_kcontrol *kcontrol, 309a7664ab2SSongjun Wu struct snd_ctl_elem_value *ucontrol) 310a7664ab2SSongjun Wu { 311a7664ab2SSongjun Wu struct soc_mixer_control *mc = 312a7664ab2SSongjun Wu (struct soc_mixer_control *)kcontrol->private_value; 313a7664ab2SSongjun Wu struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 314a7664ab2SSongjun Wu int max = mc->max; 315a7664ab2SSongjun Wu unsigned int val; 316a7664ab2SSongjun Wu int ret; 317a7664ab2SSongjun Wu 318a7664ab2SSongjun Wu val = ucontrol->value.integer.value[0]; 319a7664ab2SSongjun Wu 320a7664ab2SSongjun Wu if (val > max) 321a7664ab2SSongjun Wu return -EINVAL; 322a7664ab2SSongjun Wu 323a7664ab2SSongjun Wu ret = snd_soc_update_bits(codec, PDMIC_DSPR1, PDMIC_DSPR1_DGAIN_MASK, 324a7664ab2SSongjun Wu mic_gain_table[val].dgain << PDMIC_DSPR1_DGAIN_SHIFT); 325a7664ab2SSongjun Wu if (ret < 0) 326a7664ab2SSongjun Wu return ret; 327a7664ab2SSongjun Wu 328a7664ab2SSongjun Wu ret = snd_soc_update_bits(codec, PDMIC_DSPR0, PDMIC_DSPR0_SCALE_MASK, 329a7664ab2SSongjun Wu mic_gain_table[val].scale << PDMIC_DSPR0_SCALE_SHIFT); 330a7664ab2SSongjun Wu if (ret < 0) 331a7664ab2SSongjun Wu return ret; 332a7664ab2SSongjun Wu 333a7664ab2SSongjun Wu return 0; 334a7664ab2SSongjun Wu } 335a7664ab2SSongjun Wu 336a7664ab2SSongjun Wu static const struct snd_kcontrol_new atmel_pdmic_snd_controls[] = { 337a7664ab2SSongjun Wu SOC_SINGLE_EXT_TLV("Mic Capture Volume", PDMIC_DSPR1, PDMIC_DSPR1_DGAIN_SHIFT, 338a7664ab2SSongjun Wu ARRAY_SIZE(mic_gain_table)-1, 0, 339a7664ab2SSongjun Wu pdmic_get_mic_volsw, pdmic_put_mic_volsw, mic_gain_tlv), 340a7664ab2SSongjun Wu 341a7664ab2SSongjun Wu SOC_SINGLE("High Pass Filter Switch", PDMIC_DSPR0, 342a7664ab2SSongjun Wu PDMIC_DSPR0_HPFBYP_SHIFT, 1, 1), 343a7664ab2SSongjun Wu 344a7664ab2SSongjun Wu SOC_SINGLE("SINCC Filter Switch", PDMIC_DSPR0, PDMIC_DSPR0_SINBYP_SHIFT, 1, 1), 345a7664ab2SSongjun Wu }; 346a7664ab2SSongjun Wu 347a7664ab2SSongjun Wu static int atmel_pdmic_codec_probe(struct snd_soc_codec *codec) 348a7664ab2SSongjun Wu { 349a7664ab2SSongjun Wu struct snd_soc_card *card = snd_soc_codec_get_drvdata(codec); 350a7664ab2SSongjun Wu struct atmel_pdmic *dd = snd_soc_card_get_drvdata(card); 351a7664ab2SSongjun Wu 352a7664ab2SSongjun Wu snd_soc_update_bits(codec, PDMIC_DSPR1, PDMIC_DSPR1_OFFSET_MASK, 353a7664ab2SSongjun Wu (u32)(dd->pdata->mic_offset << PDMIC_DSPR1_OFFSET_SHIFT)); 354a7664ab2SSongjun Wu 355a7664ab2SSongjun Wu return 0; 356a7664ab2SSongjun Wu } 357a7664ab2SSongjun Wu 358a7664ab2SSongjun Wu static struct snd_soc_codec_driver soc_codec_dev_pdmic = { 359a7664ab2SSongjun Wu .probe = atmel_pdmic_codec_probe, 360*72bb3cdfSKuninori Morimoto .component_driver = { 361a7664ab2SSongjun Wu .controls = atmel_pdmic_snd_controls, 362a7664ab2SSongjun Wu .num_controls = ARRAY_SIZE(atmel_pdmic_snd_controls), 363*72bb3cdfSKuninori Morimoto }, 364a7664ab2SSongjun Wu }; 365a7664ab2SSongjun Wu 366a7664ab2SSongjun Wu /* codec dai component */ 367a7664ab2SSongjun Wu #define PDMIC_MR_PRESCAL_MAX_VAL 127 368a7664ab2SSongjun Wu 369a7664ab2SSongjun Wu static int 370a7664ab2SSongjun Wu atmel_pdmic_codec_dai_hw_params(struct snd_pcm_substream *substream, 371a7664ab2SSongjun Wu struct snd_pcm_hw_params *params, 372a7664ab2SSongjun Wu struct snd_soc_dai *codec_dai) 373a7664ab2SSongjun Wu { 374a7664ab2SSongjun Wu struct snd_soc_pcm_runtime *rtd = substream->private_data; 375a7664ab2SSongjun Wu struct atmel_pdmic *dd = snd_soc_card_get_drvdata(rtd->card); 376a7664ab2SSongjun Wu struct snd_soc_codec *codec = codec_dai->codec; 377a7664ab2SSongjun Wu unsigned int rate_min = substream->runtime->hw.rate_min; 378a7664ab2SSongjun Wu unsigned int rate_max = substream->runtime->hw.rate_max; 379a7664ab2SSongjun Wu int fs = params_rate(params); 380a7664ab2SSongjun Wu int bits = params_width(params); 381a7664ab2SSongjun Wu unsigned long pclk_rate, gclk_rate; 382a7664ab2SSongjun Wu unsigned int f_pdmic; 383a7664ab2SSongjun Wu u32 mr_val, dspr0_val, pclk_prescal, gclk_prescal; 384a7664ab2SSongjun Wu 385a7664ab2SSongjun Wu if (params_channels(params) != 1) { 386a7664ab2SSongjun Wu dev_err(codec->dev, 387a7664ab2SSongjun Wu "only supports one channel\n"); 388a7664ab2SSongjun Wu return -EINVAL; 389a7664ab2SSongjun Wu } 390a7664ab2SSongjun Wu 391a7664ab2SSongjun Wu if ((fs < rate_min) || (fs > rate_max)) { 392a7664ab2SSongjun Wu dev_err(codec->dev, 393a7664ab2SSongjun Wu "sample rate is %dHz, min rate is %dHz, max rate is %dHz\n", 394a7664ab2SSongjun Wu fs, rate_min, rate_max); 395a7664ab2SSongjun Wu 396a7664ab2SSongjun Wu return -EINVAL; 397a7664ab2SSongjun Wu } 398a7664ab2SSongjun Wu 399a7664ab2SSongjun Wu switch (bits) { 400a7664ab2SSongjun Wu case 16: 401a7664ab2SSongjun Wu dspr0_val = (PDMIC_DSPR0_SIZE_16_BITS 402a7664ab2SSongjun Wu << PDMIC_DSPR0_SIZE_SHIFT); 403a7664ab2SSongjun Wu break; 404a7664ab2SSongjun Wu case 32: 405a7664ab2SSongjun Wu dspr0_val = (PDMIC_DSPR0_SIZE_32_BITS 406a7664ab2SSongjun Wu << PDMIC_DSPR0_SIZE_SHIFT); 407a7664ab2SSongjun Wu break; 408a7664ab2SSongjun Wu default: 409a7664ab2SSongjun Wu return -EINVAL; 410a7664ab2SSongjun Wu } 411a7664ab2SSongjun Wu 412a7664ab2SSongjun Wu if ((fs << 7) > (rate_max << 6)) { 413a7664ab2SSongjun Wu f_pdmic = fs << 6; 414a7664ab2SSongjun Wu dspr0_val |= PDMIC_DSPR0_OSR_64 << PDMIC_DSPR0_OSR_SHIFT; 415a7664ab2SSongjun Wu } else { 416a7664ab2SSongjun Wu f_pdmic = fs << 7; 417a7664ab2SSongjun Wu dspr0_val |= PDMIC_DSPR0_OSR_128 << PDMIC_DSPR0_OSR_SHIFT; 418a7664ab2SSongjun Wu } 419a7664ab2SSongjun Wu 420a7664ab2SSongjun Wu pclk_rate = clk_get_rate(dd->pclk); 421a7664ab2SSongjun Wu gclk_rate = clk_get_rate(dd->gclk); 422a7664ab2SSongjun Wu 423a7664ab2SSongjun Wu /* PRESCAL = SELCK/(2*f_pdmic) - 1*/ 424a7664ab2SSongjun Wu pclk_prescal = (u32)(pclk_rate/(f_pdmic << 1)) - 1; 425a7664ab2SSongjun Wu gclk_prescal = (u32)(gclk_rate/(f_pdmic << 1)) - 1; 426a7664ab2SSongjun Wu 427a7664ab2SSongjun Wu if ((pclk_prescal > PDMIC_MR_PRESCAL_MAX_VAL) || 428a7664ab2SSongjun Wu (gclk_rate/((gclk_prescal + 1) << 1) < 429a7664ab2SSongjun Wu pclk_rate/((pclk_prescal + 1) << 1))) { 430a7664ab2SSongjun Wu mr_val = gclk_prescal << PDMIC_MR_PRESCAL_SHIFT; 431a7664ab2SSongjun Wu mr_val |= PDMIC_MR_CLKS_GCK << PDMIC_MR_CLKS_SHIFT; 432a7664ab2SSongjun Wu } else { 433a7664ab2SSongjun Wu mr_val = pclk_prescal << PDMIC_MR_PRESCAL_SHIFT; 434a7664ab2SSongjun Wu mr_val |= PDMIC_MR_CLKS_PCK << PDMIC_MR_CLKS_SHIFT; 435a7664ab2SSongjun Wu } 436a7664ab2SSongjun Wu 437a7664ab2SSongjun Wu snd_soc_update_bits(codec, PDMIC_MR, 438a7664ab2SSongjun Wu PDMIC_MR_PRESCAL_MASK | PDMIC_MR_CLKS_MASK, mr_val); 439a7664ab2SSongjun Wu 440a7664ab2SSongjun Wu snd_soc_update_bits(codec, PDMIC_DSPR0, 441a7664ab2SSongjun Wu PDMIC_DSPR0_OSR_MASK | PDMIC_DSPR0_SIZE_MASK, dspr0_val); 442a7664ab2SSongjun Wu 443a7664ab2SSongjun Wu return 0; 444a7664ab2SSongjun Wu } 445a7664ab2SSongjun Wu 446a7664ab2SSongjun Wu static int atmel_pdmic_codec_dai_prepare(struct snd_pcm_substream *substream, 447a7664ab2SSongjun Wu struct snd_soc_dai *codec_dai) 448a7664ab2SSongjun Wu { 449a7664ab2SSongjun Wu struct snd_soc_codec *codec = codec_dai->codec; 450a7664ab2SSongjun Wu 451a7664ab2SSongjun Wu snd_soc_update_bits(codec, PDMIC_CR, PDMIC_CR_ENPDM_MASK, 452a7664ab2SSongjun Wu PDMIC_CR_ENPDM_DIS << PDMIC_CR_ENPDM_SHIFT); 453a7664ab2SSongjun Wu 454a7664ab2SSongjun Wu return 0; 455a7664ab2SSongjun Wu } 456a7664ab2SSongjun Wu 457a7664ab2SSongjun Wu static int atmel_pdmic_codec_dai_trigger(struct snd_pcm_substream *substream, 458a7664ab2SSongjun Wu int cmd, struct snd_soc_dai *codec_dai) 459a7664ab2SSongjun Wu { 460a7664ab2SSongjun Wu struct snd_soc_codec *codec = codec_dai->codec; 461a7664ab2SSongjun Wu u32 val; 462a7664ab2SSongjun Wu 463a7664ab2SSongjun Wu switch (cmd) { 464a7664ab2SSongjun Wu case SNDRV_PCM_TRIGGER_START: 465a7664ab2SSongjun Wu case SNDRV_PCM_TRIGGER_RESUME: 466a7664ab2SSongjun Wu case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 467a7664ab2SSongjun Wu val = PDMIC_CR_ENPDM_EN << PDMIC_CR_ENPDM_SHIFT; 468a7664ab2SSongjun Wu break; 469a7664ab2SSongjun Wu case SNDRV_PCM_TRIGGER_STOP: 470a7664ab2SSongjun Wu case SNDRV_PCM_TRIGGER_SUSPEND: 471a7664ab2SSongjun Wu case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 472a7664ab2SSongjun Wu val = PDMIC_CR_ENPDM_DIS << PDMIC_CR_ENPDM_SHIFT; 473a7664ab2SSongjun Wu break; 474a7664ab2SSongjun Wu default: 475a7664ab2SSongjun Wu return -EINVAL; 476a7664ab2SSongjun Wu } 477a7664ab2SSongjun Wu 478a7664ab2SSongjun Wu snd_soc_update_bits(codec, PDMIC_CR, PDMIC_CR_ENPDM_MASK, val); 479a7664ab2SSongjun Wu 480a7664ab2SSongjun Wu return 0; 481a7664ab2SSongjun Wu } 482a7664ab2SSongjun Wu 483a7664ab2SSongjun Wu static const struct snd_soc_dai_ops atmel_pdmic_codec_dai_ops = { 484a7664ab2SSongjun Wu .hw_params = atmel_pdmic_codec_dai_hw_params, 485a7664ab2SSongjun Wu .prepare = atmel_pdmic_codec_dai_prepare, 486a7664ab2SSongjun Wu .trigger = atmel_pdmic_codec_dai_trigger, 487a7664ab2SSongjun Wu }; 488a7664ab2SSongjun Wu 489a7664ab2SSongjun Wu #define ATMEL_PDMIC_CODEC_DAI_NAME "atmel-pdmic-hifi" 490a7664ab2SSongjun Wu 491a7664ab2SSongjun Wu static struct snd_soc_dai_driver atmel_pdmic_codec_dai = { 492a7664ab2SSongjun Wu .name = ATMEL_PDMIC_CODEC_DAI_NAME, 493a7664ab2SSongjun Wu .capture = { 494a7664ab2SSongjun Wu .stream_name = "Capture", 495a7664ab2SSongjun Wu .channels_min = 1, 496a7664ab2SSongjun Wu .channels_max = 1, 497a7664ab2SSongjun Wu .rates = SNDRV_PCM_RATE_KNOT, 498a7664ab2SSongjun Wu .formats = ATMEL_PDMIC_FORMATS, 499a7664ab2SSongjun Wu }, 500a7664ab2SSongjun Wu .ops = &atmel_pdmic_codec_dai_ops, 501a7664ab2SSongjun Wu }; 502a7664ab2SSongjun Wu 503a7664ab2SSongjun Wu /* ASoC sound card */ 504a7664ab2SSongjun Wu static int atmel_pdmic_asoc_card_init(struct device *dev, 505a7664ab2SSongjun Wu struct snd_soc_card *card) 506a7664ab2SSongjun Wu { 507a7664ab2SSongjun Wu struct snd_soc_dai_link *dai_link; 508a7664ab2SSongjun Wu struct atmel_pdmic *dd = snd_soc_card_get_drvdata(card); 509a7664ab2SSongjun Wu 510a7664ab2SSongjun Wu dai_link = devm_kzalloc(dev, sizeof(*dai_link), GFP_KERNEL); 511a7664ab2SSongjun Wu if (!dai_link) 512a7664ab2SSongjun Wu return -ENOMEM; 513a7664ab2SSongjun Wu 514a7664ab2SSongjun Wu dai_link->name = "PDMIC"; 515a7664ab2SSongjun Wu dai_link->stream_name = "PDMIC PCM"; 516a7664ab2SSongjun Wu dai_link->codec_dai_name = ATMEL_PDMIC_CODEC_DAI_NAME; 517a7664ab2SSongjun Wu dai_link->cpu_dai_name = dev_name(dev); 518a7664ab2SSongjun Wu dai_link->codec_name = dev_name(dev); 519a7664ab2SSongjun Wu dai_link->platform_name = dev_name(dev); 520a7664ab2SSongjun Wu 521a7664ab2SSongjun Wu card->dai_link = dai_link; 522a7664ab2SSongjun Wu card->num_links = 1; 523a7664ab2SSongjun Wu card->name = dd->pdata->card_name; 524a7664ab2SSongjun Wu card->dev = dev; 525a7664ab2SSongjun Wu 526a7664ab2SSongjun Wu return 0; 527a7664ab2SSongjun Wu } 528a7664ab2SSongjun Wu 529a7664ab2SSongjun Wu static void atmel_pdmic_get_sample_rate(struct atmel_pdmic *dd, 530a7664ab2SSongjun Wu unsigned int *rate_min, unsigned int *rate_max) 531a7664ab2SSongjun Wu { 532a7664ab2SSongjun Wu u32 mic_min_freq = dd->pdata->mic_min_freq; 533a7664ab2SSongjun Wu u32 mic_max_freq = dd->pdata->mic_max_freq; 534a7664ab2SSongjun Wu u32 clk_max_rate = (u32)(clk_get_rate(dd->pclk) >> 1); 535a7664ab2SSongjun Wu u32 clk_min_rate = (u32)(clk_get_rate(dd->gclk) >> 8); 536a7664ab2SSongjun Wu 537a7664ab2SSongjun Wu if (mic_max_freq > clk_max_rate) 538a7664ab2SSongjun Wu mic_max_freq = clk_max_rate; 539a7664ab2SSongjun Wu 540a7664ab2SSongjun Wu if (mic_min_freq < clk_min_rate) 541a7664ab2SSongjun Wu mic_min_freq = clk_min_rate; 542a7664ab2SSongjun Wu 543a7664ab2SSongjun Wu *rate_min = DIV_ROUND_CLOSEST(mic_min_freq, 128); 544a7664ab2SSongjun Wu *rate_max = mic_max_freq >> 6; 545a7664ab2SSongjun Wu } 546a7664ab2SSongjun Wu 547a7664ab2SSongjun Wu /* PDMIC interrupt handler */ 548a7664ab2SSongjun Wu static irqreturn_t atmel_pdmic_interrupt(int irq, void *dev_id) 549a7664ab2SSongjun Wu { 550a7664ab2SSongjun Wu struct atmel_pdmic *dd = (struct atmel_pdmic *)dev_id; 551a7664ab2SSongjun Wu u32 pdmic_isr; 552a7664ab2SSongjun Wu irqreturn_t ret = IRQ_NONE; 553a7664ab2SSongjun Wu 554a7664ab2SSongjun Wu regmap_read(dd->regmap, PDMIC_ISR, &pdmic_isr); 555a7664ab2SSongjun Wu 556a7664ab2SSongjun Wu if (pdmic_isr & PDMIC_ISR_OVRE) { 557a7664ab2SSongjun Wu regmap_update_bits(dd->regmap, PDMIC_CR, PDMIC_CR_ENPDM_MASK, 558a7664ab2SSongjun Wu PDMIC_CR_ENPDM_DIS << PDMIC_CR_ENPDM_SHIFT); 559a7664ab2SSongjun Wu 560a7664ab2SSongjun Wu snd_pcm_stop_xrun(dd->substream); 561a7664ab2SSongjun Wu 562a7664ab2SSongjun Wu ret = IRQ_HANDLED; 563a7664ab2SSongjun Wu } 564a7664ab2SSongjun Wu 565a7664ab2SSongjun Wu return ret; 566a7664ab2SSongjun Wu } 567a7664ab2SSongjun Wu 568a7664ab2SSongjun Wu /* regmap configuration */ 569a7664ab2SSongjun Wu #define ATMEL_PDMIC_REG_MAX 0x124 570a7664ab2SSongjun Wu static const struct regmap_config atmel_pdmic_regmap_config = { 571a7664ab2SSongjun Wu .reg_bits = 32, 572a7664ab2SSongjun Wu .reg_stride = 4, 573a7664ab2SSongjun Wu .val_bits = 32, 574a7664ab2SSongjun Wu .max_register = ATMEL_PDMIC_REG_MAX, 575a7664ab2SSongjun Wu }; 576a7664ab2SSongjun Wu 577a7664ab2SSongjun Wu static int atmel_pdmic_probe(struct platform_device *pdev) 578a7664ab2SSongjun Wu { 579a7664ab2SSongjun Wu struct device *dev = &pdev->dev; 580a7664ab2SSongjun Wu struct atmel_pdmic *dd; 581a7664ab2SSongjun Wu struct resource *res; 582a7664ab2SSongjun Wu void __iomem *io_base; 583a7664ab2SSongjun Wu const struct atmel_pdmic_pdata *pdata; 584a7664ab2SSongjun Wu struct snd_soc_card *card; 585a7664ab2SSongjun Wu unsigned int rate_min, rate_max; 586a7664ab2SSongjun Wu int ret; 587a7664ab2SSongjun Wu 588a7664ab2SSongjun Wu pdata = atmel_pdmic_dt_init(dev); 589a7664ab2SSongjun Wu if (IS_ERR(pdata)) 590a7664ab2SSongjun Wu return PTR_ERR(pdata); 591a7664ab2SSongjun Wu 592a7664ab2SSongjun Wu dd = devm_kzalloc(dev, sizeof(*dd), GFP_KERNEL); 593a7664ab2SSongjun Wu if (!dd) 594a7664ab2SSongjun Wu return -ENOMEM; 595a7664ab2SSongjun Wu 596a7664ab2SSongjun Wu dd->pdata = pdata; 597a7664ab2SSongjun Wu 598a7664ab2SSongjun Wu dd->irq = platform_get_irq(pdev, 0); 599a7664ab2SSongjun Wu if (dd->irq < 0) { 600a7664ab2SSongjun Wu ret = dd->irq; 601a7664ab2SSongjun Wu dev_err(dev, "failed to could not get irq: %d\n", ret); 602a7664ab2SSongjun Wu return ret; 603a7664ab2SSongjun Wu } 604a7664ab2SSongjun Wu 605a7664ab2SSongjun Wu dd->pclk = devm_clk_get(dev, "pclk"); 606a7664ab2SSongjun Wu if (IS_ERR(dd->pclk)) { 607a7664ab2SSongjun Wu ret = PTR_ERR(dd->pclk); 608a7664ab2SSongjun Wu dev_err(dev, "failed to get peripheral clock: %d\n", ret); 609a7664ab2SSongjun Wu return ret; 610a7664ab2SSongjun Wu } 611a7664ab2SSongjun Wu 612a7664ab2SSongjun Wu dd->gclk = devm_clk_get(dev, "gclk"); 613a7664ab2SSongjun Wu if (IS_ERR(dd->gclk)) { 614a7664ab2SSongjun Wu ret = PTR_ERR(dd->gclk); 615a7664ab2SSongjun Wu dev_err(dev, "failed to get GCK: %d\n", ret); 616a7664ab2SSongjun Wu return ret; 617a7664ab2SSongjun Wu } 618a7664ab2SSongjun Wu 619a7664ab2SSongjun Wu /* The gclk clock frequency must always be tree times 620a7664ab2SSongjun Wu * lower than the pclk clock frequency 621a7664ab2SSongjun Wu */ 622a7664ab2SSongjun Wu ret = clk_set_rate(dd->gclk, clk_get_rate(dd->pclk)/3); 623a7664ab2SSongjun Wu if (ret) { 624a7664ab2SSongjun Wu dev_err(dev, "failed to set GCK clock rate: %d\n", ret); 625a7664ab2SSongjun Wu return ret; 626a7664ab2SSongjun Wu } 627a7664ab2SSongjun Wu 628a7664ab2SSongjun Wu res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 629a7664ab2SSongjun Wu io_base = devm_ioremap_resource(dev, res); 630a7664ab2SSongjun Wu if (IS_ERR(io_base)) { 631a7664ab2SSongjun Wu ret = PTR_ERR(io_base); 632a7664ab2SSongjun Wu dev_err(dev, "failed to remap register memory: %d\n", ret); 633a7664ab2SSongjun Wu return ret; 634a7664ab2SSongjun Wu } 635a7664ab2SSongjun Wu 636a7664ab2SSongjun Wu dd->phy_base = res->start; 637a7664ab2SSongjun Wu 638a7664ab2SSongjun Wu dd->regmap = devm_regmap_init_mmio(dev, io_base, 639a7664ab2SSongjun Wu &atmel_pdmic_regmap_config); 640a7664ab2SSongjun Wu if (IS_ERR(dd->regmap)) { 641a7664ab2SSongjun Wu ret = PTR_ERR(dd->regmap); 642a7664ab2SSongjun Wu dev_err(dev, "failed to init register map: %d\n", ret); 643a7664ab2SSongjun Wu return ret; 644a7664ab2SSongjun Wu } 645a7664ab2SSongjun Wu 646a7664ab2SSongjun Wu ret = devm_request_irq(dev, dd->irq, atmel_pdmic_interrupt, 0, 647a7664ab2SSongjun Wu "PDMIC", (void *)dd); 648a7664ab2SSongjun Wu if (ret < 0) { 649a7664ab2SSongjun Wu dev_err(dev, "can't register ISR for IRQ %u (ret=%i)\n", 650a7664ab2SSongjun Wu dd->irq, ret); 651a7664ab2SSongjun Wu return ret; 652a7664ab2SSongjun Wu } 653a7664ab2SSongjun Wu 654a7664ab2SSongjun Wu /* Get the minimal and maximal sample rate that micphone supports */ 655a7664ab2SSongjun Wu atmel_pdmic_get_sample_rate(dd, &rate_min, &rate_max); 656a7664ab2SSongjun Wu 657a7664ab2SSongjun Wu /* register cpu dai */ 658a7664ab2SSongjun Wu atmel_pdmic_cpu_dai.capture.rate_min = rate_min; 659a7664ab2SSongjun Wu atmel_pdmic_cpu_dai.capture.rate_max = rate_max; 660a7664ab2SSongjun Wu ret = devm_snd_soc_register_component(dev, 661a7664ab2SSongjun Wu &atmel_pdmic_cpu_dai_component, 662a7664ab2SSongjun Wu &atmel_pdmic_cpu_dai, 1); 663a7664ab2SSongjun Wu if (ret) { 664a7664ab2SSongjun Wu dev_err(dev, "could not register CPU DAI: %d\n", ret); 665a7664ab2SSongjun Wu return ret; 666a7664ab2SSongjun Wu } 667a7664ab2SSongjun Wu 668a7664ab2SSongjun Wu /* register platform */ 669a7664ab2SSongjun Wu ret = devm_snd_dmaengine_pcm_register(dev, 670a7664ab2SSongjun Wu &atmel_pdmic_dmaengine_pcm_config, 671a7664ab2SSongjun Wu 0); 672a7664ab2SSongjun Wu if (ret) { 673a7664ab2SSongjun Wu dev_err(dev, "could not register platform: %d\n", ret); 674a7664ab2SSongjun Wu return ret; 675a7664ab2SSongjun Wu } 676a7664ab2SSongjun Wu 677a7664ab2SSongjun Wu /* register codec and codec dai */ 678a7664ab2SSongjun Wu atmel_pdmic_codec_dai.capture.rate_min = rate_min; 679a7664ab2SSongjun Wu atmel_pdmic_codec_dai.capture.rate_max = rate_max; 680a7664ab2SSongjun Wu ret = snd_soc_register_codec(dev, &soc_codec_dev_pdmic, 681a7664ab2SSongjun Wu &atmel_pdmic_codec_dai, 1); 682a7664ab2SSongjun Wu if (ret) { 683a7664ab2SSongjun Wu dev_err(dev, "could not register codec: %d\n", ret); 684a7664ab2SSongjun Wu return ret; 685a7664ab2SSongjun Wu } 686a7664ab2SSongjun Wu 687a7664ab2SSongjun Wu /* register sound card */ 688a7664ab2SSongjun Wu card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL); 689a7664ab2SSongjun Wu if (!card) { 690a7664ab2SSongjun Wu ret = -ENOMEM; 691a7664ab2SSongjun Wu goto unregister_codec; 692a7664ab2SSongjun Wu } 693a7664ab2SSongjun Wu 694a7664ab2SSongjun Wu snd_soc_card_set_drvdata(card, dd); 695a7664ab2SSongjun Wu platform_set_drvdata(pdev, card); 696a7664ab2SSongjun Wu 697a7664ab2SSongjun Wu ret = atmel_pdmic_asoc_card_init(dev, card); 698a7664ab2SSongjun Wu if (ret) { 699a7664ab2SSongjun Wu dev_err(dev, "failed to init sound card: %d\n", ret); 700a7664ab2SSongjun Wu goto unregister_codec; 701a7664ab2SSongjun Wu } 702a7664ab2SSongjun Wu 703a7664ab2SSongjun Wu ret = devm_snd_soc_register_card(dev, card); 704a7664ab2SSongjun Wu if (ret) { 705a7664ab2SSongjun Wu dev_err(dev, "failed to register sound card: %d\n", ret); 706a7664ab2SSongjun Wu goto unregister_codec; 707a7664ab2SSongjun Wu } 708a7664ab2SSongjun Wu 709a7664ab2SSongjun Wu return 0; 710a7664ab2SSongjun Wu 711a7664ab2SSongjun Wu unregister_codec: 712a7664ab2SSongjun Wu snd_soc_unregister_codec(dev); 713a7664ab2SSongjun Wu return ret; 714a7664ab2SSongjun Wu } 715a7664ab2SSongjun Wu 716a7664ab2SSongjun Wu static int atmel_pdmic_remove(struct platform_device *pdev) 717a7664ab2SSongjun Wu { 718a7664ab2SSongjun Wu snd_soc_unregister_codec(&pdev->dev); 719a7664ab2SSongjun Wu return 0; 720a7664ab2SSongjun Wu } 721a7664ab2SSongjun Wu 722a7664ab2SSongjun Wu static struct platform_driver atmel_pdmic_driver = { 723a7664ab2SSongjun Wu .driver = { 724a7664ab2SSongjun Wu .name = "atmel-pdmic", 725a7664ab2SSongjun Wu .of_match_table = of_match_ptr(atmel_pdmic_of_match), 726a7664ab2SSongjun Wu .pm = &snd_soc_pm_ops, 727a7664ab2SSongjun Wu }, 728a7664ab2SSongjun Wu .probe = atmel_pdmic_probe, 729a7664ab2SSongjun Wu .remove = atmel_pdmic_remove, 730a7664ab2SSongjun Wu }; 731a7664ab2SSongjun Wu module_platform_driver(atmel_pdmic_driver); 732a7664ab2SSongjun Wu 733a7664ab2SSongjun Wu MODULE_DESCRIPTION("Atmel PDMIC driver under ALSA SoC architecture"); 734a7664ab2SSongjun Wu MODULE_AUTHOR("Songjun Wu <songjun.wu@atmel.com>"); 735a7664ab2SSongjun Wu MODULE_LICENSE("GPL v2"); 736