1 /* Atmel ALSA SoC Audio Class D Amplifier (CLASSD) driver 2 * 3 * Copyright (C) 2015 Atmel 4 * 5 * Author: Songjun Wu <songjun.wu@atmel.com> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 or later 9 * as published by the Free Software Foundation. 10 */ 11 12 #include <linux/of.h> 13 #include <linux/clk.h> 14 #include <linux/module.h> 15 #include <linux/platform_device.h> 16 #include <linux/regmap.h> 17 #include <sound/core.h> 18 #include <sound/dmaengine_pcm.h> 19 #include <sound/pcm_params.h> 20 #include <sound/tlv.h> 21 #include "atmel-classd.h" 22 23 struct atmel_classd_pdata { 24 bool non_overlap_enable; 25 int non_overlap_time; 26 int pwm_type; 27 const char *card_name; 28 }; 29 30 struct atmel_classd { 31 dma_addr_t phy_base; 32 struct regmap *regmap; 33 struct clk *pclk; 34 struct clk *gclk; 35 int irq; 36 const struct atmel_classd_pdata *pdata; 37 }; 38 39 #ifdef CONFIG_OF 40 static const struct of_device_id atmel_classd_of_match[] = { 41 { 42 .compatible = "atmel,sama5d2-classd", 43 }, { 44 /* sentinel */ 45 } 46 }; 47 MODULE_DEVICE_TABLE(of, atmel_classd_of_match); 48 49 static struct atmel_classd_pdata *atmel_classd_dt_init(struct device *dev) 50 { 51 struct device_node *np = dev->of_node; 52 struct atmel_classd_pdata *pdata; 53 const char *pwm_type; 54 int ret; 55 56 if (!np) { 57 dev_err(dev, "device node not found\n"); 58 return ERR_PTR(-EINVAL); 59 } 60 61 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); 62 if (!pdata) 63 return ERR_PTR(-ENOMEM); 64 65 ret = of_property_read_string(np, "atmel,pwm-type", &pwm_type); 66 if ((ret == 0) && (strcmp(pwm_type, "diff") == 0)) 67 pdata->pwm_type = CLASSD_MR_PWMTYP_DIFF; 68 else 69 pdata->pwm_type = CLASSD_MR_PWMTYP_SINGLE; 70 71 ret = of_property_read_u32(np, 72 "atmel,non-overlap-time", &pdata->non_overlap_time); 73 if (ret) 74 pdata->non_overlap_enable = false; 75 else 76 pdata->non_overlap_enable = true; 77 78 ret = of_property_read_string(np, "atmel,model", &pdata->card_name); 79 if (ret) 80 pdata->card_name = "CLASSD"; 81 82 return pdata; 83 } 84 #else 85 static inline struct atmel_classd_pdata * 86 atmel_classd_dt_init(struct device *dev) 87 { 88 return ERR_PTR(-EINVAL); 89 } 90 #endif 91 92 #define ATMEL_CLASSD_RATES (SNDRV_PCM_RATE_8000 \ 93 | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 \ 94 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 \ 95 | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 \ 96 | SNDRV_PCM_RATE_96000) 97 98 static const struct snd_pcm_hardware atmel_classd_hw = { 99 .info = SNDRV_PCM_INFO_MMAP 100 | SNDRV_PCM_INFO_MMAP_VALID 101 | SNDRV_PCM_INFO_INTERLEAVED 102 | SNDRV_PCM_INFO_RESUME 103 | SNDRV_PCM_INFO_PAUSE, 104 .formats = (SNDRV_PCM_FMTBIT_S16_LE), 105 .rates = ATMEL_CLASSD_RATES, 106 .rate_min = 8000, 107 .rate_max = 96000, 108 .channels_min = 1, 109 .channels_max = 2, 110 .buffer_bytes_max = 64 * 1024, 111 .period_bytes_min = 256, 112 .period_bytes_max = 32 * 1024, 113 .periods_min = 2, 114 .periods_max = 256, 115 }; 116 117 #define ATMEL_CLASSD_PREALLOC_BUF_SIZE (64 * 1024) 118 119 /* cpu dai component */ 120 static int atmel_classd_cpu_dai_startup(struct snd_pcm_substream *substream, 121 struct snd_soc_dai *cpu_dai) 122 { 123 struct snd_soc_pcm_runtime *rtd = substream->private_data; 124 struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); 125 126 regmap_write(dd->regmap, CLASSD_THR, 0x0); 127 128 return clk_prepare_enable(dd->pclk); 129 } 130 131 static void atmel_classd_cpu_dai_shutdown(struct snd_pcm_substream *substream, 132 struct snd_soc_dai *cpu_dai) 133 { 134 struct snd_soc_pcm_runtime *rtd = substream->private_data; 135 struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); 136 137 clk_disable_unprepare(dd->pclk); 138 } 139 140 static const struct snd_soc_dai_ops atmel_classd_cpu_dai_ops = { 141 .startup = atmel_classd_cpu_dai_startup, 142 .shutdown = atmel_classd_cpu_dai_shutdown, 143 }; 144 145 static struct snd_soc_dai_driver atmel_classd_cpu_dai = { 146 .playback = { 147 .channels_min = 1, 148 .channels_max = 2, 149 .rates = ATMEL_CLASSD_RATES, 150 .formats = SNDRV_PCM_FMTBIT_S16_LE,}, 151 .ops = &atmel_classd_cpu_dai_ops, 152 }; 153 154 static const struct snd_soc_component_driver atmel_classd_cpu_dai_component = { 155 .name = "atmel-classd", 156 }; 157 158 /* platform */ 159 static int 160 atmel_classd_platform_configure_dma(struct snd_pcm_substream *substream, 161 struct snd_pcm_hw_params *params, 162 struct dma_slave_config *slave_config) 163 { 164 struct snd_soc_pcm_runtime *rtd = substream->private_data; 165 struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); 166 167 if (params_physical_width(params) != 16) { 168 dev_err(rtd->platform->dev, 169 "only supports 16-bit audio data\n"); 170 return -EINVAL; 171 } 172 173 if (params_channels(params) == 1) 174 slave_config->dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; 175 else 176 slave_config->dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; 177 178 slave_config->direction = DMA_MEM_TO_DEV; 179 slave_config->dst_addr = dd->phy_base + CLASSD_THR; 180 slave_config->dst_maxburst = 1; 181 slave_config->src_maxburst = 1; 182 slave_config->device_fc = false; 183 184 return 0; 185 } 186 187 static const struct snd_dmaengine_pcm_config 188 atmel_classd_dmaengine_pcm_config = { 189 .prepare_slave_config = atmel_classd_platform_configure_dma, 190 .pcm_hardware = &atmel_classd_hw, 191 .prealloc_buffer_size = ATMEL_CLASSD_PREALLOC_BUF_SIZE, 192 }; 193 194 /* codec */ 195 static const char * const mono_mode_text[] = { 196 "mix", "sat", "left", "right" 197 }; 198 199 static SOC_ENUM_SINGLE_DECL(classd_mono_mode_enum, 200 CLASSD_INTPMR, CLASSD_INTPMR_MONO_MODE_SHIFT, 201 mono_mode_text); 202 203 static const char * const eqcfg_text[] = { 204 "Treble-12dB", "Treble-6dB", 205 "Medium-8dB", "Medium-3dB", 206 "Bass-12dB", "Bass-6dB", 207 "0 dB", 208 "Bass+6dB", "Bass+12dB", 209 "Medium+3dB", "Medium+8dB", 210 "Treble+6dB", "Treble+12dB", 211 }; 212 213 static const unsigned int eqcfg_value[] = { 214 CLASSD_INTPMR_EQCFG_T_CUT_12, CLASSD_INTPMR_EQCFG_T_CUT_6, 215 CLASSD_INTPMR_EQCFG_M_CUT_8, CLASSD_INTPMR_EQCFG_M_CUT_3, 216 CLASSD_INTPMR_EQCFG_B_CUT_12, CLASSD_INTPMR_EQCFG_B_CUT_6, 217 CLASSD_INTPMR_EQCFG_FLAT, 218 CLASSD_INTPMR_EQCFG_B_BOOST_6, CLASSD_INTPMR_EQCFG_B_BOOST_12, 219 CLASSD_INTPMR_EQCFG_M_BOOST_3, CLASSD_INTPMR_EQCFG_M_BOOST_8, 220 CLASSD_INTPMR_EQCFG_T_BOOST_6, CLASSD_INTPMR_EQCFG_T_BOOST_12, 221 }; 222 223 static SOC_VALUE_ENUM_SINGLE_DECL(classd_eqcfg_enum, 224 CLASSD_INTPMR, CLASSD_INTPMR_EQCFG_SHIFT, 0xf, 225 eqcfg_text, eqcfg_value); 226 227 static const DECLARE_TLV_DB_SCALE(classd_digital_tlv, -7800, 100, 1); 228 229 static const struct snd_kcontrol_new atmel_classd_snd_controls[] = { 230 SOC_DOUBLE_TLV("Playback Volume", CLASSD_INTPMR, 231 CLASSD_INTPMR_ATTL_SHIFT, CLASSD_INTPMR_ATTR_SHIFT, 232 78, 1, classd_digital_tlv), 233 234 SOC_SINGLE("Deemphasis Switch", CLASSD_INTPMR, 235 CLASSD_INTPMR_DEEMP_SHIFT, 1, 0), 236 237 SOC_SINGLE("Mono Switch", CLASSD_INTPMR, CLASSD_INTPMR_MONO_SHIFT, 1, 0), 238 239 SOC_SINGLE("Swap Switch", CLASSD_INTPMR, CLASSD_INTPMR_SWAP_SHIFT, 1, 0), 240 241 SOC_ENUM("Mono Mode", classd_mono_mode_enum), 242 243 SOC_ENUM("EQ", classd_eqcfg_enum), 244 }; 245 246 static const char * const pwm_type[] = { 247 "Single ended", "Differential" 248 }; 249 250 static int atmel_classd_codec_probe(struct snd_soc_codec *codec) 251 { 252 struct snd_soc_card *card = snd_soc_codec_get_drvdata(codec); 253 struct atmel_classd *dd = snd_soc_card_get_drvdata(card); 254 const struct atmel_classd_pdata *pdata = dd->pdata; 255 u32 mask, val; 256 257 mask = CLASSD_MR_PWMTYP_MASK; 258 val = pdata->pwm_type << CLASSD_MR_PWMTYP_SHIFT; 259 260 mask |= CLASSD_MR_NON_OVERLAP_MASK; 261 if (pdata->non_overlap_enable) { 262 val |= (CLASSD_MR_NON_OVERLAP_EN 263 << CLASSD_MR_NON_OVERLAP_SHIFT); 264 265 mask |= CLASSD_MR_NOVR_VAL_MASK; 266 switch (pdata->non_overlap_time) { 267 case 5: 268 val |= (CLASSD_MR_NOVR_VAL_5NS 269 << CLASSD_MR_NOVR_VAL_SHIFT); 270 break; 271 case 10: 272 val |= (CLASSD_MR_NOVR_VAL_10NS 273 << CLASSD_MR_NOVR_VAL_SHIFT); 274 break; 275 case 15: 276 val |= (CLASSD_MR_NOVR_VAL_15NS 277 << CLASSD_MR_NOVR_VAL_SHIFT); 278 break; 279 case 20: 280 val |= (CLASSD_MR_NOVR_VAL_20NS 281 << CLASSD_MR_NOVR_VAL_SHIFT); 282 break; 283 default: 284 val |= (CLASSD_MR_NOVR_VAL_10NS 285 << CLASSD_MR_NOVR_VAL_SHIFT); 286 dev_warn(codec->dev, 287 "non-overlapping value %d is invalid, the default value 10 is specified\n", 288 pdata->non_overlap_time); 289 break; 290 } 291 } 292 293 snd_soc_update_bits(codec, CLASSD_MR, mask, val); 294 295 dev_info(codec->dev, 296 "PWM modulation type is %s, non-overlapping is %s\n", 297 pwm_type[pdata->pwm_type], 298 pdata->non_overlap_enable?"enabled":"disabled"); 299 300 return 0; 301 } 302 303 static int atmel_classd_codec_resume(struct snd_soc_codec *codec) 304 { 305 struct snd_soc_card *card = snd_soc_codec_get_drvdata(codec); 306 struct atmel_classd *dd = snd_soc_card_get_drvdata(card); 307 308 return regcache_sync(dd->regmap); 309 } 310 311 static struct regmap *atmel_classd_codec_get_remap(struct device *dev) 312 { 313 return dev_get_regmap(dev, NULL); 314 } 315 316 static struct snd_soc_codec_driver soc_codec_dev_classd = { 317 .probe = atmel_classd_codec_probe, 318 .resume = atmel_classd_codec_resume, 319 .get_regmap = atmel_classd_codec_get_remap, 320 .component_driver = { 321 .controls = atmel_classd_snd_controls, 322 .num_controls = ARRAY_SIZE(atmel_classd_snd_controls), 323 }, 324 }; 325 326 /* codec dai component */ 327 static int atmel_classd_codec_dai_startup(struct snd_pcm_substream *substream, 328 struct snd_soc_dai *codec_dai) 329 { 330 struct snd_soc_pcm_runtime *rtd = substream->private_data; 331 struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); 332 333 return clk_prepare_enable(dd->gclk); 334 } 335 336 static int atmel_classd_codec_dai_digital_mute(struct snd_soc_dai *codec_dai, 337 int mute) 338 { 339 struct snd_soc_codec *codec = codec_dai->codec; 340 u32 mask, val; 341 342 mask = CLASSD_MR_LMUTE_MASK | CLASSD_MR_RMUTE_MASK; 343 344 if (mute) 345 val = mask; 346 else 347 val = 0; 348 349 snd_soc_update_bits(codec, CLASSD_MR, mask, val); 350 351 return 0; 352 } 353 354 #define CLASSD_GCLK_RATE_11M2896_MPY_8 (112896 * 100 * 8) 355 #define CLASSD_GCLK_RATE_12M288_MPY_8 (12288 * 1000 * 8) 356 357 static struct { 358 int rate; 359 int sample_rate; 360 int dsp_clk; 361 unsigned long gclk_rate; 362 } const sample_rates[] = { 363 { 8000, CLASSD_INTPMR_FRAME_8K, 364 CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 }, 365 { 16000, CLASSD_INTPMR_FRAME_16K, 366 CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 }, 367 { 32000, CLASSD_INTPMR_FRAME_32K, 368 CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 }, 369 { 48000, CLASSD_INTPMR_FRAME_48K, 370 CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 }, 371 { 96000, CLASSD_INTPMR_FRAME_96K, 372 CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 }, 373 { 22050, CLASSD_INTPMR_FRAME_22K, 374 CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 }, 375 { 44100, CLASSD_INTPMR_FRAME_44K, 376 CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 }, 377 { 88200, CLASSD_INTPMR_FRAME_88K, 378 CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 }, 379 }; 380 381 static int 382 atmel_classd_codec_dai_hw_params(struct snd_pcm_substream *substream, 383 struct snd_pcm_hw_params *params, 384 struct snd_soc_dai *codec_dai) 385 { 386 struct snd_soc_pcm_runtime *rtd = substream->private_data; 387 struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); 388 struct snd_soc_codec *codec = codec_dai->codec; 389 int fs; 390 int i, best, best_val, cur_val, ret; 391 u32 mask, val; 392 393 fs = params_rate(params); 394 395 best = 0; 396 best_val = abs(fs - sample_rates[0].rate); 397 for (i = 1; i < ARRAY_SIZE(sample_rates); i++) { 398 /* Closest match */ 399 cur_val = abs(fs - sample_rates[i].rate); 400 if (cur_val < best_val) { 401 best = i; 402 best_val = cur_val; 403 } 404 } 405 406 dev_dbg(codec->dev, 407 "Selected SAMPLE_RATE of %dHz, GCLK_RATE of %ldHz\n", 408 sample_rates[best].rate, sample_rates[best].gclk_rate); 409 410 clk_disable_unprepare(dd->gclk); 411 412 ret = clk_set_rate(dd->gclk, sample_rates[best].gclk_rate); 413 if (ret) 414 return ret; 415 416 mask = CLASSD_INTPMR_DSP_CLK_FREQ_MASK | CLASSD_INTPMR_FRAME_MASK; 417 val = (sample_rates[best].dsp_clk << CLASSD_INTPMR_DSP_CLK_FREQ_SHIFT) 418 | (sample_rates[best].sample_rate << CLASSD_INTPMR_FRAME_SHIFT); 419 420 snd_soc_update_bits(codec, CLASSD_INTPMR, mask, val); 421 422 return clk_prepare_enable(dd->gclk); 423 } 424 425 static void 426 atmel_classd_codec_dai_shutdown(struct snd_pcm_substream *substream, 427 struct snd_soc_dai *codec_dai) 428 { 429 struct snd_soc_pcm_runtime *rtd = substream->private_data; 430 struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); 431 432 clk_disable_unprepare(dd->gclk); 433 } 434 435 static int atmel_classd_codec_dai_prepare(struct snd_pcm_substream *substream, 436 struct snd_soc_dai *codec_dai) 437 { 438 struct snd_soc_codec *codec = codec_dai->codec; 439 440 snd_soc_update_bits(codec, CLASSD_MR, 441 CLASSD_MR_LEN_MASK | CLASSD_MR_REN_MASK, 442 (CLASSD_MR_LEN_DIS << CLASSD_MR_LEN_SHIFT) 443 |(CLASSD_MR_REN_DIS << CLASSD_MR_REN_SHIFT)); 444 445 return 0; 446 } 447 448 static int atmel_classd_codec_dai_trigger(struct snd_pcm_substream *substream, 449 int cmd, struct snd_soc_dai *codec_dai) 450 { 451 struct snd_soc_codec *codec = codec_dai->codec; 452 u32 mask, val; 453 454 mask = CLASSD_MR_LEN_MASK | CLASSD_MR_REN_MASK; 455 456 switch (cmd) { 457 case SNDRV_PCM_TRIGGER_START: 458 case SNDRV_PCM_TRIGGER_RESUME: 459 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 460 val = mask; 461 break; 462 case SNDRV_PCM_TRIGGER_STOP: 463 case SNDRV_PCM_TRIGGER_SUSPEND: 464 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 465 val = (CLASSD_MR_LEN_DIS << CLASSD_MR_LEN_SHIFT) 466 | (CLASSD_MR_REN_DIS << CLASSD_MR_REN_SHIFT); 467 break; 468 default: 469 return -EINVAL; 470 } 471 472 snd_soc_update_bits(codec, CLASSD_MR, mask, val); 473 474 return 0; 475 } 476 477 static const struct snd_soc_dai_ops atmel_classd_codec_dai_ops = { 478 .digital_mute = atmel_classd_codec_dai_digital_mute, 479 .startup = atmel_classd_codec_dai_startup, 480 .shutdown = atmel_classd_codec_dai_shutdown, 481 .hw_params = atmel_classd_codec_dai_hw_params, 482 .prepare = atmel_classd_codec_dai_prepare, 483 .trigger = atmel_classd_codec_dai_trigger, 484 }; 485 486 #define ATMEL_CLASSD_CODEC_DAI_NAME "atmel-classd-hifi" 487 488 static struct snd_soc_dai_driver atmel_classd_codec_dai = { 489 .name = ATMEL_CLASSD_CODEC_DAI_NAME, 490 .playback = { 491 .stream_name = "Playback", 492 .channels_min = 1, 493 .channels_max = 2, 494 .rates = ATMEL_CLASSD_RATES, 495 .formats = SNDRV_PCM_FMTBIT_S16_LE, 496 }, 497 .ops = &atmel_classd_codec_dai_ops, 498 }; 499 500 /* ASoC sound card */ 501 static int atmel_classd_asoc_card_init(struct device *dev, 502 struct snd_soc_card *card) 503 { 504 struct snd_soc_dai_link *dai_link; 505 struct atmel_classd *dd = snd_soc_card_get_drvdata(card); 506 507 dai_link = devm_kzalloc(dev, sizeof(*dai_link), GFP_KERNEL); 508 if (!dai_link) 509 return -ENOMEM; 510 511 dai_link->name = "CLASSD"; 512 dai_link->stream_name = "CLASSD PCM"; 513 dai_link->codec_dai_name = ATMEL_CLASSD_CODEC_DAI_NAME; 514 dai_link->cpu_dai_name = dev_name(dev); 515 dai_link->codec_name = dev_name(dev); 516 dai_link->platform_name = dev_name(dev); 517 518 card->dai_link = dai_link; 519 card->num_links = 1; 520 card->name = dd->pdata->card_name; 521 card->dev = dev; 522 523 return 0; 524 }; 525 526 /* regmap configuration */ 527 static const struct reg_default atmel_classd_reg_defaults[] = { 528 { CLASSD_INTPMR, 0x00301212 }, 529 }; 530 531 #define ATMEL_CLASSD_REG_MAX 0xE4 532 static const struct regmap_config atmel_classd_regmap_config = { 533 .reg_bits = 32, 534 .reg_stride = 4, 535 .val_bits = 32, 536 .max_register = ATMEL_CLASSD_REG_MAX, 537 538 .cache_type = REGCACHE_FLAT, 539 .reg_defaults = atmel_classd_reg_defaults, 540 .num_reg_defaults = ARRAY_SIZE(atmel_classd_reg_defaults), 541 }; 542 543 static int atmel_classd_probe(struct platform_device *pdev) 544 { 545 struct device *dev = &pdev->dev; 546 struct atmel_classd *dd; 547 struct resource *res; 548 void __iomem *io_base; 549 const struct atmel_classd_pdata *pdata; 550 struct snd_soc_card *card; 551 int ret; 552 553 pdata = dev_get_platdata(dev); 554 if (!pdata) { 555 pdata = atmel_classd_dt_init(dev); 556 if (IS_ERR(pdata)) 557 return PTR_ERR(pdata); 558 } 559 560 dd = devm_kzalloc(dev, sizeof(*dd), GFP_KERNEL); 561 if (!dd) 562 return -ENOMEM; 563 564 dd->pdata = pdata; 565 566 dd->irq = platform_get_irq(pdev, 0); 567 if (dd->irq < 0) { 568 ret = dd->irq; 569 dev_err(dev, "failed to could not get irq: %d\n", ret); 570 return ret; 571 } 572 573 dd->pclk = devm_clk_get(dev, "pclk"); 574 if (IS_ERR(dd->pclk)) { 575 ret = PTR_ERR(dd->pclk); 576 dev_err(dev, "failed to get peripheral clock: %d\n", ret); 577 return ret; 578 } 579 580 dd->gclk = devm_clk_get(dev, "gclk"); 581 if (IS_ERR(dd->gclk)) { 582 ret = PTR_ERR(dd->gclk); 583 dev_err(dev, "failed to get GCK clock: %d\n", ret); 584 return ret; 585 } 586 587 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 588 io_base = devm_ioremap_resource(dev, res); 589 if (IS_ERR(io_base)) { 590 ret = PTR_ERR(io_base); 591 dev_err(dev, "failed to remap register memory: %d\n", ret); 592 return ret; 593 } 594 595 dd->phy_base = res->start; 596 597 dd->regmap = devm_regmap_init_mmio(dev, io_base, 598 &atmel_classd_regmap_config); 599 if (IS_ERR(dd->regmap)) { 600 ret = PTR_ERR(dd->regmap); 601 dev_err(dev, "failed to init register map: %d\n", ret); 602 return ret; 603 } 604 605 ret = devm_snd_soc_register_component(dev, 606 &atmel_classd_cpu_dai_component, 607 &atmel_classd_cpu_dai, 1); 608 if (ret) { 609 dev_err(dev, "could not register CPU DAI: %d\n", ret); 610 return ret; 611 } 612 613 ret = devm_snd_dmaengine_pcm_register(dev, 614 &atmel_classd_dmaengine_pcm_config, 615 0); 616 if (ret) { 617 dev_err(dev, "could not register platform: %d\n", ret); 618 return ret; 619 } 620 621 ret = snd_soc_register_codec(dev, &soc_codec_dev_classd, 622 &atmel_classd_codec_dai, 1); 623 if (ret) { 624 dev_err(dev, "could not register codec: %d\n", ret); 625 return ret; 626 } 627 628 /* register sound card */ 629 card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL); 630 if (!card) { 631 ret = -ENOMEM; 632 goto unregister_codec; 633 } 634 635 snd_soc_card_set_drvdata(card, dd); 636 637 ret = atmel_classd_asoc_card_init(dev, card); 638 if (ret) { 639 dev_err(dev, "failed to init sound card\n"); 640 goto unregister_codec; 641 } 642 643 ret = devm_snd_soc_register_card(dev, card); 644 if (ret) { 645 dev_err(dev, "failed to register sound card: %d\n", ret); 646 goto unregister_codec; 647 } 648 649 return 0; 650 651 unregister_codec: 652 snd_soc_unregister_codec(dev); 653 return ret; 654 } 655 656 static int atmel_classd_remove(struct platform_device *pdev) 657 { 658 snd_soc_unregister_codec(&pdev->dev); 659 return 0; 660 } 661 662 static struct platform_driver atmel_classd_driver = { 663 .driver = { 664 .name = "atmel-classd", 665 .of_match_table = of_match_ptr(atmel_classd_of_match), 666 .pm = &snd_soc_pm_ops, 667 }, 668 .probe = atmel_classd_probe, 669 .remove = atmel_classd_remove, 670 }; 671 module_platform_driver(atmel_classd_driver); 672 673 MODULE_DESCRIPTION("Atmel ClassD driver under ALSA SoC architecture"); 674 MODULE_AUTHOR("Songjun Wu <songjun.wu@atmel.com>"); 675 MODULE_LICENSE("GPL"); 676