1 /* Atmel ALSA SoC Audio Class D Amplifier (CLASSD) driver 2 * 3 * Copyright (C) 2015 Atmel 4 * 5 * Author: Songjun Wu <songjun.wu@atmel.com> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 or later 9 * as published by the Free Software Foundation. 10 */ 11 12 #include <linux/of.h> 13 #include <linux/clk.h> 14 #include <linux/module.h> 15 #include <linux/platform_device.h> 16 #include <linux/regmap.h> 17 #include <sound/core.h> 18 #include <sound/dmaengine_pcm.h> 19 #include <sound/pcm_params.h> 20 #include <sound/tlv.h> 21 #include "atmel-classd.h" 22 23 struct atmel_classd_pdata { 24 bool non_overlap_enable; 25 int non_overlap_time; 26 int pwm_type; 27 const char *card_name; 28 }; 29 30 struct atmel_classd { 31 dma_addr_t phy_base; 32 struct regmap *regmap; 33 struct clk *pclk; 34 struct clk *gclk; 35 struct device *dev; 36 int irq; 37 const struct atmel_classd_pdata *pdata; 38 }; 39 40 #ifdef CONFIG_OF 41 static const struct of_device_id atmel_classd_of_match[] = { 42 { 43 .compatible = "atmel,sama5d2-classd", 44 }, { 45 /* sentinel */ 46 } 47 }; 48 MODULE_DEVICE_TABLE(of, atmel_classd_of_match); 49 50 static struct atmel_classd_pdata *atmel_classd_dt_init(struct device *dev) 51 { 52 struct device_node *np = dev->of_node; 53 struct atmel_classd_pdata *pdata; 54 const char *pwm_type; 55 int ret; 56 57 if (!np) { 58 dev_err(dev, "device node not found\n"); 59 return ERR_PTR(-EINVAL); 60 } 61 62 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); 63 if (!pdata) 64 return ERR_PTR(-ENOMEM); 65 66 ret = of_property_read_string(np, "atmel,pwm-type", &pwm_type); 67 if ((ret == 0) && (strcmp(pwm_type, "diff") == 0)) 68 pdata->pwm_type = CLASSD_MR_PWMTYP_DIFF; 69 else 70 pdata->pwm_type = CLASSD_MR_PWMTYP_SINGLE; 71 72 ret = of_property_read_u32(np, 73 "atmel,non-overlap-time", &pdata->non_overlap_time); 74 if (ret) 75 pdata->non_overlap_enable = false; 76 else 77 pdata->non_overlap_enable = true; 78 79 ret = of_property_read_string(np, "atmel,model", &pdata->card_name); 80 if (ret) 81 pdata->card_name = "CLASSD"; 82 83 return pdata; 84 } 85 #else 86 static inline struct atmel_classd_pdata * 87 atmel_classd_dt_init(struct device *dev) 88 { 89 return ERR_PTR(-EINVAL); 90 } 91 #endif 92 93 #define ATMEL_CLASSD_RATES (SNDRV_PCM_RATE_8000 \ 94 | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 \ 95 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 \ 96 | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 \ 97 | SNDRV_PCM_RATE_96000) 98 99 static const struct snd_pcm_hardware atmel_classd_hw = { 100 .info = SNDRV_PCM_INFO_MMAP 101 | SNDRV_PCM_INFO_MMAP_VALID 102 | SNDRV_PCM_INFO_INTERLEAVED 103 | SNDRV_PCM_INFO_RESUME 104 | SNDRV_PCM_INFO_PAUSE, 105 .formats = (SNDRV_PCM_FMTBIT_S16_LE), 106 .rates = ATMEL_CLASSD_RATES, 107 .rate_min = 8000, 108 .rate_max = 96000, 109 .channels_min = 1, 110 .channels_max = 2, 111 .buffer_bytes_max = 64 * 1024, 112 .period_bytes_min = 256, 113 .period_bytes_max = 32 * 1024, 114 .periods_min = 2, 115 .periods_max = 256, 116 }; 117 118 #define ATMEL_CLASSD_PREALLOC_BUF_SIZE (64 * 1024) 119 120 /* cpu dai component */ 121 static int atmel_classd_cpu_dai_startup(struct snd_pcm_substream *substream, 122 struct snd_soc_dai *cpu_dai) 123 { 124 struct snd_soc_pcm_runtime *rtd = substream->private_data; 125 struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); 126 127 regmap_write(dd->regmap, CLASSD_THR, 0x0); 128 129 return clk_prepare_enable(dd->pclk); 130 } 131 132 static void atmel_classd_cpu_dai_shutdown(struct snd_pcm_substream *substream, 133 struct snd_soc_dai *cpu_dai) 134 { 135 struct snd_soc_pcm_runtime *rtd = substream->private_data; 136 struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); 137 138 clk_disable_unprepare(dd->pclk); 139 } 140 141 static const struct snd_soc_dai_ops atmel_classd_cpu_dai_ops = { 142 .startup = atmel_classd_cpu_dai_startup, 143 .shutdown = atmel_classd_cpu_dai_shutdown, 144 }; 145 146 static struct snd_soc_dai_driver atmel_classd_cpu_dai = { 147 .playback = { 148 .channels_min = 1, 149 .channels_max = 2, 150 .rates = ATMEL_CLASSD_RATES, 151 .formats = SNDRV_PCM_FMTBIT_S16_LE,}, 152 .ops = &atmel_classd_cpu_dai_ops, 153 }; 154 155 static const struct snd_soc_component_driver atmel_classd_cpu_dai_component = { 156 .name = "atmel-classd", 157 }; 158 159 /* platform */ 160 static int 161 atmel_classd_platform_configure_dma(struct snd_pcm_substream *substream, 162 struct snd_pcm_hw_params *params, 163 struct dma_slave_config *slave_config) 164 { 165 struct snd_soc_pcm_runtime *rtd = substream->private_data; 166 struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); 167 168 if (params_physical_width(params) != 16) { 169 dev_err(dd->dev, 170 "only supports 16-bit audio data\n"); 171 return -EINVAL; 172 } 173 174 if (params_channels(params) == 1) 175 slave_config->dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; 176 else 177 slave_config->dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; 178 179 slave_config->direction = DMA_MEM_TO_DEV; 180 slave_config->dst_addr = dd->phy_base + CLASSD_THR; 181 slave_config->dst_maxburst = 1; 182 slave_config->src_maxburst = 1; 183 slave_config->device_fc = false; 184 185 return 0; 186 } 187 188 static const struct snd_dmaengine_pcm_config 189 atmel_classd_dmaengine_pcm_config = { 190 .prepare_slave_config = atmel_classd_platform_configure_dma, 191 .pcm_hardware = &atmel_classd_hw, 192 .prealloc_buffer_size = ATMEL_CLASSD_PREALLOC_BUF_SIZE, 193 }; 194 195 /* codec */ 196 static const char * const mono_mode_text[] = { 197 "mix", "sat", "left", "right" 198 }; 199 200 static SOC_ENUM_SINGLE_DECL(classd_mono_mode_enum, 201 CLASSD_INTPMR, CLASSD_INTPMR_MONO_MODE_SHIFT, 202 mono_mode_text); 203 204 static const char * const eqcfg_text[] = { 205 "Treble-12dB", "Treble-6dB", 206 "Medium-8dB", "Medium-3dB", 207 "Bass-12dB", "Bass-6dB", 208 "0 dB", 209 "Bass+6dB", "Bass+12dB", 210 "Medium+3dB", "Medium+8dB", 211 "Treble+6dB", "Treble+12dB", 212 }; 213 214 static const unsigned int eqcfg_value[] = { 215 CLASSD_INTPMR_EQCFG_T_CUT_12, CLASSD_INTPMR_EQCFG_T_CUT_6, 216 CLASSD_INTPMR_EQCFG_M_CUT_8, CLASSD_INTPMR_EQCFG_M_CUT_3, 217 CLASSD_INTPMR_EQCFG_B_CUT_12, CLASSD_INTPMR_EQCFG_B_CUT_6, 218 CLASSD_INTPMR_EQCFG_FLAT, 219 CLASSD_INTPMR_EQCFG_B_BOOST_6, CLASSD_INTPMR_EQCFG_B_BOOST_12, 220 CLASSD_INTPMR_EQCFG_M_BOOST_3, CLASSD_INTPMR_EQCFG_M_BOOST_8, 221 CLASSD_INTPMR_EQCFG_T_BOOST_6, CLASSD_INTPMR_EQCFG_T_BOOST_12, 222 }; 223 224 static SOC_VALUE_ENUM_SINGLE_DECL(classd_eqcfg_enum, 225 CLASSD_INTPMR, CLASSD_INTPMR_EQCFG_SHIFT, 0xf, 226 eqcfg_text, eqcfg_value); 227 228 static const DECLARE_TLV_DB_SCALE(classd_digital_tlv, -7800, 100, 1); 229 230 static const struct snd_kcontrol_new atmel_classd_snd_controls[] = { 231 SOC_DOUBLE_TLV("Playback Volume", CLASSD_INTPMR, 232 CLASSD_INTPMR_ATTL_SHIFT, CLASSD_INTPMR_ATTR_SHIFT, 233 78, 1, classd_digital_tlv), 234 235 SOC_SINGLE("Deemphasis Switch", CLASSD_INTPMR, 236 CLASSD_INTPMR_DEEMP_SHIFT, 1, 0), 237 238 SOC_SINGLE("Mono Switch", CLASSD_INTPMR, CLASSD_INTPMR_MONO_SHIFT, 1, 0), 239 240 SOC_SINGLE("Swap Switch", CLASSD_INTPMR, CLASSD_INTPMR_SWAP_SHIFT, 1, 0), 241 242 SOC_ENUM("Mono Mode", classd_mono_mode_enum), 243 244 SOC_ENUM("EQ", classd_eqcfg_enum), 245 }; 246 247 static const char * const pwm_type[] = { 248 "Single ended", "Differential" 249 }; 250 251 static int atmel_classd_component_probe(struct snd_soc_component *component) 252 { 253 struct snd_soc_card *card = snd_soc_component_get_drvdata(component); 254 struct atmel_classd *dd = snd_soc_card_get_drvdata(card); 255 const struct atmel_classd_pdata *pdata = dd->pdata; 256 u32 mask, val; 257 258 mask = CLASSD_MR_PWMTYP_MASK; 259 val = pdata->pwm_type << CLASSD_MR_PWMTYP_SHIFT; 260 261 mask |= CLASSD_MR_NON_OVERLAP_MASK; 262 if (pdata->non_overlap_enable) { 263 val |= (CLASSD_MR_NON_OVERLAP_EN 264 << CLASSD_MR_NON_OVERLAP_SHIFT); 265 266 mask |= CLASSD_MR_NOVR_VAL_MASK; 267 switch (pdata->non_overlap_time) { 268 case 5: 269 val |= (CLASSD_MR_NOVR_VAL_5NS 270 << CLASSD_MR_NOVR_VAL_SHIFT); 271 break; 272 case 10: 273 val |= (CLASSD_MR_NOVR_VAL_10NS 274 << CLASSD_MR_NOVR_VAL_SHIFT); 275 break; 276 case 15: 277 val |= (CLASSD_MR_NOVR_VAL_15NS 278 << CLASSD_MR_NOVR_VAL_SHIFT); 279 break; 280 case 20: 281 val |= (CLASSD_MR_NOVR_VAL_20NS 282 << CLASSD_MR_NOVR_VAL_SHIFT); 283 break; 284 default: 285 val |= (CLASSD_MR_NOVR_VAL_10NS 286 << CLASSD_MR_NOVR_VAL_SHIFT); 287 dev_warn(component->dev, 288 "non-overlapping value %d is invalid, the default value 10 is specified\n", 289 pdata->non_overlap_time); 290 break; 291 } 292 } 293 294 snd_soc_component_update_bits(component, CLASSD_MR, mask, val); 295 296 dev_info(component->dev, 297 "PWM modulation type is %s, non-overlapping is %s\n", 298 pwm_type[pdata->pwm_type], 299 pdata->non_overlap_enable?"enabled":"disabled"); 300 301 return 0; 302 } 303 304 static int atmel_classd_component_resume(struct snd_soc_component *component) 305 { 306 struct snd_soc_card *card = snd_soc_component_get_drvdata(component); 307 struct atmel_classd *dd = snd_soc_card_get_drvdata(card); 308 309 return regcache_sync(dd->regmap); 310 } 311 312 static struct snd_soc_component_driver soc_component_dev_classd = { 313 .probe = atmel_classd_component_probe, 314 .resume = atmel_classd_component_resume, 315 .controls = atmel_classd_snd_controls, 316 .num_controls = ARRAY_SIZE(atmel_classd_snd_controls), 317 .idle_bias_on = 1, 318 .use_pmdown_time = 1, 319 .endianness = 1, 320 .non_legacy_dai_naming = 1, 321 }; 322 323 /* codec dai component */ 324 static int atmel_classd_codec_dai_startup(struct snd_pcm_substream *substream, 325 struct snd_soc_dai *codec_dai) 326 { 327 struct snd_soc_pcm_runtime *rtd = substream->private_data; 328 struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); 329 330 return clk_prepare_enable(dd->gclk); 331 } 332 333 static int atmel_classd_codec_dai_digital_mute(struct snd_soc_dai *codec_dai, 334 int mute) 335 { 336 struct snd_soc_component *component = codec_dai->component; 337 u32 mask, val; 338 339 mask = CLASSD_MR_LMUTE_MASK | CLASSD_MR_RMUTE_MASK; 340 341 if (mute) 342 val = mask; 343 else 344 val = 0; 345 346 snd_soc_component_update_bits(component, CLASSD_MR, mask, val); 347 348 return 0; 349 } 350 351 #define CLASSD_GCLK_RATE_11M2896_MPY_8 (112896 * 100 * 8) 352 #define CLASSD_GCLK_RATE_12M288_MPY_8 (12288 * 1000 * 8) 353 354 static struct { 355 int rate; 356 int sample_rate; 357 int dsp_clk; 358 unsigned long gclk_rate; 359 } const sample_rates[] = { 360 { 8000, CLASSD_INTPMR_FRAME_8K, 361 CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 }, 362 { 16000, CLASSD_INTPMR_FRAME_16K, 363 CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 }, 364 { 32000, CLASSD_INTPMR_FRAME_32K, 365 CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 }, 366 { 48000, CLASSD_INTPMR_FRAME_48K, 367 CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 }, 368 { 96000, CLASSD_INTPMR_FRAME_96K, 369 CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 }, 370 { 22050, CLASSD_INTPMR_FRAME_22K, 371 CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 }, 372 { 44100, CLASSD_INTPMR_FRAME_44K, 373 CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 }, 374 { 88200, CLASSD_INTPMR_FRAME_88K, 375 CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 }, 376 }; 377 378 static int 379 atmel_classd_codec_dai_hw_params(struct snd_pcm_substream *substream, 380 struct snd_pcm_hw_params *params, 381 struct snd_soc_dai *codec_dai) 382 { 383 struct snd_soc_pcm_runtime *rtd = substream->private_data; 384 struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); 385 struct snd_soc_component *component = codec_dai->component; 386 int fs; 387 int i, best, best_val, cur_val, ret; 388 u32 mask, val; 389 390 fs = params_rate(params); 391 392 best = 0; 393 best_val = abs(fs - sample_rates[0].rate); 394 for (i = 1; i < ARRAY_SIZE(sample_rates); i++) { 395 /* Closest match */ 396 cur_val = abs(fs - sample_rates[i].rate); 397 if (cur_val < best_val) { 398 best = i; 399 best_val = cur_val; 400 } 401 } 402 403 dev_dbg(component->dev, 404 "Selected SAMPLE_RATE of %dHz, GCLK_RATE of %ldHz\n", 405 sample_rates[best].rate, sample_rates[best].gclk_rate); 406 407 clk_disable_unprepare(dd->gclk); 408 409 ret = clk_set_rate(dd->gclk, sample_rates[best].gclk_rate); 410 if (ret) 411 return ret; 412 413 mask = CLASSD_INTPMR_DSP_CLK_FREQ_MASK | CLASSD_INTPMR_FRAME_MASK; 414 val = (sample_rates[best].dsp_clk << CLASSD_INTPMR_DSP_CLK_FREQ_SHIFT) 415 | (sample_rates[best].sample_rate << CLASSD_INTPMR_FRAME_SHIFT); 416 417 snd_soc_component_update_bits(component, CLASSD_INTPMR, mask, val); 418 419 return clk_prepare_enable(dd->gclk); 420 } 421 422 static void 423 atmel_classd_codec_dai_shutdown(struct snd_pcm_substream *substream, 424 struct snd_soc_dai *codec_dai) 425 { 426 struct snd_soc_pcm_runtime *rtd = substream->private_data; 427 struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); 428 429 clk_disable_unprepare(dd->gclk); 430 } 431 432 static int atmel_classd_codec_dai_prepare(struct snd_pcm_substream *substream, 433 struct snd_soc_dai *codec_dai) 434 { 435 struct snd_soc_component *component = codec_dai->component; 436 437 snd_soc_component_update_bits(component, CLASSD_MR, 438 CLASSD_MR_LEN_MASK | CLASSD_MR_REN_MASK, 439 (CLASSD_MR_LEN_DIS << CLASSD_MR_LEN_SHIFT) 440 |(CLASSD_MR_REN_DIS << CLASSD_MR_REN_SHIFT)); 441 442 return 0; 443 } 444 445 static int atmel_classd_codec_dai_trigger(struct snd_pcm_substream *substream, 446 int cmd, struct snd_soc_dai *codec_dai) 447 { 448 struct snd_soc_component *component = codec_dai->component; 449 u32 mask, val; 450 451 mask = CLASSD_MR_LEN_MASK | CLASSD_MR_REN_MASK; 452 453 switch (cmd) { 454 case SNDRV_PCM_TRIGGER_START: 455 case SNDRV_PCM_TRIGGER_RESUME: 456 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 457 val = mask; 458 break; 459 case SNDRV_PCM_TRIGGER_STOP: 460 case SNDRV_PCM_TRIGGER_SUSPEND: 461 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 462 val = (CLASSD_MR_LEN_DIS << CLASSD_MR_LEN_SHIFT) 463 | (CLASSD_MR_REN_DIS << CLASSD_MR_REN_SHIFT); 464 break; 465 default: 466 return -EINVAL; 467 } 468 469 snd_soc_component_update_bits(component, CLASSD_MR, mask, val); 470 471 return 0; 472 } 473 474 static const struct snd_soc_dai_ops atmel_classd_codec_dai_ops = { 475 .digital_mute = atmel_classd_codec_dai_digital_mute, 476 .startup = atmel_classd_codec_dai_startup, 477 .shutdown = atmel_classd_codec_dai_shutdown, 478 .hw_params = atmel_classd_codec_dai_hw_params, 479 .prepare = atmel_classd_codec_dai_prepare, 480 .trigger = atmel_classd_codec_dai_trigger, 481 }; 482 483 #define ATMEL_CLASSD_CODEC_DAI_NAME "atmel-classd-hifi" 484 485 static struct snd_soc_dai_driver atmel_classd_codec_dai = { 486 .name = ATMEL_CLASSD_CODEC_DAI_NAME, 487 .playback = { 488 .stream_name = "Playback", 489 .channels_min = 1, 490 .channels_max = 2, 491 .rates = ATMEL_CLASSD_RATES, 492 .formats = SNDRV_PCM_FMTBIT_S16_LE, 493 }, 494 .ops = &atmel_classd_codec_dai_ops, 495 }; 496 497 /* ASoC sound card */ 498 static int atmel_classd_asoc_card_init(struct device *dev, 499 struct snd_soc_card *card) 500 { 501 struct snd_soc_dai_link *dai_link; 502 struct atmel_classd *dd = snd_soc_card_get_drvdata(card); 503 504 dai_link = devm_kzalloc(dev, sizeof(*dai_link), GFP_KERNEL); 505 if (!dai_link) 506 return -ENOMEM; 507 508 dai_link->name = "CLASSD"; 509 dai_link->stream_name = "CLASSD PCM"; 510 dai_link->codec_dai_name = ATMEL_CLASSD_CODEC_DAI_NAME; 511 dai_link->cpu_dai_name = dev_name(dev); 512 dai_link->codec_name = dev_name(dev); 513 dai_link->platform_name = dev_name(dev); 514 515 card->dai_link = dai_link; 516 card->num_links = 1; 517 card->name = dd->pdata->card_name; 518 card->dev = dev; 519 520 return 0; 521 }; 522 523 /* regmap configuration */ 524 static const struct reg_default atmel_classd_reg_defaults[] = { 525 { CLASSD_INTPMR, 0x00301212 }, 526 }; 527 528 #define ATMEL_CLASSD_REG_MAX 0xE4 529 static const struct regmap_config atmel_classd_regmap_config = { 530 .reg_bits = 32, 531 .reg_stride = 4, 532 .val_bits = 32, 533 .max_register = ATMEL_CLASSD_REG_MAX, 534 535 .cache_type = REGCACHE_FLAT, 536 .reg_defaults = atmel_classd_reg_defaults, 537 .num_reg_defaults = ARRAY_SIZE(atmel_classd_reg_defaults), 538 }; 539 540 static int atmel_classd_probe(struct platform_device *pdev) 541 { 542 struct device *dev = &pdev->dev; 543 struct atmel_classd *dd; 544 struct resource *res; 545 void __iomem *io_base; 546 const struct atmel_classd_pdata *pdata; 547 struct snd_soc_card *card; 548 int ret; 549 550 pdata = dev_get_platdata(dev); 551 if (!pdata) { 552 pdata = atmel_classd_dt_init(dev); 553 if (IS_ERR(pdata)) 554 return PTR_ERR(pdata); 555 } 556 557 dd = devm_kzalloc(dev, sizeof(*dd), GFP_KERNEL); 558 if (!dd) 559 return -ENOMEM; 560 561 dd->pdata = pdata; 562 563 dd->irq = platform_get_irq(pdev, 0); 564 if (dd->irq < 0) { 565 ret = dd->irq; 566 dev_err(dev, "failed to could not get irq: %d\n", ret); 567 return ret; 568 } 569 570 dd->pclk = devm_clk_get(dev, "pclk"); 571 if (IS_ERR(dd->pclk)) { 572 ret = PTR_ERR(dd->pclk); 573 dev_err(dev, "failed to get peripheral clock: %d\n", ret); 574 return ret; 575 } 576 577 dd->gclk = devm_clk_get(dev, "gclk"); 578 if (IS_ERR(dd->gclk)) { 579 ret = PTR_ERR(dd->gclk); 580 dev_err(dev, "failed to get GCK clock: %d\n", ret); 581 return ret; 582 } 583 584 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 585 io_base = devm_ioremap_resource(dev, res); 586 if (IS_ERR(io_base)) 587 return PTR_ERR(io_base); 588 589 dd->phy_base = res->start; 590 dd->dev = dev; 591 592 dd->regmap = devm_regmap_init_mmio(dev, io_base, 593 &atmel_classd_regmap_config); 594 if (IS_ERR(dd->regmap)) { 595 ret = PTR_ERR(dd->regmap); 596 dev_err(dev, "failed to init register map: %d\n", ret); 597 return ret; 598 } 599 600 ret = devm_snd_soc_register_component(dev, 601 &atmel_classd_cpu_dai_component, 602 &atmel_classd_cpu_dai, 1); 603 if (ret) { 604 dev_err(dev, "could not register CPU DAI: %d\n", ret); 605 return ret; 606 } 607 608 ret = devm_snd_dmaengine_pcm_register(dev, 609 &atmel_classd_dmaengine_pcm_config, 610 0); 611 if (ret) { 612 dev_err(dev, "could not register platform: %d\n", ret); 613 return ret; 614 } 615 616 ret = devm_snd_soc_register_component(dev, &soc_component_dev_classd, 617 &atmel_classd_codec_dai, 1); 618 if (ret) { 619 dev_err(dev, "could not register component: %d\n", ret); 620 return ret; 621 } 622 623 /* register sound card */ 624 card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL); 625 if (!card) { 626 ret = -ENOMEM; 627 goto unregister_codec; 628 } 629 630 snd_soc_card_set_drvdata(card, dd); 631 632 ret = atmel_classd_asoc_card_init(dev, card); 633 if (ret) { 634 dev_err(dev, "failed to init sound card\n"); 635 goto unregister_codec; 636 } 637 638 ret = devm_snd_soc_register_card(dev, card); 639 if (ret) { 640 dev_err(dev, "failed to register sound card: %d\n", ret); 641 goto unregister_codec; 642 } 643 644 return 0; 645 646 unregister_codec: 647 return ret; 648 } 649 650 static int atmel_classd_remove(struct platform_device *pdev) 651 { 652 return 0; 653 } 654 655 static struct platform_driver atmel_classd_driver = { 656 .driver = { 657 .name = "atmel-classd", 658 .of_match_table = of_match_ptr(atmel_classd_of_match), 659 .pm = &snd_soc_pm_ops, 660 }, 661 .probe = atmel_classd_probe, 662 .remove = atmel_classd_remove, 663 }; 664 module_platform_driver(atmel_classd_driver); 665 666 MODULE_DESCRIPTION("Atmel ClassD driver under ALSA SoC architecture"); 667 MODULE_AUTHOR("Songjun Wu <songjun.wu@atmel.com>"); 668 MODULE_LICENSE("GPL"); 669