13a63cbb8SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later 2e0a25b6dSSongjun Wu /* Atmel ALSA SoC Audio Class D Amplifier (CLASSD) driver 3e0a25b6dSSongjun Wu * 4e0a25b6dSSongjun Wu * Copyright (C) 2015 Atmel 5e0a25b6dSSongjun Wu * 6e0a25b6dSSongjun Wu * Author: Songjun Wu <songjun.wu@atmel.com> 7e0a25b6dSSongjun Wu */ 8e0a25b6dSSongjun Wu 9e0a25b6dSSongjun Wu #include <linux/of.h> 10e0a25b6dSSongjun Wu #include <linux/clk.h> 11e0a25b6dSSongjun Wu #include <linux/module.h> 12e0a25b6dSSongjun Wu #include <linux/platform_device.h> 13e0a25b6dSSongjun Wu #include <linux/regmap.h> 14e0a25b6dSSongjun Wu #include <sound/core.h> 15e0a25b6dSSongjun Wu #include <sound/dmaengine_pcm.h> 16e0a25b6dSSongjun Wu #include <sound/pcm_params.h> 17e0a25b6dSSongjun Wu #include <sound/tlv.h> 18e0a25b6dSSongjun Wu #include "atmel-classd.h" 19e0a25b6dSSongjun Wu 20e0a25b6dSSongjun Wu struct atmel_classd_pdata { 21e0a25b6dSSongjun Wu bool non_overlap_enable; 22e0a25b6dSSongjun Wu int non_overlap_time; 23e0a25b6dSSongjun Wu int pwm_type; 24e0a25b6dSSongjun Wu const char *card_name; 25e0a25b6dSSongjun Wu }; 26e0a25b6dSSongjun Wu 27e0a25b6dSSongjun Wu struct atmel_classd { 28e0a25b6dSSongjun Wu dma_addr_t phy_base; 29e0a25b6dSSongjun Wu struct regmap *regmap; 30e0a25b6dSSongjun Wu struct clk *pclk; 31e0a25b6dSSongjun Wu struct clk *gclk; 326dea9df8SKuninori Morimoto struct device *dev; 33e0a25b6dSSongjun Wu int irq; 34e0a25b6dSSongjun Wu const struct atmel_classd_pdata *pdata; 35e0a25b6dSSongjun Wu }; 36e0a25b6dSSongjun Wu 37e0a25b6dSSongjun Wu #ifdef CONFIG_OF 38e0a25b6dSSongjun Wu static const struct of_device_id atmel_classd_of_match[] = { 39e0a25b6dSSongjun Wu { 40e0a25b6dSSongjun Wu .compatible = "atmel,sama5d2-classd", 41e0a25b6dSSongjun Wu }, { 42e0a25b6dSSongjun Wu /* sentinel */ 43e0a25b6dSSongjun Wu } 44e0a25b6dSSongjun Wu }; 45e0a25b6dSSongjun Wu MODULE_DEVICE_TABLE(of, atmel_classd_of_match); 46e0a25b6dSSongjun Wu 47e0a25b6dSSongjun Wu static struct atmel_classd_pdata *atmel_classd_dt_init(struct device *dev) 48e0a25b6dSSongjun Wu { 49e0a25b6dSSongjun Wu struct device_node *np = dev->of_node; 50e0a25b6dSSongjun Wu struct atmel_classd_pdata *pdata; 51e0a25b6dSSongjun Wu const char *pwm_type; 52e0a25b6dSSongjun Wu int ret; 53e0a25b6dSSongjun Wu 54e0a25b6dSSongjun Wu if (!np) { 55e0a25b6dSSongjun Wu dev_err(dev, "device node not found\n"); 56e0a25b6dSSongjun Wu return ERR_PTR(-EINVAL); 57e0a25b6dSSongjun Wu } 58e0a25b6dSSongjun Wu 59e0a25b6dSSongjun Wu pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); 60e0a25b6dSSongjun Wu if (!pdata) 61e0a25b6dSSongjun Wu return ERR_PTR(-ENOMEM); 62e0a25b6dSSongjun Wu 63e0a25b6dSSongjun Wu ret = of_property_read_string(np, "atmel,pwm-type", &pwm_type); 64e0a25b6dSSongjun Wu if ((ret == 0) && (strcmp(pwm_type, "diff") == 0)) 65e0a25b6dSSongjun Wu pdata->pwm_type = CLASSD_MR_PWMTYP_DIFF; 66e0a25b6dSSongjun Wu else 67e0a25b6dSSongjun Wu pdata->pwm_type = CLASSD_MR_PWMTYP_SINGLE; 68e0a25b6dSSongjun Wu 69e0a25b6dSSongjun Wu ret = of_property_read_u32(np, 70e0a25b6dSSongjun Wu "atmel,non-overlap-time", &pdata->non_overlap_time); 71e0a25b6dSSongjun Wu if (ret) 72e0a25b6dSSongjun Wu pdata->non_overlap_enable = false; 73e0a25b6dSSongjun Wu else 74e0a25b6dSSongjun Wu pdata->non_overlap_enable = true; 75e0a25b6dSSongjun Wu 76e0a25b6dSSongjun Wu ret = of_property_read_string(np, "atmel,model", &pdata->card_name); 77e0a25b6dSSongjun Wu if (ret) 78e0a25b6dSSongjun Wu pdata->card_name = "CLASSD"; 79e0a25b6dSSongjun Wu 80e0a25b6dSSongjun Wu return pdata; 81e0a25b6dSSongjun Wu } 82e0a25b6dSSongjun Wu #else 83e0a25b6dSSongjun Wu static inline struct atmel_classd_pdata * 84e0a25b6dSSongjun Wu atmel_classd_dt_init(struct device *dev) 85e0a25b6dSSongjun Wu { 86e0a25b6dSSongjun Wu return ERR_PTR(-EINVAL); 87e0a25b6dSSongjun Wu } 88e0a25b6dSSongjun Wu #endif 89e0a25b6dSSongjun Wu 90e0a25b6dSSongjun Wu #define ATMEL_CLASSD_RATES (SNDRV_PCM_RATE_8000 \ 91e0a25b6dSSongjun Wu | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 \ 92e0a25b6dSSongjun Wu | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 \ 93e0a25b6dSSongjun Wu | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 \ 94e0a25b6dSSongjun Wu | SNDRV_PCM_RATE_96000) 95e0a25b6dSSongjun Wu 96e0a25b6dSSongjun Wu static const struct snd_pcm_hardware atmel_classd_hw = { 97e0a25b6dSSongjun Wu .info = SNDRV_PCM_INFO_MMAP 98e0a25b6dSSongjun Wu | SNDRV_PCM_INFO_MMAP_VALID 99e0a25b6dSSongjun Wu | SNDRV_PCM_INFO_INTERLEAVED 100e0a25b6dSSongjun Wu | SNDRV_PCM_INFO_RESUME 101e0a25b6dSSongjun Wu | SNDRV_PCM_INFO_PAUSE, 102e0a25b6dSSongjun Wu .formats = (SNDRV_PCM_FMTBIT_S16_LE), 103e0a25b6dSSongjun Wu .rates = ATMEL_CLASSD_RATES, 104e0a25b6dSSongjun Wu .rate_min = 8000, 105e0a25b6dSSongjun Wu .rate_max = 96000, 10607c55d39SSongjun Wu .channels_min = 1, 107e0a25b6dSSongjun Wu .channels_max = 2, 108e0a25b6dSSongjun Wu .buffer_bytes_max = 64 * 1024, 109e0a25b6dSSongjun Wu .period_bytes_min = 256, 110e0a25b6dSSongjun Wu .period_bytes_max = 32 * 1024, 111e0a25b6dSSongjun Wu .periods_min = 2, 112e0a25b6dSSongjun Wu .periods_max = 256, 113e0a25b6dSSongjun Wu }; 114e0a25b6dSSongjun Wu 115e0a25b6dSSongjun Wu #define ATMEL_CLASSD_PREALLOC_BUF_SIZE (64 * 1024) 116e0a25b6dSSongjun Wu 117e0a25b6dSSongjun Wu /* cpu dai component */ 118e0a25b6dSSongjun Wu static int atmel_classd_cpu_dai_startup(struct snd_pcm_substream *substream, 119e0a25b6dSSongjun Wu struct snd_soc_dai *cpu_dai) 120e0a25b6dSSongjun Wu { 121e0a25b6dSSongjun Wu struct snd_soc_pcm_runtime *rtd = substream->private_data; 122e0a25b6dSSongjun Wu struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); 123e0a25b6dSSongjun Wu 124e0a25b6dSSongjun Wu regmap_write(dd->regmap, CLASSD_THR, 0x0); 125e0a25b6dSSongjun Wu 126e0a25b6dSSongjun Wu return clk_prepare_enable(dd->pclk); 127e0a25b6dSSongjun Wu } 128e0a25b6dSSongjun Wu 129e0a25b6dSSongjun Wu static void atmel_classd_cpu_dai_shutdown(struct snd_pcm_substream *substream, 130e0a25b6dSSongjun Wu struct snd_soc_dai *cpu_dai) 131e0a25b6dSSongjun Wu { 132e0a25b6dSSongjun Wu struct snd_soc_pcm_runtime *rtd = substream->private_data; 133e0a25b6dSSongjun Wu struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); 134e0a25b6dSSongjun Wu 135e0a25b6dSSongjun Wu clk_disable_unprepare(dd->pclk); 136e0a25b6dSSongjun Wu } 137e0a25b6dSSongjun Wu 138e0a25b6dSSongjun Wu static const struct snd_soc_dai_ops atmel_classd_cpu_dai_ops = { 139e0a25b6dSSongjun Wu .startup = atmel_classd_cpu_dai_startup, 140e0a25b6dSSongjun Wu .shutdown = atmel_classd_cpu_dai_shutdown, 141e0a25b6dSSongjun Wu }; 142e0a25b6dSSongjun Wu 143e0a25b6dSSongjun Wu static struct snd_soc_dai_driver atmel_classd_cpu_dai = { 144e0a25b6dSSongjun Wu .playback = { 14507c55d39SSongjun Wu .channels_min = 1, 146e0a25b6dSSongjun Wu .channels_max = 2, 147e0a25b6dSSongjun Wu .rates = ATMEL_CLASSD_RATES, 148e0a25b6dSSongjun Wu .formats = SNDRV_PCM_FMTBIT_S16_LE,}, 149e0a25b6dSSongjun Wu .ops = &atmel_classd_cpu_dai_ops, 150e0a25b6dSSongjun Wu }; 151e0a25b6dSSongjun Wu 152e0a25b6dSSongjun Wu static const struct snd_soc_component_driver atmel_classd_cpu_dai_component = { 153e0a25b6dSSongjun Wu .name = "atmel-classd", 154e0a25b6dSSongjun Wu }; 155e0a25b6dSSongjun Wu 156e0a25b6dSSongjun Wu /* platform */ 157e0a25b6dSSongjun Wu static int 158e0a25b6dSSongjun Wu atmel_classd_platform_configure_dma(struct snd_pcm_substream *substream, 159e0a25b6dSSongjun Wu struct snd_pcm_hw_params *params, 160e0a25b6dSSongjun Wu struct dma_slave_config *slave_config) 161e0a25b6dSSongjun Wu { 162e0a25b6dSSongjun Wu struct snd_soc_pcm_runtime *rtd = substream->private_data; 163e0a25b6dSSongjun Wu struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); 164e0a25b6dSSongjun Wu 165e0a25b6dSSongjun Wu if (params_physical_width(params) != 16) { 1666dea9df8SKuninori Morimoto dev_err(dd->dev, 167e0a25b6dSSongjun Wu "only supports 16-bit audio data\n"); 168e0a25b6dSSongjun Wu return -EINVAL; 169e0a25b6dSSongjun Wu } 170e0a25b6dSSongjun Wu 17107c55d39SSongjun Wu if (params_channels(params) == 1) 17207c55d39SSongjun Wu slave_config->dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; 17307c55d39SSongjun Wu else 17407c55d39SSongjun Wu slave_config->dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; 17507c55d39SSongjun Wu 176e0a25b6dSSongjun Wu slave_config->direction = DMA_MEM_TO_DEV; 177e0a25b6dSSongjun Wu slave_config->dst_addr = dd->phy_base + CLASSD_THR; 178e0a25b6dSSongjun Wu slave_config->dst_maxburst = 1; 179e0a25b6dSSongjun Wu slave_config->src_maxburst = 1; 180e0a25b6dSSongjun Wu slave_config->device_fc = false; 181e0a25b6dSSongjun Wu 182e0a25b6dSSongjun Wu return 0; 183e0a25b6dSSongjun Wu } 184e0a25b6dSSongjun Wu 185e0a25b6dSSongjun Wu static const struct snd_dmaengine_pcm_config 186e0a25b6dSSongjun Wu atmel_classd_dmaengine_pcm_config = { 187e0a25b6dSSongjun Wu .prepare_slave_config = atmel_classd_platform_configure_dma, 188e0a25b6dSSongjun Wu .pcm_hardware = &atmel_classd_hw, 189e0a25b6dSSongjun Wu .prealloc_buffer_size = ATMEL_CLASSD_PREALLOC_BUF_SIZE, 190e0a25b6dSSongjun Wu }; 191e0a25b6dSSongjun Wu 192e0a25b6dSSongjun Wu /* codec */ 193e0a25b6dSSongjun Wu static const char * const mono_mode_text[] = { 194e0a25b6dSSongjun Wu "mix", "sat", "left", "right" 195e0a25b6dSSongjun Wu }; 196e0a25b6dSSongjun Wu 197e0a25b6dSSongjun Wu static SOC_ENUM_SINGLE_DECL(classd_mono_mode_enum, 198e0a25b6dSSongjun Wu CLASSD_INTPMR, CLASSD_INTPMR_MONO_MODE_SHIFT, 199e0a25b6dSSongjun Wu mono_mode_text); 200e0a25b6dSSongjun Wu 201e0a25b6dSSongjun Wu static const char * const eqcfg_text[] = { 202e0a25b6dSSongjun Wu "Treble-12dB", "Treble-6dB", 203e0a25b6dSSongjun Wu "Medium-8dB", "Medium-3dB", 204e0a25b6dSSongjun Wu "Bass-12dB", "Bass-6dB", 205e0a25b6dSSongjun Wu "0 dB", 206e0a25b6dSSongjun Wu "Bass+6dB", "Bass+12dB", 207e0a25b6dSSongjun Wu "Medium+3dB", "Medium+8dB", 208e0a25b6dSSongjun Wu "Treble+6dB", "Treble+12dB", 209e0a25b6dSSongjun Wu }; 210e0a25b6dSSongjun Wu 211e0a25b6dSSongjun Wu static const unsigned int eqcfg_value[] = { 212e0a25b6dSSongjun Wu CLASSD_INTPMR_EQCFG_T_CUT_12, CLASSD_INTPMR_EQCFG_T_CUT_6, 213e0a25b6dSSongjun Wu CLASSD_INTPMR_EQCFG_M_CUT_8, CLASSD_INTPMR_EQCFG_M_CUT_3, 214e0a25b6dSSongjun Wu CLASSD_INTPMR_EQCFG_B_CUT_12, CLASSD_INTPMR_EQCFG_B_CUT_6, 215e0a25b6dSSongjun Wu CLASSD_INTPMR_EQCFG_FLAT, 216e0a25b6dSSongjun Wu CLASSD_INTPMR_EQCFG_B_BOOST_6, CLASSD_INTPMR_EQCFG_B_BOOST_12, 217e0a25b6dSSongjun Wu CLASSD_INTPMR_EQCFG_M_BOOST_3, CLASSD_INTPMR_EQCFG_M_BOOST_8, 218e0a25b6dSSongjun Wu CLASSD_INTPMR_EQCFG_T_BOOST_6, CLASSD_INTPMR_EQCFG_T_BOOST_12, 219e0a25b6dSSongjun Wu }; 220e0a25b6dSSongjun Wu 221e0a25b6dSSongjun Wu static SOC_VALUE_ENUM_SINGLE_DECL(classd_eqcfg_enum, 222e0a25b6dSSongjun Wu CLASSD_INTPMR, CLASSD_INTPMR_EQCFG_SHIFT, 0xf, 223e0a25b6dSSongjun Wu eqcfg_text, eqcfg_value); 224e0a25b6dSSongjun Wu 225e0a25b6dSSongjun Wu static const DECLARE_TLV_DB_SCALE(classd_digital_tlv, -7800, 100, 1); 226e0a25b6dSSongjun Wu 227e0a25b6dSSongjun Wu static const struct snd_kcontrol_new atmel_classd_snd_controls[] = { 228e0a25b6dSSongjun Wu SOC_DOUBLE_TLV("Playback Volume", CLASSD_INTPMR, 229e0a25b6dSSongjun Wu CLASSD_INTPMR_ATTL_SHIFT, CLASSD_INTPMR_ATTR_SHIFT, 230e0a25b6dSSongjun Wu 78, 1, classd_digital_tlv), 231e0a25b6dSSongjun Wu 232e0a25b6dSSongjun Wu SOC_SINGLE("Deemphasis Switch", CLASSD_INTPMR, 233e0a25b6dSSongjun Wu CLASSD_INTPMR_DEEMP_SHIFT, 1, 0), 234e0a25b6dSSongjun Wu 235e0a25b6dSSongjun Wu SOC_SINGLE("Mono Switch", CLASSD_INTPMR, CLASSD_INTPMR_MONO_SHIFT, 1, 0), 236e0a25b6dSSongjun Wu 237e0a25b6dSSongjun Wu SOC_SINGLE("Swap Switch", CLASSD_INTPMR, CLASSD_INTPMR_SWAP_SHIFT, 1, 0), 238e0a25b6dSSongjun Wu 239e0a25b6dSSongjun Wu SOC_ENUM("Mono Mode", classd_mono_mode_enum), 240e0a25b6dSSongjun Wu 241e0a25b6dSSongjun Wu SOC_ENUM("EQ", classd_eqcfg_enum), 242e0a25b6dSSongjun Wu }; 243e0a25b6dSSongjun Wu 244e0a25b6dSSongjun Wu static const char * const pwm_type[] = { 245e0a25b6dSSongjun Wu "Single ended", "Differential" 246e0a25b6dSSongjun Wu }; 247e0a25b6dSSongjun Wu 2481e8ba922SKuninori Morimoto static int atmel_classd_component_probe(struct snd_soc_component *component) 249e0a25b6dSSongjun Wu { 2501e8ba922SKuninori Morimoto struct snd_soc_card *card = snd_soc_component_get_drvdata(component); 251e0a25b6dSSongjun Wu struct atmel_classd *dd = snd_soc_card_get_drvdata(card); 252e0a25b6dSSongjun Wu const struct atmel_classd_pdata *pdata = dd->pdata; 253e0a25b6dSSongjun Wu u32 mask, val; 254e0a25b6dSSongjun Wu 255e0a25b6dSSongjun Wu mask = CLASSD_MR_PWMTYP_MASK; 256e0a25b6dSSongjun Wu val = pdata->pwm_type << CLASSD_MR_PWMTYP_SHIFT; 257e0a25b6dSSongjun Wu 258e0a25b6dSSongjun Wu mask |= CLASSD_MR_NON_OVERLAP_MASK; 259e0a25b6dSSongjun Wu if (pdata->non_overlap_enable) { 260e0a25b6dSSongjun Wu val |= (CLASSD_MR_NON_OVERLAP_EN 261e0a25b6dSSongjun Wu << CLASSD_MR_NON_OVERLAP_SHIFT); 262e0a25b6dSSongjun Wu 263e0a25b6dSSongjun Wu mask |= CLASSD_MR_NOVR_VAL_MASK; 264e0a25b6dSSongjun Wu switch (pdata->non_overlap_time) { 265e0a25b6dSSongjun Wu case 5: 266e0a25b6dSSongjun Wu val |= (CLASSD_MR_NOVR_VAL_5NS 267e0a25b6dSSongjun Wu << CLASSD_MR_NOVR_VAL_SHIFT); 268e0a25b6dSSongjun Wu break; 269e0a25b6dSSongjun Wu case 10: 270e0a25b6dSSongjun Wu val |= (CLASSD_MR_NOVR_VAL_10NS 271e0a25b6dSSongjun Wu << CLASSD_MR_NOVR_VAL_SHIFT); 272e0a25b6dSSongjun Wu break; 273e0a25b6dSSongjun Wu case 15: 274e0a25b6dSSongjun Wu val |= (CLASSD_MR_NOVR_VAL_15NS 275e0a25b6dSSongjun Wu << CLASSD_MR_NOVR_VAL_SHIFT); 276e0a25b6dSSongjun Wu break; 277e0a25b6dSSongjun Wu case 20: 278e0a25b6dSSongjun Wu val |= (CLASSD_MR_NOVR_VAL_20NS 279e0a25b6dSSongjun Wu << CLASSD_MR_NOVR_VAL_SHIFT); 280e0a25b6dSSongjun Wu break; 281e0a25b6dSSongjun Wu default: 282e0a25b6dSSongjun Wu val |= (CLASSD_MR_NOVR_VAL_10NS 283e0a25b6dSSongjun Wu << CLASSD_MR_NOVR_VAL_SHIFT); 2841e8ba922SKuninori Morimoto dev_warn(component->dev, 285e0a25b6dSSongjun Wu "non-overlapping value %d is invalid, the default value 10 is specified\n", 286e0a25b6dSSongjun Wu pdata->non_overlap_time); 287e0a25b6dSSongjun Wu break; 288e0a25b6dSSongjun Wu } 289e0a25b6dSSongjun Wu } 290e0a25b6dSSongjun Wu 2911e8ba922SKuninori Morimoto snd_soc_component_update_bits(component, CLASSD_MR, mask, val); 292e0a25b6dSSongjun Wu 2931e8ba922SKuninori Morimoto dev_info(component->dev, 294e0a25b6dSSongjun Wu "PWM modulation type is %s, non-overlapping is %s\n", 295e0a25b6dSSongjun Wu pwm_type[pdata->pwm_type], 296e0a25b6dSSongjun Wu pdata->non_overlap_enable?"enabled":"disabled"); 297e0a25b6dSSongjun Wu 298e0a25b6dSSongjun Wu return 0; 299e0a25b6dSSongjun Wu } 300e0a25b6dSSongjun Wu 3011e8ba922SKuninori Morimoto static int atmel_classd_component_resume(struct snd_soc_component *component) 30261abce13SQuentin Schulz { 3031e8ba922SKuninori Morimoto struct snd_soc_card *card = snd_soc_component_get_drvdata(component); 30461abce13SQuentin Schulz struct atmel_classd *dd = snd_soc_card_get_drvdata(card); 30561abce13SQuentin Schulz 30661abce13SQuentin Schulz return regcache_sync(dd->regmap); 30761abce13SQuentin Schulz } 30861abce13SQuentin Schulz 3091e8ba922SKuninori Morimoto static struct snd_soc_component_driver soc_component_dev_classd = { 3101e8ba922SKuninori Morimoto .probe = atmel_classd_component_probe, 3111e8ba922SKuninori Morimoto .resume = atmel_classd_component_resume, 312e0a25b6dSSongjun Wu .controls = atmel_classd_snd_controls, 313e0a25b6dSSongjun Wu .num_controls = ARRAY_SIZE(atmel_classd_snd_controls), 3141e8ba922SKuninori Morimoto .idle_bias_on = 1, 3151e8ba922SKuninori Morimoto .use_pmdown_time = 1, 3161e8ba922SKuninori Morimoto .endianness = 1, 3171e8ba922SKuninori Morimoto .non_legacy_dai_naming = 1, 318e0a25b6dSSongjun Wu }; 319e0a25b6dSSongjun Wu 320e0a25b6dSSongjun Wu /* codec dai component */ 321e0a25b6dSSongjun Wu static int atmel_classd_codec_dai_startup(struct snd_pcm_substream *substream, 322e0a25b6dSSongjun Wu struct snd_soc_dai *codec_dai) 323e0a25b6dSSongjun Wu { 324e0a25b6dSSongjun Wu struct snd_soc_pcm_runtime *rtd = substream->private_data; 325e0a25b6dSSongjun Wu struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); 326e0a25b6dSSongjun Wu 327e0a25b6dSSongjun Wu return clk_prepare_enable(dd->gclk); 328e0a25b6dSSongjun Wu } 329e0a25b6dSSongjun Wu 330e0a25b6dSSongjun Wu static int atmel_classd_codec_dai_digital_mute(struct snd_soc_dai *codec_dai, 331e0a25b6dSSongjun Wu int mute) 332e0a25b6dSSongjun Wu { 3331e8ba922SKuninori Morimoto struct snd_soc_component *component = codec_dai->component; 334e0a25b6dSSongjun Wu u32 mask, val; 335e0a25b6dSSongjun Wu 336e0a25b6dSSongjun Wu mask = CLASSD_MR_LMUTE_MASK | CLASSD_MR_RMUTE_MASK; 337e0a25b6dSSongjun Wu 338e0a25b6dSSongjun Wu if (mute) 339e0a25b6dSSongjun Wu val = mask; 340e0a25b6dSSongjun Wu else 341e0a25b6dSSongjun Wu val = 0; 342e0a25b6dSSongjun Wu 3431e8ba922SKuninori Morimoto snd_soc_component_update_bits(component, CLASSD_MR, mask, val); 344e0a25b6dSSongjun Wu 345e0a25b6dSSongjun Wu return 0; 346e0a25b6dSSongjun Wu } 347e0a25b6dSSongjun Wu 3484ab6cf11SQuentin Schulz #define CLASSD_GCLK_RATE_11M2896_MPY_8 (112896 * 100 * 8) 3494ab6cf11SQuentin Schulz #define CLASSD_GCLK_RATE_12M288_MPY_8 (12288 * 1000 * 8) 350e0a25b6dSSongjun Wu 351e0a25b6dSSongjun Wu static struct { 352e0a25b6dSSongjun Wu int rate; 353e0a25b6dSSongjun Wu int sample_rate; 354e0a25b6dSSongjun Wu int dsp_clk; 3554ab6cf11SQuentin Schulz unsigned long gclk_rate; 356e0a25b6dSSongjun Wu } const sample_rates[] = { 357e0a25b6dSSongjun Wu { 8000, CLASSD_INTPMR_FRAME_8K, 3584ab6cf11SQuentin Schulz CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 }, 359e0a25b6dSSongjun Wu { 16000, CLASSD_INTPMR_FRAME_16K, 3604ab6cf11SQuentin Schulz CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 }, 361e0a25b6dSSongjun Wu { 32000, CLASSD_INTPMR_FRAME_32K, 3624ab6cf11SQuentin Schulz CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 }, 363e0a25b6dSSongjun Wu { 48000, CLASSD_INTPMR_FRAME_48K, 3644ab6cf11SQuentin Schulz CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 }, 365e0a25b6dSSongjun Wu { 96000, CLASSD_INTPMR_FRAME_96K, 3664ab6cf11SQuentin Schulz CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 }, 367e0a25b6dSSongjun Wu { 22050, CLASSD_INTPMR_FRAME_22K, 3684ab6cf11SQuentin Schulz CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 }, 369e0a25b6dSSongjun Wu { 44100, CLASSD_INTPMR_FRAME_44K, 3704ab6cf11SQuentin Schulz CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 }, 371e0a25b6dSSongjun Wu { 88200, CLASSD_INTPMR_FRAME_88K, 3724ab6cf11SQuentin Schulz CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 }, 373e0a25b6dSSongjun Wu }; 374e0a25b6dSSongjun Wu 375e0a25b6dSSongjun Wu static int 376e0a25b6dSSongjun Wu atmel_classd_codec_dai_hw_params(struct snd_pcm_substream *substream, 377e0a25b6dSSongjun Wu struct snd_pcm_hw_params *params, 378e0a25b6dSSongjun Wu struct snd_soc_dai *codec_dai) 379e0a25b6dSSongjun Wu { 380e0a25b6dSSongjun Wu struct snd_soc_pcm_runtime *rtd = substream->private_data; 381e0a25b6dSSongjun Wu struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); 3821e8ba922SKuninori Morimoto struct snd_soc_component *component = codec_dai->component; 383e0a25b6dSSongjun Wu int fs; 384e0a25b6dSSongjun Wu int i, best, best_val, cur_val, ret; 385e0a25b6dSSongjun Wu u32 mask, val; 386e0a25b6dSSongjun Wu 387e0a25b6dSSongjun Wu fs = params_rate(params); 388e0a25b6dSSongjun Wu 389e0a25b6dSSongjun Wu best = 0; 390e0a25b6dSSongjun Wu best_val = abs(fs - sample_rates[0].rate); 391e0a25b6dSSongjun Wu for (i = 1; i < ARRAY_SIZE(sample_rates); i++) { 392e0a25b6dSSongjun Wu /* Closest match */ 393e0a25b6dSSongjun Wu cur_val = abs(fs - sample_rates[i].rate); 394e0a25b6dSSongjun Wu if (cur_val < best_val) { 395e0a25b6dSSongjun Wu best = i; 396e0a25b6dSSongjun Wu best_val = cur_val; 397e0a25b6dSSongjun Wu } 398e0a25b6dSSongjun Wu } 399e0a25b6dSSongjun Wu 4001e8ba922SKuninori Morimoto dev_dbg(component->dev, 4014ab6cf11SQuentin Schulz "Selected SAMPLE_RATE of %dHz, GCLK_RATE of %ldHz\n", 4024ab6cf11SQuentin Schulz sample_rates[best].rate, sample_rates[best].gclk_rate); 403e0a25b6dSSongjun Wu 404e0a25b6dSSongjun Wu clk_disable_unprepare(dd->gclk); 405e0a25b6dSSongjun Wu 4064ab6cf11SQuentin Schulz ret = clk_set_rate(dd->gclk, sample_rates[best].gclk_rate); 407e0a25b6dSSongjun Wu if (ret) 408e0a25b6dSSongjun Wu return ret; 409e0a25b6dSSongjun Wu 410e0a25b6dSSongjun Wu mask = CLASSD_INTPMR_DSP_CLK_FREQ_MASK | CLASSD_INTPMR_FRAME_MASK; 411e0a25b6dSSongjun Wu val = (sample_rates[best].dsp_clk << CLASSD_INTPMR_DSP_CLK_FREQ_SHIFT) 412e0a25b6dSSongjun Wu | (sample_rates[best].sample_rate << CLASSD_INTPMR_FRAME_SHIFT); 413e0a25b6dSSongjun Wu 4141e8ba922SKuninori Morimoto snd_soc_component_update_bits(component, CLASSD_INTPMR, mask, val); 415e0a25b6dSSongjun Wu 416e0a25b6dSSongjun Wu return clk_prepare_enable(dd->gclk); 417e0a25b6dSSongjun Wu } 418e0a25b6dSSongjun Wu 419e0a25b6dSSongjun Wu static void 420e0a25b6dSSongjun Wu atmel_classd_codec_dai_shutdown(struct snd_pcm_substream *substream, 421e0a25b6dSSongjun Wu struct snd_soc_dai *codec_dai) 422e0a25b6dSSongjun Wu { 423e0a25b6dSSongjun Wu struct snd_soc_pcm_runtime *rtd = substream->private_data; 424e0a25b6dSSongjun Wu struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); 425e0a25b6dSSongjun Wu 426e0a25b6dSSongjun Wu clk_disable_unprepare(dd->gclk); 427e0a25b6dSSongjun Wu } 428e0a25b6dSSongjun Wu 429e0a25b6dSSongjun Wu static int atmel_classd_codec_dai_prepare(struct snd_pcm_substream *substream, 430e0a25b6dSSongjun Wu struct snd_soc_dai *codec_dai) 431e0a25b6dSSongjun Wu { 4321e8ba922SKuninori Morimoto struct snd_soc_component *component = codec_dai->component; 433e0a25b6dSSongjun Wu 4341e8ba922SKuninori Morimoto snd_soc_component_update_bits(component, CLASSD_MR, 435e0a25b6dSSongjun Wu CLASSD_MR_LEN_MASK | CLASSD_MR_REN_MASK, 436e0a25b6dSSongjun Wu (CLASSD_MR_LEN_DIS << CLASSD_MR_LEN_SHIFT) 437e0a25b6dSSongjun Wu |(CLASSD_MR_REN_DIS << CLASSD_MR_REN_SHIFT)); 438e0a25b6dSSongjun Wu 439e0a25b6dSSongjun Wu return 0; 440e0a25b6dSSongjun Wu } 441e0a25b6dSSongjun Wu 442e0a25b6dSSongjun Wu static int atmel_classd_codec_dai_trigger(struct snd_pcm_substream *substream, 443e0a25b6dSSongjun Wu int cmd, struct snd_soc_dai *codec_dai) 444e0a25b6dSSongjun Wu { 4451e8ba922SKuninori Morimoto struct snd_soc_component *component = codec_dai->component; 446e0a25b6dSSongjun Wu u32 mask, val; 447e0a25b6dSSongjun Wu 448e0a25b6dSSongjun Wu mask = CLASSD_MR_LEN_MASK | CLASSD_MR_REN_MASK; 449e0a25b6dSSongjun Wu 450e0a25b6dSSongjun Wu switch (cmd) { 451e0a25b6dSSongjun Wu case SNDRV_PCM_TRIGGER_START: 452e0a25b6dSSongjun Wu case SNDRV_PCM_TRIGGER_RESUME: 453e0a25b6dSSongjun Wu case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 454e0a25b6dSSongjun Wu val = mask; 455e0a25b6dSSongjun Wu break; 456e0a25b6dSSongjun Wu case SNDRV_PCM_TRIGGER_STOP: 457e0a25b6dSSongjun Wu case SNDRV_PCM_TRIGGER_SUSPEND: 458e0a25b6dSSongjun Wu case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 459e0a25b6dSSongjun Wu val = (CLASSD_MR_LEN_DIS << CLASSD_MR_LEN_SHIFT) 460e0a25b6dSSongjun Wu | (CLASSD_MR_REN_DIS << CLASSD_MR_REN_SHIFT); 461e0a25b6dSSongjun Wu break; 462e0a25b6dSSongjun Wu default: 463e0a25b6dSSongjun Wu return -EINVAL; 464e0a25b6dSSongjun Wu } 465e0a25b6dSSongjun Wu 4661e8ba922SKuninori Morimoto snd_soc_component_update_bits(component, CLASSD_MR, mask, val); 467e0a25b6dSSongjun Wu 468e0a25b6dSSongjun Wu return 0; 469e0a25b6dSSongjun Wu } 470e0a25b6dSSongjun Wu 471e0a25b6dSSongjun Wu static const struct snd_soc_dai_ops atmel_classd_codec_dai_ops = { 472e0a25b6dSSongjun Wu .digital_mute = atmel_classd_codec_dai_digital_mute, 473e0a25b6dSSongjun Wu .startup = atmel_classd_codec_dai_startup, 474e0a25b6dSSongjun Wu .shutdown = atmel_classd_codec_dai_shutdown, 475e0a25b6dSSongjun Wu .hw_params = atmel_classd_codec_dai_hw_params, 476e0a25b6dSSongjun Wu .prepare = atmel_classd_codec_dai_prepare, 477e0a25b6dSSongjun Wu .trigger = atmel_classd_codec_dai_trigger, 478e0a25b6dSSongjun Wu }; 479e0a25b6dSSongjun Wu 480e0a25b6dSSongjun Wu #define ATMEL_CLASSD_CODEC_DAI_NAME "atmel-classd-hifi" 481e0a25b6dSSongjun Wu 482e0a25b6dSSongjun Wu static struct snd_soc_dai_driver atmel_classd_codec_dai = { 483e0a25b6dSSongjun Wu .name = ATMEL_CLASSD_CODEC_DAI_NAME, 484e0a25b6dSSongjun Wu .playback = { 485e0a25b6dSSongjun Wu .stream_name = "Playback", 48607c55d39SSongjun Wu .channels_min = 1, 487e0a25b6dSSongjun Wu .channels_max = 2, 488e0a25b6dSSongjun Wu .rates = ATMEL_CLASSD_RATES, 489e0a25b6dSSongjun Wu .formats = SNDRV_PCM_FMTBIT_S16_LE, 490e0a25b6dSSongjun Wu }, 491e0a25b6dSSongjun Wu .ops = &atmel_classd_codec_dai_ops, 492e0a25b6dSSongjun Wu }; 493e0a25b6dSSongjun Wu 494e0a25b6dSSongjun Wu /* ASoC sound card */ 495e0a25b6dSSongjun Wu static int atmel_classd_asoc_card_init(struct device *dev, 496e0a25b6dSSongjun Wu struct snd_soc_card *card) 497e0a25b6dSSongjun Wu { 498e0a25b6dSSongjun Wu struct snd_soc_dai_link *dai_link; 499e0a25b6dSSongjun Wu struct atmel_classd *dd = snd_soc_card_get_drvdata(card); 5003d14a1dfSKuninori Morimoto struct snd_soc_dai_link_component *comp; 501e0a25b6dSSongjun Wu 502e0a25b6dSSongjun Wu dai_link = devm_kzalloc(dev, sizeof(*dai_link), GFP_KERNEL); 503e0a25b6dSSongjun Wu if (!dai_link) 504e0a25b6dSSongjun Wu return -ENOMEM; 505e0a25b6dSSongjun Wu 506ca1c67d1SKuninori Morimoto comp = devm_kzalloc(dev, 3 * sizeof(*comp), GFP_KERNEL); 5073d14a1dfSKuninori Morimoto if (!comp) 5083d14a1dfSKuninori Morimoto return -ENOMEM; 5093d14a1dfSKuninori Morimoto 5103d14a1dfSKuninori Morimoto dai_link->cpus = &comp[0]; 5113d14a1dfSKuninori Morimoto dai_link->codecs = &comp[1]; 512ca1c67d1SKuninori Morimoto dai_link->platforms = &comp[2]; 5133d14a1dfSKuninori Morimoto 5143d14a1dfSKuninori Morimoto dai_link->num_cpus = 1; 5153d14a1dfSKuninori Morimoto dai_link->num_codecs = 1; 516ca1c67d1SKuninori Morimoto dai_link->num_platforms = 1; 5173d14a1dfSKuninori Morimoto 518e0a25b6dSSongjun Wu dai_link->name = "CLASSD"; 519e0a25b6dSSongjun Wu dai_link->stream_name = "CLASSD PCM"; 5203d14a1dfSKuninori Morimoto dai_link->codecs->dai_name = ATMEL_CLASSD_CODEC_DAI_NAME; 5213d14a1dfSKuninori Morimoto dai_link->cpus->dai_name = dev_name(dev); 5223d14a1dfSKuninori Morimoto dai_link->codecs->name = dev_name(dev); 523ca1c67d1SKuninori Morimoto dai_link->platforms->name = dev_name(dev); 524e0a25b6dSSongjun Wu 525e0a25b6dSSongjun Wu card->dai_link = dai_link; 526e0a25b6dSSongjun Wu card->num_links = 1; 527e0a25b6dSSongjun Wu card->name = dd->pdata->card_name; 528e0a25b6dSSongjun Wu card->dev = dev; 529e0a25b6dSSongjun Wu 530e0a25b6dSSongjun Wu return 0; 531e0a25b6dSSongjun Wu }; 532e0a25b6dSSongjun Wu 533e0a25b6dSSongjun Wu /* regmap configuration */ 534e0a25b6dSSongjun Wu static const struct reg_default atmel_classd_reg_defaults[] = { 535e0a25b6dSSongjun Wu { CLASSD_INTPMR, 0x00301212 }, 536e0a25b6dSSongjun Wu }; 537e0a25b6dSSongjun Wu 538e0a25b6dSSongjun Wu #define ATMEL_CLASSD_REG_MAX 0xE4 539e0a25b6dSSongjun Wu static const struct regmap_config atmel_classd_regmap_config = { 540e0a25b6dSSongjun Wu .reg_bits = 32, 541e0a25b6dSSongjun Wu .reg_stride = 4, 542e0a25b6dSSongjun Wu .val_bits = 32, 543e0a25b6dSSongjun Wu .max_register = ATMEL_CLASSD_REG_MAX, 544e0a25b6dSSongjun Wu 545e0a25b6dSSongjun Wu .cache_type = REGCACHE_FLAT, 546e0a25b6dSSongjun Wu .reg_defaults = atmel_classd_reg_defaults, 547e0a25b6dSSongjun Wu .num_reg_defaults = ARRAY_SIZE(atmel_classd_reg_defaults), 548e0a25b6dSSongjun Wu }; 549e0a25b6dSSongjun Wu 550e0a25b6dSSongjun Wu static int atmel_classd_probe(struct platform_device *pdev) 551e0a25b6dSSongjun Wu { 552e0a25b6dSSongjun Wu struct device *dev = &pdev->dev; 553e0a25b6dSSongjun Wu struct atmel_classd *dd; 554e0a25b6dSSongjun Wu struct resource *res; 555e0a25b6dSSongjun Wu void __iomem *io_base; 556e0a25b6dSSongjun Wu const struct atmel_classd_pdata *pdata; 557e0a25b6dSSongjun Wu struct snd_soc_card *card; 558e0a25b6dSSongjun Wu int ret; 559e0a25b6dSSongjun Wu 560e0a25b6dSSongjun Wu pdata = dev_get_platdata(dev); 561e0a25b6dSSongjun Wu if (!pdata) { 562e0a25b6dSSongjun Wu pdata = atmel_classd_dt_init(dev); 563e0a25b6dSSongjun Wu if (IS_ERR(pdata)) 564e0a25b6dSSongjun Wu return PTR_ERR(pdata); 565e0a25b6dSSongjun Wu } 566e0a25b6dSSongjun Wu 567e0a25b6dSSongjun Wu dd = devm_kzalloc(dev, sizeof(*dd), GFP_KERNEL); 568e0a25b6dSSongjun Wu if (!dd) 569e0a25b6dSSongjun Wu return -ENOMEM; 570e0a25b6dSSongjun Wu 571e0a25b6dSSongjun Wu dd->pdata = pdata; 572e0a25b6dSSongjun Wu 573e0a25b6dSSongjun Wu dd->irq = platform_get_irq(pdev, 0); 574e0a25b6dSSongjun Wu if (dd->irq < 0) { 575e0a25b6dSSongjun Wu ret = dd->irq; 576e0a25b6dSSongjun Wu dev_err(dev, "failed to could not get irq: %d\n", ret); 577e0a25b6dSSongjun Wu return ret; 578e0a25b6dSSongjun Wu } 579e0a25b6dSSongjun Wu 580e0a25b6dSSongjun Wu dd->pclk = devm_clk_get(dev, "pclk"); 581e0a25b6dSSongjun Wu if (IS_ERR(dd->pclk)) { 582e0a25b6dSSongjun Wu ret = PTR_ERR(dd->pclk); 583e0a25b6dSSongjun Wu dev_err(dev, "failed to get peripheral clock: %d\n", ret); 584e0a25b6dSSongjun Wu return ret; 585e0a25b6dSSongjun Wu } 586e0a25b6dSSongjun Wu 587e0a25b6dSSongjun Wu dd->gclk = devm_clk_get(dev, "gclk"); 588e0a25b6dSSongjun Wu if (IS_ERR(dd->gclk)) { 589e0a25b6dSSongjun Wu ret = PTR_ERR(dd->gclk); 590e0a25b6dSSongjun Wu dev_err(dev, "failed to get GCK clock: %d\n", ret); 591e0a25b6dSSongjun Wu return ret; 592e0a25b6dSSongjun Wu } 593e0a25b6dSSongjun Wu 594e0a25b6dSSongjun Wu res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 595e0a25b6dSSongjun Wu io_base = devm_ioremap_resource(dev, res); 5961f598e68SLadislav Michl if (IS_ERR(io_base)) 5971f598e68SLadislav Michl return PTR_ERR(io_base); 598e0a25b6dSSongjun Wu 599e0a25b6dSSongjun Wu dd->phy_base = res->start; 6006dea9df8SKuninori Morimoto dd->dev = dev; 601e0a25b6dSSongjun Wu 602e0a25b6dSSongjun Wu dd->regmap = devm_regmap_init_mmio(dev, io_base, 603e0a25b6dSSongjun Wu &atmel_classd_regmap_config); 604e0a25b6dSSongjun Wu if (IS_ERR(dd->regmap)) { 605e0a25b6dSSongjun Wu ret = PTR_ERR(dd->regmap); 606e0a25b6dSSongjun Wu dev_err(dev, "failed to init register map: %d\n", ret); 607e0a25b6dSSongjun Wu return ret; 608e0a25b6dSSongjun Wu } 609e0a25b6dSSongjun Wu 610e0a25b6dSSongjun Wu ret = devm_snd_soc_register_component(dev, 611e0a25b6dSSongjun Wu &atmel_classd_cpu_dai_component, 612e0a25b6dSSongjun Wu &atmel_classd_cpu_dai, 1); 613e0a25b6dSSongjun Wu if (ret) { 614e0a25b6dSSongjun Wu dev_err(dev, "could not register CPU DAI: %d\n", ret); 615e0a25b6dSSongjun Wu return ret; 616e0a25b6dSSongjun Wu } 617e0a25b6dSSongjun Wu 618e0a25b6dSSongjun Wu ret = devm_snd_dmaengine_pcm_register(dev, 619e0a25b6dSSongjun Wu &atmel_classd_dmaengine_pcm_config, 620e0a25b6dSSongjun Wu 0); 621e0a25b6dSSongjun Wu if (ret) { 622e0a25b6dSSongjun Wu dev_err(dev, "could not register platform: %d\n", ret); 623e0a25b6dSSongjun Wu return ret; 624e0a25b6dSSongjun Wu } 625e0a25b6dSSongjun Wu 6261e8ba922SKuninori Morimoto ret = devm_snd_soc_register_component(dev, &soc_component_dev_classd, 627e0a25b6dSSongjun Wu &atmel_classd_codec_dai, 1); 628e0a25b6dSSongjun Wu if (ret) { 6291e8ba922SKuninori Morimoto dev_err(dev, "could not register component: %d\n", ret); 630e0a25b6dSSongjun Wu return ret; 631e0a25b6dSSongjun Wu } 632e0a25b6dSSongjun Wu 633e0a25b6dSSongjun Wu /* register sound card */ 634e0a25b6dSSongjun Wu card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL); 63532e69badSSongjun Wu if (!card) { 63632e69badSSongjun Wu ret = -ENOMEM; 63732e69badSSongjun Wu goto unregister_codec; 63832e69badSSongjun Wu } 639e0a25b6dSSongjun Wu 640e0a25b6dSSongjun Wu snd_soc_card_set_drvdata(card, dd); 641e0a25b6dSSongjun Wu 642e0a25b6dSSongjun Wu ret = atmel_classd_asoc_card_init(dev, card); 643e0a25b6dSSongjun Wu if (ret) { 644e0a25b6dSSongjun Wu dev_err(dev, "failed to init sound card\n"); 64532e69badSSongjun Wu goto unregister_codec; 646e0a25b6dSSongjun Wu } 647e0a25b6dSSongjun Wu 648e0a25b6dSSongjun Wu ret = devm_snd_soc_register_card(dev, card); 649e0a25b6dSSongjun Wu if (ret) { 650e0a25b6dSSongjun Wu dev_err(dev, "failed to register sound card: %d\n", ret); 65132e69badSSongjun Wu goto unregister_codec; 652e0a25b6dSSongjun Wu } 653e0a25b6dSSongjun Wu 654e0a25b6dSSongjun Wu return 0; 65532e69badSSongjun Wu 65632e69badSSongjun Wu unregister_codec: 65732e69badSSongjun Wu return ret; 658e0a25b6dSSongjun Wu } 659e0a25b6dSSongjun Wu 660e0a25b6dSSongjun Wu static int atmel_classd_remove(struct platform_device *pdev) 661e0a25b6dSSongjun Wu { 662e0a25b6dSSongjun Wu return 0; 663e0a25b6dSSongjun Wu } 664e0a25b6dSSongjun Wu 665e0a25b6dSSongjun Wu static struct platform_driver atmel_classd_driver = { 666e0a25b6dSSongjun Wu .driver = { 667e0a25b6dSSongjun Wu .name = "atmel-classd", 668e0a25b6dSSongjun Wu .of_match_table = of_match_ptr(atmel_classd_of_match), 669e0a25b6dSSongjun Wu .pm = &snd_soc_pm_ops, 670e0a25b6dSSongjun Wu }, 671e0a25b6dSSongjun Wu .probe = atmel_classd_probe, 672e0a25b6dSSongjun Wu .remove = atmel_classd_remove, 673e0a25b6dSSongjun Wu }; 674e0a25b6dSSongjun Wu module_platform_driver(atmel_classd_driver); 675e0a25b6dSSongjun Wu 676e0a25b6dSSongjun Wu MODULE_DESCRIPTION("Atmel ClassD driver under ALSA SoC architecture"); 677e0a25b6dSSongjun Wu MODULE_AUTHOR("Songjun Wu <songjun.wu@atmel.com>"); 678e0a25b6dSSongjun Wu MODULE_LICENSE("GPL"); 679