1e0a25b6dSSongjun Wu /* Atmel ALSA SoC Audio Class D Amplifier (CLASSD) driver 2e0a25b6dSSongjun Wu * 3e0a25b6dSSongjun Wu * Copyright (C) 2015 Atmel 4e0a25b6dSSongjun Wu * 5e0a25b6dSSongjun Wu * Author: Songjun Wu <songjun.wu@atmel.com> 6e0a25b6dSSongjun Wu * 7e0a25b6dSSongjun Wu * This program is free software; you can redistribute it and/or modify 8e0a25b6dSSongjun Wu * it under the terms of the GNU General Public License version 2 or later 9e0a25b6dSSongjun Wu * as published by the Free Software Foundation. 10e0a25b6dSSongjun Wu */ 11e0a25b6dSSongjun Wu 12e0a25b6dSSongjun Wu #include <linux/of.h> 13e0a25b6dSSongjun Wu #include <linux/clk.h> 14e0a25b6dSSongjun Wu #include <linux/module.h> 15e0a25b6dSSongjun Wu #include <linux/platform_device.h> 16e0a25b6dSSongjun Wu #include <linux/regmap.h> 17e0a25b6dSSongjun Wu #include <sound/core.h> 18e0a25b6dSSongjun Wu #include <sound/dmaengine_pcm.h> 19e0a25b6dSSongjun Wu #include <sound/pcm_params.h> 20e0a25b6dSSongjun Wu #include <sound/tlv.h> 21e0a25b6dSSongjun Wu #include "atmel-classd.h" 22e0a25b6dSSongjun Wu 23e0a25b6dSSongjun Wu struct atmel_classd_pdata { 24e0a25b6dSSongjun Wu bool non_overlap_enable; 25e0a25b6dSSongjun Wu int non_overlap_time; 26e0a25b6dSSongjun Wu int pwm_type; 27e0a25b6dSSongjun Wu const char *card_name; 28e0a25b6dSSongjun Wu }; 29e0a25b6dSSongjun Wu 30e0a25b6dSSongjun Wu struct atmel_classd { 31e0a25b6dSSongjun Wu dma_addr_t phy_base; 32e0a25b6dSSongjun Wu struct regmap *regmap; 33e0a25b6dSSongjun Wu struct clk *pclk; 34e0a25b6dSSongjun Wu struct clk *gclk; 35e0a25b6dSSongjun Wu int irq; 36e0a25b6dSSongjun Wu const struct atmel_classd_pdata *pdata; 37e0a25b6dSSongjun Wu }; 38e0a25b6dSSongjun Wu 39e0a25b6dSSongjun Wu #ifdef CONFIG_OF 40e0a25b6dSSongjun Wu static const struct of_device_id atmel_classd_of_match[] = { 41e0a25b6dSSongjun Wu { 42e0a25b6dSSongjun Wu .compatible = "atmel,sama5d2-classd", 43e0a25b6dSSongjun Wu }, { 44e0a25b6dSSongjun Wu /* sentinel */ 45e0a25b6dSSongjun Wu } 46e0a25b6dSSongjun Wu }; 47e0a25b6dSSongjun Wu MODULE_DEVICE_TABLE(of, atmel_classd_of_match); 48e0a25b6dSSongjun Wu 49e0a25b6dSSongjun Wu static struct atmel_classd_pdata *atmel_classd_dt_init(struct device *dev) 50e0a25b6dSSongjun Wu { 51e0a25b6dSSongjun Wu struct device_node *np = dev->of_node; 52e0a25b6dSSongjun Wu struct atmel_classd_pdata *pdata; 53e0a25b6dSSongjun Wu const char *pwm_type; 54e0a25b6dSSongjun Wu int ret; 55e0a25b6dSSongjun Wu 56e0a25b6dSSongjun Wu if (!np) { 57e0a25b6dSSongjun Wu dev_err(dev, "device node not found\n"); 58e0a25b6dSSongjun Wu return ERR_PTR(-EINVAL); 59e0a25b6dSSongjun Wu } 60e0a25b6dSSongjun Wu 61e0a25b6dSSongjun Wu pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); 62e0a25b6dSSongjun Wu if (!pdata) 63e0a25b6dSSongjun Wu return ERR_PTR(-ENOMEM); 64e0a25b6dSSongjun Wu 65e0a25b6dSSongjun Wu ret = of_property_read_string(np, "atmel,pwm-type", &pwm_type); 66e0a25b6dSSongjun Wu if ((ret == 0) && (strcmp(pwm_type, "diff") == 0)) 67e0a25b6dSSongjun Wu pdata->pwm_type = CLASSD_MR_PWMTYP_DIFF; 68e0a25b6dSSongjun Wu else 69e0a25b6dSSongjun Wu pdata->pwm_type = CLASSD_MR_PWMTYP_SINGLE; 70e0a25b6dSSongjun Wu 71e0a25b6dSSongjun Wu ret = of_property_read_u32(np, 72e0a25b6dSSongjun Wu "atmel,non-overlap-time", &pdata->non_overlap_time); 73e0a25b6dSSongjun Wu if (ret) 74e0a25b6dSSongjun Wu pdata->non_overlap_enable = false; 75e0a25b6dSSongjun Wu else 76e0a25b6dSSongjun Wu pdata->non_overlap_enable = true; 77e0a25b6dSSongjun Wu 78e0a25b6dSSongjun Wu ret = of_property_read_string(np, "atmel,model", &pdata->card_name); 79e0a25b6dSSongjun Wu if (ret) 80e0a25b6dSSongjun Wu pdata->card_name = "CLASSD"; 81e0a25b6dSSongjun Wu 82e0a25b6dSSongjun Wu return pdata; 83e0a25b6dSSongjun Wu } 84e0a25b6dSSongjun Wu #else 85e0a25b6dSSongjun Wu static inline struct atmel_classd_pdata * 86e0a25b6dSSongjun Wu atmel_classd_dt_init(struct device *dev) 87e0a25b6dSSongjun Wu { 88e0a25b6dSSongjun Wu return ERR_PTR(-EINVAL); 89e0a25b6dSSongjun Wu } 90e0a25b6dSSongjun Wu #endif 91e0a25b6dSSongjun Wu 92e0a25b6dSSongjun Wu #define ATMEL_CLASSD_RATES (SNDRV_PCM_RATE_8000 \ 93e0a25b6dSSongjun Wu | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 \ 94e0a25b6dSSongjun Wu | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 \ 95e0a25b6dSSongjun Wu | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 \ 96e0a25b6dSSongjun Wu | SNDRV_PCM_RATE_96000) 97e0a25b6dSSongjun Wu 98e0a25b6dSSongjun Wu static const struct snd_pcm_hardware atmel_classd_hw = { 99e0a25b6dSSongjun Wu .info = SNDRV_PCM_INFO_MMAP 100e0a25b6dSSongjun Wu | SNDRV_PCM_INFO_MMAP_VALID 101e0a25b6dSSongjun Wu | SNDRV_PCM_INFO_INTERLEAVED 102e0a25b6dSSongjun Wu | SNDRV_PCM_INFO_RESUME 103e0a25b6dSSongjun Wu | SNDRV_PCM_INFO_PAUSE, 104e0a25b6dSSongjun Wu .formats = (SNDRV_PCM_FMTBIT_S16_LE), 105e0a25b6dSSongjun Wu .rates = ATMEL_CLASSD_RATES, 106e0a25b6dSSongjun Wu .rate_min = 8000, 107e0a25b6dSSongjun Wu .rate_max = 96000, 10807c55d39SSongjun Wu .channels_min = 1, 109e0a25b6dSSongjun Wu .channels_max = 2, 110e0a25b6dSSongjun Wu .buffer_bytes_max = 64 * 1024, 111e0a25b6dSSongjun Wu .period_bytes_min = 256, 112e0a25b6dSSongjun Wu .period_bytes_max = 32 * 1024, 113e0a25b6dSSongjun Wu .periods_min = 2, 114e0a25b6dSSongjun Wu .periods_max = 256, 115e0a25b6dSSongjun Wu }; 116e0a25b6dSSongjun Wu 117e0a25b6dSSongjun Wu #define ATMEL_CLASSD_PREALLOC_BUF_SIZE (64 * 1024) 118e0a25b6dSSongjun Wu 119e0a25b6dSSongjun Wu /* cpu dai component */ 120e0a25b6dSSongjun Wu static int atmel_classd_cpu_dai_startup(struct snd_pcm_substream *substream, 121e0a25b6dSSongjun Wu struct snd_soc_dai *cpu_dai) 122e0a25b6dSSongjun Wu { 123e0a25b6dSSongjun Wu struct snd_soc_pcm_runtime *rtd = substream->private_data; 124e0a25b6dSSongjun Wu struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); 125e0a25b6dSSongjun Wu 126e0a25b6dSSongjun Wu regmap_write(dd->regmap, CLASSD_THR, 0x0); 127e0a25b6dSSongjun Wu 128e0a25b6dSSongjun Wu return clk_prepare_enable(dd->pclk); 129e0a25b6dSSongjun Wu } 130e0a25b6dSSongjun Wu 131e0a25b6dSSongjun Wu static void atmel_classd_cpu_dai_shutdown(struct snd_pcm_substream *substream, 132e0a25b6dSSongjun Wu struct snd_soc_dai *cpu_dai) 133e0a25b6dSSongjun Wu { 134e0a25b6dSSongjun Wu struct snd_soc_pcm_runtime *rtd = substream->private_data; 135e0a25b6dSSongjun Wu struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); 136e0a25b6dSSongjun Wu 137e0a25b6dSSongjun Wu clk_disable_unprepare(dd->pclk); 138e0a25b6dSSongjun Wu } 139e0a25b6dSSongjun Wu 140e0a25b6dSSongjun Wu static const struct snd_soc_dai_ops atmel_classd_cpu_dai_ops = { 141e0a25b6dSSongjun Wu .startup = atmel_classd_cpu_dai_startup, 142e0a25b6dSSongjun Wu .shutdown = atmel_classd_cpu_dai_shutdown, 143e0a25b6dSSongjun Wu }; 144e0a25b6dSSongjun Wu 145e0a25b6dSSongjun Wu static struct snd_soc_dai_driver atmel_classd_cpu_dai = { 146e0a25b6dSSongjun Wu .playback = { 14707c55d39SSongjun Wu .channels_min = 1, 148e0a25b6dSSongjun Wu .channels_max = 2, 149e0a25b6dSSongjun Wu .rates = ATMEL_CLASSD_RATES, 150e0a25b6dSSongjun Wu .formats = SNDRV_PCM_FMTBIT_S16_LE,}, 151e0a25b6dSSongjun Wu .ops = &atmel_classd_cpu_dai_ops, 152e0a25b6dSSongjun Wu }; 153e0a25b6dSSongjun Wu 154e0a25b6dSSongjun Wu static const struct snd_soc_component_driver atmel_classd_cpu_dai_component = { 155e0a25b6dSSongjun Wu .name = "atmel-classd", 156e0a25b6dSSongjun Wu }; 157e0a25b6dSSongjun Wu 158e0a25b6dSSongjun Wu /* platform */ 159e0a25b6dSSongjun Wu static int 160e0a25b6dSSongjun Wu atmel_classd_platform_configure_dma(struct snd_pcm_substream *substream, 161e0a25b6dSSongjun Wu struct snd_pcm_hw_params *params, 162e0a25b6dSSongjun Wu struct dma_slave_config *slave_config) 163e0a25b6dSSongjun Wu { 164e0a25b6dSSongjun Wu struct snd_soc_pcm_runtime *rtd = substream->private_data; 165e0a25b6dSSongjun Wu struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); 166e0a25b6dSSongjun Wu 167e0a25b6dSSongjun Wu if (params_physical_width(params) != 16) { 168e0a25b6dSSongjun Wu dev_err(rtd->platform->dev, 169e0a25b6dSSongjun Wu "only supports 16-bit audio data\n"); 170e0a25b6dSSongjun Wu return -EINVAL; 171e0a25b6dSSongjun Wu } 172e0a25b6dSSongjun Wu 17307c55d39SSongjun Wu if (params_channels(params) == 1) 17407c55d39SSongjun Wu slave_config->dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; 17507c55d39SSongjun Wu else 17607c55d39SSongjun Wu slave_config->dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; 17707c55d39SSongjun Wu 178e0a25b6dSSongjun Wu slave_config->direction = DMA_MEM_TO_DEV; 179e0a25b6dSSongjun Wu slave_config->dst_addr = dd->phy_base + CLASSD_THR; 180e0a25b6dSSongjun Wu slave_config->dst_maxburst = 1; 181e0a25b6dSSongjun Wu slave_config->src_maxburst = 1; 182e0a25b6dSSongjun Wu slave_config->device_fc = false; 183e0a25b6dSSongjun Wu 184e0a25b6dSSongjun Wu return 0; 185e0a25b6dSSongjun Wu } 186e0a25b6dSSongjun Wu 187e0a25b6dSSongjun Wu static const struct snd_dmaengine_pcm_config 188e0a25b6dSSongjun Wu atmel_classd_dmaengine_pcm_config = { 189e0a25b6dSSongjun Wu .prepare_slave_config = atmel_classd_platform_configure_dma, 190e0a25b6dSSongjun Wu .pcm_hardware = &atmel_classd_hw, 191e0a25b6dSSongjun Wu .prealloc_buffer_size = ATMEL_CLASSD_PREALLOC_BUF_SIZE, 192e0a25b6dSSongjun Wu }; 193e0a25b6dSSongjun Wu 194e0a25b6dSSongjun Wu /* codec */ 195e0a25b6dSSongjun Wu static const char * const mono_mode_text[] = { 196e0a25b6dSSongjun Wu "mix", "sat", "left", "right" 197e0a25b6dSSongjun Wu }; 198e0a25b6dSSongjun Wu 199e0a25b6dSSongjun Wu static SOC_ENUM_SINGLE_DECL(classd_mono_mode_enum, 200e0a25b6dSSongjun Wu CLASSD_INTPMR, CLASSD_INTPMR_MONO_MODE_SHIFT, 201e0a25b6dSSongjun Wu mono_mode_text); 202e0a25b6dSSongjun Wu 203e0a25b6dSSongjun Wu static const char * const eqcfg_text[] = { 204e0a25b6dSSongjun Wu "Treble-12dB", "Treble-6dB", 205e0a25b6dSSongjun Wu "Medium-8dB", "Medium-3dB", 206e0a25b6dSSongjun Wu "Bass-12dB", "Bass-6dB", 207e0a25b6dSSongjun Wu "0 dB", 208e0a25b6dSSongjun Wu "Bass+6dB", "Bass+12dB", 209e0a25b6dSSongjun Wu "Medium+3dB", "Medium+8dB", 210e0a25b6dSSongjun Wu "Treble+6dB", "Treble+12dB", 211e0a25b6dSSongjun Wu }; 212e0a25b6dSSongjun Wu 213e0a25b6dSSongjun Wu static const unsigned int eqcfg_value[] = { 214e0a25b6dSSongjun Wu CLASSD_INTPMR_EQCFG_T_CUT_12, CLASSD_INTPMR_EQCFG_T_CUT_6, 215e0a25b6dSSongjun Wu CLASSD_INTPMR_EQCFG_M_CUT_8, CLASSD_INTPMR_EQCFG_M_CUT_3, 216e0a25b6dSSongjun Wu CLASSD_INTPMR_EQCFG_B_CUT_12, CLASSD_INTPMR_EQCFG_B_CUT_6, 217e0a25b6dSSongjun Wu CLASSD_INTPMR_EQCFG_FLAT, 218e0a25b6dSSongjun Wu CLASSD_INTPMR_EQCFG_B_BOOST_6, CLASSD_INTPMR_EQCFG_B_BOOST_12, 219e0a25b6dSSongjun Wu CLASSD_INTPMR_EQCFG_M_BOOST_3, CLASSD_INTPMR_EQCFG_M_BOOST_8, 220e0a25b6dSSongjun Wu CLASSD_INTPMR_EQCFG_T_BOOST_6, CLASSD_INTPMR_EQCFG_T_BOOST_12, 221e0a25b6dSSongjun Wu }; 222e0a25b6dSSongjun Wu 223e0a25b6dSSongjun Wu static SOC_VALUE_ENUM_SINGLE_DECL(classd_eqcfg_enum, 224e0a25b6dSSongjun Wu CLASSD_INTPMR, CLASSD_INTPMR_EQCFG_SHIFT, 0xf, 225e0a25b6dSSongjun Wu eqcfg_text, eqcfg_value); 226e0a25b6dSSongjun Wu 227e0a25b6dSSongjun Wu static const DECLARE_TLV_DB_SCALE(classd_digital_tlv, -7800, 100, 1); 228e0a25b6dSSongjun Wu 229e0a25b6dSSongjun Wu static const struct snd_kcontrol_new atmel_classd_snd_controls[] = { 230e0a25b6dSSongjun Wu SOC_DOUBLE_TLV("Playback Volume", CLASSD_INTPMR, 231e0a25b6dSSongjun Wu CLASSD_INTPMR_ATTL_SHIFT, CLASSD_INTPMR_ATTR_SHIFT, 232e0a25b6dSSongjun Wu 78, 1, classd_digital_tlv), 233e0a25b6dSSongjun Wu 234e0a25b6dSSongjun Wu SOC_SINGLE("Deemphasis Switch", CLASSD_INTPMR, 235e0a25b6dSSongjun Wu CLASSD_INTPMR_DEEMP_SHIFT, 1, 0), 236e0a25b6dSSongjun Wu 237e0a25b6dSSongjun Wu SOC_SINGLE("Mono Switch", CLASSD_INTPMR, CLASSD_INTPMR_MONO_SHIFT, 1, 0), 238e0a25b6dSSongjun Wu 239e0a25b6dSSongjun Wu SOC_SINGLE("Swap Switch", CLASSD_INTPMR, CLASSD_INTPMR_SWAP_SHIFT, 1, 0), 240e0a25b6dSSongjun Wu 241e0a25b6dSSongjun Wu SOC_ENUM("Mono Mode", classd_mono_mode_enum), 242e0a25b6dSSongjun Wu 243e0a25b6dSSongjun Wu SOC_ENUM("EQ", classd_eqcfg_enum), 244e0a25b6dSSongjun Wu }; 245e0a25b6dSSongjun Wu 246e0a25b6dSSongjun Wu static const char * const pwm_type[] = { 247e0a25b6dSSongjun Wu "Single ended", "Differential" 248e0a25b6dSSongjun Wu }; 249e0a25b6dSSongjun Wu 250e0a25b6dSSongjun Wu static int atmel_classd_codec_probe(struct snd_soc_codec *codec) 251e0a25b6dSSongjun Wu { 252e0a25b6dSSongjun Wu struct snd_soc_card *card = snd_soc_codec_get_drvdata(codec); 253e0a25b6dSSongjun Wu struct atmel_classd *dd = snd_soc_card_get_drvdata(card); 254e0a25b6dSSongjun Wu const struct atmel_classd_pdata *pdata = dd->pdata; 255e0a25b6dSSongjun Wu u32 mask, val; 256e0a25b6dSSongjun Wu 257e0a25b6dSSongjun Wu mask = CLASSD_MR_PWMTYP_MASK; 258e0a25b6dSSongjun Wu val = pdata->pwm_type << CLASSD_MR_PWMTYP_SHIFT; 259e0a25b6dSSongjun Wu 260e0a25b6dSSongjun Wu mask |= CLASSD_MR_NON_OVERLAP_MASK; 261e0a25b6dSSongjun Wu if (pdata->non_overlap_enable) { 262e0a25b6dSSongjun Wu val |= (CLASSD_MR_NON_OVERLAP_EN 263e0a25b6dSSongjun Wu << CLASSD_MR_NON_OVERLAP_SHIFT); 264e0a25b6dSSongjun Wu 265e0a25b6dSSongjun Wu mask |= CLASSD_MR_NOVR_VAL_MASK; 266e0a25b6dSSongjun Wu switch (pdata->non_overlap_time) { 267e0a25b6dSSongjun Wu case 5: 268e0a25b6dSSongjun Wu val |= (CLASSD_MR_NOVR_VAL_5NS 269e0a25b6dSSongjun Wu << CLASSD_MR_NOVR_VAL_SHIFT); 270e0a25b6dSSongjun Wu break; 271e0a25b6dSSongjun Wu case 10: 272e0a25b6dSSongjun Wu val |= (CLASSD_MR_NOVR_VAL_10NS 273e0a25b6dSSongjun Wu << CLASSD_MR_NOVR_VAL_SHIFT); 274e0a25b6dSSongjun Wu break; 275e0a25b6dSSongjun Wu case 15: 276e0a25b6dSSongjun Wu val |= (CLASSD_MR_NOVR_VAL_15NS 277e0a25b6dSSongjun Wu << CLASSD_MR_NOVR_VAL_SHIFT); 278e0a25b6dSSongjun Wu break; 279e0a25b6dSSongjun Wu case 20: 280e0a25b6dSSongjun Wu val |= (CLASSD_MR_NOVR_VAL_20NS 281e0a25b6dSSongjun Wu << CLASSD_MR_NOVR_VAL_SHIFT); 282e0a25b6dSSongjun Wu break; 283e0a25b6dSSongjun Wu default: 284e0a25b6dSSongjun Wu val |= (CLASSD_MR_NOVR_VAL_10NS 285e0a25b6dSSongjun Wu << CLASSD_MR_NOVR_VAL_SHIFT); 286e0a25b6dSSongjun Wu dev_warn(codec->dev, 287e0a25b6dSSongjun Wu "non-overlapping value %d is invalid, the default value 10 is specified\n", 288e0a25b6dSSongjun Wu pdata->non_overlap_time); 289e0a25b6dSSongjun Wu break; 290e0a25b6dSSongjun Wu } 291e0a25b6dSSongjun Wu } 292e0a25b6dSSongjun Wu 293e0a25b6dSSongjun Wu snd_soc_update_bits(codec, CLASSD_MR, mask, val); 294e0a25b6dSSongjun Wu 295e0a25b6dSSongjun Wu dev_info(codec->dev, 296e0a25b6dSSongjun Wu "PWM modulation type is %s, non-overlapping is %s\n", 297e0a25b6dSSongjun Wu pwm_type[pdata->pwm_type], 298e0a25b6dSSongjun Wu pdata->non_overlap_enable?"enabled":"disabled"); 299e0a25b6dSSongjun Wu 300e0a25b6dSSongjun Wu return 0; 301e0a25b6dSSongjun Wu } 302e0a25b6dSSongjun Wu 30361abce13SQuentin Schulz static int atmel_classd_codec_resume(struct snd_soc_codec *codec) 30461abce13SQuentin Schulz { 30561abce13SQuentin Schulz struct snd_soc_card *card = snd_soc_codec_get_drvdata(codec); 30661abce13SQuentin Schulz struct atmel_classd *dd = snd_soc_card_get_drvdata(card); 30761abce13SQuentin Schulz 30861abce13SQuentin Schulz return regcache_sync(dd->regmap); 30961abce13SQuentin Schulz } 31061abce13SQuentin Schulz 311e0a25b6dSSongjun Wu static struct regmap *atmel_classd_codec_get_remap(struct device *dev) 312e0a25b6dSSongjun Wu { 313e0a25b6dSSongjun Wu return dev_get_regmap(dev, NULL); 314e0a25b6dSSongjun Wu } 315e0a25b6dSSongjun Wu 316e0a25b6dSSongjun Wu static struct snd_soc_codec_driver soc_codec_dev_classd = { 317e0a25b6dSSongjun Wu .probe = atmel_classd_codec_probe, 31861abce13SQuentin Schulz .resume = atmel_classd_codec_resume, 31969295df0SKuninori Morimoto .get_regmap = atmel_classd_codec_get_remap, 32069295df0SKuninori Morimoto .component_driver = { 321e0a25b6dSSongjun Wu .controls = atmel_classd_snd_controls, 322e0a25b6dSSongjun Wu .num_controls = ARRAY_SIZE(atmel_classd_snd_controls), 32369295df0SKuninori Morimoto }, 324e0a25b6dSSongjun Wu }; 325e0a25b6dSSongjun Wu 326e0a25b6dSSongjun Wu /* codec dai component */ 327e0a25b6dSSongjun Wu static int atmel_classd_codec_dai_startup(struct snd_pcm_substream *substream, 328e0a25b6dSSongjun Wu struct snd_soc_dai *codec_dai) 329e0a25b6dSSongjun Wu { 330e0a25b6dSSongjun Wu struct snd_soc_pcm_runtime *rtd = substream->private_data; 331e0a25b6dSSongjun Wu struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); 332e0a25b6dSSongjun Wu 333e0a25b6dSSongjun Wu return clk_prepare_enable(dd->gclk); 334e0a25b6dSSongjun Wu } 335e0a25b6dSSongjun Wu 336e0a25b6dSSongjun Wu static int atmel_classd_codec_dai_digital_mute(struct snd_soc_dai *codec_dai, 337e0a25b6dSSongjun Wu int mute) 338e0a25b6dSSongjun Wu { 339e0a25b6dSSongjun Wu struct snd_soc_codec *codec = codec_dai->codec; 340e0a25b6dSSongjun Wu u32 mask, val; 341e0a25b6dSSongjun Wu 342e0a25b6dSSongjun Wu mask = CLASSD_MR_LMUTE_MASK | CLASSD_MR_RMUTE_MASK; 343e0a25b6dSSongjun Wu 344e0a25b6dSSongjun Wu if (mute) 345e0a25b6dSSongjun Wu val = mask; 346e0a25b6dSSongjun Wu else 347e0a25b6dSSongjun Wu val = 0; 348e0a25b6dSSongjun Wu 349e0a25b6dSSongjun Wu snd_soc_update_bits(codec, CLASSD_MR, mask, val); 350e0a25b6dSSongjun Wu 351e0a25b6dSSongjun Wu return 0; 352e0a25b6dSSongjun Wu } 353e0a25b6dSSongjun Wu 3544ab6cf11SQuentin Schulz #define CLASSD_GCLK_RATE_11M2896_MPY_8 (112896 * 100 * 8) 3554ab6cf11SQuentin Schulz #define CLASSD_GCLK_RATE_12M288_MPY_8 (12288 * 1000 * 8) 356e0a25b6dSSongjun Wu 357e0a25b6dSSongjun Wu static struct { 358e0a25b6dSSongjun Wu int rate; 359e0a25b6dSSongjun Wu int sample_rate; 360e0a25b6dSSongjun Wu int dsp_clk; 3614ab6cf11SQuentin Schulz unsigned long gclk_rate; 362e0a25b6dSSongjun Wu } const sample_rates[] = { 363e0a25b6dSSongjun Wu { 8000, CLASSD_INTPMR_FRAME_8K, 3644ab6cf11SQuentin Schulz CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 }, 365e0a25b6dSSongjun Wu { 16000, CLASSD_INTPMR_FRAME_16K, 3664ab6cf11SQuentin Schulz CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 }, 367e0a25b6dSSongjun Wu { 32000, CLASSD_INTPMR_FRAME_32K, 3684ab6cf11SQuentin Schulz CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 }, 369e0a25b6dSSongjun Wu { 48000, CLASSD_INTPMR_FRAME_48K, 3704ab6cf11SQuentin Schulz CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 }, 371e0a25b6dSSongjun Wu { 96000, CLASSD_INTPMR_FRAME_96K, 3724ab6cf11SQuentin Schulz CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 }, 373e0a25b6dSSongjun Wu { 22050, CLASSD_INTPMR_FRAME_22K, 3744ab6cf11SQuentin Schulz CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 }, 375e0a25b6dSSongjun Wu { 44100, CLASSD_INTPMR_FRAME_44K, 3764ab6cf11SQuentin Schulz CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 }, 377e0a25b6dSSongjun Wu { 88200, CLASSD_INTPMR_FRAME_88K, 3784ab6cf11SQuentin Schulz CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 }, 379e0a25b6dSSongjun Wu }; 380e0a25b6dSSongjun Wu 381e0a25b6dSSongjun Wu static int 382e0a25b6dSSongjun Wu atmel_classd_codec_dai_hw_params(struct snd_pcm_substream *substream, 383e0a25b6dSSongjun Wu struct snd_pcm_hw_params *params, 384e0a25b6dSSongjun Wu struct snd_soc_dai *codec_dai) 385e0a25b6dSSongjun Wu { 386e0a25b6dSSongjun Wu struct snd_soc_pcm_runtime *rtd = substream->private_data; 387e0a25b6dSSongjun Wu struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); 388e0a25b6dSSongjun Wu struct snd_soc_codec *codec = codec_dai->codec; 389e0a25b6dSSongjun Wu int fs; 390e0a25b6dSSongjun Wu int i, best, best_val, cur_val, ret; 391e0a25b6dSSongjun Wu u32 mask, val; 392e0a25b6dSSongjun Wu 393e0a25b6dSSongjun Wu fs = params_rate(params); 394e0a25b6dSSongjun Wu 395e0a25b6dSSongjun Wu best = 0; 396e0a25b6dSSongjun Wu best_val = abs(fs - sample_rates[0].rate); 397e0a25b6dSSongjun Wu for (i = 1; i < ARRAY_SIZE(sample_rates); i++) { 398e0a25b6dSSongjun Wu /* Closest match */ 399e0a25b6dSSongjun Wu cur_val = abs(fs - sample_rates[i].rate); 400e0a25b6dSSongjun Wu if (cur_val < best_val) { 401e0a25b6dSSongjun Wu best = i; 402e0a25b6dSSongjun Wu best_val = cur_val; 403e0a25b6dSSongjun Wu } 404e0a25b6dSSongjun Wu } 405e0a25b6dSSongjun Wu 406e0a25b6dSSongjun Wu dev_dbg(codec->dev, 4074ab6cf11SQuentin Schulz "Selected SAMPLE_RATE of %dHz, GCLK_RATE of %ldHz\n", 4084ab6cf11SQuentin Schulz sample_rates[best].rate, sample_rates[best].gclk_rate); 409e0a25b6dSSongjun Wu 410e0a25b6dSSongjun Wu clk_disable_unprepare(dd->gclk); 411e0a25b6dSSongjun Wu 4124ab6cf11SQuentin Schulz ret = clk_set_rate(dd->gclk, sample_rates[best].gclk_rate); 413e0a25b6dSSongjun Wu if (ret) 414e0a25b6dSSongjun Wu return ret; 415e0a25b6dSSongjun Wu 416e0a25b6dSSongjun Wu mask = CLASSD_INTPMR_DSP_CLK_FREQ_MASK | CLASSD_INTPMR_FRAME_MASK; 417e0a25b6dSSongjun Wu val = (sample_rates[best].dsp_clk << CLASSD_INTPMR_DSP_CLK_FREQ_SHIFT) 418e0a25b6dSSongjun Wu | (sample_rates[best].sample_rate << CLASSD_INTPMR_FRAME_SHIFT); 419e0a25b6dSSongjun Wu 420e0a25b6dSSongjun Wu snd_soc_update_bits(codec, CLASSD_INTPMR, mask, val); 421e0a25b6dSSongjun Wu 422e0a25b6dSSongjun Wu return clk_prepare_enable(dd->gclk); 423e0a25b6dSSongjun Wu } 424e0a25b6dSSongjun Wu 425e0a25b6dSSongjun Wu static void 426e0a25b6dSSongjun Wu atmel_classd_codec_dai_shutdown(struct snd_pcm_substream *substream, 427e0a25b6dSSongjun Wu struct snd_soc_dai *codec_dai) 428e0a25b6dSSongjun Wu { 429e0a25b6dSSongjun Wu struct snd_soc_pcm_runtime *rtd = substream->private_data; 430e0a25b6dSSongjun Wu struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); 431e0a25b6dSSongjun Wu 432e0a25b6dSSongjun Wu clk_disable_unprepare(dd->gclk); 433e0a25b6dSSongjun Wu } 434e0a25b6dSSongjun Wu 435e0a25b6dSSongjun Wu static int atmel_classd_codec_dai_prepare(struct snd_pcm_substream *substream, 436e0a25b6dSSongjun Wu struct snd_soc_dai *codec_dai) 437e0a25b6dSSongjun Wu { 438e0a25b6dSSongjun Wu struct snd_soc_codec *codec = codec_dai->codec; 439e0a25b6dSSongjun Wu 440e0a25b6dSSongjun Wu snd_soc_update_bits(codec, CLASSD_MR, 441e0a25b6dSSongjun Wu CLASSD_MR_LEN_MASK | CLASSD_MR_REN_MASK, 442e0a25b6dSSongjun Wu (CLASSD_MR_LEN_DIS << CLASSD_MR_LEN_SHIFT) 443e0a25b6dSSongjun Wu |(CLASSD_MR_REN_DIS << CLASSD_MR_REN_SHIFT)); 444e0a25b6dSSongjun Wu 445e0a25b6dSSongjun Wu return 0; 446e0a25b6dSSongjun Wu } 447e0a25b6dSSongjun Wu 448e0a25b6dSSongjun Wu static int atmel_classd_codec_dai_trigger(struct snd_pcm_substream *substream, 449e0a25b6dSSongjun Wu int cmd, struct snd_soc_dai *codec_dai) 450e0a25b6dSSongjun Wu { 451e0a25b6dSSongjun Wu struct snd_soc_codec *codec = codec_dai->codec; 452e0a25b6dSSongjun Wu u32 mask, val; 453e0a25b6dSSongjun Wu 454e0a25b6dSSongjun Wu mask = CLASSD_MR_LEN_MASK | CLASSD_MR_REN_MASK; 455e0a25b6dSSongjun Wu 456e0a25b6dSSongjun Wu switch (cmd) { 457e0a25b6dSSongjun Wu case SNDRV_PCM_TRIGGER_START: 458e0a25b6dSSongjun Wu case SNDRV_PCM_TRIGGER_RESUME: 459e0a25b6dSSongjun Wu case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 460e0a25b6dSSongjun Wu val = mask; 461e0a25b6dSSongjun Wu break; 462e0a25b6dSSongjun Wu case SNDRV_PCM_TRIGGER_STOP: 463e0a25b6dSSongjun Wu case SNDRV_PCM_TRIGGER_SUSPEND: 464e0a25b6dSSongjun Wu case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 465e0a25b6dSSongjun Wu val = (CLASSD_MR_LEN_DIS << CLASSD_MR_LEN_SHIFT) 466e0a25b6dSSongjun Wu | (CLASSD_MR_REN_DIS << CLASSD_MR_REN_SHIFT); 467e0a25b6dSSongjun Wu break; 468e0a25b6dSSongjun Wu default: 469e0a25b6dSSongjun Wu return -EINVAL; 470e0a25b6dSSongjun Wu } 471e0a25b6dSSongjun Wu 472e0a25b6dSSongjun Wu snd_soc_update_bits(codec, CLASSD_MR, mask, val); 473e0a25b6dSSongjun Wu 474e0a25b6dSSongjun Wu return 0; 475e0a25b6dSSongjun Wu } 476e0a25b6dSSongjun Wu 477e0a25b6dSSongjun Wu static const struct snd_soc_dai_ops atmel_classd_codec_dai_ops = { 478e0a25b6dSSongjun Wu .digital_mute = atmel_classd_codec_dai_digital_mute, 479e0a25b6dSSongjun Wu .startup = atmel_classd_codec_dai_startup, 480e0a25b6dSSongjun Wu .shutdown = atmel_classd_codec_dai_shutdown, 481e0a25b6dSSongjun Wu .hw_params = atmel_classd_codec_dai_hw_params, 482e0a25b6dSSongjun Wu .prepare = atmel_classd_codec_dai_prepare, 483e0a25b6dSSongjun Wu .trigger = atmel_classd_codec_dai_trigger, 484e0a25b6dSSongjun Wu }; 485e0a25b6dSSongjun Wu 486e0a25b6dSSongjun Wu #define ATMEL_CLASSD_CODEC_DAI_NAME "atmel-classd-hifi" 487e0a25b6dSSongjun Wu 488e0a25b6dSSongjun Wu static struct snd_soc_dai_driver atmel_classd_codec_dai = { 489e0a25b6dSSongjun Wu .name = ATMEL_CLASSD_CODEC_DAI_NAME, 490e0a25b6dSSongjun Wu .playback = { 491e0a25b6dSSongjun Wu .stream_name = "Playback", 49207c55d39SSongjun Wu .channels_min = 1, 493e0a25b6dSSongjun Wu .channels_max = 2, 494e0a25b6dSSongjun Wu .rates = ATMEL_CLASSD_RATES, 495e0a25b6dSSongjun Wu .formats = SNDRV_PCM_FMTBIT_S16_LE, 496e0a25b6dSSongjun Wu }, 497e0a25b6dSSongjun Wu .ops = &atmel_classd_codec_dai_ops, 498e0a25b6dSSongjun Wu }; 499e0a25b6dSSongjun Wu 500e0a25b6dSSongjun Wu /* ASoC sound card */ 501e0a25b6dSSongjun Wu static int atmel_classd_asoc_card_init(struct device *dev, 502e0a25b6dSSongjun Wu struct snd_soc_card *card) 503e0a25b6dSSongjun Wu { 504e0a25b6dSSongjun Wu struct snd_soc_dai_link *dai_link; 505e0a25b6dSSongjun Wu struct atmel_classd *dd = snd_soc_card_get_drvdata(card); 506e0a25b6dSSongjun Wu 507e0a25b6dSSongjun Wu dai_link = devm_kzalloc(dev, sizeof(*dai_link), GFP_KERNEL); 508e0a25b6dSSongjun Wu if (!dai_link) 509e0a25b6dSSongjun Wu return -ENOMEM; 510e0a25b6dSSongjun Wu 511e0a25b6dSSongjun Wu dai_link->name = "CLASSD"; 512e0a25b6dSSongjun Wu dai_link->stream_name = "CLASSD PCM"; 513e0a25b6dSSongjun Wu dai_link->codec_dai_name = ATMEL_CLASSD_CODEC_DAI_NAME; 514e0a25b6dSSongjun Wu dai_link->cpu_dai_name = dev_name(dev); 515e0a25b6dSSongjun Wu dai_link->codec_name = dev_name(dev); 516e0a25b6dSSongjun Wu dai_link->platform_name = dev_name(dev); 517e0a25b6dSSongjun Wu 518e0a25b6dSSongjun Wu card->dai_link = dai_link; 519e0a25b6dSSongjun Wu card->num_links = 1; 520e0a25b6dSSongjun Wu card->name = dd->pdata->card_name; 521e0a25b6dSSongjun Wu card->dev = dev; 522e0a25b6dSSongjun Wu 523e0a25b6dSSongjun Wu return 0; 524e0a25b6dSSongjun Wu }; 525e0a25b6dSSongjun Wu 526e0a25b6dSSongjun Wu /* regmap configuration */ 527e0a25b6dSSongjun Wu static const struct reg_default atmel_classd_reg_defaults[] = { 528e0a25b6dSSongjun Wu { CLASSD_INTPMR, 0x00301212 }, 529e0a25b6dSSongjun Wu }; 530e0a25b6dSSongjun Wu 531e0a25b6dSSongjun Wu #define ATMEL_CLASSD_REG_MAX 0xE4 532e0a25b6dSSongjun Wu static const struct regmap_config atmel_classd_regmap_config = { 533e0a25b6dSSongjun Wu .reg_bits = 32, 534e0a25b6dSSongjun Wu .reg_stride = 4, 535e0a25b6dSSongjun Wu .val_bits = 32, 536e0a25b6dSSongjun Wu .max_register = ATMEL_CLASSD_REG_MAX, 537e0a25b6dSSongjun Wu 538e0a25b6dSSongjun Wu .cache_type = REGCACHE_FLAT, 539e0a25b6dSSongjun Wu .reg_defaults = atmel_classd_reg_defaults, 540e0a25b6dSSongjun Wu .num_reg_defaults = ARRAY_SIZE(atmel_classd_reg_defaults), 541e0a25b6dSSongjun Wu }; 542e0a25b6dSSongjun Wu 543e0a25b6dSSongjun Wu static int atmel_classd_probe(struct platform_device *pdev) 544e0a25b6dSSongjun Wu { 545e0a25b6dSSongjun Wu struct device *dev = &pdev->dev; 546e0a25b6dSSongjun Wu struct atmel_classd *dd; 547e0a25b6dSSongjun Wu struct resource *res; 548e0a25b6dSSongjun Wu void __iomem *io_base; 549e0a25b6dSSongjun Wu const struct atmel_classd_pdata *pdata; 550e0a25b6dSSongjun Wu struct snd_soc_card *card; 551e0a25b6dSSongjun Wu int ret; 552e0a25b6dSSongjun Wu 553e0a25b6dSSongjun Wu pdata = dev_get_platdata(dev); 554e0a25b6dSSongjun Wu if (!pdata) { 555e0a25b6dSSongjun Wu pdata = atmel_classd_dt_init(dev); 556e0a25b6dSSongjun Wu if (IS_ERR(pdata)) 557e0a25b6dSSongjun Wu return PTR_ERR(pdata); 558e0a25b6dSSongjun Wu } 559e0a25b6dSSongjun Wu 560e0a25b6dSSongjun Wu dd = devm_kzalloc(dev, sizeof(*dd), GFP_KERNEL); 561e0a25b6dSSongjun Wu if (!dd) 562e0a25b6dSSongjun Wu return -ENOMEM; 563e0a25b6dSSongjun Wu 564e0a25b6dSSongjun Wu dd->pdata = pdata; 565e0a25b6dSSongjun Wu 566e0a25b6dSSongjun Wu dd->irq = platform_get_irq(pdev, 0); 567e0a25b6dSSongjun Wu if (dd->irq < 0) { 568e0a25b6dSSongjun Wu ret = dd->irq; 569e0a25b6dSSongjun Wu dev_err(dev, "failed to could not get irq: %d\n", ret); 570e0a25b6dSSongjun Wu return ret; 571e0a25b6dSSongjun Wu } 572e0a25b6dSSongjun Wu 573e0a25b6dSSongjun Wu dd->pclk = devm_clk_get(dev, "pclk"); 574e0a25b6dSSongjun Wu if (IS_ERR(dd->pclk)) { 575e0a25b6dSSongjun Wu ret = PTR_ERR(dd->pclk); 576e0a25b6dSSongjun Wu dev_err(dev, "failed to get peripheral clock: %d\n", ret); 577e0a25b6dSSongjun Wu return ret; 578e0a25b6dSSongjun Wu } 579e0a25b6dSSongjun Wu 580e0a25b6dSSongjun Wu dd->gclk = devm_clk_get(dev, "gclk"); 581e0a25b6dSSongjun Wu if (IS_ERR(dd->gclk)) { 582e0a25b6dSSongjun Wu ret = PTR_ERR(dd->gclk); 583e0a25b6dSSongjun Wu dev_err(dev, "failed to get GCK clock: %d\n", ret); 584e0a25b6dSSongjun Wu return ret; 585e0a25b6dSSongjun Wu } 586e0a25b6dSSongjun Wu 587e0a25b6dSSongjun Wu res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 588e0a25b6dSSongjun Wu io_base = devm_ioremap_resource(dev, res); 589e0a25b6dSSongjun Wu if (IS_ERR(io_base)) { 590e0a25b6dSSongjun Wu ret = PTR_ERR(io_base); 591e0a25b6dSSongjun Wu dev_err(dev, "failed to remap register memory: %d\n", ret); 592e0a25b6dSSongjun Wu return ret; 593e0a25b6dSSongjun Wu } 594e0a25b6dSSongjun Wu 595e0a25b6dSSongjun Wu dd->phy_base = res->start; 596e0a25b6dSSongjun Wu 597e0a25b6dSSongjun Wu dd->regmap = devm_regmap_init_mmio(dev, io_base, 598e0a25b6dSSongjun Wu &atmel_classd_regmap_config); 599e0a25b6dSSongjun Wu if (IS_ERR(dd->regmap)) { 600e0a25b6dSSongjun Wu ret = PTR_ERR(dd->regmap); 601e0a25b6dSSongjun Wu dev_err(dev, "failed to init register map: %d\n", ret); 602e0a25b6dSSongjun Wu return ret; 603e0a25b6dSSongjun Wu } 604e0a25b6dSSongjun Wu 605e0a25b6dSSongjun Wu ret = devm_snd_soc_register_component(dev, 606e0a25b6dSSongjun Wu &atmel_classd_cpu_dai_component, 607e0a25b6dSSongjun Wu &atmel_classd_cpu_dai, 1); 608e0a25b6dSSongjun Wu if (ret) { 609e0a25b6dSSongjun Wu dev_err(dev, "could not register CPU DAI: %d\n", ret); 610e0a25b6dSSongjun Wu return ret; 611e0a25b6dSSongjun Wu } 612e0a25b6dSSongjun Wu 613e0a25b6dSSongjun Wu ret = devm_snd_dmaengine_pcm_register(dev, 614e0a25b6dSSongjun Wu &atmel_classd_dmaengine_pcm_config, 615e0a25b6dSSongjun Wu 0); 616e0a25b6dSSongjun Wu if (ret) { 617e0a25b6dSSongjun Wu dev_err(dev, "could not register platform: %d\n", ret); 618e0a25b6dSSongjun Wu return ret; 619e0a25b6dSSongjun Wu } 620e0a25b6dSSongjun Wu 621e0a25b6dSSongjun Wu ret = snd_soc_register_codec(dev, &soc_codec_dev_classd, 622e0a25b6dSSongjun Wu &atmel_classd_codec_dai, 1); 623e0a25b6dSSongjun Wu if (ret) { 624e0a25b6dSSongjun Wu dev_err(dev, "could not register codec: %d\n", ret); 625e0a25b6dSSongjun Wu return ret; 626e0a25b6dSSongjun Wu } 627e0a25b6dSSongjun Wu 628e0a25b6dSSongjun Wu /* register sound card */ 629e0a25b6dSSongjun Wu card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL); 63032e69badSSongjun Wu if (!card) { 63132e69badSSongjun Wu ret = -ENOMEM; 63232e69badSSongjun Wu goto unregister_codec; 63332e69badSSongjun Wu } 634e0a25b6dSSongjun Wu 635e0a25b6dSSongjun Wu snd_soc_card_set_drvdata(card, dd); 636e0a25b6dSSongjun Wu platform_set_drvdata(pdev, card); 637e0a25b6dSSongjun Wu 638e0a25b6dSSongjun Wu ret = atmel_classd_asoc_card_init(dev, card); 639e0a25b6dSSongjun Wu if (ret) { 640e0a25b6dSSongjun Wu dev_err(dev, "failed to init sound card\n"); 64132e69badSSongjun Wu goto unregister_codec; 642e0a25b6dSSongjun Wu } 643e0a25b6dSSongjun Wu 644e0a25b6dSSongjun Wu ret = devm_snd_soc_register_card(dev, card); 645e0a25b6dSSongjun Wu if (ret) { 646e0a25b6dSSongjun Wu dev_err(dev, "failed to register sound card: %d\n", ret); 64732e69badSSongjun Wu goto unregister_codec; 648e0a25b6dSSongjun Wu } 649e0a25b6dSSongjun Wu 650e0a25b6dSSongjun Wu return 0; 65132e69badSSongjun Wu 65232e69badSSongjun Wu unregister_codec: 65332e69badSSongjun Wu snd_soc_unregister_codec(dev); 65432e69badSSongjun Wu return ret; 655e0a25b6dSSongjun Wu } 656e0a25b6dSSongjun Wu 657e0a25b6dSSongjun Wu static int atmel_classd_remove(struct platform_device *pdev) 658e0a25b6dSSongjun Wu { 659e0a25b6dSSongjun Wu snd_soc_unregister_codec(&pdev->dev); 660e0a25b6dSSongjun Wu return 0; 661e0a25b6dSSongjun Wu } 662e0a25b6dSSongjun Wu 663e0a25b6dSSongjun Wu static struct platform_driver atmel_classd_driver = { 664e0a25b6dSSongjun Wu .driver = { 665e0a25b6dSSongjun Wu .name = "atmel-classd", 666e0a25b6dSSongjun Wu .of_match_table = of_match_ptr(atmel_classd_of_match), 667e0a25b6dSSongjun Wu .pm = &snd_soc_pm_ops, 668e0a25b6dSSongjun Wu }, 669e0a25b6dSSongjun Wu .probe = atmel_classd_probe, 670e0a25b6dSSongjun Wu .remove = atmel_classd_remove, 671e0a25b6dSSongjun Wu }; 672e0a25b6dSSongjun Wu module_platform_driver(atmel_classd_driver); 673e0a25b6dSSongjun Wu 674e0a25b6dSSongjun Wu MODULE_DESCRIPTION("Atmel ClassD driver under ALSA SoC architecture"); 675e0a25b6dSSongjun Wu MODULE_AUTHOR("Songjun Wu <songjun.wu@atmel.com>"); 676e0a25b6dSSongjun Wu MODULE_LICENSE("GPL"); 677