13a63cbb8SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later 2e0a25b6dSSongjun Wu /* Atmel ALSA SoC Audio Class D Amplifier (CLASSD) driver 3e0a25b6dSSongjun Wu * 4e0a25b6dSSongjun Wu * Copyright (C) 2015 Atmel 5e0a25b6dSSongjun Wu * 6e0a25b6dSSongjun Wu * Author: Songjun Wu <songjun.wu@atmel.com> 7e0a25b6dSSongjun Wu */ 8e0a25b6dSSongjun Wu 9e0a25b6dSSongjun Wu #include <linux/of.h> 10e0a25b6dSSongjun Wu #include <linux/clk.h> 11e0a25b6dSSongjun Wu #include <linux/module.h> 12e0a25b6dSSongjun Wu #include <linux/platform_device.h> 13e0a25b6dSSongjun Wu #include <linux/regmap.h> 14e0a25b6dSSongjun Wu #include <sound/core.h> 15e0a25b6dSSongjun Wu #include <sound/dmaengine_pcm.h> 16e0a25b6dSSongjun Wu #include <sound/pcm_params.h> 17e0a25b6dSSongjun Wu #include <sound/tlv.h> 18e0a25b6dSSongjun Wu #include "atmel-classd.h" 19e0a25b6dSSongjun Wu 20e0a25b6dSSongjun Wu struct atmel_classd_pdata { 21e0a25b6dSSongjun Wu bool non_overlap_enable; 22e0a25b6dSSongjun Wu int non_overlap_time; 23e0a25b6dSSongjun Wu int pwm_type; 24e0a25b6dSSongjun Wu const char *card_name; 25e0a25b6dSSongjun Wu }; 26e0a25b6dSSongjun Wu 27e0a25b6dSSongjun Wu struct atmel_classd { 28e0a25b6dSSongjun Wu dma_addr_t phy_base; 29e0a25b6dSSongjun Wu struct regmap *regmap; 30e0a25b6dSSongjun Wu struct clk *pclk; 31e0a25b6dSSongjun Wu struct clk *gclk; 326dea9df8SKuninori Morimoto struct device *dev; 33e0a25b6dSSongjun Wu int irq; 34e0a25b6dSSongjun Wu const struct atmel_classd_pdata *pdata; 35e0a25b6dSSongjun Wu }; 36e0a25b6dSSongjun Wu 37e0a25b6dSSongjun Wu #ifdef CONFIG_OF 38e0a25b6dSSongjun Wu static const struct of_device_id atmel_classd_of_match[] = { 39e0a25b6dSSongjun Wu { 40e0a25b6dSSongjun Wu .compatible = "atmel,sama5d2-classd", 41e0a25b6dSSongjun Wu }, { 42e0a25b6dSSongjun Wu /* sentinel */ 43e0a25b6dSSongjun Wu } 44e0a25b6dSSongjun Wu }; 45e0a25b6dSSongjun Wu MODULE_DEVICE_TABLE(of, atmel_classd_of_match); 46e0a25b6dSSongjun Wu 47e0a25b6dSSongjun Wu static struct atmel_classd_pdata *atmel_classd_dt_init(struct device *dev) 48e0a25b6dSSongjun Wu { 49e0a25b6dSSongjun Wu struct device_node *np = dev->of_node; 50e0a25b6dSSongjun Wu struct atmel_classd_pdata *pdata; 51e0a25b6dSSongjun Wu const char *pwm_type; 52e0a25b6dSSongjun Wu int ret; 53e0a25b6dSSongjun Wu 54e0a25b6dSSongjun Wu if (!np) { 55e0a25b6dSSongjun Wu dev_err(dev, "device node not found\n"); 56e0a25b6dSSongjun Wu return ERR_PTR(-EINVAL); 57e0a25b6dSSongjun Wu } 58e0a25b6dSSongjun Wu 59e0a25b6dSSongjun Wu pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); 60e0a25b6dSSongjun Wu if (!pdata) 61e0a25b6dSSongjun Wu return ERR_PTR(-ENOMEM); 62e0a25b6dSSongjun Wu 63e0a25b6dSSongjun Wu ret = of_property_read_string(np, "atmel,pwm-type", &pwm_type); 64e0a25b6dSSongjun Wu if ((ret == 0) && (strcmp(pwm_type, "diff") == 0)) 65e0a25b6dSSongjun Wu pdata->pwm_type = CLASSD_MR_PWMTYP_DIFF; 66e0a25b6dSSongjun Wu else 67e0a25b6dSSongjun Wu pdata->pwm_type = CLASSD_MR_PWMTYP_SINGLE; 68e0a25b6dSSongjun Wu 69e0a25b6dSSongjun Wu ret = of_property_read_u32(np, 70e0a25b6dSSongjun Wu "atmel,non-overlap-time", &pdata->non_overlap_time); 71e0a25b6dSSongjun Wu if (ret) 72e0a25b6dSSongjun Wu pdata->non_overlap_enable = false; 73e0a25b6dSSongjun Wu else 74e0a25b6dSSongjun Wu pdata->non_overlap_enable = true; 75e0a25b6dSSongjun Wu 76e0a25b6dSSongjun Wu ret = of_property_read_string(np, "atmel,model", &pdata->card_name); 77e0a25b6dSSongjun Wu if (ret) 78e0a25b6dSSongjun Wu pdata->card_name = "CLASSD"; 79e0a25b6dSSongjun Wu 80e0a25b6dSSongjun Wu return pdata; 81e0a25b6dSSongjun Wu } 82e0a25b6dSSongjun Wu #else 83e0a25b6dSSongjun Wu static inline struct atmel_classd_pdata * 84e0a25b6dSSongjun Wu atmel_classd_dt_init(struct device *dev) 85e0a25b6dSSongjun Wu { 86e0a25b6dSSongjun Wu return ERR_PTR(-EINVAL); 87e0a25b6dSSongjun Wu } 88e0a25b6dSSongjun Wu #endif 89e0a25b6dSSongjun Wu 90e0a25b6dSSongjun Wu #define ATMEL_CLASSD_RATES (SNDRV_PCM_RATE_8000 \ 91e0a25b6dSSongjun Wu | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 \ 92e0a25b6dSSongjun Wu | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 \ 93e0a25b6dSSongjun Wu | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 \ 94e0a25b6dSSongjun Wu | SNDRV_PCM_RATE_96000) 95e0a25b6dSSongjun Wu 96e0a25b6dSSongjun Wu static const struct snd_pcm_hardware atmel_classd_hw = { 97e0a25b6dSSongjun Wu .info = SNDRV_PCM_INFO_MMAP 98e0a25b6dSSongjun Wu | SNDRV_PCM_INFO_MMAP_VALID 99e0a25b6dSSongjun Wu | SNDRV_PCM_INFO_INTERLEAVED 100e0a25b6dSSongjun Wu | SNDRV_PCM_INFO_RESUME 101e0a25b6dSSongjun Wu | SNDRV_PCM_INFO_PAUSE, 102e0a25b6dSSongjun Wu .formats = (SNDRV_PCM_FMTBIT_S16_LE), 103e0a25b6dSSongjun Wu .rates = ATMEL_CLASSD_RATES, 104e0a25b6dSSongjun Wu .rate_min = 8000, 105e0a25b6dSSongjun Wu .rate_max = 96000, 10607c55d39SSongjun Wu .channels_min = 1, 107e0a25b6dSSongjun Wu .channels_max = 2, 108e0a25b6dSSongjun Wu .buffer_bytes_max = 64 * 1024, 109e0a25b6dSSongjun Wu .period_bytes_min = 256, 110e0a25b6dSSongjun Wu .period_bytes_max = 32 * 1024, 111e0a25b6dSSongjun Wu .periods_min = 2, 112e0a25b6dSSongjun Wu .periods_max = 256, 113e0a25b6dSSongjun Wu }; 114e0a25b6dSSongjun Wu 115e0a25b6dSSongjun Wu #define ATMEL_CLASSD_PREALLOC_BUF_SIZE (64 * 1024) 116e0a25b6dSSongjun Wu 117e0a25b6dSSongjun Wu /* cpu dai component */ 118e0a25b6dSSongjun Wu static int atmel_classd_cpu_dai_startup(struct snd_pcm_substream *substream, 119e0a25b6dSSongjun Wu struct snd_soc_dai *cpu_dai) 120e0a25b6dSSongjun Wu { 121e0a25b6dSSongjun Wu struct snd_soc_pcm_runtime *rtd = substream->private_data; 122e0a25b6dSSongjun Wu struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); 1231dfdbe73SCodrin Ciubotariu int err; 124e0a25b6dSSongjun Wu 125e0a25b6dSSongjun Wu regmap_write(dd->regmap, CLASSD_THR, 0x0); 126e0a25b6dSSongjun Wu 1271dfdbe73SCodrin Ciubotariu err = clk_prepare_enable(dd->pclk); 1281dfdbe73SCodrin Ciubotariu if (err) 1291dfdbe73SCodrin Ciubotariu return err; 1301dfdbe73SCodrin Ciubotariu err = clk_prepare_enable(dd->gclk); 1311dfdbe73SCodrin Ciubotariu if (err) { 132e0a25b6dSSongjun Wu clk_disable_unprepare(dd->pclk); 1331dfdbe73SCodrin Ciubotariu return err; 134e0a25b6dSSongjun Wu } 1351dfdbe73SCodrin Ciubotariu return 0; 1361dfdbe73SCodrin Ciubotariu } 137e0a25b6dSSongjun Wu 138e0a25b6dSSongjun Wu /* platform */ 139e0a25b6dSSongjun Wu static int 140e0a25b6dSSongjun Wu atmel_classd_platform_configure_dma(struct snd_pcm_substream *substream, 141e0a25b6dSSongjun Wu struct snd_pcm_hw_params *params, 142e0a25b6dSSongjun Wu struct dma_slave_config *slave_config) 143e0a25b6dSSongjun Wu { 144e0a25b6dSSongjun Wu struct snd_soc_pcm_runtime *rtd = substream->private_data; 145e0a25b6dSSongjun Wu struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); 146e0a25b6dSSongjun Wu 147e0a25b6dSSongjun Wu if (params_physical_width(params) != 16) { 1486dea9df8SKuninori Morimoto dev_err(dd->dev, 149e0a25b6dSSongjun Wu "only supports 16-bit audio data\n"); 150e0a25b6dSSongjun Wu return -EINVAL; 151e0a25b6dSSongjun Wu } 152e0a25b6dSSongjun Wu 15307c55d39SSongjun Wu if (params_channels(params) == 1) 15407c55d39SSongjun Wu slave_config->dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; 15507c55d39SSongjun Wu else 15607c55d39SSongjun Wu slave_config->dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; 15707c55d39SSongjun Wu 158e0a25b6dSSongjun Wu slave_config->direction = DMA_MEM_TO_DEV; 159e0a25b6dSSongjun Wu slave_config->dst_addr = dd->phy_base + CLASSD_THR; 160e0a25b6dSSongjun Wu slave_config->dst_maxburst = 1; 161e0a25b6dSSongjun Wu slave_config->src_maxburst = 1; 162e0a25b6dSSongjun Wu slave_config->device_fc = false; 163e0a25b6dSSongjun Wu 164e0a25b6dSSongjun Wu return 0; 165e0a25b6dSSongjun Wu } 166e0a25b6dSSongjun Wu 167e0a25b6dSSongjun Wu static const struct snd_dmaengine_pcm_config 168e0a25b6dSSongjun Wu atmel_classd_dmaengine_pcm_config = { 169e0a25b6dSSongjun Wu .prepare_slave_config = atmel_classd_platform_configure_dma, 170e0a25b6dSSongjun Wu .pcm_hardware = &atmel_classd_hw, 171e0a25b6dSSongjun Wu .prealloc_buffer_size = ATMEL_CLASSD_PREALLOC_BUF_SIZE, 172e0a25b6dSSongjun Wu }; 173e0a25b6dSSongjun Wu 174e0a25b6dSSongjun Wu /* codec */ 175e0a25b6dSSongjun Wu static const char * const mono_mode_text[] = { 176e0a25b6dSSongjun Wu "mix", "sat", "left", "right" 177e0a25b6dSSongjun Wu }; 178e0a25b6dSSongjun Wu 179e0a25b6dSSongjun Wu static SOC_ENUM_SINGLE_DECL(classd_mono_mode_enum, 180e0a25b6dSSongjun Wu CLASSD_INTPMR, CLASSD_INTPMR_MONO_MODE_SHIFT, 181e0a25b6dSSongjun Wu mono_mode_text); 182e0a25b6dSSongjun Wu 183e0a25b6dSSongjun Wu static const char * const eqcfg_text[] = { 184e0a25b6dSSongjun Wu "Treble-12dB", "Treble-6dB", 185e0a25b6dSSongjun Wu "Medium-8dB", "Medium-3dB", 186e0a25b6dSSongjun Wu "Bass-12dB", "Bass-6dB", 187e0a25b6dSSongjun Wu "0 dB", 188e0a25b6dSSongjun Wu "Bass+6dB", "Bass+12dB", 189e0a25b6dSSongjun Wu "Medium+3dB", "Medium+8dB", 190e0a25b6dSSongjun Wu "Treble+6dB", "Treble+12dB", 191e0a25b6dSSongjun Wu }; 192e0a25b6dSSongjun Wu 193e0a25b6dSSongjun Wu static const unsigned int eqcfg_value[] = { 194e0a25b6dSSongjun Wu CLASSD_INTPMR_EQCFG_T_CUT_12, CLASSD_INTPMR_EQCFG_T_CUT_6, 195e0a25b6dSSongjun Wu CLASSD_INTPMR_EQCFG_M_CUT_8, CLASSD_INTPMR_EQCFG_M_CUT_3, 196e0a25b6dSSongjun Wu CLASSD_INTPMR_EQCFG_B_CUT_12, CLASSD_INTPMR_EQCFG_B_CUT_6, 197e0a25b6dSSongjun Wu CLASSD_INTPMR_EQCFG_FLAT, 198e0a25b6dSSongjun Wu CLASSD_INTPMR_EQCFG_B_BOOST_6, CLASSD_INTPMR_EQCFG_B_BOOST_12, 199e0a25b6dSSongjun Wu CLASSD_INTPMR_EQCFG_M_BOOST_3, CLASSD_INTPMR_EQCFG_M_BOOST_8, 200e0a25b6dSSongjun Wu CLASSD_INTPMR_EQCFG_T_BOOST_6, CLASSD_INTPMR_EQCFG_T_BOOST_12, 201e0a25b6dSSongjun Wu }; 202e0a25b6dSSongjun Wu 203e0a25b6dSSongjun Wu static SOC_VALUE_ENUM_SINGLE_DECL(classd_eqcfg_enum, 204e0a25b6dSSongjun Wu CLASSD_INTPMR, CLASSD_INTPMR_EQCFG_SHIFT, 0xf, 205e0a25b6dSSongjun Wu eqcfg_text, eqcfg_value); 206e0a25b6dSSongjun Wu 207e0a25b6dSSongjun Wu static const DECLARE_TLV_DB_SCALE(classd_digital_tlv, -7800, 100, 1); 208e0a25b6dSSongjun Wu 209e0a25b6dSSongjun Wu static const struct snd_kcontrol_new atmel_classd_snd_controls[] = { 210e0a25b6dSSongjun Wu SOC_DOUBLE_TLV("Playback Volume", CLASSD_INTPMR, 211e0a25b6dSSongjun Wu CLASSD_INTPMR_ATTL_SHIFT, CLASSD_INTPMR_ATTR_SHIFT, 212e0a25b6dSSongjun Wu 78, 1, classd_digital_tlv), 213e0a25b6dSSongjun Wu 214e0a25b6dSSongjun Wu SOC_SINGLE("Deemphasis Switch", CLASSD_INTPMR, 215e0a25b6dSSongjun Wu CLASSD_INTPMR_DEEMP_SHIFT, 1, 0), 216e0a25b6dSSongjun Wu 217e0a25b6dSSongjun Wu SOC_SINGLE("Mono Switch", CLASSD_INTPMR, CLASSD_INTPMR_MONO_SHIFT, 1, 0), 218e0a25b6dSSongjun Wu 219e0a25b6dSSongjun Wu SOC_SINGLE("Swap Switch", CLASSD_INTPMR, CLASSD_INTPMR_SWAP_SHIFT, 1, 0), 220e0a25b6dSSongjun Wu 221e0a25b6dSSongjun Wu SOC_ENUM("Mono Mode", classd_mono_mode_enum), 222e0a25b6dSSongjun Wu 223e0a25b6dSSongjun Wu SOC_ENUM("EQ", classd_eqcfg_enum), 224e0a25b6dSSongjun Wu }; 225e0a25b6dSSongjun Wu 226e0a25b6dSSongjun Wu static const char * const pwm_type[] = { 227e0a25b6dSSongjun Wu "Single ended", "Differential" 228e0a25b6dSSongjun Wu }; 229e0a25b6dSSongjun Wu 2301e8ba922SKuninori Morimoto static int atmel_classd_component_probe(struct snd_soc_component *component) 231e0a25b6dSSongjun Wu { 2321e8ba922SKuninori Morimoto struct snd_soc_card *card = snd_soc_component_get_drvdata(component); 233e0a25b6dSSongjun Wu struct atmel_classd *dd = snd_soc_card_get_drvdata(card); 234e0a25b6dSSongjun Wu const struct atmel_classd_pdata *pdata = dd->pdata; 235e0a25b6dSSongjun Wu u32 mask, val; 236e0a25b6dSSongjun Wu 237e0a25b6dSSongjun Wu mask = CLASSD_MR_PWMTYP_MASK; 238e0a25b6dSSongjun Wu val = pdata->pwm_type << CLASSD_MR_PWMTYP_SHIFT; 239e0a25b6dSSongjun Wu 240e0a25b6dSSongjun Wu mask |= CLASSD_MR_NON_OVERLAP_MASK; 241e0a25b6dSSongjun Wu if (pdata->non_overlap_enable) { 242e0a25b6dSSongjun Wu val |= (CLASSD_MR_NON_OVERLAP_EN 243e0a25b6dSSongjun Wu << CLASSD_MR_NON_OVERLAP_SHIFT); 244e0a25b6dSSongjun Wu 245e0a25b6dSSongjun Wu mask |= CLASSD_MR_NOVR_VAL_MASK; 246e0a25b6dSSongjun Wu switch (pdata->non_overlap_time) { 247e0a25b6dSSongjun Wu case 5: 248e0a25b6dSSongjun Wu val |= (CLASSD_MR_NOVR_VAL_5NS 249e0a25b6dSSongjun Wu << CLASSD_MR_NOVR_VAL_SHIFT); 250e0a25b6dSSongjun Wu break; 251e0a25b6dSSongjun Wu case 10: 252e0a25b6dSSongjun Wu val |= (CLASSD_MR_NOVR_VAL_10NS 253e0a25b6dSSongjun Wu << CLASSD_MR_NOVR_VAL_SHIFT); 254e0a25b6dSSongjun Wu break; 255e0a25b6dSSongjun Wu case 15: 256e0a25b6dSSongjun Wu val |= (CLASSD_MR_NOVR_VAL_15NS 257e0a25b6dSSongjun Wu << CLASSD_MR_NOVR_VAL_SHIFT); 258e0a25b6dSSongjun Wu break; 259e0a25b6dSSongjun Wu case 20: 260e0a25b6dSSongjun Wu val |= (CLASSD_MR_NOVR_VAL_20NS 261e0a25b6dSSongjun Wu << CLASSD_MR_NOVR_VAL_SHIFT); 262e0a25b6dSSongjun Wu break; 263e0a25b6dSSongjun Wu default: 264e0a25b6dSSongjun Wu val |= (CLASSD_MR_NOVR_VAL_10NS 265e0a25b6dSSongjun Wu << CLASSD_MR_NOVR_VAL_SHIFT); 2661e8ba922SKuninori Morimoto dev_warn(component->dev, 267e0a25b6dSSongjun Wu "non-overlapping value %d is invalid, the default value 10 is specified\n", 268e0a25b6dSSongjun Wu pdata->non_overlap_time); 269e0a25b6dSSongjun Wu break; 270e0a25b6dSSongjun Wu } 271e0a25b6dSSongjun Wu } 272e0a25b6dSSongjun Wu 2731e8ba922SKuninori Morimoto snd_soc_component_update_bits(component, CLASSD_MR, mask, val); 274e0a25b6dSSongjun Wu 2751e8ba922SKuninori Morimoto dev_info(component->dev, 276e0a25b6dSSongjun Wu "PWM modulation type is %s, non-overlapping is %s\n", 277e0a25b6dSSongjun Wu pwm_type[pdata->pwm_type], 278e0a25b6dSSongjun Wu pdata->non_overlap_enable?"enabled":"disabled"); 279e0a25b6dSSongjun Wu 280e0a25b6dSSongjun Wu return 0; 281e0a25b6dSSongjun Wu } 282e0a25b6dSSongjun Wu 2831e8ba922SKuninori Morimoto static int atmel_classd_component_resume(struct snd_soc_component *component) 28461abce13SQuentin Schulz { 2851e8ba922SKuninori Morimoto struct snd_soc_card *card = snd_soc_component_get_drvdata(component); 28661abce13SQuentin Schulz struct atmel_classd *dd = snd_soc_card_get_drvdata(card); 28761abce13SQuentin Schulz 28861abce13SQuentin Schulz return regcache_sync(dd->regmap); 28961abce13SQuentin Schulz } 29061abce13SQuentin Schulz 2911dfdbe73SCodrin Ciubotariu static int atmel_classd_cpu_dai_digital_mute(struct snd_soc_dai *cpu_dai, 292e0a25b6dSSongjun Wu int mute) 293e0a25b6dSSongjun Wu { 2941dfdbe73SCodrin Ciubotariu struct snd_soc_component *component = cpu_dai->component; 295e0a25b6dSSongjun Wu u32 mask, val; 296e0a25b6dSSongjun Wu 297e0a25b6dSSongjun Wu mask = CLASSD_MR_LMUTE_MASK | CLASSD_MR_RMUTE_MASK; 298e0a25b6dSSongjun Wu 299e0a25b6dSSongjun Wu if (mute) 300e0a25b6dSSongjun Wu val = mask; 301e0a25b6dSSongjun Wu else 302e0a25b6dSSongjun Wu val = 0; 303e0a25b6dSSongjun Wu 3041e8ba922SKuninori Morimoto snd_soc_component_update_bits(component, CLASSD_MR, mask, val); 305e0a25b6dSSongjun Wu 306e0a25b6dSSongjun Wu return 0; 307e0a25b6dSSongjun Wu } 308e0a25b6dSSongjun Wu 3094ab6cf11SQuentin Schulz #define CLASSD_GCLK_RATE_11M2896_MPY_8 (112896 * 100 * 8) 3104ab6cf11SQuentin Schulz #define CLASSD_GCLK_RATE_12M288_MPY_8 (12288 * 1000 * 8) 311e0a25b6dSSongjun Wu 312e0a25b6dSSongjun Wu static struct { 313e0a25b6dSSongjun Wu int rate; 314e0a25b6dSSongjun Wu int sample_rate; 315e0a25b6dSSongjun Wu int dsp_clk; 3164ab6cf11SQuentin Schulz unsigned long gclk_rate; 317e0a25b6dSSongjun Wu } const sample_rates[] = { 318e0a25b6dSSongjun Wu { 8000, CLASSD_INTPMR_FRAME_8K, 3194ab6cf11SQuentin Schulz CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 }, 320e0a25b6dSSongjun Wu { 16000, CLASSD_INTPMR_FRAME_16K, 3214ab6cf11SQuentin Schulz CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 }, 322e0a25b6dSSongjun Wu { 32000, CLASSD_INTPMR_FRAME_32K, 3234ab6cf11SQuentin Schulz CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 }, 324e0a25b6dSSongjun Wu { 48000, CLASSD_INTPMR_FRAME_48K, 3254ab6cf11SQuentin Schulz CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 }, 326e0a25b6dSSongjun Wu { 96000, CLASSD_INTPMR_FRAME_96K, 3274ab6cf11SQuentin Schulz CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 }, 328e0a25b6dSSongjun Wu { 22050, CLASSD_INTPMR_FRAME_22K, 3294ab6cf11SQuentin Schulz CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 }, 330e0a25b6dSSongjun Wu { 44100, CLASSD_INTPMR_FRAME_44K, 3314ab6cf11SQuentin Schulz CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 }, 332e0a25b6dSSongjun Wu { 88200, CLASSD_INTPMR_FRAME_88K, 3334ab6cf11SQuentin Schulz CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 }, 334e0a25b6dSSongjun Wu }; 335e0a25b6dSSongjun Wu 336e0a25b6dSSongjun Wu static int 3371dfdbe73SCodrin Ciubotariu atmel_classd_cpu_dai_hw_params(struct snd_pcm_substream *substream, 338e0a25b6dSSongjun Wu struct snd_pcm_hw_params *params, 3391dfdbe73SCodrin Ciubotariu struct snd_soc_dai *cpu_dai) 340e0a25b6dSSongjun Wu { 341e0a25b6dSSongjun Wu struct snd_soc_pcm_runtime *rtd = substream->private_data; 342e0a25b6dSSongjun Wu struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); 3431dfdbe73SCodrin Ciubotariu struct snd_soc_component *component = cpu_dai->component; 344e0a25b6dSSongjun Wu int fs; 345e0a25b6dSSongjun Wu int i, best, best_val, cur_val, ret; 346e0a25b6dSSongjun Wu u32 mask, val; 347e0a25b6dSSongjun Wu 348e0a25b6dSSongjun Wu fs = params_rate(params); 349e0a25b6dSSongjun Wu 350e0a25b6dSSongjun Wu best = 0; 351e0a25b6dSSongjun Wu best_val = abs(fs - sample_rates[0].rate); 352e0a25b6dSSongjun Wu for (i = 1; i < ARRAY_SIZE(sample_rates); i++) { 353e0a25b6dSSongjun Wu /* Closest match */ 354e0a25b6dSSongjun Wu cur_val = abs(fs - sample_rates[i].rate); 355e0a25b6dSSongjun Wu if (cur_val < best_val) { 356e0a25b6dSSongjun Wu best = i; 357e0a25b6dSSongjun Wu best_val = cur_val; 358e0a25b6dSSongjun Wu } 359e0a25b6dSSongjun Wu } 360e0a25b6dSSongjun Wu 3611e8ba922SKuninori Morimoto dev_dbg(component->dev, 3624ab6cf11SQuentin Schulz "Selected SAMPLE_RATE of %dHz, GCLK_RATE of %ldHz\n", 3634ab6cf11SQuentin Schulz sample_rates[best].rate, sample_rates[best].gclk_rate); 364e0a25b6dSSongjun Wu 365e0a25b6dSSongjun Wu clk_disable_unprepare(dd->gclk); 366e0a25b6dSSongjun Wu 3674ab6cf11SQuentin Schulz ret = clk_set_rate(dd->gclk, sample_rates[best].gclk_rate); 368e0a25b6dSSongjun Wu if (ret) 369e0a25b6dSSongjun Wu return ret; 370e0a25b6dSSongjun Wu 371e0a25b6dSSongjun Wu mask = CLASSD_INTPMR_DSP_CLK_FREQ_MASK | CLASSD_INTPMR_FRAME_MASK; 372e0a25b6dSSongjun Wu val = (sample_rates[best].dsp_clk << CLASSD_INTPMR_DSP_CLK_FREQ_SHIFT) 373e0a25b6dSSongjun Wu | (sample_rates[best].sample_rate << CLASSD_INTPMR_FRAME_SHIFT); 374e0a25b6dSSongjun Wu 3751e8ba922SKuninori Morimoto snd_soc_component_update_bits(component, CLASSD_INTPMR, mask, val); 376e0a25b6dSSongjun Wu 377e0a25b6dSSongjun Wu return clk_prepare_enable(dd->gclk); 378e0a25b6dSSongjun Wu } 379e0a25b6dSSongjun Wu 380e0a25b6dSSongjun Wu static void 3811dfdbe73SCodrin Ciubotariu atmel_classd_cpu_dai_shutdown(struct snd_pcm_substream *substream, 3821dfdbe73SCodrin Ciubotariu struct snd_soc_dai *cpu_dai) 383e0a25b6dSSongjun Wu { 384e0a25b6dSSongjun Wu struct snd_soc_pcm_runtime *rtd = substream->private_data; 385e0a25b6dSSongjun Wu struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); 386e0a25b6dSSongjun Wu 387e0a25b6dSSongjun Wu clk_disable_unprepare(dd->gclk); 388e0a25b6dSSongjun Wu } 389e0a25b6dSSongjun Wu 3901dfdbe73SCodrin Ciubotariu static int atmel_classd_cpu_dai_prepare(struct snd_pcm_substream *substream, 3911dfdbe73SCodrin Ciubotariu struct snd_soc_dai *cpu_dai) 392e0a25b6dSSongjun Wu { 3931dfdbe73SCodrin Ciubotariu struct snd_soc_component *component = cpu_dai->component; 394e0a25b6dSSongjun Wu 3951e8ba922SKuninori Morimoto snd_soc_component_update_bits(component, CLASSD_MR, 396e0a25b6dSSongjun Wu CLASSD_MR_LEN_MASK | CLASSD_MR_REN_MASK, 397e0a25b6dSSongjun Wu (CLASSD_MR_LEN_DIS << CLASSD_MR_LEN_SHIFT) 398e0a25b6dSSongjun Wu |(CLASSD_MR_REN_DIS << CLASSD_MR_REN_SHIFT)); 399e0a25b6dSSongjun Wu 400e0a25b6dSSongjun Wu return 0; 401e0a25b6dSSongjun Wu } 402e0a25b6dSSongjun Wu 4031dfdbe73SCodrin Ciubotariu static int atmel_classd_cpu_dai_trigger(struct snd_pcm_substream *substream, 4041dfdbe73SCodrin Ciubotariu int cmd, struct snd_soc_dai *cpu_dai) 405e0a25b6dSSongjun Wu { 4061dfdbe73SCodrin Ciubotariu struct snd_soc_component *component = cpu_dai->component; 407e0a25b6dSSongjun Wu u32 mask, val; 408e0a25b6dSSongjun Wu 409e0a25b6dSSongjun Wu mask = CLASSD_MR_LEN_MASK | CLASSD_MR_REN_MASK; 410e0a25b6dSSongjun Wu 411e0a25b6dSSongjun Wu switch (cmd) { 412e0a25b6dSSongjun Wu case SNDRV_PCM_TRIGGER_START: 413e0a25b6dSSongjun Wu case SNDRV_PCM_TRIGGER_RESUME: 414e0a25b6dSSongjun Wu case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 415e0a25b6dSSongjun Wu val = mask; 416e0a25b6dSSongjun Wu break; 417e0a25b6dSSongjun Wu case SNDRV_PCM_TRIGGER_STOP: 418e0a25b6dSSongjun Wu case SNDRV_PCM_TRIGGER_SUSPEND: 419e0a25b6dSSongjun Wu case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 420e0a25b6dSSongjun Wu val = (CLASSD_MR_LEN_DIS << CLASSD_MR_LEN_SHIFT) 421e0a25b6dSSongjun Wu | (CLASSD_MR_REN_DIS << CLASSD_MR_REN_SHIFT); 422e0a25b6dSSongjun Wu break; 423e0a25b6dSSongjun Wu default: 424e0a25b6dSSongjun Wu return -EINVAL; 425e0a25b6dSSongjun Wu } 426e0a25b6dSSongjun Wu 4271e8ba922SKuninori Morimoto snd_soc_component_update_bits(component, CLASSD_MR, mask, val); 428e0a25b6dSSongjun Wu 429e0a25b6dSSongjun Wu return 0; 430e0a25b6dSSongjun Wu } 431e0a25b6dSSongjun Wu 4321dfdbe73SCodrin Ciubotariu static const struct snd_soc_dai_ops atmel_classd_cpu_dai_ops = { 4331dfdbe73SCodrin Ciubotariu .startup = atmel_classd_cpu_dai_startup, 4341dfdbe73SCodrin Ciubotariu .shutdown = atmel_classd_cpu_dai_shutdown, 4351dfdbe73SCodrin Ciubotariu .digital_mute = atmel_classd_cpu_dai_digital_mute, 4361dfdbe73SCodrin Ciubotariu .hw_params = atmel_classd_cpu_dai_hw_params, 4371dfdbe73SCodrin Ciubotariu .prepare = atmel_classd_cpu_dai_prepare, 4381dfdbe73SCodrin Ciubotariu .trigger = atmel_classd_cpu_dai_trigger, 439e0a25b6dSSongjun Wu }; 440e0a25b6dSSongjun Wu 4411dfdbe73SCodrin Ciubotariu static struct snd_soc_dai_driver atmel_classd_cpu_dai = { 442e0a25b6dSSongjun Wu .playback = { 443e0a25b6dSSongjun Wu .stream_name = "Playback", 44407c55d39SSongjun Wu .channels_min = 1, 445e0a25b6dSSongjun Wu .channels_max = 2, 446e0a25b6dSSongjun Wu .rates = ATMEL_CLASSD_RATES, 447e0a25b6dSSongjun Wu .formats = SNDRV_PCM_FMTBIT_S16_LE, 448e0a25b6dSSongjun Wu }, 4491dfdbe73SCodrin Ciubotariu .ops = &atmel_classd_cpu_dai_ops, 4501dfdbe73SCodrin Ciubotariu }; 4511dfdbe73SCodrin Ciubotariu 4521dfdbe73SCodrin Ciubotariu static const struct snd_soc_component_driver atmel_classd_cpu_dai_component = { 4531dfdbe73SCodrin Ciubotariu .name = "atmel-classd", 4541dfdbe73SCodrin Ciubotariu .probe = atmel_classd_component_probe, 4551dfdbe73SCodrin Ciubotariu .resume = atmel_classd_component_resume, 4561dfdbe73SCodrin Ciubotariu .controls = atmel_classd_snd_controls, 4571dfdbe73SCodrin Ciubotariu .num_controls = ARRAY_SIZE(atmel_classd_snd_controls), 4581dfdbe73SCodrin Ciubotariu .idle_bias_on = 1, 4591dfdbe73SCodrin Ciubotariu .use_pmdown_time = 1, 4601dfdbe73SCodrin Ciubotariu .endianness = 1, 461e0a25b6dSSongjun Wu }; 462e0a25b6dSSongjun Wu 463e0a25b6dSSongjun Wu /* ASoC sound card */ 464e0a25b6dSSongjun Wu static int atmel_classd_asoc_card_init(struct device *dev, 465e0a25b6dSSongjun Wu struct snd_soc_card *card) 466e0a25b6dSSongjun Wu { 467e0a25b6dSSongjun Wu struct snd_soc_dai_link *dai_link; 468e0a25b6dSSongjun Wu struct atmel_classd *dd = snd_soc_card_get_drvdata(card); 4693d14a1dfSKuninori Morimoto struct snd_soc_dai_link_component *comp; 470e0a25b6dSSongjun Wu 471e0a25b6dSSongjun Wu dai_link = devm_kzalloc(dev, sizeof(*dai_link), GFP_KERNEL); 472e0a25b6dSSongjun Wu if (!dai_link) 473e0a25b6dSSongjun Wu return -ENOMEM; 474e0a25b6dSSongjun Wu 475ca1c67d1SKuninori Morimoto comp = devm_kzalloc(dev, 3 * sizeof(*comp), GFP_KERNEL); 4763d14a1dfSKuninori Morimoto if (!comp) 4773d14a1dfSKuninori Morimoto return -ENOMEM; 4783d14a1dfSKuninori Morimoto 4793d14a1dfSKuninori Morimoto dai_link->cpus = &comp[0]; 4803d14a1dfSKuninori Morimoto dai_link->codecs = &comp[1]; 481ca1c67d1SKuninori Morimoto dai_link->platforms = &comp[2]; 4823d14a1dfSKuninori Morimoto 4833d14a1dfSKuninori Morimoto dai_link->num_cpus = 1; 4843d14a1dfSKuninori Morimoto dai_link->num_codecs = 1; 485ca1c67d1SKuninori Morimoto dai_link->num_platforms = 1; 4863d14a1dfSKuninori Morimoto 487e0a25b6dSSongjun Wu dai_link->name = "CLASSD"; 488e0a25b6dSSongjun Wu dai_link->stream_name = "CLASSD PCM"; 4891dfdbe73SCodrin Ciubotariu dai_link->codecs->dai_name = "snd-soc-dummy-dai"; 4903d14a1dfSKuninori Morimoto dai_link->cpus->dai_name = dev_name(dev); 4911dfdbe73SCodrin Ciubotariu dai_link->codecs->name = "snd-soc-dummy"; 492ca1c67d1SKuninori Morimoto dai_link->platforms->name = dev_name(dev); 493e0a25b6dSSongjun Wu 494e0a25b6dSSongjun Wu card->dai_link = dai_link; 495e0a25b6dSSongjun Wu card->num_links = 1; 496e0a25b6dSSongjun Wu card->name = dd->pdata->card_name; 497e0a25b6dSSongjun Wu card->dev = dev; 498e0a25b6dSSongjun Wu 499e0a25b6dSSongjun Wu return 0; 500e0a25b6dSSongjun Wu }; 501e0a25b6dSSongjun Wu 502e0a25b6dSSongjun Wu /* regmap configuration */ 503e0a25b6dSSongjun Wu static const struct reg_default atmel_classd_reg_defaults[] = { 504e0a25b6dSSongjun Wu { CLASSD_INTPMR, 0x00301212 }, 505e0a25b6dSSongjun Wu }; 506e0a25b6dSSongjun Wu 507e0a25b6dSSongjun Wu #define ATMEL_CLASSD_REG_MAX 0xE4 508e0a25b6dSSongjun Wu static const struct regmap_config atmel_classd_regmap_config = { 509e0a25b6dSSongjun Wu .reg_bits = 32, 510e0a25b6dSSongjun Wu .reg_stride = 4, 511e0a25b6dSSongjun Wu .val_bits = 32, 512e0a25b6dSSongjun Wu .max_register = ATMEL_CLASSD_REG_MAX, 513e0a25b6dSSongjun Wu 514e0a25b6dSSongjun Wu .cache_type = REGCACHE_FLAT, 515e0a25b6dSSongjun Wu .reg_defaults = atmel_classd_reg_defaults, 516e0a25b6dSSongjun Wu .num_reg_defaults = ARRAY_SIZE(atmel_classd_reg_defaults), 517e0a25b6dSSongjun Wu }; 518e0a25b6dSSongjun Wu 519e0a25b6dSSongjun Wu static int atmel_classd_probe(struct platform_device *pdev) 520e0a25b6dSSongjun Wu { 521e0a25b6dSSongjun Wu struct device *dev = &pdev->dev; 522e0a25b6dSSongjun Wu struct atmel_classd *dd; 523e0a25b6dSSongjun Wu struct resource *res; 524e0a25b6dSSongjun Wu void __iomem *io_base; 525e0a25b6dSSongjun Wu const struct atmel_classd_pdata *pdata; 526e0a25b6dSSongjun Wu struct snd_soc_card *card; 527e0a25b6dSSongjun Wu int ret; 528e0a25b6dSSongjun Wu 529e0a25b6dSSongjun Wu pdata = dev_get_platdata(dev); 530e0a25b6dSSongjun Wu if (!pdata) { 531e0a25b6dSSongjun Wu pdata = atmel_classd_dt_init(dev); 532e0a25b6dSSongjun Wu if (IS_ERR(pdata)) 533e0a25b6dSSongjun Wu return PTR_ERR(pdata); 534e0a25b6dSSongjun Wu } 535e0a25b6dSSongjun Wu 536e0a25b6dSSongjun Wu dd = devm_kzalloc(dev, sizeof(*dd), GFP_KERNEL); 537e0a25b6dSSongjun Wu if (!dd) 538e0a25b6dSSongjun Wu return -ENOMEM; 539e0a25b6dSSongjun Wu 540e0a25b6dSSongjun Wu dd->pdata = pdata; 541e0a25b6dSSongjun Wu 542e0a25b6dSSongjun Wu dd->irq = platform_get_irq(pdev, 0); 543cf9441adSStephen Boyd if (dd->irq < 0) 544cf9441adSStephen Boyd return dd->irq; 545e0a25b6dSSongjun Wu 546e0a25b6dSSongjun Wu dd->pclk = devm_clk_get(dev, "pclk"); 547e0a25b6dSSongjun Wu if (IS_ERR(dd->pclk)) { 548e0a25b6dSSongjun Wu ret = PTR_ERR(dd->pclk); 549e0a25b6dSSongjun Wu dev_err(dev, "failed to get peripheral clock: %d\n", ret); 550e0a25b6dSSongjun Wu return ret; 551e0a25b6dSSongjun Wu } 552e0a25b6dSSongjun Wu 553e0a25b6dSSongjun Wu dd->gclk = devm_clk_get(dev, "gclk"); 554e0a25b6dSSongjun Wu if (IS_ERR(dd->gclk)) { 555e0a25b6dSSongjun Wu ret = PTR_ERR(dd->gclk); 556e0a25b6dSSongjun Wu dev_err(dev, "failed to get GCK clock: %d\n", ret); 557e0a25b6dSSongjun Wu return ret; 558e0a25b6dSSongjun Wu } 559e0a25b6dSSongjun Wu 560e0a25b6dSSongjun Wu res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 561e0a25b6dSSongjun Wu io_base = devm_ioremap_resource(dev, res); 5621f598e68SLadislav Michl if (IS_ERR(io_base)) 5631f598e68SLadislav Michl return PTR_ERR(io_base); 564e0a25b6dSSongjun Wu 565e0a25b6dSSongjun Wu dd->phy_base = res->start; 5666dea9df8SKuninori Morimoto dd->dev = dev; 567e0a25b6dSSongjun Wu 568e0a25b6dSSongjun Wu dd->regmap = devm_regmap_init_mmio(dev, io_base, 569e0a25b6dSSongjun Wu &atmel_classd_regmap_config); 570e0a25b6dSSongjun Wu if (IS_ERR(dd->regmap)) { 571e0a25b6dSSongjun Wu ret = PTR_ERR(dd->regmap); 572e0a25b6dSSongjun Wu dev_err(dev, "failed to init register map: %d\n", ret); 573e0a25b6dSSongjun Wu return ret; 574e0a25b6dSSongjun Wu } 575e0a25b6dSSongjun Wu 576e0a25b6dSSongjun Wu ret = devm_snd_soc_register_component(dev, 577e0a25b6dSSongjun Wu &atmel_classd_cpu_dai_component, 578e0a25b6dSSongjun Wu &atmel_classd_cpu_dai, 1); 579e0a25b6dSSongjun Wu if (ret) { 580e0a25b6dSSongjun Wu dev_err(dev, "could not register CPU DAI: %d\n", ret); 581e0a25b6dSSongjun Wu return ret; 582e0a25b6dSSongjun Wu } 583e0a25b6dSSongjun Wu 584e0a25b6dSSongjun Wu ret = devm_snd_dmaengine_pcm_register(dev, 585e0a25b6dSSongjun Wu &atmel_classd_dmaengine_pcm_config, 586e0a25b6dSSongjun Wu 0); 587e0a25b6dSSongjun Wu if (ret) { 588e0a25b6dSSongjun Wu dev_err(dev, "could not register platform: %d\n", ret); 589e0a25b6dSSongjun Wu return ret; 590e0a25b6dSSongjun Wu } 591e0a25b6dSSongjun Wu 592e0a25b6dSSongjun Wu /* register sound card */ 593e0a25b6dSSongjun Wu card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL); 59432e69badSSongjun Wu if (!card) { 59532e69badSSongjun Wu ret = -ENOMEM; 59632e69badSSongjun Wu goto unregister_codec; 59732e69badSSongjun Wu } 598e0a25b6dSSongjun Wu 599e0a25b6dSSongjun Wu snd_soc_card_set_drvdata(card, dd); 600e0a25b6dSSongjun Wu 601e0a25b6dSSongjun Wu ret = atmel_classd_asoc_card_init(dev, card); 602e0a25b6dSSongjun Wu if (ret) { 603e0a25b6dSSongjun Wu dev_err(dev, "failed to init sound card\n"); 60432e69badSSongjun Wu goto unregister_codec; 605e0a25b6dSSongjun Wu } 606e0a25b6dSSongjun Wu 607e0a25b6dSSongjun Wu ret = devm_snd_soc_register_card(dev, card); 608e0a25b6dSSongjun Wu if (ret) { 609e0a25b6dSSongjun Wu dev_err(dev, "failed to register sound card: %d\n", ret); 61032e69badSSongjun Wu goto unregister_codec; 611e0a25b6dSSongjun Wu } 612e0a25b6dSSongjun Wu 613e0a25b6dSSongjun Wu return 0; 61432e69badSSongjun Wu 61532e69badSSongjun Wu unregister_codec: 61632e69badSSongjun Wu return ret; 617e0a25b6dSSongjun Wu } 618e0a25b6dSSongjun Wu 619e0a25b6dSSongjun Wu static int atmel_classd_remove(struct platform_device *pdev) 620e0a25b6dSSongjun Wu { 621e0a25b6dSSongjun Wu return 0; 622e0a25b6dSSongjun Wu } 623e0a25b6dSSongjun Wu 624e0a25b6dSSongjun Wu static struct platform_driver atmel_classd_driver = { 625e0a25b6dSSongjun Wu .driver = { 626e0a25b6dSSongjun Wu .name = "atmel-classd", 627e0a25b6dSSongjun Wu .of_match_table = of_match_ptr(atmel_classd_of_match), 628e0a25b6dSSongjun Wu .pm = &snd_soc_pm_ops, 629e0a25b6dSSongjun Wu }, 630e0a25b6dSSongjun Wu .probe = atmel_classd_probe, 631e0a25b6dSSongjun Wu .remove = atmel_classd_remove, 632e0a25b6dSSongjun Wu }; 633e0a25b6dSSongjun Wu module_platform_driver(atmel_classd_driver); 634e0a25b6dSSongjun Wu 635e0a25b6dSSongjun Wu MODULE_DESCRIPTION("Atmel ClassD driver under ALSA SoC architecture"); 636e0a25b6dSSongjun Wu MODULE_AUTHOR("Songjun Wu <songjun.wu@atmel.com>"); 637e0a25b6dSSongjun Wu MODULE_LICENSE("GPL"); 638