1 // SPDX-License-Identifier: GPL-2.0+ 2 // 3 // AMD ALSA SoC PDM Driver 4 // 5 //Copyright 2020 Advanced Micro Devices, Inc. 6 7 #include <linux/platform_device.h> 8 #include <linux/module.h> 9 #include <linux/err.h> 10 #include <linux/io.h> 11 #include <linux/pm_runtime.h> 12 #include <sound/pcm_params.h> 13 #include <sound/soc.h> 14 #include <sound/soc-dai.h> 15 16 #include "rn_acp3x.h" 17 18 #define DRV_NAME "acp_rn_pdm_dma" 19 20 static const struct snd_pcm_hardware acp_pdm_hardware_capture = { 21 .info = SNDRV_PCM_INFO_INTERLEAVED | 22 SNDRV_PCM_INFO_BLOCK_TRANSFER | 23 SNDRV_PCM_INFO_MMAP | 24 SNDRV_PCM_INFO_MMAP_VALID | 25 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME, 26 .formats = SNDRV_PCM_FMTBIT_S32_LE, 27 .channels_min = 2, 28 .channels_max = 2, 29 .rates = SNDRV_PCM_RATE_48000, 30 .rate_min = 48000, 31 .rate_max = 48000, 32 .buffer_bytes_max = CAPTURE_MAX_NUM_PERIODS * CAPTURE_MAX_PERIOD_SIZE, 33 .period_bytes_min = CAPTURE_MIN_PERIOD_SIZE, 34 .period_bytes_max = CAPTURE_MAX_PERIOD_SIZE, 35 .periods_min = CAPTURE_MIN_NUM_PERIODS, 36 .periods_max = CAPTURE_MAX_NUM_PERIODS, 37 }; 38 39 static irqreturn_t pdm_irq_handler(int irq, void *dev_id) 40 { 41 struct pdm_dev_data *rn_pdm_data; 42 u16 cap_flag; 43 u32 val; 44 45 rn_pdm_data = dev_id; 46 if (!rn_pdm_data) 47 return IRQ_NONE; 48 49 cap_flag = 0; 50 val = rn_readl(rn_pdm_data->acp_base + ACP_EXTERNAL_INTR_STAT); 51 if ((val & BIT(PDM_DMA_STAT)) && rn_pdm_data->capture_stream) { 52 rn_writel(BIT(PDM_DMA_STAT), rn_pdm_data->acp_base + 53 ACP_EXTERNAL_INTR_STAT); 54 snd_pcm_period_elapsed(rn_pdm_data->capture_stream); 55 cap_flag = 1; 56 } 57 58 if (cap_flag) 59 return IRQ_HANDLED; 60 else 61 return IRQ_NONE; 62 } 63 64 static void init_pdm_ring_buffer(u32 physical_addr, 65 u32 buffer_size, 66 u32 watermark_size, 67 void __iomem *acp_base) 68 { 69 rn_writel(physical_addr, acp_base + ACP_WOV_RX_RINGBUFADDR); 70 rn_writel(buffer_size, acp_base + ACP_WOV_RX_RINGBUFSIZE); 71 rn_writel(watermark_size, acp_base + ACP_WOV_RX_INTR_WATERMARK_SIZE); 72 rn_writel(0x01, acp_base + ACPAXI2AXI_ATU_CTRL); 73 } 74 75 static void enable_pdm_clock(void __iomem *acp_base) 76 { 77 u32 pdm_clk_enable, pdm_ctrl; 78 79 pdm_clk_enable = ACP_PDM_CLK_FREQ_MASK; 80 pdm_ctrl = 0x00; 81 82 rn_writel(pdm_clk_enable, acp_base + ACP_WOV_CLK_CTRL); 83 pdm_ctrl = rn_readl(acp_base + ACP_WOV_MISC_CTRL); 84 pdm_ctrl |= ACP_WOV_MISC_CTRL_MASK; 85 rn_writel(pdm_ctrl, acp_base + ACP_WOV_MISC_CTRL); 86 } 87 88 static void enable_pdm_interrupts(void __iomem *acp_base) 89 { 90 u32 ext_int_ctrl; 91 92 ext_int_ctrl = rn_readl(acp_base + ACP_EXTERNAL_INTR_CNTL); 93 ext_int_ctrl |= PDM_DMA_INTR_MASK; 94 rn_writel(ext_int_ctrl, acp_base + ACP_EXTERNAL_INTR_CNTL); 95 } 96 97 static void disable_pdm_interrupts(void __iomem *acp_base) 98 { 99 u32 ext_int_ctrl; 100 101 ext_int_ctrl = rn_readl(acp_base + ACP_EXTERNAL_INTR_CNTL); 102 ext_int_ctrl |= ~PDM_DMA_INTR_MASK; 103 rn_writel(ext_int_ctrl, acp_base + ACP_EXTERNAL_INTR_CNTL); 104 } 105 106 static bool check_pdm_dma_status(void __iomem *acp_base) 107 { 108 bool pdm_dma_status; 109 u32 pdm_enable, pdm_dma_enable; 110 111 pdm_dma_status = false; 112 pdm_enable = rn_readl(acp_base + ACP_WOV_PDM_ENABLE); 113 pdm_dma_enable = rn_readl(acp_base + ACP_WOV_PDM_DMA_ENABLE); 114 if ((pdm_enable & ACP_PDM_ENABLE) && (pdm_dma_enable & 115 ACP_PDM_DMA_EN_STATUS)) 116 pdm_dma_status = true; 117 return pdm_dma_status; 118 } 119 120 static int start_pdm_dma(void __iomem *acp_base) 121 { 122 u32 pdm_enable; 123 u32 pdm_dma_enable; 124 int timeout; 125 126 pdm_enable = 0x01; 127 pdm_dma_enable = 0x01; 128 129 enable_pdm_clock(acp_base); 130 rn_writel(pdm_enable, acp_base + ACP_WOV_PDM_ENABLE); 131 rn_writel(pdm_dma_enable, acp_base + ACP_WOV_PDM_DMA_ENABLE); 132 timeout = 0; 133 while (++timeout < ACP_COUNTER) { 134 pdm_dma_enable = rn_readl(acp_base + ACP_WOV_PDM_DMA_ENABLE); 135 if ((pdm_dma_enable & 0x02) == ACP_PDM_DMA_EN_STATUS) 136 return 0; 137 udelay(DELAY_US); 138 } 139 return -ETIMEDOUT; 140 } 141 142 static int stop_pdm_dma(void __iomem *acp_base) 143 { 144 u32 pdm_enable, pdm_dma_enable; 145 int timeout; 146 147 pdm_enable = 0x00; 148 pdm_dma_enable = 0x00; 149 150 pdm_enable = rn_readl(acp_base + ACP_WOV_PDM_ENABLE); 151 pdm_dma_enable = rn_readl(acp_base + ACP_WOV_PDM_DMA_ENABLE); 152 if (pdm_dma_enable & 0x01) { 153 pdm_dma_enable = 0x02; 154 rn_writel(pdm_dma_enable, acp_base + ACP_WOV_PDM_DMA_ENABLE); 155 timeout = 0; 156 while (++timeout < ACP_COUNTER) { 157 pdm_dma_enable = rn_readl(acp_base + 158 ACP_WOV_PDM_DMA_ENABLE); 159 if ((pdm_dma_enable & 0x02) == 0x00) 160 break; 161 udelay(DELAY_US); 162 } 163 if (timeout == ACP_COUNTER) 164 return -ETIMEDOUT; 165 } 166 if (pdm_enable == ACP_PDM_ENABLE) { 167 pdm_enable = ACP_PDM_DISABLE; 168 rn_writel(pdm_enable, acp_base + ACP_WOV_PDM_ENABLE); 169 } 170 rn_writel(0x01, acp_base + ACP_WOV_PDM_FIFO_FLUSH); 171 return 0; 172 } 173 174 static void config_acp_dma(struct pdm_stream_instance *rtd, int direction) 175 { 176 u16 page_idx; 177 u32 low, high, val; 178 dma_addr_t addr; 179 180 addr = rtd->dma_addr; 181 val = 0; 182 183 /* Group Enable */ 184 rn_writel(ACP_SRAM_PTE_OFFSET | BIT(31), rtd->acp_base + 185 ACPAXI2AXI_ATU_BASE_ADDR_GRP_1); 186 rn_writel(PAGE_SIZE_4K_ENABLE, rtd->acp_base + 187 ACPAXI2AXI_ATU_PAGE_SIZE_GRP_1); 188 189 for (page_idx = 0; page_idx < rtd->num_pages; page_idx++) { 190 /* Load the low address of page int ACP SRAM through SRBM */ 191 low = lower_32_bits(addr); 192 high = upper_32_bits(addr); 193 194 rn_writel(low, rtd->acp_base + ACP_SCRATCH_REG_0 + val); 195 high |= BIT(31); 196 rn_writel(high, rtd->acp_base + ACP_SCRATCH_REG_0 + val + 4); 197 val += 8; 198 addr += PAGE_SIZE; 199 } 200 } 201 202 static int acp_pdm_dma_open(struct snd_soc_component *component, 203 struct snd_pcm_substream *substream) 204 { 205 struct snd_pcm_runtime *runtime; 206 struct pdm_dev_data *adata; 207 struct pdm_stream_instance *pdm_data; 208 int ret; 209 210 runtime = substream->runtime; 211 adata = dev_get_drvdata(component->dev); 212 pdm_data = kzalloc(sizeof(*pdm_data), GFP_KERNEL); 213 if (!pdm_data) 214 return -EINVAL; 215 216 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) 217 runtime->hw = acp_pdm_hardware_capture; 218 219 ret = snd_pcm_hw_constraint_integer(runtime, 220 SNDRV_PCM_HW_PARAM_PERIODS); 221 if (ret < 0) { 222 dev_err(component->dev, "set integer constraint failed\n"); 223 kfree(pdm_data); 224 return ret; 225 } 226 227 enable_pdm_interrupts(adata->acp_base); 228 229 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) 230 adata->capture_stream = substream; 231 232 pdm_data->acp_base = adata->acp_base; 233 runtime->private_data = pdm_data; 234 return ret; 235 } 236 237 static int acp_pdm_dma_hw_params(struct snd_soc_component *component, 238 struct snd_pcm_substream *substream, 239 struct snd_pcm_hw_params *params) 240 { 241 struct pdm_stream_instance *rtd; 242 size_t size, period_bytes; 243 244 rtd = substream->runtime->private_data; 245 if (!rtd) 246 return -EINVAL; 247 size = params_buffer_bytes(params); 248 period_bytes = params_period_bytes(params); 249 rtd->dma_addr = substream->dma_buffer.addr; 250 rtd->num_pages = (PAGE_ALIGN(size) >> PAGE_SHIFT); 251 config_acp_dma(rtd, substream->stream); 252 init_pdm_ring_buffer(MEM_WINDOW_START, size, period_bytes, 253 rtd->acp_base); 254 return 0; 255 } 256 257 static u64 acp_pdm_get_byte_count(struct pdm_stream_instance *rtd, 258 int direction) 259 { 260 union acp_pdm_dma_count byte_count; 261 262 byte_count.bcount.high = 263 rn_readl(rtd->acp_base + 264 ACP_WOV_RX_LINEARPOSITIONCNTR_HIGH); 265 byte_count.bcount.low = 266 rn_readl(rtd->acp_base + 267 ACP_WOV_RX_LINEARPOSITIONCNTR_LOW); 268 return byte_count.bytescount; 269 } 270 271 static snd_pcm_uframes_t acp_pdm_dma_pointer(struct snd_soc_component *comp, 272 struct snd_pcm_substream *stream) 273 { 274 struct pdm_stream_instance *rtd; 275 u32 pos, buffersize; 276 u64 bytescount; 277 278 rtd = stream->runtime->private_data; 279 buffersize = frames_to_bytes(stream->runtime, 280 stream->runtime->buffer_size); 281 bytescount = acp_pdm_get_byte_count(rtd, stream->stream); 282 if (bytescount > rtd->bytescount) 283 bytescount -= rtd->bytescount; 284 pos = do_div(bytescount, buffersize); 285 return bytes_to_frames(stream->runtime, pos); 286 } 287 288 static int acp_pdm_dma_new(struct snd_soc_component *component, 289 struct snd_soc_pcm_runtime *rtd) 290 { 291 struct device *parent = component->dev->parent; 292 293 snd_pcm_set_managed_buffer_all(rtd->pcm, SNDRV_DMA_TYPE_DEV, 294 parent, MIN_BUFFER, MAX_BUFFER); 295 return 0; 296 } 297 298 static int acp_pdm_dma_mmap(struct snd_soc_component *component, 299 struct snd_pcm_substream *substream, 300 struct vm_area_struct *vma) 301 { 302 return snd_pcm_lib_default_mmap(substream, vma); 303 } 304 305 static int acp_pdm_dma_close(struct snd_soc_component *component, 306 struct snd_pcm_substream *substream) 307 { 308 struct pdm_dev_data *adata = dev_get_drvdata(component->dev); 309 310 disable_pdm_interrupts(adata->acp_base); 311 adata->capture_stream = NULL; 312 return 0; 313 } 314 315 static int acp_pdm_dai_trigger(struct snd_pcm_substream *substream, 316 int cmd, struct snd_soc_dai *dai) 317 { 318 struct pdm_stream_instance *rtd; 319 int ret; 320 bool pdm_status; 321 unsigned int ch_mask; 322 323 rtd = substream->runtime->private_data; 324 ret = 0; 325 switch (substream->runtime->channels) { 326 case TWO_CH: 327 ch_mask = 0x00; 328 break; 329 default: 330 return -EINVAL; 331 } 332 switch (cmd) { 333 case SNDRV_PCM_TRIGGER_START: 334 case SNDRV_PCM_TRIGGER_RESUME: 335 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 336 rn_writel(ch_mask, rtd->acp_base + ACP_WOV_PDM_NO_OF_CHANNELS); 337 rn_writel(PDM_DECIMATION_FACTOR, rtd->acp_base + 338 ACP_WOV_PDM_DECIMATION_FACTOR); 339 rtd->bytescount = acp_pdm_get_byte_count(rtd, 340 substream->stream); 341 pdm_status = check_pdm_dma_status(rtd->acp_base); 342 if (!pdm_status) 343 ret = start_pdm_dma(rtd->acp_base); 344 break; 345 case SNDRV_PCM_TRIGGER_STOP: 346 case SNDRV_PCM_TRIGGER_SUSPEND: 347 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 348 pdm_status = check_pdm_dma_status(rtd->acp_base); 349 if (pdm_status) 350 ret = stop_pdm_dma(rtd->acp_base); 351 break; 352 default: 353 ret = -EINVAL; 354 break; 355 } 356 return ret; 357 } 358 359 static const struct snd_soc_dai_ops acp_pdm_dai_ops = { 360 .trigger = acp_pdm_dai_trigger, 361 }; 362 363 static struct snd_soc_dai_driver acp_pdm_dai_driver = { 364 .capture = { 365 .rates = SNDRV_PCM_RATE_48000, 366 .formats = SNDRV_PCM_FMTBIT_S24_LE | 367 SNDRV_PCM_FMTBIT_S32_LE, 368 .channels_min = 2, 369 .channels_max = 2, 370 .rate_min = 48000, 371 .rate_max = 48000, 372 }, 373 .ops = &acp_pdm_dai_ops, 374 }; 375 376 static const struct snd_soc_component_driver acp_pdm_component = { 377 .name = DRV_NAME, 378 .open = acp_pdm_dma_open, 379 .close = acp_pdm_dma_close, 380 .hw_params = acp_pdm_dma_hw_params, 381 .pointer = acp_pdm_dma_pointer, 382 .mmap = acp_pdm_dma_mmap, 383 .pcm_construct = acp_pdm_dma_new, 384 }; 385 386 static int acp_pdm_audio_probe(struct platform_device *pdev) 387 { 388 struct resource *res; 389 struct pdm_dev_data *adata; 390 unsigned int irqflags; 391 int status; 392 393 if (!pdev->dev.platform_data) { 394 dev_err(&pdev->dev, "platform_data not retrieved\n"); 395 return -ENODEV; 396 } 397 irqflags = *((unsigned int *)(pdev->dev.platform_data)); 398 399 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 400 if (!res) { 401 dev_err(&pdev->dev, "IORESOURCE_MEM FAILED\n"); 402 return -ENODEV; 403 } 404 405 adata = devm_kzalloc(&pdev->dev, sizeof(*adata), GFP_KERNEL); 406 if (!adata) 407 return -ENOMEM; 408 409 adata->acp_base = devm_ioremap(&pdev->dev, res->start, 410 resource_size(res)); 411 if (!adata->acp_base) 412 return -ENOMEM; 413 414 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 415 if (!res) { 416 dev_err(&pdev->dev, "IORESOURCE_IRQ FAILED\n"); 417 return -ENODEV; 418 } 419 420 adata->pdm_irq = res->start; 421 adata->capture_stream = NULL; 422 423 dev_set_drvdata(&pdev->dev, adata); 424 status = devm_snd_soc_register_component(&pdev->dev, 425 &acp_pdm_component, 426 &acp_pdm_dai_driver, 1); 427 if (status) { 428 dev_err(&pdev->dev, "Fail to register acp pdm dai\n"); 429 430 return -ENODEV; 431 } 432 status = devm_request_irq(&pdev->dev, adata->pdm_irq, pdm_irq_handler, 433 irqflags, "ACP_PDM_IRQ", adata); 434 if (status) { 435 dev_err(&pdev->dev, "ACP PDM IRQ request failed\n"); 436 return -ENODEV; 437 } 438 pm_runtime_set_autosuspend_delay(&pdev->dev, ACP_SUSPEND_DELAY_MS); 439 pm_runtime_use_autosuspend(&pdev->dev); 440 pm_runtime_enable(&pdev->dev); 441 pm_runtime_allow(&pdev->dev); 442 return 0; 443 } 444 445 static int acp_pdm_audio_remove(struct platform_device *pdev) 446 { 447 pm_runtime_disable(&pdev->dev); 448 return 0; 449 } 450 451 static int acp_pdm_resume(struct device *dev) 452 { 453 struct pdm_dev_data *adata; 454 struct snd_pcm_runtime *runtime; 455 struct pdm_stream_instance *rtd; 456 u32 period_bytes, buffer_len; 457 458 adata = dev_get_drvdata(dev); 459 if (adata->capture_stream && adata->capture_stream->runtime) { 460 runtime = adata->capture_stream->runtime; 461 rtd = runtime->private_data; 462 period_bytes = frames_to_bytes(runtime, runtime->period_size); 463 buffer_len = frames_to_bytes(runtime, runtime->buffer_size); 464 config_acp_dma(rtd, SNDRV_PCM_STREAM_CAPTURE); 465 init_pdm_ring_buffer(MEM_WINDOW_START, buffer_len, period_bytes, 466 adata->acp_base); 467 } 468 enable_pdm_interrupts(adata->acp_base); 469 return 0; 470 } 471 472 static int acp_pdm_runtime_suspend(struct device *dev) 473 { 474 struct pdm_dev_data *adata; 475 476 adata = dev_get_drvdata(dev); 477 disable_pdm_interrupts(adata->acp_base); 478 479 return 0; 480 } 481 482 static int acp_pdm_runtime_resume(struct device *dev) 483 { 484 struct pdm_dev_data *adata; 485 486 adata = dev_get_drvdata(dev); 487 enable_pdm_interrupts(adata->acp_base); 488 return 0; 489 } 490 491 static const struct dev_pm_ops acp_pdm_pm_ops = { 492 .runtime_suspend = acp_pdm_runtime_suspend, 493 .runtime_resume = acp_pdm_runtime_resume, 494 .resume = acp_pdm_resume, 495 }; 496 497 static struct platform_driver acp_pdm_dma_driver = { 498 .probe = acp_pdm_audio_probe, 499 .remove = acp_pdm_audio_remove, 500 .driver = { 501 .name = "acp_rn_pdm_dma", 502 .pm = &acp_pdm_pm_ops, 503 }, 504 }; 505 506 module_platform_driver(acp_pdm_dma_driver); 507 508 MODULE_AUTHOR("Vijendar.Mukunda@amd.com"); 509 MODULE_DESCRIPTION("AMD ACP3x Renior PDM Driver"); 510 MODULE_LICENSE("GPL v2"); 511 MODULE_ALIAS("platform:" DRV_NAME); 512