1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * AMD ALSA SoC Pink Sardine PDM Driver 4 * 5 * Copyright 2022 Advanced Micro Devices, Inc. 6 */ 7 8 #include <linux/platform_device.h> 9 #include <linux/module.h> 10 #include <linux/err.h> 11 #include <linux/io.h> 12 #include <sound/pcm_params.h> 13 #include <sound/soc.h> 14 #include <sound/soc-dai.h> 15 #include <linux/pm_runtime.h> 16 17 #include "acp62.h" 18 19 #define DRV_NAME "acp_ps_pdm_dma" 20 21 static const struct snd_pcm_hardware acp62_pdm_hardware_capture = { 22 .info = SNDRV_PCM_INFO_INTERLEAVED | 23 SNDRV_PCM_INFO_BLOCK_TRANSFER | 24 SNDRV_PCM_INFO_MMAP | 25 SNDRV_PCM_INFO_MMAP_VALID | 26 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME, 27 .formats = SNDRV_PCM_FMTBIT_S32_LE, 28 .channels_min = 2, 29 .channels_max = 2, 30 .rates = SNDRV_PCM_RATE_48000, 31 .rate_min = 48000, 32 .rate_max = 48000, 33 .buffer_bytes_max = CAPTURE_MAX_NUM_PERIODS * CAPTURE_MAX_PERIOD_SIZE, 34 .period_bytes_min = CAPTURE_MIN_PERIOD_SIZE, 35 .period_bytes_max = CAPTURE_MAX_PERIOD_SIZE, 36 .periods_min = CAPTURE_MIN_NUM_PERIODS, 37 .periods_max = CAPTURE_MAX_NUM_PERIODS, 38 }; 39 40 static void acp62_init_pdm_ring_buffer(u32 physical_addr, u32 buffer_size, 41 u32 watermark_size, void __iomem *acp_base) 42 { 43 acp62_writel(physical_addr, acp_base + ACP_WOV_RX_RINGBUFADDR); 44 acp62_writel(buffer_size, acp_base + ACP_WOV_RX_RINGBUFSIZE); 45 acp62_writel(watermark_size, acp_base + ACP_WOV_RX_INTR_WATERMARK_SIZE); 46 acp62_writel(0x01, acp_base + ACPAXI2AXI_ATU_CTRL); 47 } 48 49 static void acp62_enable_pdm_clock(void __iomem *acp_base) 50 { 51 u32 pdm_clk_enable, pdm_ctrl; 52 53 pdm_clk_enable = ACP_PDM_CLK_FREQ_MASK; 54 pdm_ctrl = 0x00; 55 56 acp62_writel(pdm_clk_enable, acp_base + ACP_WOV_CLK_CTRL); 57 pdm_ctrl = acp62_readl(acp_base + ACP_WOV_MISC_CTRL); 58 pdm_ctrl |= ACP_WOV_MISC_CTRL_MASK; 59 acp62_writel(pdm_ctrl, acp_base + ACP_WOV_MISC_CTRL); 60 } 61 62 static void acp62_enable_pdm_interrupts(void __iomem *acp_base) 63 { 64 u32 ext_int_ctrl; 65 66 ext_int_ctrl = acp62_readl(acp_base + ACP_EXTERNAL_INTR_CNTL); 67 ext_int_ctrl |= PDM_DMA_INTR_MASK; 68 acp62_writel(ext_int_ctrl, acp_base + ACP_EXTERNAL_INTR_CNTL); 69 } 70 71 static void acp62_disable_pdm_interrupts(void __iomem *acp_base) 72 { 73 u32 ext_int_ctrl; 74 75 ext_int_ctrl = acp62_readl(acp_base + ACP_EXTERNAL_INTR_CNTL); 76 ext_int_ctrl &= ~PDM_DMA_INTR_MASK; 77 acp62_writel(ext_int_ctrl, acp_base + ACP_EXTERNAL_INTR_CNTL); 78 } 79 80 static bool acp62_check_pdm_dma_status(void __iomem *acp_base) 81 { 82 bool pdm_dma_status; 83 u32 pdm_enable, pdm_dma_enable; 84 85 pdm_dma_status = false; 86 pdm_enable = acp62_readl(acp_base + ACP_WOV_PDM_ENABLE); 87 pdm_dma_enable = acp62_readl(acp_base + ACP_WOV_PDM_DMA_ENABLE); 88 if ((pdm_enable & ACP_PDM_ENABLE) && (pdm_dma_enable & ACP_PDM_DMA_EN_STATUS)) 89 pdm_dma_status = true; 90 91 return pdm_dma_status; 92 } 93 94 static int acp62_start_pdm_dma(void __iomem *acp_base) 95 { 96 u32 pdm_enable; 97 u32 pdm_dma_enable; 98 int timeout; 99 100 pdm_enable = 0x01; 101 pdm_dma_enable = 0x01; 102 103 acp62_enable_pdm_clock(acp_base); 104 acp62_writel(pdm_enable, acp_base + ACP_WOV_PDM_ENABLE); 105 acp62_writel(pdm_dma_enable, acp_base + ACP_WOV_PDM_DMA_ENABLE); 106 timeout = 0; 107 while (++timeout < ACP_COUNTER) { 108 pdm_dma_enable = acp62_readl(acp_base + ACP_WOV_PDM_DMA_ENABLE); 109 if ((pdm_dma_enable & 0x02) == ACP_PDM_DMA_EN_STATUS) 110 return 0; 111 udelay(DELAY_US); 112 } 113 return -ETIMEDOUT; 114 } 115 116 static int acp62_stop_pdm_dma(void __iomem *acp_base) 117 { 118 u32 pdm_enable, pdm_dma_enable; 119 int timeout; 120 121 pdm_enable = 0x00; 122 pdm_dma_enable = 0x00; 123 124 pdm_enable = acp62_readl(acp_base + ACP_WOV_PDM_ENABLE); 125 pdm_dma_enable = acp62_readl(acp_base + ACP_WOV_PDM_DMA_ENABLE); 126 if (pdm_dma_enable & 0x01) { 127 pdm_dma_enable = 0x02; 128 acp62_writel(pdm_dma_enable, acp_base + ACP_WOV_PDM_DMA_ENABLE); 129 timeout = 0; 130 while (++timeout < ACP_COUNTER) { 131 pdm_dma_enable = acp62_readl(acp_base + ACP_WOV_PDM_DMA_ENABLE); 132 if ((pdm_dma_enable & 0x02) == 0x00) 133 break; 134 udelay(DELAY_US); 135 } 136 if (timeout == ACP_COUNTER) 137 return -ETIMEDOUT; 138 } 139 if (pdm_enable == ACP_PDM_ENABLE) { 140 pdm_enable = ACP_PDM_DISABLE; 141 acp62_writel(pdm_enable, acp_base + ACP_WOV_PDM_ENABLE); 142 } 143 acp62_writel(0x01, acp_base + ACP_WOV_PDM_FIFO_FLUSH); 144 return 0; 145 } 146 147 static void acp62_config_dma(struct pdm_stream_instance *rtd, int direction) 148 { 149 u16 page_idx; 150 u32 low, high, val; 151 dma_addr_t addr; 152 153 addr = rtd->dma_addr; 154 val = PDM_PTE_OFFSET; 155 156 /* Group Enable */ 157 acp62_writel(ACP_SRAM_PTE_OFFSET | BIT(31), rtd->acp62_base + 158 ACPAXI2AXI_ATU_BASE_ADDR_GRP_1); 159 acp62_writel(PAGE_SIZE_4K_ENABLE, rtd->acp62_base + 160 ACPAXI2AXI_ATU_PAGE_SIZE_GRP_1); 161 for (page_idx = 0; page_idx < rtd->num_pages; page_idx++) { 162 /* Load the low address of page int ACP SRAM through SRBM */ 163 low = lower_32_bits(addr); 164 high = upper_32_bits(addr); 165 166 acp62_writel(low, rtd->acp62_base + ACP_SCRATCH_REG_0 + val); 167 high |= BIT(31); 168 acp62_writel(high, rtd->acp62_base + ACP_SCRATCH_REG_0 + val + 4); 169 val += 8; 170 addr += PAGE_SIZE; 171 } 172 } 173 174 static int acp62_pdm_dma_open(struct snd_soc_component *component, 175 struct snd_pcm_substream *substream) 176 { 177 struct snd_pcm_runtime *runtime; 178 struct pdm_dev_data *adata; 179 struct pdm_stream_instance *pdm_data; 180 int ret; 181 182 runtime = substream->runtime; 183 adata = dev_get_drvdata(component->dev); 184 pdm_data = kzalloc(sizeof(*pdm_data), GFP_KERNEL); 185 if (!pdm_data) 186 return -EINVAL; 187 188 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) 189 runtime->hw = acp62_pdm_hardware_capture; 190 191 ret = snd_pcm_hw_constraint_integer(runtime, 192 SNDRV_PCM_HW_PARAM_PERIODS); 193 if (ret < 0) { 194 dev_err(component->dev, "set integer constraint failed\n"); 195 kfree(pdm_data); 196 return ret; 197 } 198 199 acp62_enable_pdm_interrupts(adata->acp62_base); 200 201 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) 202 adata->capture_stream = substream; 203 204 pdm_data->acp62_base = adata->acp62_base; 205 runtime->private_data = pdm_data; 206 return ret; 207 } 208 209 static int acp62_pdm_dma_hw_params(struct snd_soc_component *component, 210 struct snd_pcm_substream *substream, 211 struct snd_pcm_hw_params *params) 212 { 213 struct pdm_stream_instance *rtd; 214 size_t size, period_bytes; 215 216 rtd = substream->runtime->private_data; 217 if (!rtd) 218 return -EINVAL; 219 size = params_buffer_bytes(params); 220 period_bytes = params_period_bytes(params); 221 rtd->dma_addr = substream->runtime->dma_addr; 222 rtd->num_pages = (PAGE_ALIGN(size) >> PAGE_SHIFT); 223 acp62_config_dma(rtd, substream->stream); 224 acp62_init_pdm_ring_buffer(PDM_MEM_WINDOW_START, size, 225 period_bytes, rtd->acp62_base); 226 return 0; 227 } 228 229 static u64 acp62_pdm_get_byte_count(struct pdm_stream_instance *rtd, 230 int direction) 231 { 232 u32 high, low; 233 u64 byte_count; 234 235 high = acp62_readl(rtd->acp62_base + ACP_WOV_RX_LINEARPOSITIONCNTR_HIGH); 236 byte_count = high; 237 low = acp62_readl(rtd->acp62_base + ACP_WOV_RX_LINEARPOSITIONCNTR_LOW); 238 byte_count = (byte_count << 32) | low; 239 return byte_count; 240 } 241 242 static snd_pcm_uframes_t acp62_pdm_dma_pointer(struct snd_soc_component *comp, 243 struct snd_pcm_substream *stream) 244 { 245 struct pdm_stream_instance *rtd; 246 u32 pos, buffersize; 247 u64 bytescount; 248 249 rtd = stream->runtime->private_data; 250 buffersize = frames_to_bytes(stream->runtime, 251 stream->runtime->buffer_size); 252 bytescount = acp62_pdm_get_byte_count(rtd, stream->stream); 253 if (bytescount > rtd->bytescount) 254 bytescount -= rtd->bytescount; 255 pos = do_div(bytescount, buffersize); 256 return bytes_to_frames(stream->runtime, pos); 257 } 258 259 static int acp62_pdm_dma_new(struct snd_soc_component *component, 260 struct snd_soc_pcm_runtime *rtd) 261 { 262 struct device *parent = component->dev->parent; 263 264 snd_pcm_set_managed_buffer_all(rtd->pcm, SNDRV_DMA_TYPE_DEV, 265 parent, MIN_BUFFER, MAX_BUFFER); 266 return 0; 267 } 268 269 static int acp62_pdm_dma_close(struct snd_soc_component *component, 270 struct snd_pcm_substream *substream) 271 { 272 struct pdm_dev_data *adata = dev_get_drvdata(component->dev); 273 struct snd_pcm_runtime *runtime = substream->runtime; 274 275 acp62_disable_pdm_interrupts(adata->acp62_base); 276 adata->capture_stream = NULL; 277 kfree(runtime->private_data); 278 return 0; 279 } 280 281 static int acp62_pdm_dai_trigger(struct snd_pcm_substream *substream, 282 int cmd, struct snd_soc_dai *dai) 283 { 284 struct pdm_stream_instance *rtd; 285 int ret; 286 bool pdm_status; 287 unsigned int ch_mask; 288 289 rtd = substream->runtime->private_data; 290 ret = 0; 291 switch (substream->runtime->channels) { 292 case TWO_CH: 293 ch_mask = 0x00; 294 break; 295 default: 296 return -EINVAL; 297 } 298 switch (cmd) { 299 case SNDRV_PCM_TRIGGER_START: 300 case SNDRV_PCM_TRIGGER_RESUME: 301 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 302 acp62_writel(ch_mask, rtd->acp62_base + ACP_WOV_PDM_NO_OF_CHANNELS); 303 acp62_writel(PDM_DECIMATION_FACTOR, rtd->acp62_base + 304 ACP_WOV_PDM_DECIMATION_FACTOR); 305 rtd->bytescount = acp62_pdm_get_byte_count(rtd, substream->stream); 306 pdm_status = acp62_check_pdm_dma_status(rtd->acp62_base); 307 if (!pdm_status) 308 ret = acp62_start_pdm_dma(rtd->acp62_base); 309 break; 310 case SNDRV_PCM_TRIGGER_STOP: 311 case SNDRV_PCM_TRIGGER_SUSPEND: 312 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 313 pdm_status = acp62_check_pdm_dma_status(rtd->acp62_base); 314 if (pdm_status) 315 ret = acp62_stop_pdm_dma(rtd->acp62_base); 316 break; 317 default: 318 ret = -EINVAL; 319 break; 320 } 321 return ret; 322 } 323 324 static const struct snd_soc_dai_ops acp62_pdm_dai_ops = { 325 .trigger = acp62_pdm_dai_trigger, 326 }; 327 328 static struct snd_soc_dai_driver acp62_pdm_dai_driver = { 329 .name = "acp_ps_pdm_dma.0", 330 .capture = { 331 .rates = SNDRV_PCM_RATE_48000, 332 .formats = SNDRV_PCM_FMTBIT_S32_LE, 333 .channels_min = 2, 334 .channels_max = 2, 335 .rate_min = 48000, 336 .rate_max = 48000, 337 }, 338 .ops = &acp62_pdm_dai_ops, 339 }; 340 341 static const struct snd_soc_component_driver acp62_pdm_component = { 342 .name = DRV_NAME, 343 .open = acp62_pdm_dma_open, 344 .close = acp62_pdm_dma_close, 345 .hw_params = acp62_pdm_dma_hw_params, 346 .pointer = acp62_pdm_dma_pointer, 347 .pcm_construct = acp62_pdm_dma_new, 348 }; 349 350 static int acp62_pdm_audio_probe(struct platform_device *pdev) 351 { 352 struct resource *res; 353 struct pdm_dev_data *adata; 354 int status; 355 356 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 357 if (!res) { 358 dev_err(&pdev->dev, "IORESOURCE_MEM FAILED\n"); 359 return -ENODEV; 360 } 361 362 adata = devm_kzalloc(&pdev->dev, sizeof(*adata), GFP_KERNEL); 363 if (!adata) 364 return -ENOMEM; 365 366 adata->acp62_base = devm_ioremap(&pdev->dev, res->start, resource_size(res)); 367 if (!adata->acp62_base) 368 return -ENOMEM; 369 370 adata->capture_stream = NULL; 371 372 dev_set_drvdata(&pdev->dev, adata); 373 status = devm_snd_soc_register_component(&pdev->dev, 374 &acp62_pdm_component, 375 &acp62_pdm_dai_driver, 1); 376 if (status) { 377 dev_err(&pdev->dev, "Fail to register acp pdm dai\n"); 378 379 return -ENODEV; 380 } 381 pm_runtime_set_autosuspend_delay(&pdev->dev, ACP_SUSPEND_DELAY_MS); 382 pm_runtime_use_autosuspend(&pdev->dev); 383 pm_runtime_enable(&pdev->dev); 384 pm_runtime_allow(&pdev->dev); 385 return 0; 386 } 387 388 static int acp62_pdm_audio_remove(struct platform_device *pdev) 389 { 390 pm_runtime_disable(&pdev->dev); 391 return 0; 392 } 393 394 static int __maybe_unused acp62_pdm_resume(struct device *dev) 395 { 396 struct pdm_dev_data *adata; 397 struct snd_pcm_runtime *runtime; 398 struct pdm_stream_instance *rtd; 399 u32 period_bytes, buffer_len; 400 401 adata = dev_get_drvdata(dev); 402 if (adata->capture_stream && adata->capture_stream->runtime) { 403 runtime = adata->capture_stream->runtime; 404 rtd = runtime->private_data; 405 period_bytes = frames_to_bytes(runtime, runtime->period_size); 406 buffer_len = frames_to_bytes(runtime, runtime->buffer_size); 407 acp62_config_dma(rtd, SNDRV_PCM_STREAM_CAPTURE); 408 acp62_init_pdm_ring_buffer(PDM_MEM_WINDOW_START, buffer_len, 409 period_bytes, adata->acp62_base); 410 } 411 acp62_enable_pdm_interrupts(adata->acp62_base); 412 return 0; 413 } 414 415 static int __maybe_unused acp62_pdm_suspend(struct device *dev) 416 { 417 struct pdm_dev_data *adata; 418 419 adata = dev_get_drvdata(dev); 420 acp62_disable_pdm_interrupts(adata->acp62_base); 421 return 0; 422 } 423 424 static int __maybe_unused acp62_pdm_runtime_resume(struct device *dev) 425 { 426 struct pdm_dev_data *adata; 427 428 adata = dev_get_drvdata(dev); 429 acp62_enable_pdm_interrupts(adata->acp62_base); 430 return 0; 431 } 432 433 static const struct dev_pm_ops acp62_pdm_pm_ops = { 434 SET_RUNTIME_PM_OPS(acp62_pdm_suspend, acp62_pdm_runtime_resume, NULL) 435 SET_SYSTEM_SLEEP_PM_OPS(acp62_pdm_suspend, acp62_pdm_resume) 436 }; 437 438 static struct platform_driver acp62_pdm_dma_driver = { 439 .probe = acp62_pdm_audio_probe, 440 .remove = acp62_pdm_audio_remove, 441 .driver = { 442 .name = "acp_ps_pdm_dma", 443 .pm = &acp62_pdm_pm_ops, 444 }, 445 }; 446 447 module_platform_driver(acp62_pdm_dma_driver); 448 449 MODULE_AUTHOR("Syed.SabaKareem@amd.com"); 450 MODULE_DESCRIPTION("AMD PINK SARDINE PDM Driver"); 451 MODULE_LICENSE("GPL v2"); 452 MODULE_ALIAS("platform:" DRV_NAME); 453