1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */ 2 /* 3 * This file is provided under a dual BSD/GPLv2 license. When using or 4 * redistributing this file, you may do so under either license. 5 * 6 * Copyright(c) 2021 Advanced Micro Devices, Inc. All rights reserved. 7 * 8 * Author: Ajit Kumar Pandey <AjitKumar.Pandey@amd.com> 9 */ 10 11 #ifndef _ACP_IP_OFFSET_HEADER 12 #define _ACP_IP_OFFSET_HEADER 13 14 #define ACPAXI2AXI_ATU_CTRL 0xC40 15 #define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_5 0xC20 16 #define ACPAXI2AXI_ATU_BASE_ADDR_GRP_5 0xC24 17 #define ACP_EXTERNAL_INTR_ENB 0x1800 18 #define ACP_EXTERNAL_INTR_CNTL 0x1804 19 #define ACP_EXTERNAL_INTR_STAT 0x1808 20 #define ACP_I2S_PIN_CONFIG 0x1400 21 #define ACP_SCRATCH_REG_0 0x12800 22 23 /* Registers from ACP_AUDIO_BUFFERS block */ 24 25 #define ACP_I2S_RX_RINGBUFADDR 0x2000 26 #define ACP_I2S_RX_RINGBUFSIZE 0x2004 27 #define ACP_I2S_RX_LINKPOSITIONCNTR 0x2008 28 #define ACP_I2S_RX_FIFOADDR 0x200C 29 #define ACP_I2S_RX_FIFOSIZE 0x2010 30 #define ACP_I2S_RX_DMA_SIZE 0x2014 31 #define ACP_I2S_RX_LINEARPOSITIONCNTR_HIGH 0x2018 32 #define ACP_I2S_RX_LINEARPOSITIONCNTR_LOW 0x201C 33 #define ACP_I2S_RX_INTR_WATERMARK_SIZE 0x2020 34 #define ACP_I2S_TX_RINGBUFADDR 0x2024 35 #define ACP_I2S_TX_RINGBUFSIZE 0x2028 36 #define ACP_I2S_TX_LINKPOSITIONCNTR 0x202C 37 #define ACP_I2S_TX_FIFOADDR 0x2030 38 #define ACP_I2S_TX_FIFOSIZE 0x2034 39 #define ACP_I2S_TX_DMA_SIZE 0x2038 40 #define ACP_I2S_TX_LINEARPOSITIONCNTR_HIGH 0x203C 41 #define ACP_I2S_TX_LINEARPOSITIONCNTR_LOW 0x2040 42 #define ACP_I2S_TX_INTR_WATERMARK_SIZE 0x2044 43 #define ACP_BT_RX_RINGBUFADDR 0x2048 44 #define ACP_BT_RX_RINGBUFSIZE 0x204C 45 #define ACP_BT_RX_LINKPOSITIONCNTR 0x2050 46 #define ACP_BT_RX_FIFOADDR 0x2054 47 #define ACP_BT_RX_FIFOSIZE 0x2058 48 #define ACP_BT_RX_DMA_SIZE 0x205C 49 #define ACP_BT_RX_LINEARPOSITIONCNTR_HIGH 0x2060 50 #define ACP_BT_RX_LINEARPOSITIONCNTR_LOW 0x2064 51 #define ACP_BT_RX_INTR_WATERMARK_SIZE 0x2068 52 #define ACP_BT_TX_RINGBUFADDR 0x206C 53 #define ACP_BT_TX_RINGBUFSIZE 0x2070 54 #define ACP_BT_TX_LINKPOSITIONCNTR 0x2074 55 #define ACP_BT_TX_FIFOADDR 0x2078 56 #define ACP_BT_TX_FIFOSIZE 0x207C 57 #define ACP_BT_TX_DMA_SIZE 0x2080 58 #define ACP_BT_TX_LINEARPOSITIONCNTR_HIGH 0x2084 59 #define ACP_BT_TX_LINEARPOSITIONCNTR_LOW 0x2088 60 #define ACP_BT_TX_INTR_WATERMARK_SIZE 0x208C 61 62 #define ACP_I2STDM_IER 0x2400 63 #define ACP_I2STDM_IRER 0x2404 64 #define ACP_I2STDM_RXFRMT 0x2408 65 #define ACP_I2STDM_ITER 0x240C 66 #define ACP_I2STDM_TXFRMT 0x2410 67 68 /* Registers from ACP_BT_TDM block */ 69 70 #define ACP_BTTDM_IER 0x2800 71 #define ACP_BTTDM_IRER 0x2804 72 #define ACP_BTTDM_RXFRMT 0x2808 73 #define ACP_BTTDM_ITER 0x280C 74 #define ACP_BTTDM_TXFRMT 0x2810 75 76 #endif 77