1 /* 2 * Driver for Sound Core PDAudioCF soundcard 3 * 4 * Copyright (c) 2003 by Jaroslav Kysela <perex@perex.cz> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 */ 20 21 #include <linux/delay.h> 22 #include <sound/core.h> 23 #include <sound/info.h> 24 #include "pdaudiocf.h" 25 #include <sound/initval.h> 26 27 /* 28 * 29 */ 30 static unsigned char pdacf_ak4117_read(void *private_data, unsigned char reg) 31 { 32 struct snd_pdacf *chip = private_data; 33 unsigned long timeout; 34 unsigned long flags; 35 unsigned char res; 36 37 spin_lock_irqsave(&chip->ak4117_lock, flags); 38 timeout = 1000; 39 while (pdacf_reg_read(chip, PDAUDIOCF_REG_SCR) & PDAUDIOCF_AK_SBP) { 40 udelay(5); 41 if (--timeout == 0) { 42 spin_unlock_irqrestore(&chip->ak4117_lock, flags); 43 snd_printk(KERN_ERR "AK4117 ready timeout (read)\n"); 44 return 0; 45 } 46 } 47 pdacf_reg_write(chip, PDAUDIOCF_REG_AK_IFR, (u16)reg << 8); 48 timeout = 1000; 49 while (pdacf_reg_read(chip, PDAUDIOCF_REG_SCR) & PDAUDIOCF_AK_SBP) { 50 udelay(5); 51 if (--timeout == 0) { 52 spin_unlock_irqrestore(&chip->ak4117_lock, flags); 53 snd_printk(KERN_ERR "AK4117 read timeout (read2)\n"); 54 return 0; 55 } 56 } 57 res = (unsigned char)pdacf_reg_read(chip, PDAUDIOCF_REG_AK_IFR); 58 spin_unlock_irqrestore(&chip->ak4117_lock, flags); 59 return res; 60 } 61 62 static void pdacf_ak4117_write(void *private_data, unsigned char reg, unsigned char val) 63 { 64 struct snd_pdacf *chip = private_data; 65 unsigned long timeout; 66 unsigned long flags; 67 68 spin_lock_irqsave(&chip->ak4117_lock, flags); 69 timeout = 1000; 70 while (inw(chip->port + PDAUDIOCF_REG_SCR) & PDAUDIOCF_AK_SBP) { 71 udelay(5); 72 if (--timeout == 0) { 73 spin_unlock_irqrestore(&chip->ak4117_lock, flags); 74 snd_printk(KERN_ERR "AK4117 ready timeout (write)\n"); 75 return; 76 } 77 } 78 outw((u16)reg << 8 | val | (1<<13), chip->port + PDAUDIOCF_REG_AK_IFR); 79 spin_unlock_irqrestore(&chip->ak4117_lock, flags); 80 } 81 82 #if 0 83 void pdacf_dump(struct snd_pdacf *chip) 84 { 85 printk("PDAUDIOCF DUMP (0x%lx):\n", chip->port); 86 printk("WPD : 0x%x\n", inw(chip->port + PDAUDIOCF_REG_WDP)); 87 printk("RDP : 0x%x\n", inw(chip->port + PDAUDIOCF_REG_RDP)); 88 printk("TCR : 0x%x\n", inw(chip->port + PDAUDIOCF_REG_TCR)); 89 printk("SCR : 0x%x\n", inw(chip->port + PDAUDIOCF_REG_SCR)); 90 printk("ISR : 0x%x\n", inw(chip->port + PDAUDIOCF_REG_ISR)); 91 printk("IER : 0x%x\n", inw(chip->port + PDAUDIOCF_REG_IER)); 92 printk("AK_IFR : 0x%x\n", inw(chip->port + PDAUDIOCF_REG_AK_IFR)); 93 } 94 #endif 95 96 static int pdacf_reset(struct snd_pdacf *chip, int powerdown) 97 { 98 u16 val; 99 100 val = pdacf_reg_read(chip, PDAUDIOCF_REG_SCR); 101 val |= PDAUDIOCF_PDN; 102 val &= ~PDAUDIOCF_RECORD; /* for sure */ 103 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val); 104 udelay(5); 105 val |= PDAUDIOCF_RST; 106 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val); 107 udelay(200); 108 val &= ~PDAUDIOCF_RST; 109 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val); 110 udelay(5); 111 if (!powerdown) { 112 val &= ~PDAUDIOCF_PDN; 113 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val); 114 udelay(200); 115 } 116 return 0; 117 } 118 119 void pdacf_reinit(struct snd_pdacf *chip, int resume) 120 { 121 pdacf_reset(chip, 0); 122 if (resume) 123 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, chip->suspend_reg_scr); 124 snd_ak4117_reinit(chip->ak4117); 125 pdacf_reg_write(chip, PDAUDIOCF_REG_TCR, chip->regmap[PDAUDIOCF_REG_TCR>>1]); 126 pdacf_reg_write(chip, PDAUDIOCF_REG_IER, chip->regmap[PDAUDIOCF_REG_IER>>1]); 127 } 128 129 static void pdacf_proc_read(struct snd_info_entry * entry, 130 struct snd_info_buffer *buffer) 131 { 132 struct snd_pdacf *chip = entry->private_data; 133 u16 tmp; 134 135 snd_iprintf(buffer, "PDAudioCF\n\n"); 136 tmp = pdacf_reg_read(chip, PDAUDIOCF_REG_SCR); 137 snd_iprintf(buffer, "FPGA revision : 0x%x\n", PDAUDIOCF_FPGAREV(tmp)); 138 139 } 140 141 static void pdacf_proc_init(struct snd_pdacf *chip) 142 { 143 struct snd_info_entry *entry; 144 145 if (! snd_card_proc_new(chip->card, "pdaudiocf", &entry)) 146 snd_info_set_text_ops(entry, chip, pdacf_proc_read); 147 } 148 149 struct snd_pdacf *snd_pdacf_create(struct snd_card *card) 150 { 151 struct snd_pdacf *chip; 152 153 chip = kzalloc(sizeof(*chip), GFP_KERNEL); 154 if (chip == NULL) 155 return NULL; 156 chip->card = card; 157 spin_lock_init(&chip->reg_lock); 158 spin_lock_init(&chip->ak4117_lock); 159 tasklet_init(&chip->tq, pdacf_tasklet, (unsigned long)chip); 160 card->private_data = chip; 161 162 pdacf_proc_init(chip); 163 return chip; 164 } 165 166 static void snd_pdacf_ak4117_change(struct ak4117 *ak4117, unsigned char c0, unsigned char c1) 167 { 168 struct snd_pdacf *chip = ak4117->change_callback_private; 169 unsigned long flags; 170 u16 val; 171 172 if (!(c0 & AK4117_UNLCK)) 173 return; 174 spin_lock_irqsave(&chip->reg_lock, flags); 175 val = chip->regmap[PDAUDIOCF_REG_SCR>>1]; 176 if (ak4117->rcs0 & AK4117_UNLCK) 177 val |= PDAUDIOCF_BLUE_LED_OFF; 178 else 179 val &= ~PDAUDIOCF_BLUE_LED_OFF; 180 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val); 181 spin_unlock_irqrestore(&chip->reg_lock, flags); 182 } 183 184 int snd_pdacf_ak4117_create(struct snd_pdacf *chip) 185 { 186 int err; 187 u16 val; 188 /* design note: if we unmask PLL unlock, parity, valid, audio or auto bit interrupts */ 189 /* from AK4117 then INT1 pin from AK4117 will be high all time, because PCMCIA interrupts are */ 190 /* egde based and FPGA does logical OR for all interrupt sources, we cannot use these */ 191 /* high-rate sources */ 192 static unsigned char pgm[5] = { 193 AK4117_XTL_24_576M | AK4117_EXCT, /* AK4117_REG_PWRDN */ 194 AK4117_CM_PLL_XTAL | AK4117_PKCS_128fs | AK4117_XCKS_128fs, /* AK4117_REQ_CLOCK */ 195 AK4117_EFH_1024LRCLK | AK4117_DIF_24R | AK4117_IPS, /* AK4117_REG_IO */ 196 0xff, /* AK4117_REG_INT0_MASK */ 197 AK4117_MAUTO | AK4117_MAUD | AK4117_MULK | AK4117_MPAR | AK4117_MV, /* AK4117_REG_INT1_MASK */ 198 }; 199 200 err = pdacf_reset(chip, 0); 201 if (err < 0) 202 return err; 203 err = snd_ak4117_create(chip->card, pdacf_ak4117_read, pdacf_ak4117_write, pgm, chip, &chip->ak4117); 204 if (err < 0) 205 return err; 206 207 val = pdacf_reg_read(chip, PDAUDIOCF_REG_TCR); 208 #if 1 /* normal operation */ 209 val &= ~(PDAUDIOCF_ELIMAKMBIT|PDAUDIOCF_TESTDATASEL); 210 #else /* debug */ 211 val |= PDAUDIOCF_ELIMAKMBIT; 212 val &= ~PDAUDIOCF_TESTDATASEL; 213 #endif 214 pdacf_reg_write(chip, PDAUDIOCF_REG_TCR, val); 215 216 /* setup the FPGA to match AK4117 setup */ 217 val = pdacf_reg_read(chip, PDAUDIOCF_REG_SCR); 218 val &= ~(PDAUDIOCF_CLKDIV0 | PDAUDIOCF_CLKDIV1); /* use 24.576Mhz clock */ 219 val &= ~(PDAUDIOCF_RED_LED_OFF|PDAUDIOCF_BLUE_LED_OFF); 220 val |= PDAUDIOCF_DATAFMT0 | PDAUDIOCF_DATAFMT1; /* 24-bit data */ 221 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val); 222 223 /* setup LEDs and IRQ */ 224 val = pdacf_reg_read(chip, PDAUDIOCF_REG_IER); 225 val &= ~(PDAUDIOCF_IRQLVLEN0 | PDAUDIOCF_IRQLVLEN1); 226 val &= ~(PDAUDIOCF_BLUEDUTY0 | PDAUDIOCF_REDDUTY0 | PDAUDIOCF_REDDUTY1); 227 val |= PDAUDIOCF_BLUEDUTY1 | PDAUDIOCF_HALFRATE; 228 val |= PDAUDIOCF_IRQOVREN | PDAUDIOCF_IRQAKMEN; 229 pdacf_reg_write(chip, PDAUDIOCF_REG_IER, val); 230 231 chip->ak4117->change_callback_private = chip; 232 chip->ak4117->change_callback = snd_pdacf_ak4117_change; 233 234 /* update LED status */ 235 snd_pdacf_ak4117_change(chip->ak4117, AK4117_UNLCK, 0); 236 237 return 0; 238 } 239 240 void snd_pdacf_powerdown(struct snd_pdacf *chip) 241 { 242 u16 val; 243 244 val = pdacf_reg_read(chip, PDAUDIOCF_REG_SCR); 245 chip->suspend_reg_scr = val; 246 val |= PDAUDIOCF_RED_LED_OFF | PDAUDIOCF_BLUE_LED_OFF; 247 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val); 248 /* disable interrupts, but use direct write to preserve old register value in chip->regmap */ 249 val = inw(chip->port + PDAUDIOCF_REG_IER); 250 val &= ~(PDAUDIOCF_IRQOVREN|PDAUDIOCF_IRQAKMEN|PDAUDIOCF_IRQLVLEN0|PDAUDIOCF_IRQLVLEN1); 251 outw(val, chip->port + PDAUDIOCF_REG_IER); 252 pdacf_reset(chip, 1); 253 } 254 255 #ifdef CONFIG_PM 256 257 int snd_pdacf_suspend(struct snd_pdacf *chip, pm_message_t state) 258 { 259 u16 val; 260 261 snd_power_change_state(chip->card, SNDRV_CTL_POWER_D3hot); 262 snd_pcm_suspend_all(chip->pcm); 263 /* disable interrupts, but use direct write to preserve old register value in chip->regmap */ 264 val = inw(chip->port + PDAUDIOCF_REG_IER); 265 val &= ~(PDAUDIOCF_IRQOVREN|PDAUDIOCF_IRQAKMEN|PDAUDIOCF_IRQLVLEN0|PDAUDIOCF_IRQLVLEN1); 266 outw(val, chip->port + PDAUDIOCF_REG_IER); 267 chip->chip_status |= PDAUDIOCF_STAT_IS_SUSPENDED; /* ignore interrupts from now */ 268 snd_pdacf_powerdown(chip); 269 return 0; 270 } 271 272 static inline int check_signal(struct snd_pdacf *chip) 273 { 274 return (chip->ak4117->rcs0 & AK4117_UNLCK) == 0; 275 } 276 277 int snd_pdacf_resume(struct snd_pdacf *chip) 278 { 279 int timeout = 40; 280 281 pdacf_reinit(chip, 1); 282 /* wait for AK4117's PLL */ 283 while (timeout-- > 0 && 284 (snd_ak4117_external_rate(chip->ak4117) <= 0 || !check_signal(chip))) 285 mdelay(1); 286 chip->chip_status &= ~PDAUDIOCF_STAT_IS_SUSPENDED; 287 snd_power_change_state(chip->card, SNDRV_CTL_POWER_D0); 288 return 0; 289 } 290 #endif 291