1 /*
2  * Driver for Sound Core PDAudioCF soundcard
3  *
4  * Copyright (c) 2003 by Jaroslav Kysela <perex@perex.cz>
5  *
6  *   This program is free software; you can redistribute it and/or modify
7  *   it under the terms of the GNU General Public License as published by
8  *   the Free Software Foundation; either version 2 of the License, or
9  *   (at your option) any later version.
10  *
11  *   This program is distributed in the hope that it will be useful,
12  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
13  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  *   GNU General Public License for more details.
15  *
16  *   You should have received a copy of the GNU General Public License
17  *   along with this program; if not, write to the Free Software
18  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
19  */
20 
21 #include <linux/delay.h>
22 #include <linux/slab.h>
23 #include <sound/core.h>
24 #include <sound/info.h>
25 #include "pdaudiocf.h"
26 #include <sound/initval.h>
27 
28 /*
29  *
30  */
31 static unsigned char pdacf_ak4117_read(void *private_data, unsigned char reg)
32 {
33 	struct snd_pdacf *chip = private_data;
34 	unsigned long timeout;
35 	unsigned long flags;
36 	unsigned char res;
37 
38 	spin_lock_irqsave(&chip->ak4117_lock, flags);
39 	timeout = 1000;
40 	while (pdacf_reg_read(chip, PDAUDIOCF_REG_SCR) & PDAUDIOCF_AK_SBP) {
41 		udelay(5);
42 		if (--timeout == 0) {
43 			spin_unlock_irqrestore(&chip->ak4117_lock, flags);
44 			snd_printk(KERN_ERR "AK4117 ready timeout (read)\n");
45 			return 0;
46 		}
47 	}
48 	pdacf_reg_write(chip, PDAUDIOCF_REG_AK_IFR, (u16)reg << 8);
49 	timeout = 1000;
50 	while (pdacf_reg_read(chip, PDAUDIOCF_REG_SCR) & PDAUDIOCF_AK_SBP) {
51 		udelay(5);
52 		if (--timeout == 0) {
53 			spin_unlock_irqrestore(&chip->ak4117_lock, flags);
54 			snd_printk(KERN_ERR "AK4117 read timeout (read2)\n");
55 			return 0;
56 		}
57 	}
58 	res = (unsigned char)pdacf_reg_read(chip, PDAUDIOCF_REG_AK_IFR);
59 	spin_unlock_irqrestore(&chip->ak4117_lock, flags);
60 	return res;
61 }
62 
63 static void pdacf_ak4117_write(void *private_data, unsigned char reg, unsigned char val)
64 {
65 	struct snd_pdacf *chip = private_data;
66 	unsigned long timeout;
67 	unsigned long flags;
68 
69 	spin_lock_irqsave(&chip->ak4117_lock, flags);
70 	timeout = 1000;
71 	while (inw(chip->port + PDAUDIOCF_REG_SCR) & PDAUDIOCF_AK_SBP) {
72 		udelay(5);
73 		if (--timeout == 0) {
74 			spin_unlock_irqrestore(&chip->ak4117_lock, flags);
75 			snd_printk(KERN_ERR "AK4117 ready timeout (write)\n");
76 			return;
77 		}
78 	}
79 	outw((u16)reg << 8 | val | (1<<13), chip->port + PDAUDIOCF_REG_AK_IFR);
80 	spin_unlock_irqrestore(&chip->ak4117_lock, flags);
81 }
82 
83 #if 0
84 void pdacf_dump(struct snd_pdacf *chip)
85 {
86 	printk(KERN_DEBUG "PDAUDIOCF DUMP (0x%lx):\n", chip->port);
87 	printk(KERN_DEBUG "WPD         : 0x%x\n",
88 	       inw(chip->port + PDAUDIOCF_REG_WDP));
89 	printk(KERN_DEBUG "RDP         : 0x%x\n",
90 	       inw(chip->port + PDAUDIOCF_REG_RDP));
91 	printk(KERN_DEBUG "TCR         : 0x%x\n",
92 	       inw(chip->port + PDAUDIOCF_REG_TCR));
93 	printk(KERN_DEBUG "SCR         : 0x%x\n",
94 	       inw(chip->port + PDAUDIOCF_REG_SCR));
95 	printk(KERN_DEBUG "ISR         : 0x%x\n",
96 	       inw(chip->port + PDAUDIOCF_REG_ISR));
97 	printk(KERN_DEBUG "IER         : 0x%x\n",
98 	       inw(chip->port + PDAUDIOCF_REG_IER));
99 	printk(KERN_DEBUG "AK_IFR      : 0x%x\n",
100 	       inw(chip->port + PDAUDIOCF_REG_AK_IFR));
101 }
102 #endif
103 
104 static int pdacf_reset(struct snd_pdacf *chip, int powerdown)
105 {
106 	u16 val;
107 
108 	val = pdacf_reg_read(chip, PDAUDIOCF_REG_SCR);
109 	val |= PDAUDIOCF_PDN;
110 	val &= ~PDAUDIOCF_RECORD;		/* for sure */
111 	pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val);
112 	udelay(5);
113 	val |= PDAUDIOCF_RST;
114 	pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val);
115 	udelay(200);
116 	val &= ~PDAUDIOCF_RST;
117 	pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val);
118 	udelay(5);
119 	if (!powerdown) {
120 		val &= ~PDAUDIOCF_PDN;
121 		pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val);
122 		udelay(200);
123 	}
124 	return 0;
125 }
126 
127 void pdacf_reinit(struct snd_pdacf *chip, int resume)
128 {
129 	pdacf_reset(chip, 0);
130 	if (resume)
131 		pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, chip->suspend_reg_scr);
132 	snd_ak4117_reinit(chip->ak4117);
133 	pdacf_reg_write(chip, PDAUDIOCF_REG_TCR, chip->regmap[PDAUDIOCF_REG_TCR>>1]);
134 	pdacf_reg_write(chip, PDAUDIOCF_REG_IER, chip->regmap[PDAUDIOCF_REG_IER>>1]);
135 }
136 
137 static void pdacf_proc_read(struct snd_info_entry * entry,
138                             struct snd_info_buffer *buffer)
139 {
140 	struct snd_pdacf *chip = entry->private_data;
141 	u16 tmp;
142 
143 	snd_iprintf(buffer, "PDAudioCF\n\n");
144 	tmp = pdacf_reg_read(chip, PDAUDIOCF_REG_SCR);
145 	snd_iprintf(buffer, "FPGA revision      : 0x%x\n", PDAUDIOCF_FPGAREV(tmp));
146 
147 }
148 
149 static void pdacf_proc_init(struct snd_pdacf *chip)
150 {
151 	struct snd_info_entry *entry;
152 
153 	if (! snd_card_proc_new(chip->card, "pdaudiocf", &entry))
154 		snd_info_set_text_ops(entry, chip, pdacf_proc_read);
155 }
156 
157 struct snd_pdacf *snd_pdacf_create(struct snd_card *card)
158 {
159 	struct snd_pdacf *chip;
160 
161 	chip = kzalloc(sizeof(*chip), GFP_KERNEL);
162 	if (chip == NULL)
163 		return NULL;
164 	chip->card = card;
165 	mutex_init(&chip->reg_lock);
166 	spin_lock_init(&chip->ak4117_lock);
167 	card->private_data = chip;
168 
169 	pdacf_proc_init(chip);
170 	return chip;
171 }
172 
173 static void snd_pdacf_ak4117_change(struct ak4117 *ak4117, unsigned char c0, unsigned char c1)
174 {
175 	struct snd_pdacf *chip = ak4117->change_callback_private;
176 	u16 val;
177 
178 	if (!(c0 & AK4117_UNLCK))
179 		return;
180 	mutex_lock(&chip->reg_lock);
181 	val = chip->regmap[PDAUDIOCF_REG_SCR>>1];
182 	if (ak4117->rcs0 & AK4117_UNLCK)
183 		val |= PDAUDIOCF_BLUE_LED_OFF;
184 	else
185 		val &= ~PDAUDIOCF_BLUE_LED_OFF;
186 	pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val);
187 	mutex_unlock(&chip->reg_lock);
188 }
189 
190 int snd_pdacf_ak4117_create(struct snd_pdacf *chip)
191 {
192 	int err;
193 	u16 val;
194 	/* design note: if we unmask PLL unlock, parity, valid, audio or auto bit interrupts */
195 	/* from AK4117 then INT1 pin from AK4117 will be high all time, because PCMCIA interrupts are */
196 	/* egde based and FPGA does logical OR for all interrupt sources, we cannot use these */
197 	/* high-rate sources */
198 	static unsigned char pgm[5] = {
199 		AK4117_XTL_24_576M | AK4117_EXCT,				/* AK4117_REG_PWRDN */
200 		AK4117_CM_PLL_XTAL | AK4117_PKCS_128fs | AK4117_XCKS_128fs,	/* AK4117_REQ_CLOCK */
201 		AK4117_EFH_1024LRCLK | AK4117_DIF_24R | AK4117_IPS,		/* AK4117_REG_IO */
202 		0xff,								/* AK4117_REG_INT0_MASK */
203 		AK4117_MAUTO | AK4117_MAUD | AK4117_MULK | AK4117_MPAR | AK4117_MV, /* AK4117_REG_INT1_MASK */
204 	};
205 
206 	err = pdacf_reset(chip, 0);
207 	if (err < 0)
208 		return err;
209 	err = snd_ak4117_create(chip->card, pdacf_ak4117_read, pdacf_ak4117_write, pgm, chip, &chip->ak4117);
210 	if (err < 0)
211 		return err;
212 
213 	val = pdacf_reg_read(chip, PDAUDIOCF_REG_TCR);
214 #if 1 /* normal operation */
215 	val &= ~(PDAUDIOCF_ELIMAKMBIT|PDAUDIOCF_TESTDATASEL);
216 #else /* debug */
217 	val |= PDAUDIOCF_ELIMAKMBIT;
218 	val &= ~PDAUDIOCF_TESTDATASEL;
219 #endif
220 	pdacf_reg_write(chip, PDAUDIOCF_REG_TCR, val);
221 
222 	/* setup the FPGA to match AK4117 setup */
223 	val = pdacf_reg_read(chip, PDAUDIOCF_REG_SCR);
224 	val &= ~(PDAUDIOCF_CLKDIV0 | PDAUDIOCF_CLKDIV1);		/* use 24.576Mhz clock */
225 	val &= ~(PDAUDIOCF_RED_LED_OFF|PDAUDIOCF_BLUE_LED_OFF);
226 	val |= PDAUDIOCF_DATAFMT0 | PDAUDIOCF_DATAFMT1;			/* 24-bit data */
227 	pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val);
228 
229 	/* setup LEDs and IRQ */
230 	val = pdacf_reg_read(chip, PDAUDIOCF_REG_IER);
231 	val &= ~(PDAUDIOCF_IRQLVLEN0 | PDAUDIOCF_IRQLVLEN1);
232 	val &= ~(PDAUDIOCF_BLUEDUTY0 | PDAUDIOCF_REDDUTY0 | PDAUDIOCF_REDDUTY1);
233 	val |= PDAUDIOCF_BLUEDUTY1 | PDAUDIOCF_HALFRATE;
234 	val |= PDAUDIOCF_IRQOVREN | PDAUDIOCF_IRQAKMEN;
235 	pdacf_reg_write(chip, PDAUDIOCF_REG_IER, val);
236 
237 	chip->ak4117->change_callback_private = chip;
238 	chip->ak4117->change_callback = snd_pdacf_ak4117_change;
239 
240 	/* update LED status */
241 	snd_pdacf_ak4117_change(chip->ak4117, AK4117_UNLCK, 0);
242 
243 	return 0;
244 }
245 
246 void snd_pdacf_powerdown(struct snd_pdacf *chip)
247 {
248 	u16 val;
249 
250 	val = pdacf_reg_read(chip, PDAUDIOCF_REG_SCR);
251 	chip->suspend_reg_scr = val;
252 	val |= PDAUDIOCF_RED_LED_OFF | PDAUDIOCF_BLUE_LED_OFF;
253 	pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val);
254 	/* disable interrupts, but use direct write to preserve old register value in chip->regmap */
255 	val = inw(chip->port + PDAUDIOCF_REG_IER);
256 	val &= ~(PDAUDIOCF_IRQOVREN|PDAUDIOCF_IRQAKMEN|PDAUDIOCF_IRQLVLEN0|PDAUDIOCF_IRQLVLEN1);
257 	outw(val, chip->port + PDAUDIOCF_REG_IER);
258 	pdacf_reset(chip, 1);
259 }
260 
261 #ifdef CONFIG_PM
262 
263 int snd_pdacf_suspend(struct snd_pdacf *chip)
264 {
265 	u16 val;
266 
267 	snd_power_change_state(chip->card, SNDRV_CTL_POWER_D3hot);
268 	snd_pcm_suspend_all(chip->pcm);
269 	/* disable interrupts, but use direct write to preserve old register value in chip->regmap */
270 	val = inw(chip->port + PDAUDIOCF_REG_IER);
271 	val &= ~(PDAUDIOCF_IRQOVREN|PDAUDIOCF_IRQAKMEN|PDAUDIOCF_IRQLVLEN0|PDAUDIOCF_IRQLVLEN1);
272 	outw(val, chip->port + PDAUDIOCF_REG_IER);
273 	chip->chip_status |= PDAUDIOCF_STAT_IS_SUSPENDED;	/* ignore interrupts from now */
274 	snd_pdacf_powerdown(chip);
275 	return 0;
276 }
277 
278 static inline int check_signal(struct snd_pdacf *chip)
279 {
280 	return (chip->ak4117->rcs0 & AK4117_UNLCK) == 0;
281 }
282 
283 int snd_pdacf_resume(struct snd_pdacf *chip)
284 {
285 	int timeout = 40;
286 
287 	pdacf_reinit(chip, 1);
288 	/* wait for AK4117's PLL */
289 	while (timeout-- > 0 &&
290 	       (snd_ak4117_external_rate(chip->ak4117) <= 0 || !check_signal(chip)))
291 		mdelay(1);
292 	chip->chip_status &= ~PDAUDIOCF_STAT_IS_SUSPENDED;
293 	snd_power_change_state(chip->card, SNDRV_CTL_POWER_D0);
294 	return 0;
295 }
296 #endif
297