1 /*
2  * Driver for Sound Cors PDAudioCF soundcard
3  *
4  * Copyright (c) 2003 by Jaroslav Kysela <perex@perex.cz>
5  *
6  *   This program is free software; you can redistribute it and/or modify
7  *   it under the terms of the GNU General Public License as published by
8  *   the Free Software Foundation; either version 2 of the License, or
9  *   (at your option) any later version.
10  *
11  *   This program is distributed in the hope that it will be useful,
12  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
13  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  *   GNU General Public License for more details.
15  *
16  *   You should have received a copy of the GNU General Public License
17  *   along with this program; if not, write to the Free Software
18  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
19  */
20 
21 #ifndef __PDAUDIOCF_H
22 #define __PDAUDIOCF_H
23 
24 #include <sound/pcm.h>
25 #include <linux/io.h>
26 #include <linux/interrupt.h>
27 #include <pcmcia/cistpl.h>
28 #include <pcmcia/ds.h>
29 
30 #include <sound/ak4117.h>
31 
32 /* PDAUDIOCF registers */
33 #define PDAUDIOCF_REG_MD	0x00	/* music data, R/O */
34 #define PDAUDIOCF_REG_WDP	0x02	/* write data pointer / 2, R/O */
35 #define PDAUDIOCF_REG_RDP	0x04	/* read data pointer / 2, R/O */
36 #define PDAUDIOCF_REG_TCR	0x06	/* test control register W/O */
37 #define PDAUDIOCF_REG_SCR	0x08	/* status and control, R/W (see bit description) */
38 #define PDAUDIOCF_REG_ISR	0x0a	/* interrupt status, R/O */
39 #define PDAUDIOCF_REG_IER	0x0c	/* interrupt enable, R/W */
40 #define PDAUDIOCF_REG_AK_IFR	0x0e	/* AK interface register, R/W */
41 
42 /* PDAUDIOCF_REG_TCR */
43 #define PDAUDIOCF_ELIMAKMBIT	(1<<0)	/* simulate AKM music data */
44 #define PDAUDIOCF_TESTDATASEL	(1<<1)	/* test data selection, 0 = 0x55, 1 = pseudo-random */
45 
46 /* PDAUDIOCF_REG_SCR */
47 #define PDAUDIOCF_AK_SBP	(1<<0)	/* serial port busy flag */
48 #define PDAUDIOCF_RST		(1<<2)	/* FPGA, AKM + SRAM buffer reset */
49 #define PDAUDIOCF_PDN		(1<<3)	/* power down bit */
50 #define PDAUDIOCF_CLKDIV0	(1<<4)	/* choose 24.576Mhz clock divided by 1,2,3 or 4 */
51 #define PDAUDIOCF_CLKDIV1	(1<<5)
52 #define PDAUDIOCF_RECORD	(1<<6)	/* start capturing to SRAM */
53 #define PDAUDIOCF_AK_SDD	(1<<7)	/* music data detected */
54 #define PDAUDIOCF_RED_LED_OFF	(1<<8)	/* red LED off override */
55 #define PDAUDIOCF_BLUE_LED_OFF	(1<<9)	/* blue LED off override */
56 #define PDAUDIOCF_DATAFMT0	(1<<10)	/* data format bits: 00 = 16-bit, 01 = 18-bit */
57 #define PDAUDIOCF_DATAFMT1	(1<<11)	/* 10 = 20-bit, 11 = 24-bit, all right justified */
58 #define PDAUDIOCF_FPGAREV(x)	((x>>12)&0x0f) /* FPGA revision */
59 
60 /* PDAUDIOCF_REG_ISR */
61 #define PDAUDIOCF_IRQLVL	(1<<0)	/* Buffer level IRQ */
62 #define PDAUDIOCF_IRQOVR	(1<<1)	/* Overrun IRQ */
63 #define PDAUDIOCF_IRQAKM	(1<<2)	/* AKM IRQ */
64 
65 /* PDAUDIOCF_REG_IER */
66 #define PDAUDIOCF_IRQLVLEN0	(1<<0)	/* fill threshold levels; 00 = none, 01 = 1/8th of buffer */
67 #define PDAUDIOCF_IRQLVLEN1	(1<<1)	/* 10 = 1/4th of buffer, 11 = 1/2th of buffer */
68 #define PDAUDIOCF_IRQOVREN	(1<<2)	/* enable overrun IRQ */
69 #define PDAUDIOCF_IRQAKMEN	(1<<3)	/* enable AKM IRQ */
70 #define PDAUDIOCF_BLUEDUTY0	(1<<8)	/* blue LED duty cycle; 00 = 100%, 01 = 50% */
71 #define PDAUDIOCF_BLUEDUTY1	(1<<9)	/* 02 = 25%, 11 = 12% */
72 #define PDAUDIOCF_REDDUTY0	(1<<10)	/* red LED duty cycle; 00 = 100%, 01 = 50% */
73 #define PDAUDIOCF_REDDUTY1	(1<<11)	/* 02 = 25%, 11 = 12% */
74 #define PDAUDIOCF_BLUESDD	(1<<12)	/* blue LED against SDD bit */
75 #define PDAUDIOCF_BLUEMODULATE	(1<<13)	/* save power when 100% duty cycle selected */
76 #define PDAUDIOCF_REDMODULATE	(1<<14)	/* save power when 100% duty cycle selected */
77 #define PDAUDIOCF_HALFRATE	(1<<15)	/* slow both LED blinks by half (also spdif detect rate) */
78 
79 /* chip status */
80 #define PDAUDIOCF_STAT_IS_STALE	(1<<0)
81 #define PDAUDIOCF_STAT_IS_CONFIGURED (1<<1)
82 #define PDAUDIOCF_STAT_IS_SUSPENDED (1<<2)
83 
84 struct snd_pdacf {
85 	struct snd_card *card;
86 	int index;
87 
88 	unsigned long port;
89 	int irq;
90 
91 	struct mutex reg_lock;
92 	unsigned short regmap[8];
93 	unsigned short suspend_reg_scr;
94 
95 	spinlock_t ak4117_lock;
96 	struct ak4117 *ak4117;
97 
98 	unsigned int chip_status;
99 
100 	struct snd_pcm *pcm;
101 	struct snd_pcm_substream *pcm_substream;
102 	unsigned int pcm_running: 1;
103 	unsigned int pcm_channels;
104 	unsigned int pcm_swab;
105 	unsigned int pcm_little;
106 	unsigned int pcm_frame;
107 	unsigned int pcm_sample;
108 	unsigned int pcm_xor;
109 	unsigned int pcm_size;
110 	unsigned int pcm_period;
111 	unsigned int pcm_tdone;
112 	unsigned int pcm_hwptr;
113 	void *pcm_area;
114 
115 	/* pcmcia stuff */
116 	struct pcmcia_device	*p_dev;
117 };
118 
119 static inline void pdacf_reg_write(struct snd_pdacf *chip, unsigned char reg, unsigned short val)
120 {
121 	outw(chip->regmap[reg>>1] = val, chip->port + reg);
122 }
123 
124 static inline unsigned short pdacf_reg_read(struct snd_pdacf *chip, unsigned char reg)
125 {
126 	return inw(chip->port + reg);
127 }
128 
129 struct snd_pdacf *snd_pdacf_create(struct snd_card *card);
130 int snd_pdacf_ak4117_create(struct snd_pdacf *pdacf);
131 void snd_pdacf_powerdown(struct snd_pdacf *chip);
132 #ifdef CONFIG_PM
133 int snd_pdacf_suspend(struct snd_pdacf *chip);
134 int snd_pdacf_resume(struct snd_pdacf *chip);
135 #endif
136 int snd_pdacf_pcm_new(struct snd_pdacf *chip);
137 irqreturn_t pdacf_interrupt(int irq, void *dev);
138 irqreturn_t pdacf_threaded_irq(int irq, void *dev);
139 void pdacf_reinit(struct snd_pdacf *chip, int resume);
140 
141 #endif /* __PDAUDIOCF_H */
142