1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (c) by Jaroslav Kysela <perex@perex.cz> 4 * Routines for control of YMF724/740/744/754 chips 5 */ 6 7 #include <linux/delay.h> 8 #include <linux/firmware.h> 9 #include <linux/init.h> 10 #include <linux/interrupt.h> 11 #include <linux/pci.h> 12 #include <linux/sched.h> 13 #include <linux/slab.h> 14 #include <linux/mutex.h> 15 #include <linux/module.h> 16 #include <linux/io.h> 17 18 #include <sound/core.h> 19 #include <sound/control.h> 20 #include <sound/info.h> 21 #include <sound/tlv.h> 22 #include "ymfpci.h" 23 #include <sound/asoundef.h> 24 #include <sound/mpu401.h> 25 26 #include <asm/byteorder.h> 27 28 /* 29 * common I/O routines 30 */ 31 32 static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip); 33 34 static inline u8 snd_ymfpci_readb(struct snd_ymfpci *chip, u32 offset) 35 { 36 return readb(chip->reg_area_virt + offset); 37 } 38 39 static inline void snd_ymfpci_writeb(struct snd_ymfpci *chip, u32 offset, u8 val) 40 { 41 writeb(val, chip->reg_area_virt + offset); 42 } 43 44 static inline u16 snd_ymfpci_readw(struct snd_ymfpci *chip, u32 offset) 45 { 46 return readw(chip->reg_area_virt + offset); 47 } 48 49 static inline void snd_ymfpci_writew(struct snd_ymfpci *chip, u32 offset, u16 val) 50 { 51 writew(val, chip->reg_area_virt + offset); 52 } 53 54 static inline u32 snd_ymfpci_readl(struct snd_ymfpci *chip, u32 offset) 55 { 56 return readl(chip->reg_area_virt + offset); 57 } 58 59 static inline void snd_ymfpci_writel(struct snd_ymfpci *chip, u32 offset, u32 val) 60 { 61 writel(val, chip->reg_area_virt + offset); 62 } 63 64 static int snd_ymfpci_codec_ready(struct snd_ymfpci *chip, int secondary) 65 { 66 unsigned long end_time; 67 u32 reg = secondary ? YDSXGR_SECSTATUSADR : YDSXGR_PRISTATUSADR; 68 69 end_time = jiffies + msecs_to_jiffies(750); 70 do { 71 if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0) 72 return 0; 73 schedule_timeout_uninterruptible(1); 74 } while (time_before(jiffies, end_time)); 75 dev_err(chip->card->dev, 76 "codec_ready: codec %i is not ready [0x%x]\n", 77 secondary, snd_ymfpci_readw(chip, reg)); 78 return -EBUSY; 79 } 80 81 static void snd_ymfpci_codec_write(struct snd_ac97 *ac97, u16 reg, u16 val) 82 { 83 struct snd_ymfpci *chip = ac97->private_data; 84 u32 cmd; 85 86 snd_ymfpci_codec_ready(chip, 0); 87 cmd = ((YDSXG_AC97WRITECMD | reg) << 16) | val; 88 snd_ymfpci_writel(chip, YDSXGR_AC97CMDDATA, cmd); 89 } 90 91 static u16 snd_ymfpci_codec_read(struct snd_ac97 *ac97, u16 reg) 92 { 93 struct snd_ymfpci *chip = ac97->private_data; 94 95 if (snd_ymfpci_codec_ready(chip, 0)) 96 return ~0; 97 snd_ymfpci_writew(chip, YDSXGR_AC97CMDADR, YDSXG_AC97READCMD | reg); 98 if (snd_ymfpci_codec_ready(chip, 0)) 99 return ~0; 100 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_744 && chip->rev < 2) { 101 int i; 102 for (i = 0; i < 600; i++) 103 snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA); 104 } 105 return snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA); 106 } 107 108 /* 109 * Misc routines 110 */ 111 112 static u32 snd_ymfpci_calc_delta(u32 rate) 113 { 114 switch (rate) { 115 case 8000: return 0x02aaab00; 116 case 11025: return 0x03accd00; 117 case 16000: return 0x05555500; 118 case 22050: return 0x07599a00; 119 case 32000: return 0x0aaaab00; 120 case 44100: return 0x0eb33300; 121 default: return ((rate << 16) / 375) << 5; 122 } 123 } 124 125 static const u32 def_rate[8] = { 126 100, 2000, 8000, 11025, 16000, 22050, 32000, 48000 127 }; 128 129 static u32 snd_ymfpci_calc_lpfK(u32 rate) 130 { 131 u32 i; 132 static const u32 val[8] = { 133 0x00570000, 0x06AA0000, 0x18B20000, 0x20930000, 134 0x2B9A0000, 0x35A10000, 0x3EAA0000, 0x40000000 135 }; 136 137 if (rate == 44100) 138 return 0x40000000; /* FIXME: What's the right value? */ 139 for (i = 0; i < 8; i++) 140 if (rate <= def_rate[i]) 141 return val[i]; 142 return val[0]; 143 } 144 145 static u32 snd_ymfpci_calc_lpfQ(u32 rate) 146 { 147 u32 i; 148 static const u32 val[8] = { 149 0x35280000, 0x34A70000, 0x32020000, 0x31770000, 150 0x31390000, 0x31C90000, 0x33D00000, 0x40000000 151 }; 152 153 if (rate == 44100) 154 return 0x370A0000; 155 for (i = 0; i < 8; i++) 156 if (rate <= def_rate[i]) 157 return val[i]; 158 return val[0]; 159 } 160 161 /* 162 * Hardware start management 163 */ 164 165 static void snd_ymfpci_hw_start(struct snd_ymfpci *chip) 166 { 167 unsigned long flags; 168 169 spin_lock_irqsave(&chip->reg_lock, flags); 170 if (chip->start_count++ > 0) 171 goto __end; 172 snd_ymfpci_writel(chip, YDSXGR_MODE, 173 snd_ymfpci_readl(chip, YDSXGR_MODE) | 3); 174 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1; 175 __end: 176 spin_unlock_irqrestore(&chip->reg_lock, flags); 177 } 178 179 static void snd_ymfpci_hw_stop(struct snd_ymfpci *chip) 180 { 181 unsigned long flags; 182 long timeout = 1000; 183 184 spin_lock_irqsave(&chip->reg_lock, flags); 185 if (--chip->start_count > 0) 186 goto __end; 187 snd_ymfpci_writel(chip, YDSXGR_MODE, 188 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~3); 189 while (timeout-- > 0) { 190 if ((snd_ymfpci_readl(chip, YDSXGR_STATUS) & 2) == 0) 191 break; 192 } 193 if (atomic_read(&chip->interrupt_sleep_count)) { 194 atomic_set(&chip->interrupt_sleep_count, 0); 195 wake_up(&chip->interrupt_sleep); 196 } 197 __end: 198 spin_unlock_irqrestore(&chip->reg_lock, flags); 199 } 200 201 /* 202 * Playback voice management 203 */ 204 205 static int voice_alloc(struct snd_ymfpci *chip, 206 enum snd_ymfpci_voice_type type, int pair, 207 struct snd_ymfpci_voice **rvoice) 208 { 209 struct snd_ymfpci_voice *voice, *voice2; 210 int idx; 211 212 *rvoice = NULL; 213 for (idx = 0; idx < YDSXG_PLAYBACK_VOICES; idx += pair ? 2 : 1) { 214 voice = &chip->voices[idx]; 215 voice2 = pair ? &chip->voices[idx+1] : NULL; 216 if (voice->use || (voice2 && voice2->use)) 217 continue; 218 voice->use = 1; 219 if (voice2) 220 voice2->use = 1; 221 switch (type) { 222 case YMFPCI_PCM: 223 voice->pcm = 1; 224 if (voice2) 225 voice2->pcm = 1; 226 break; 227 case YMFPCI_SYNTH: 228 voice->synth = 1; 229 break; 230 case YMFPCI_MIDI: 231 voice->midi = 1; 232 break; 233 } 234 snd_ymfpci_hw_start(chip); 235 if (voice2) 236 snd_ymfpci_hw_start(chip); 237 *rvoice = voice; 238 return 0; 239 } 240 return -ENOMEM; 241 } 242 243 static int snd_ymfpci_voice_alloc(struct snd_ymfpci *chip, 244 enum snd_ymfpci_voice_type type, int pair, 245 struct snd_ymfpci_voice **rvoice) 246 { 247 unsigned long flags; 248 int result; 249 250 if (snd_BUG_ON(!rvoice)) 251 return -EINVAL; 252 if (snd_BUG_ON(pair && type != YMFPCI_PCM)) 253 return -EINVAL; 254 255 spin_lock_irqsave(&chip->voice_lock, flags); 256 for (;;) { 257 result = voice_alloc(chip, type, pair, rvoice); 258 if (result == 0 || type != YMFPCI_PCM) 259 break; 260 /* TODO: synth/midi voice deallocation */ 261 break; 262 } 263 spin_unlock_irqrestore(&chip->voice_lock, flags); 264 return result; 265 } 266 267 static int snd_ymfpci_voice_free(struct snd_ymfpci *chip, struct snd_ymfpci_voice *pvoice) 268 { 269 unsigned long flags; 270 271 if (snd_BUG_ON(!pvoice)) 272 return -EINVAL; 273 snd_ymfpci_hw_stop(chip); 274 spin_lock_irqsave(&chip->voice_lock, flags); 275 if (pvoice->number == chip->src441_used) { 276 chip->src441_used = -1; 277 pvoice->ypcm->use_441_slot = 0; 278 } 279 pvoice->use = pvoice->pcm = pvoice->synth = pvoice->midi = 0; 280 pvoice->ypcm = NULL; 281 pvoice->interrupt = NULL; 282 spin_unlock_irqrestore(&chip->voice_lock, flags); 283 return 0; 284 } 285 286 /* 287 * PCM part 288 */ 289 290 static void snd_ymfpci_pcm_interrupt(struct snd_ymfpci *chip, struct snd_ymfpci_voice *voice) 291 { 292 struct snd_ymfpci_pcm *ypcm; 293 u32 pos, delta; 294 295 if ((ypcm = voice->ypcm) == NULL) 296 return; 297 if (ypcm->substream == NULL) 298 return; 299 spin_lock(&chip->reg_lock); 300 if (ypcm->running) { 301 pos = le32_to_cpu(voice->bank[chip->active_bank].start); 302 if (pos < ypcm->last_pos) 303 delta = pos + (ypcm->buffer_size - ypcm->last_pos); 304 else 305 delta = pos - ypcm->last_pos; 306 ypcm->period_pos += delta; 307 ypcm->last_pos = pos; 308 if (ypcm->period_pos >= ypcm->period_size) { 309 /* 310 dev_dbg(chip->card->dev, 311 "done - active_bank = 0x%x, start = 0x%x\n", 312 chip->active_bank, 313 voice->bank[chip->active_bank].start); 314 */ 315 ypcm->period_pos %= ypcm->period_size; 316 spin_unlock(&chip->reg_lock); 317 snd_pcm_period_elapsed(ypcm->substream); 318 spin_lock(&chip->reg_lock); 319 } 320 321 if (unlikely(ypcm->update_pcm_vol)) { 322 unsigned int subs = ypcm->substream->number; 323 unsigned int next_bank = 1 - chip->active_bank; 324 struct snd_ymfpci_playback_bank *bank; 325 __le32 volume; 326 327 bank = &voice->bank[next_bank]; 328 volume = cpu_to_le32(chip->pcm_mixer[subs].left << 15); 329 bank->left_gain_end = volume; 330 if (ypcm->output_rear) 331 bank->eff2_gain_end = volume; 332 if (ypcm->voices[1]) 333 bank = &ypcm->voices[1]->bank[next_bank]; 334 volume = cpu_to_le32(chip->pcm_mixer[subs].right << 15); 335 bank->right_gain_end = volume; 336 if (ypcm->output_rear) 337 bank->eff3_gain_end = volume; 338 ypcm->update_pcm_vol--; 339 } 340 } 341 spin_unlock(&chip->reg_lock); 342 } 343 344 static void snd_ymfpci_pcm_capture_interrupt(struct snd_pcm_substream *substream) 345 { 346 struct snd_pcm_runtime *runtime = substream->runtime; 347 struct snd_ymfpci_pcm *ypcm = runtime->private_data; 348 struct snd_ymfpci *chip = ypcm->chip; 349 u32 pos, delta; 350 351 spin_lock(&chip->reg_lock); 352 if (ypcm->running) { 353 pos = le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift; 354 if (pos < ypcm->last_pos) 355 delta = pos + (ypcm->buffer_size - ypcm->last_pos); 356 else 357 delta = pos - ypcm->last_pos; 358 ypcm->period_pos += delta; 359 ypcm->last_pos = pos; 360 if (ypcm->period_pos >= ypcm->period_size) { 361 ypcm->period_pos %= ypcm->period_size; 362 /* 363 dev_dbg(chip->card->dev, 364 "done - active_bank = 0x%x, start = 0x%x\n", 365 chip->active_bank, 366 voice->bank[chip->active_bank].start); 367 */ 368 spin_unlock(&chip->reg_lock); 369 snd_pcm_period_elapsed(substream); 370 spin_lock(&chip->reg_lock); 371 } 372 } 373 spin_unlock(&chip->reg_lock); 374 } 375 376 static int snd_ymfpci_playback_trigger(struct snd_pcm_substream *substream, 377 int cmd) 378 { 379 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 380 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data; 381 struct snd_kcontrol *kctl = NULL; 382 int result = 0; 383 384 spin_lock(&chip->reg_lock); 385 if (ypcm->voices[0] == NULL) { 386 result = -EINVAL; 387 goto __unlock; 388 } 389 switch (cmd) { 390 case SNDRV_PCM_TRIGGER_START: 391 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 392 case SNDRV_PCM_TRIGGER_RESUME: 393 chip->ctrl_playback[ypcm->voices[0]->number + 1] = cpu_to_le32(ypcm->voices[0]->bank_addr); 394 if (ypcm->voices[1] != NULL && !ypcm->use_441_slot) 395 chip->ctrl_playback[ypcm->voices[1]->number + 1] = cpu_to_le32(ypcm->voices[1]->bank_addr); 396 ypcm->running = 1; 397 break; 398 case SNDRV_PCM_TRIGGER_STOP: 399 if (substream->pcm == chip->pcm && !ypcm->use_441_slot) { 400 kctl = chip->pcm_mixer[substream->number].ctl; 401 kctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE; 402 } 403 /* fall through */ 404 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 405 case SNDRV_PCM_TRIGGER_SUSPEND: 406 chip->ctrl_playback[ypcm->voices[0]->number + 1] = 0; 407 if (ypcm->voices[1] != NULL && !ypcm->use_441_slot) 408 chip->ctrl_playback[ypcm->voices[1]->number + 1] = 0; 409 ypcm->running = 0; 410 break; 411 default: 412 result = -EINVAL; 413 break; 414 } 415 __unlock: 416 spin_unlock(&chip->reg_lock); 417 if (kctl) 418 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id); 419 return result; 420 } 421 static int snd_ymfpci_capture_trigger(struct snd_pcm_substream *substream, 422 int cmd) 423 { 424 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 425 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data; 426 int result = 0; 427 u32 tmp; 428 429 spin_lock(&chip->reg_lock); 430 switch (cmd) { 431 case SNDRV_PCM_TRIGGER_START: 432 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 433 case SNDRV_PCM_TRIGGER_RESUME: 434 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) | (1 << ypcm->capture_bank_number); 435 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp); 436 ypcm->running = 1; 437 break; 438 case SNDRV_PCM_TRIGGER_STOP: 439 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 440 case SNDRV_PCM_TRIGGER_SUSPEND: 441 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) & ~(1 << ypcm->capture_bank_number); 442 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp); 443 ypcm->running = 0; 444 break; 445 default: 446 result = -EINVAL; 447 break; 448 } 449 spin_unlock(&chip->reg_lock); 450 return result; 451 } 452 453 static int snd_ymfpci_pcm_voice_alloc(struct snd_ymfpci_pcm *ypcm, int voices) 454 { 455 int err; 456 457 if (ypcm->voices[1] != NULL && voices < 2) { 458 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[1]); 459 ypcm->voices[1] = NULL; 460 } 461 if (voices == 1 && ypcm->voices[0] != NULL) 462 return 0; /* already allocated */ 463 if (voices == 2 && ypcm->voices[0] != NULL && ypcm->voices[1] != NULL) 464 return 0; /* already allocated */ 465 if (voices > 1) { 466 if (ypcm->voices[0] != NULL && ypcm->voices[1] == NULL) { 467 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[0]); 468 ypcm->voices[0] = NULL; 469 } 470 } 471 err = snd_ymfpci_voice_alloc(ypcm->chip, YMFPCI_PCM, voices > 1, &ypcm->voices[0]); 472 if (err < 0) 473 return err; 474 ypcm->voices[0]->ypcm = ypcm; 475 ypcm->voices[0]->interrupt = snd_ymfpci_pcm_interrupt; 476 if (voices > 1) { 477 ypcm->voices[1] = &ypcm->chip->voices[ypcm->voices[0]->number + 1]; 478 ypcm->voices[1]->ypcm = ypcm; 479 } 480 return 0; 481 } 482 483 static void snd_ymfpci_pcm_init_voice(struct snd_ymfpci_pcm *ypcm, unsigned int voiceidx, 484 struct snd_pcm_runtime *runtime, 485 int has_pcm_volume) 486 { 487 struct snd_ymfpci_voice *voice = ypcm->voices[voiceidx]; 488 u32 format; 489 u32 delta = snd_ymfpci_calc_delta(runtime->rate); 490 u32 lpfQ = snd_ymfpci_calc_lpfQ(runtime->rate); 491 u32 lpfK = snd_ymfpci_calc_lpfK(runtime->rate); 492 struct snd_ymfpci_playback_bank *bank; 493 unsigned int nbank; 494 __le32 vol_left, vol_right; 495 u8 use_left, use_right; 496 unsigned long flags; 497 498 if (snd_BUG_ON(!voice)) 499 return; 500 if (runtime->channels == 1) { 501 use_left = 1; 502 use_right = 1; 503 } else { 504 use_left = (voiceidx & 1) == 0; 505 use_right = !use_left; 506 } 507 if (has_pcm_volume) { 508 vol_left = cpu_to_le32(ypcm->chip->pcm_mixer 509 [ypcm->substream->number].left << 15); 510 vol_right = cpu_to_le32(ypcm->chip->pcm_mixer 511 [ypcm->substream->number].right << 15); 512 } else { 513 vol_left = cpu_to_le32(0x40000000); 514 vol_right = cpu_to_le32(0x40000000); 515 } 516 spin_lock_irqsave(&ypcm->chip->voice_lock, flags); 517 format = runtime->channels == 2 ? 0x00010000 : 0; 518 if (snd_pcm_format_width(runtime->format) == 8) 519 format |= 0x80000000; 520 else if (ypcm->chip->device_id == PCI_DEVICE_ID_YAMAHA_754 && 521 runtime->rate == 44100 && runtime->channels == 2 && 522 voiceidx == 0 && (ypcm->chip->src441_used == -1 || 523 ypcm->chip->src441_used == voice->number)) { 524 ypcm->chip->src441_used = voice->number; 525 ypcm->use_441_slot = 1; 526 format |= 0x10000000; 527 } 528 if (ypcm->chip->src441_used == voice->number && 529 (format & 0x10000000) == 0) { 530 ypcm->chip->src441_used = -1; 531 ypcm->use_441_slot = 0; 532 } 533 if (runtime->channels == 2 && (voiceidx & 1) != 0) 534 format |= 1; 535 spin_unlock_irqrestore(&ypcm->chip->voice_lock, flags); 536 for (nbank = 0; nbank < 2; nbank++) { 537 bank = &voice->bank[nbank]; 538 memset(bank, 0, sizeof(*bank)); 539 bank->format = cpu_to_le32(format); 540 bank->base = cpu_to_le32(runtime->dma_addr); 541 bank->loop_end = cpu_to_le32(ypcm->buffer_size); 542 bank->lpfQ = cpu_to_le32(lpfQ); 543 bank->delta = 544 bank->delta_end = cpu_to_le32(delta); 545 bank->lpfK = 546 bank->lpfK_end = cpu_to_le32(lpfK); 547 bank->eg_gain = 548 bank->eg_gain_end = cpu_to_le32(0x40000000); 549 550 if (ypcm->output_front) { 551 if (use_left) { 552 bank->left_gain = 553 bank->left_gain_end = vol_left; 554 } 555 if (use_right) { 556 bank->right_gain = 557 bank->right_gain_end = vol_right; 558 } 559 } 560 if (ypcm->output_rear) { 561 if (!ypcm->swap_rear) { 562 if (use_left) { 563 bank->eff2_gain = 564 bank->eff2_gain_end = vol_left; 565 } 566 if (use_right) { 567 bank->eff3_gain = 568 bank->eff3_gain_end = vol_right; 569 } 570 } else { 571 /* The SPDIF out channels seem to be swapped, so we have 572 * to swap them here, too. The rear analog out channels 573 * will be wrong, but otherwise AC3 would not work. 574 */ 575 if (use_left) { 576 bank->eff3_gain = 577 bank->eff3_gain_end = vol_left; 578 } 579 if (use_right) { 580 bank->eff2_gain = 581 bank->eff2_gain_end = vol_right; 582 } 583 } 584 } 585 } 586 } 587 588 static int snd_ymfpci_ac3_init(struct snd_ymfpci *chip) 589 { 590 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &chip->pci->dev, 591 4096, &chip->ac3_tmp_base) < 0) 592 return -ENOMEM; 593 594 chip->bank_effect[3][0]->base = 595 chip->bank_effect[3][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr); 596 chip->bank_effect[3][0]->loop_end = 597 chip->bank_effect[3][1]->loop_end = cpu_to_le32(1024); 598 chip->bank_effect[4][0]->base = 599 chip->bank_effect[4][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr + 2048); 600 chip->bank_effect[4][0]->loop_end = 601 chip->bank_effect[4][1]->loop_end = cpu_to_le32(1024); 602 603 spin_lock_irq(&chip->reg_lock); 604 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 605 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) | 3 << 3); 606 spin_unlock_irq(&chip->reg_lock); 607 return 0; 608 } 609 610 static int snd_ymfpci_ac3_done(struct snd_ymfpci *chip) 611 { 612 spin_lock_irq(&chip->reg_lock); 613 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 614 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) & ~(3 << 3)); 615 spin_unlock_irq(&chip->reg_lock); 616 // snd_ymfpci_irq_wait(chip); 617 if (chip->ac3_tmp_base.area) { 618 snd_dma_free_pages(&chip->ac3_tmp_base); 619 chip->ac3_tmp_base.area = NULL; 620 } 621 return 0; 622 } 623 624 static int snd_ymfpci_playback_hw_params(struct snd_pcm_substream *substream, 625 struct snd_pcm_hw_params *hw_params) 626 { 627 struct snd_pcm_runtime *runtime = substream->runtime; 628 struct snd_ymfpci_pcm *ypcm = runtime->private_data; 629 int err; 630 631 if ((err = snd_ymfpci_pcm_voice_alloc(ypcm, params_channels(hw_params))) < 0) 632 return err; 633 return 0; 634 } 635 636 static int snd_ymfpci_playback_hw_free(struct snd_pcm_substream *substream) 637 { 638 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 639 struct snd_pcm_runtime *runtime = substream->runtime; 640 struct snd_ymfpci_pcm *ypcm; 641 642 if (runtime->private_data == NULL) 643 return 0; 644 ypcm = runtime->private_data; 645 646 /* wait, until the PCI operations are not finished */ 647 snd_ymfpci_irq_wait(chip); 648 if (ypcm->voices[1]) { 649 snd_ymfpci_voice_free(chip, ypcm->voices[1]); 650 ypcm->voices[1] = NULL; 651 } 652 if (ypcm->voices[0]) { 653 snd_ymfpci_voice_free(chip, ypcm->voices[0]); 654 ypcm->voices[0] = NULL; 655 } 656 return 0; 657 } 658 659 static int snd_ymfpci_playback_prepare(struct snd_pcm_substream *substream) 660 { 661 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 662 struct snd_pcm_runtime *runtime = substream->runtime; 663 struct snd_ymfpci_pcm *ypcm = runtime->private_data; 664 struct snd_kcontrol *kctl; 665 unsigned int nvoice; 666 667 ypcm->period_size = runtime->period_size; 668 ypcm->buffer_size = runtime->buffer_size; 669 ypcm->period_pos = 0; 670 ypcm->last_pos = 0; 671 for (nvoice = 0; nvoice < runtime->channels; nvoice++) 672 snd_ymfpci_pcm_init_voice(ypcm, nvoice, runtime, 673 substream->pcm == chip->pcm); 674 675 if (substream->pcm == chip->pcm && !ypcm->use_441_slot) { 676 kctl = chip->pcm_mixer[substream->number].ctl; 677 kctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE; 678 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id); 679 } 680 return 0; 681 } 682 683 static int snd_ymfpci_capture_hw_free(struct snd_pcm_substream *substream) 684 { 685 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 686 687 /* wait, until the PCI operations are not finished */ 688 snd_ymfpci_irq_wait(chip); 689 return 0; 690 } 691 692 static int snd_ymfpci_capture_prepare(struct snd_pcm_substream *substream) 693 { 694 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 695 struct snd_pcm_runtime *runtime = substream->runtime; 696 struct snd_ymfpci_pcm *ypcm = runtime->private_data; 697 struct snd_ymfpci_capture_bank * bank; 698 int nbank; 699 u32 rate, format; 700 701 ypcm->period_size = runtime->period_size; 702 ypcm->buffer_size = runtime->buffer_size; 703 ypcm->period_pos = 0; 704 ypcm->last_pos = 0; 705 ypcm->shift = 0; 706 rate = ((48000 * 4096) / runtime->rate) - 1; 707 format = 0; 708 if (runtime->channels == 2) { 709 format |= 2; 710 ypcm->shift++; 711 } 712 if (snd_pcm_format_width(runtime->format) == 8) 713 format |= 1; 714 else 715 ypcm->shift++; 716 switch (ypcm->capture_bank_number) { 717 case 0: 718 snd_ymfpci_writel(chip, YDSXGR_RECFORMAT, format); 719 snd_ymfpci_writel(chip, YDSXGR_RECSLOTSR, rate); 720 break; 721 case 1: 722 snd_ymfpci_writel(chip, YDSXGR_ADCFORMAT, format); 723 snd_ymfpci_writel(chip, YDSXGR_ADCSLOTSR, rate); 724 break; 725 } 726 for (nbank = 0; nbank < 2; nbank++) { 727 bank = chip->bank_capture[ypcm->capture_bank_number][nbank]; 728 bank->base = cpu_to_le32(runtime->dma_addr); 729 bank->loop_end = cpu_to_le32(ypcm->buffer_size << ypcm->shift); 730 bank->start = 0; 731 bank->num_of_loops = 0; 732 } 733 return 0; 734 } 735 736 static snd_pcm_uframes_t snd_ymfpci_playback_pointer(struct snd_pcm_substream *substream) 737 { 738 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 739 struct snd_pcm_runtime *runtime = substream->runtime; 740 struct snd_ymfpci_pcm *ypcm = runtime->private_data; 741 struct snd_ymfpci_voice *voice = ypcm->voices[0]; 742 743 if (!(ypcm->running && voice)) 744 return 0; 745 return le32_to_cpu(voice->bank[chip->active_bank].start); 746 } 747 748 static snd_pcm_uframes_t snd_ymfpci_capture_pointer(struct snd_pcm_substream *substream) 749 { 750 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 751 struct snd_pcm_runtime *runtime = substream->runtime; 752 struct snd_ymfpci_pcm *ypcm = runtime->private_data; 753 754 if (!ypcm->running) 755 return 0; 756 return le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift; 757 } 758 759 static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip) 760 { 761 wait_queue_entry_t wait; 762 int loops = 4; 763 764 while (loops-- > 0) { 765 if ((snd_ymfpci_readl(chip, YDSXGR_MODE) & 3) == 0) 766 continue; 767 init_waitqueue_entry(&wait, current); 768 add_wait_queue(&chip->interrupt_sleep, &wait); 769 atomic_inc(&chip->interrupt_sleep_count); 770 schedule_timeout_uninterruptible(msecs_to_jiffies(50)); 771 remove_wait_queue(&chip->interrupt_sleep, &wait); 772 } 773 } 774 775 static irqreturn_t snd_ymfpci_interrupt(int irq, void *dev_id) 776 { 777 struct snd_ymfpci *chip = dev_id; 778 u32 status, nvoice, mode; 779 struct snd_ymfpci_voice *voice; 780 781 status = snd_ymfpci_readl(chip, YDSXGR_STATUS); 782 if (status & 0x80000000) { 783 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1; 784 spin_lock(&chip->voice_lock); 785 for (nvoice = 0; nvoice < YDSXG_PLAYBACK_VOICES; nvoice++) { 786 voice = &chip->voices[nvoice]; 787 if (voice->interrupt) 788 voice->interrupt(chip, voice); 789 } 790 for (nvoice = 0; nvoice < YDSXG_CAPTURE_VOICES; nvoice++) { 791 if (chip->capture_substream[nvoice]) 792 snd_ymfpci_pcm_capture_interrupt(chip->capture_substream[nvoice]); 793 } 794 #if 0 795 for (nvoice = 0; nvoice < YDSXG_EFFECT_VOICES; nvoice++) { 796 if (chip->effect_substream[nvoice]) 797 snd_ymfpci_pcm_effect_interrupt(chip->effect_substream[nvoice]); 798 } 799 #endif 800 spin_unlock(&chip->voice_lock); 801 spin_lock(&chip->reg_lock); 802 snd_ymfpci_writel(chip, YDSXGR_STATUS, 0x80000000); 803 mode = snd_ymfpci_readl(chip, YDSXGR_MODE) | 2; 804 snd_ymfpci_writel(chip, YDSXGR_MODE, mode); 805 spin_unlock(&chip->reg_lock); 806 807 if (atomic_read(&chip->interrupt_sleep_count)) { 808 atomic_set(&chip->interrupt_sleep_count, 0); 809 wake_up(&chip->interrupt_sleep); 810 } 811 } 812 813 status = snd_ymfpci_readw(chip, YDSXGR_INTFLAG); 814 if (status & 1) { 815 if (chip->timer) 816 snd_timer_interrupt(chip->timer, chip->timer_ticks); 817 } 818 snd_ymfpci_writew(chip, YDSXGR_INTFLAG, status); 819 820 if (chip->rawmidi) 821 snd_mpu401_uart_interrupt(irq, chip->rawmidi->private_data); 822 return IRQ_HANDLED; 823 } 824 825 static const struct snd_pcm_hardware snd_ymfpci_playback = 826 { 827 .info = (SNDRV_PCM_INFO_MMAP | 828 SNDRV_PCM_INFO_MMAP_VALID | 829 SNDRV_PCM_INFO_INTERLEAVED | 830 SNDRV_PCM_INFO_BLOCK_TRANSFER | 831 SNDRV_PCM_INFO_PAUSE | 832 SNDRV_PCM_INFO_RESUME), 833 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 834 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 835 .rate_min = 8000, 836 .rate_max = 48000, 837 .channels_min = 1, 838 .channels_max = 2, 839 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */ 840 .period_bytes_min = 64, 841 .period_bytes_max = 256 * 1024, /* FIXME: enough? */ 842 .periods_min = 3, 843 .periods_max = 1024, 844 .fifo_size = 0, 845 }; 846 847 static const struct snd_pcm_hardware snd_ymfpci_capture = 848 { 849 .info = (SNDRV_PCM_INFO_MMAP | 850 SNDRV_PCM_INFO_MMAP_VALID | 851 SNDRV_PCM_INFO_INTERLEAVED | 852 SNDRV_PCM_INFO_BLOCK_TRANSFER | 853 SNDRV_PCM_INFO_PAUSE | 854 SNDRV_PCM_INFO_RESUME), 855 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 856 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 857 .rate_min = 8000, 858 .rate_max = 48000, 859 .channels_min = 1, 860 .channels_max = 2, 861 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */ 862 .period_bytes_min = 64, 863 .period_bytes_max = 256 * 1024, /* FIXME: enough? */ 864 .periods_min = 3, 865 .periods_max = 1024, 866 .fifo_size = 0, 867 }; 868 869 static void snd_ymfpci_pcm_free_substream(struct snd_pcm_runtime *runtime) 870 { 871 kfree(runtime->private_data); 872 } 873 874 static int snd_ymfpci_playback_open_1(struct snd_pcm_substream *substream) 875 { 876 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 877 struct snd_pcm_runtime *runtime = substream->runtime; 878 struct snd_ymfpci_pcm *ypcm; 879 int err; 880 881 runtime->hw = snd_ymfpci_playback; 882 /* FIXME? True value is 256/48 = 5.33333 ms */ 883 err = snd_pcm_hw_constraint_minmax(runtime, 884 SNDRV_PCM_HW_PARAM_PERIOD_TIME, 885 5334, UINT_MAX); 886 if (err < 0) 887 return err; 888 err = snd_pcm_hw_rule_noresample(runtime, 48000); 889 if (err < 0) 890 return err; 891 892 ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL); 893 if (ypcm == NULL) 894 return -ENOMEM; 895 ypcm->chip = chip; 896 ypcm->type = PLAYBACK_VOICE; 897 ypcm->substream = substream; 898 runtime->private_data = ypcm; 899 runtime->private_free = snd_ymfpci_pcm_free_substream; 900 return 0; 901 } 902 903 /* call with spinlock held */ 904 static void ymfpci_open_extension(struct snd_ymfpci *chip) 905 { 906 if (! chip->rear_opened) { 907 if (! chip->spdif_opened) /* set AC3 */ 908 snd_ymfpci_writel(chip, YDSXGR_MODE, 909 snd_ymfpci_readl(chip, YDSXGR_MODE) | (1 << 30)); 910 /* enable second codec (4CHEN) */ 911 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG, 912 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) | 0x0010); 913 } 914 } 915 916 /* call with spinlock held */ 917 static void ymfpci_close_extension(struct snd_ymfpci *chip) 918 { 919 if (! chip->rear_opened) { 920 if (! chip->spdif_opened) 921 snd_ymfpci_writel(chip, YDSXGR_MODE, 922 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~(1 << 30)); 923 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG, 924 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) & ~0x0010); 925 } 926 } 927 928 static int snd_ymfpci_playback_open(struct snd_pcm_substream *substream) 929 { 930 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 931 struct snd_pcm_runtime *runtime = substream->runtime; 932 struct snd_ymfpci_pcm *ypcm; 933 int err; 934 935 if ((err = snd_ymfpci_playback_open_1(substream)) < 0) 936 return err; 937 ypcm = runtime->private_data; 938 ypcm->output_front = 1; 939 ypcm->output_rear = chip->mode_dup4ch ? 1 : 0; 940 ypcm->swap_rear = 0; 941 spin_lock_irq(&chip->reg_lock); 942 if (ypcm->output_rear) { 943 ymfpci_open_extension(chip); 944 chip->rear_opened++; 945 } 946 spin_unlock_irq(&chip->reg_lock); 947 return 0; 948 } 949 950 static int snd_ymfpci_playback_spdif_open(struct snd_pcm_substream *substream) 951 { 952 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 953 struct snd_pcm_runtime *runtime = substream->runtime; 954 struct snd_ymfpci_pcm *ypcm; 955 int err; 956 957 if ((err = snd_ymfpci_playback_open_1(substream)) < 0) 958 return err; 959 ypcm = runtime->private_data; 960 ypcm->output_front = 0; 961 ypcm->output_rear = 1; 962 ypcm->swap_rear = 1; 963 spin_lock_irq(&chip->reg_lock); 964 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 965 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) | 2); 966 ymfpci_open_extension(chip); 967 chip->spdif_pcm_bits = chip->spdif_bits; 968 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits); 969 chip->spdif_opened++; 970 spin_unlock_irq(&chip->reg_lock); 971 972 chip->spdif_pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE; 973 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE | 974 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id); 975 return 0; 976 } 977 978 static int snd_ymfpci_playback_4ch_open(struct snd_pcm_substream *substream) 979 { 980 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 981 struct snd_pcm_runtime *runtime = substream->runtime; 982 struct snd_ymfpci_pcm *ypcm; 983 int err; 984 985 if ((err = snd_ymfpci_playback_open_1(substream)) < 0) 986 return err; 987 ypcm = runtime->private_data; 988 ypcm->output_front = 0; 989 ypcm->output_rear = 1; 990 ypcm->swap_rear = 0; 991 spin_lock_irq(&chip->reg_lock); 992 ymfpci_open_extension(chip); 993 chip->rear_opened++; 994 spin_unlock_irq(&chip->reg_lock); 995 return 0; 996 } 997 998 static int snd_ymfpci_capture_open(struct snd_pcm_substream *substream, 999 u32 capture_bank_number) 1000 { 1001 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 1002 struct snd_pcm_runtime *runtime = substream->runtime; 1003 struct snd_ymfpci_pcm *ypcm; 1004 int err; 1005 1006 runtime->hw = snd_ymfpci_capture; 1007 /* FIXME? True value is 256/48 = 5.33333 ms */ 1008 err = snd_pcm_hw_constraint_minmax(runtime, 1009 SNDRV_PCM_HW_PARAM_PERIOD_TIME, 1010 5334, UINT_MAX); 1011 if (err < 0) 1012 return err; 1013 err = snd_pcm_hw_rule_noresample(runtime, 48000); 1014 if (err < 0) 1015 return err; 1016 1017 ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL); 1018 if (ypcm == NULL) 1019 return -ENOMEM; 1020 ypcm->chip = chip; 1021 ypcm->type = capture_bank_number + CAPTURE_REC; 1022 ypcm->substream = substream; 1023 ypcm->capture_bank_number = capture_bank_number; 1024 chip->capture_substream[capture_bank_number] = substream; 1025 runtime->private_data = ypcm; 1026 runtime->private_free = snd_ymfpci_pcm_free_substream; 1027 snd_ymfpci_hw_start(chip); 1028 return 0; 1029 } 1030 1031 static int snd_ymfpci_capture_rec_open(struct snd_pcm_substream *substream) 1032 { 1033 return snd_ymfpci_capture_open(substream, 0); 1034 } 1035 1036 static int snd_ymfpci_capture_ac97_open(struct snd_pcm_substream *substream) 1037 { 1038 return snd_ymfpci_capture_open(substream, 1); 1039 } 1040 1041 static int snd_ymfpci_playback_close_1(struct snd_pcm_substream *substream) 1042 { 1043 return 0; 1044 } 1045 1046 static int snd_ymfpci_playback_close(struct snd_pcm_substream *substream) 1047 { 1048 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 1049 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data; 1050 1051 spin_lock_irq(&chip->reg_lock); 1052 if (ypcm->output_rear && chip->rear_opened > 0) { 1053 chip->rear_opened--; 1054 ymfpci_close_extension(chip); 1055 } 1056 spin_unlock_irq(&chip->reg_lock); 1057 return snd_ymfpci_playback_close_1(substream); 1058 } 1059 1060 static int snd_ymfpci_playback_spdif_close(struct snd_pcm_substream *substream) 1061 { 1062 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 1063 1064 spin_lock_irq(&chip->reg_lock); 1065 chip->spdif_opened = 0; 1066 ymfpci_close_extension(chip); 1067 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 1068 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & ~2); 1069 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits); 1070 spin_unlock_irq(&chip->reg_lock); 1071 chip->spdif_pcm_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE; 1072 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE | 1073 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id); 1074 return snd_ymfpci_playback_close_1(substream); 1075 } 1076 1077 static int snd_ymfpci_playback_4ch_close(struct snd_pcm_substream *substream) 1078 { 1079 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 1080 1081 spin_lock_irq(&chip->reg_lock); 1082 if (chip->rear_opened > 0) { 1083 chip->rear_opened--; 1084 ymfpci_close_extension(chip); 1085 } 1086 spin_unlock_irq(&chip->reg_lock); 1087 return snd_ymfpci_playback_close_1(substream); 1088 } 1089 1090 static int snd_ymfpci_capture_close(struct snd_pcm_substream *substream) 1091 { 1092 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 1093 struct snd_pcm_runtime *runtime = substream->runtime; 1094 struct snd_ymfpci_pcm *ypcm = runtime->private_data; 1095 1096 if (ypcm != NULL) { 1097 chip->capture_substream[ypcm->capture_bank_number] = NULL; 1098 snd_ymfpci_hw_stop(chip); 1099 } 1100 return 0; 1101 } 1102 1103 static const struct snd_pcm_ops snd_ymfpci_playback_ops = { 1104 .open = snd_ymfpci_playback_open, 1105 .close = snd_ymfpci_playback_close, 1106 .hw_params = snd_ymfpci_playback_hw_params, 1107 .hw_free = snd_ymfpci_playback_hw_free, 1108 .prepare = snd_ymfpci_playback_prepare, 1109 .trigger = snd_ymfpci_playback_trigger, 1110 .pointer = snd_ymfpci_playback_pointer, 1111 }; 1112 1113 static const struct snd_pcm_ops snd_ymfpci_capture_rec_ops = { 1114 .open = snd_ymfpci_capture_rec_open, 1115 .close = snd_ymfpci_capture_close, 1116 .hw_free = snd_ymfpci_capture_hw_free, 1117 .prepare = snd_ymfpci_capture_prepare, 1118 .trigger = snd_ymfpci_capture_trigger, 1119 .pointer = snd_ymfpci_capture_pointer, 1120 }; 1121 1122 int snd_ymfpci_pcm(struct snd_ymfpci *chip, int device) 1123 { 1124 struct snd_pcm *pcm; 1125 int err; 1126 1127 if ((err = snd_pcm_new(chip->card, "YMFPCI", device, 32, 1, &pcm)) < 0) 1128 return err; 1129 pcm->private_data = chip; 1130 1131 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_ops); 1132 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_rec_ops); 1133 1134 /* global setup */ 1135 pcm->info_flags = 0; 1136 strcpy(pcm->name, "YMFPCI"); 1137 chip->pcm = pcm; 1138 1139 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, 1140 &chip->pci->dev, 64*1024, 256*1024); 1141 1142 return snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK, 1143 snd_pcm_std_chmaps, 2, 0, NULL); 1144 } 1145 1146 static const struct snd_pcm_ops snd_ymfpci_capture_ac97_ops = { 1147 .open = snd_ymfpci_capture_ac97_open, 1148 .close = snd_ymfpci_capture_close, 1149 .hw_free = snd_ymfpci_capture_hw_free, 1150 .prepare = snd_ymfpci_capture_prepare, 1151 .trigger = snd_ymfpci_capture_trigger, 1152 .pointer = snd_ymfpci_capture_pointer, 1153 }; 1154 1155 int snd_ymfpci_pcm2(struct snd_ymfpci *chip, int device) 1156 { 1157 struct snd_pcm *pcm; 1158 int err; 1159 1160 if ((err = snd_pcm_new(chip->card, "YMFPCI - PCM2", device, 0, 1, &pcm)) < 0) 1161 return err; 1162 pcm->private_data = chip; 1163 1164 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_ac97_ops); 1165 1166 /* global setup */ 1167 pcm->info_flags = 0; 1168 sprintf(pcm->name, "YMFPCI - %s", 1169 chip->device_id == PCI_DEVICE_ID_YAMAHA_754 ? "Direct Recording" : "AC'97"); 1170 chip->pcm2 = pcm; 1171 1172 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, 1173 &chip->pci->dev, 64*1024, 256*1024); 1174 1175 return 0; 1176 } 1177 1178 static const struct snd_pcm_ops snd_ymfpci_playback_spdif_ops = { 1179 .open = snd_ymfpci_playback_spdif_open, 1180 .close = snd_ymfpci_playback_spdif_close, 1181 .hw_params = snd_ymfpci_playback_hw_params, 1182 .hw_free = snd_ymfpci_playback_hw_free, 1183 .prepare = snd_ymfpci_playback_prepare, 1184 .trigger = snd_ymfpci_playback_trigger, 1185 .pointer = snd_ymfpci_playback_pointer, 1186 }; 1187 1188 int snd_ymfpci_pcm_spdif(struct snd_ymfpci *chip, int device) 1189 { 1190 struct snd_pcm *pcm; 1191 int err; 1192 1193 if ((err = snd_pcm_new(chip->card, "YMFPCI - IEC958", device, 1, 0, &pcm)) < 0) 1194 return err; 1195 pcm->private_data = chip; 1196 1197 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_spdif_ops); 1198 1199 /* global setup */ 1200 pcm->info_flags = 0; 1201 strcpy(pcm->name, "YMFPCI - IEC958"); 1202 chip->pcm_spdif = pcm; 1203 1204 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, 1205 &chip->pci->dev, 64*1024, 256*1024); 1206 1207 return 0; 1208 } 1209 1210 static const struct snd_pcm_ops snd_ymfpci_playback_4ch_ops = { 1211 .open = snd_ymfpci_playback_4ch_open, 1212 .close = snd_ymfpci_playback_4ch_close, 1213 .hw_params = snd_ymfpci_playback_hw_params, 1214 .hw_free = snd_ymfpci_playback_hw_free, 1215 .prepare = snd_ymfpci_playback_prepare, 1216 .trigger = snd_ymfpci_playback_trigger, 1217 .pointer = snd_ymfpci_playback_pointer, 1218 }; 1219 1220 static const struct snd_pcm_chmap_elem surround_map[] = { 1221 { .channels = 1, 1222 .map = { SNDRV_CHMAP_MONO } }, 1223 { .channels = 2, 1224 .map = { SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } }, 1225 { } 1226 }; 1227 1228 int snd_ymfpci_pcm_4ch(struct snd_ymfpci *chip, int device) 1229 { 1230 struct snd_pcm *pcm; 1231 int err; 1232 1233 if ((err = snd_pcm_new(chip->card, "YMFPCI - Rear", device, 1, 0, &pcm)) < 0) 1234 return err; 1235 pcm->private_data = chip; 1236 1237 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_4ch_ops); 1238 1239 /* global setup */ 1240 pcm->info_flags = 0; 1241 strcpy(pcm->name, "YMFPCI - Rear PCM"); 1242 chip->pcm_4ch = pcm; 1243 1244 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, 1245 &chip->pci->dev, 64*1024, 256*1024); 1246 1247 return snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK, 1248 surround_map, 2, 0, NULL); 1249 } 1250 1251 static int snd_ymfpci_spdif_default_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1252 { 1253 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1254 uinfo->count = 1; 1255 return 0; 1256 } 1257 1258 static int snd_ymfpci_spdif_default_get(struct snd_kcontrol *kcontrol, 1259 struct snd_ctl_elem_value *ucontrol) 1260 { 1261 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1262 1263 spin_lock_irq(&chip->reg_lock); 1264 ucontrol->value.iec958.status[0] = (chip->spdif_bits >> 0) & 0xff; 1265 ucontrol->value.iec958.status[1] = (chip->spdif_bits >> 8) & 0xff; 1266 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000; 1267 spin_unlock_irq(&chip->reg_lock); 1268 return 0; 1269 } 1270 1271 static int snd_ymfpci_spdif_default_put(struct snd_kcontrol *kcontrol, 1272 struct snd_ctl_elem_value *ucontrol) 1273 { 1274 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1275 unsigned int val; 1276 int change; 1277 1278 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) | 1279 (ucontrol->value.iec958.status[1] << 8); 1280 spin_lock_irq(&chip->reg_lock); 1281 change = chip->spdif_bits != val; 1282 chip->spdif_bits = val; 1283 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 1) && chip->pcm_spdif == NULL) 1284 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits); 1285 spin_unlock_irq(&chip->reg_lock); 1286 return change; 1287 } 1288 1289 static const struct snd_kcontrol_new snd_ymfpci_spdif_default = 1290 { 1291 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1292 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT), 1293 .info = snd_ymfpci_spdif_default_info, 1294 .get = snd_ymfpci_spdif_default_get, 1295 .put = snd_ymfpci_spdif_default_put 1296 }; 1297 1298 static int snd_ymfpci_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1299 { 1300 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1301 uinfo->count = 1; 1302 return 0; 1303 } 1304 1305 static int snd_ymfpci_spdif_mask_get(struct snd_kcontrol *kcontrol, 1306 struct snd_ctl_elem_value *ucontrol) 1307 { 1308 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1309 1310 spin_lock_irq(&chip->reg_lock); 1311 ucontrol->value.iec958.status[0] = 0x3e; 1312 ucontrol->value.iec958.status[1] = 0xff; 1313 spin_unlock_irq(&chip->reg_lock); 1314 return 0; 1315 } 1316 1317 static const struct snd_kcontrol_new snd_ymfpci_spdif_mask = 1318 { 1319 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1320 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1321 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK), 1322 .info = snd_ymfpci_spdif_mask_info, 1323 .get = snd_ymfpci_spdif_mask_get, 1324 }; 1325 1326 static int snd_ymfpci_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1327 { 1328 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1329 uinfo->count = 1; 1330 return 0; 1331 } 1332 1333 static int snd_ymfpci_spdif_stream_get(struct snd_kcontrol *kcontrol, 1334 struct snd_ctl_elem_value *ucontrol) 1335 { 1336 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1337 1338 spin_lock_irq(&chip->reg_lock); 1339 ucontrol->value.iec958.status[0] = (chip->spdif_pcm_bits >> 0) & 0xff; 1340 ucontrol->value.iec958.status[1] = (chip->spdif_pcm_bits >> 8) & 0xff; 1341 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000; 1342 spin_unlock_irq(&chip->reg_lock); 1343 return 0; 1344 } 1345 1346 static int snd_ymfpci_spdif_stream_put(struct snd_kcontrol *kcontrol, 1347 struct snd_ctl_elem_value *ucontrol) 1348 { 1349 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1350 unsigned int val; 1351 int change; 1352 1353 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) | 1354 (ucontrol->value.iec958.status[1] << 8); 1355 spin_lock_irq(&chip->reg_lock); 1356 change = chip->spdif_pcm_bits != val; 1357 chip->spdif_pcm_bits = val; 1358 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 2)) 1359 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits); 1360 spin_unlock_irq(&chip->reg_lock); 1361 return change; 1362 } 1363 1364 static const struct snd_kcontrol_new snd_ymfpci_spdif_stream = 1365 { 1366 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE, 1367 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1368 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM), 1369 .info = snd_ymfpci_spdif_stream_info, 1370 .get = snd_ymfpci_spdif_stream_get, 1371 .put = snd_ymfpci_spdif_stream_put 1372 }; 1373 1374 static int snd_ymfpci_drec_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *info) 1375 { 1376 static const char *const texts[3] = {"AC'97", "IEC958", "ZV Port"}; 1377 1378 return snd_ctl_enum_info(info, 1, 3, texts); 1379 } 1380 1381 static int snd_ymfpci_drec_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value) 1382 { 1383 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1384 u16 reg; 1385 1386 spin_lock_irq(&chip->reg_lock); 1387 reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); 1388 spin_unlock_irq(&chip->reg_lock); 1389 if (!(reg & 0x100)) 1390 value->value.enumerated.item[0] = 0; 1391 else 1392 value->value.enumerated.item[0] = 1 + ((reg & 0x200) != 0); 1393 return 0; 1394 } 1395 1396 static int snd_ymfpci_drec_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value) 1397 { 1398 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1399 u16 reg, old_reg; 1400 1401 spin_lock_irq(&chip->reg_lock); 1402 old_reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); 1403 if (value->value.enumerated.item[0] == 0) 1404 reg = old_reg & ~0x100; 1405 else 1406 reg = (old_reg & ~0x300) | 0x100 | ((value->value.enumerated.item[0] == 2) << 9); 1407 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, reg); 1408 spin_unlock_irq(&chip->reg_lock); 1409 return reg != old_reg; 1410 } 1411 1412 static const struct snd_kcontrol_new snd_ymfpci_drec_source = { 1413 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, 1414 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1415 .name = "Direct Recording Source", 1416 .info = snd_ymfpci_drec_source_info, 1417 .get = snd_ymfpci_drec_source_get, 1418 .put = snd_ymfpci_drec_source_put 1419 }; 1420 1421 /* 1422 * Mixer controls 1423 */ 1424 1425 #define YMFPCI_SINGLE(xname, xindex, reg, shift) \ 1426 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1427 .info = snd_ymfpci_info_single, \ 1428 .get = snd_ymfpci_get_single, .put = snd_ymfpci_put_single, \ 1429 .private_value = ((reg) | ((shift) << 16)) } 1430 1431 #define snd_ymfpci_info_single snd_ctl_boolean_mono_info 1432 1433 static int snd_ymfpci_get_single(struct snd_kcontrol *kcontrol, 1434 struct snd_ctl_elem_value *ucontrol) 1435 { 1436 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1437 int reg = kcontrol->private_value & 0xffff; 1438 unsigned int shift = (kcontrol->private_value >> 16) & 0xff; 1439 unsigned int mask = 1; 1440 1441 switch (reg) { 1442 case YDSXGR_SPDIFOUTCTRL: break; 1443 case YDSXGR_SPDIFINCTRL: break; 1444 default: return -EINVAL; 1445 } 1446 ucontrol->value.integer.value[0] = 1447 (snd_ymfpci_readl(chip, reg) >> shift) & mask; 1448 return 0; 1449 } 1450 1451 static int snd_ymfpci_put_single(struct snd_kcontrol *kcontrol, 1452 struct snd_ctl_elem_value *ucontrol) 1453 { 1454 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1455 int reg = kcontrol->private_value & 0xffff; 1456 unsigned int shift = (kcontrol->private_value >> 16) & 0xff; 1457 unsigned int mask = 1; 1458 int change; 1459 unsigned int val, oval; 1460 1461 switch (reg) { 1462 case YDSXGR_SPDIFOUTCTRL: break; 1463 case YDSXGR_SPDIFINCTRL: break; 1464 default: return -EINVAL; 1465 } 1466 val = (ucontrol->value.integer.value[0] & mask); 1467 val <<= shift; 1468 spin_lock_irq(&chip->reg_lock); 1469 oval = snd_ymfpci_readl(chip, reg); 1470 val = (oval & ~(mask << shift)) | val; 1471 change = val != oval; 1472 snd_ymfpci_writel(chip, reg, val); 1473 spin_unlock_irq(&chip->reg_lock); 1474 return change; 1475 } 1476 1477 static const DECLARE_TLV_DB_LINEAR(db_scale_native, TLV_DB_GAIN_MUTE, 0); 1478 1479 #define YMFPCI_DOUBLE(xname, xindex, reg) \ 1480 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1481 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \ 1482 .info = snd_ymfpci_info_double, \ 1483 .get = snd_ymfpci_get_double, .put = snd_ymfpci_put_double, \ 1484 .private_value = reg, \ 1485 .tlv = { .p = db_scale_native } } 1486 1487 static int snd_ymfpci_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1488 { 1489 unsigned int reg = kcontrol->private_value; 1490 1491 if (reg < 0x80 || reg >= 0xc0) 1492 return -EINVAL; 1493 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 1494 uinfo->count = 2; 1495 uinfo->value.integer.min = 0; 1496 uinfo->value.integer.max = 16383; 1497 return 0; 1498 } 1499 1500 static int snd_ymfpci_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1501 { 1502 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1503 unsigned int reg = kcontrol->private_value; 1504 unsigned int shift_left = 0, shift_right = 16, mask = 16383; 1505 unsigned int val; 1506 1507 if (reg < 0x80 || reg >= 0xc0) 1508 return -EINVAL; 1509 spin_lock_irq(&chip->reg_lock); 1510 val = snd_ymfpci_readl(chip, reg); 1511 spin_unlock_irq(&chip->reg_lock); 1512 ucontrol->value.integer.value[0] = (val >> shift_left) & mask; 1513 ucontrol->value.integer.value[1] = (val >> shift_right) & mask; 1514 return 0; 1515 } 1516 1517 static int snd_ymfpci_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1518 { 1519 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1520 unsigned int reg = kcontrol->private_value; 1521 unsigned int shift_left = 0, shift_right = 16, mask = 16383; 1522 int change; 1523 unsigned int val1, val2, oval; 1524 1525 if (reg < 0x80 || reg >= 0xc0) 1526 return -EINVAL; 1527 val1 = ucontrol->value.integer.value[0] & mask; 1528 val2 = ucontrol->value.integer.value[1] & mask; 1529 val1 <<= shift_left; 1530 val2 <<= shift_right; 1531 spin_lock_irq(&chip->reg_lock); 1532 oval = snd_ymfpci_readl(chip, reg); 1533 val1 = (oval & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2; 1534 change = val1 != oval; 1535 snd_ymfpci_writel(chip, reg, val1); 1536 spin_unlock_irq(&chip->reg_lock); 1537 return change; 1538 } 1539 1540 static int snd_ymfpci_put_nativedacvol(struct snd_kcontrol *kcontrol, 1541 struct snd_ctl_elem_value *ucontrol) 1542 { 1543 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1544 unsigned int reg = YDSXGR_NATIVEDACOUTVOL; 1545 unsigned int reg2 = YDSXGR_BUF441OUTVOL; 1546 int change; 1547 unsigned int value, oval; 1548 1549 value = ucontrol->value.integer.value[0] & 0x3fff; 1550 value |= (ucontrol->value.integer.value[1] & 0x3fff) << 16; 1551 spin_lock_irq(&chip->reg_lock); 1552 oval = snd_ymfpci_readl(chip, reg); 1553 change = value != oval; 1554 snd_ymfpci_writel(chip, reg, value); 1555 snd_ymfpci_writel(chip, reg2, value); 1556 spin_unlock_irq(&chip->reg_lock); 1557 return change; 1558 } 1559 1560 /* 1561 * 4ch duplication 1562 */ 1563 #define snd_ymfpci_info_dup4ch snd_ctl_boolean_mono_info 1564 1565 static int snd_ymfpci_get_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1566 { 1567 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1568 ucontrol->value.integer.value[0] = chip->mode_dup4ch; 1569 return 0; 1570 } 1571 1572 static int snd_ymfpci_put_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1573 { 1574 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1575 int change; 1576 change = (ucontrol->value.integer.value[0] != chip->mode_dup4ch); 1577 if (change) 1578 chip->mode_dup4ch = !!ucontrol->value.integer.value[0]; 1579 return change; 1580 } 1581 1582 static const struct snd_kcontrol_new snd_ymfpci_dup4ch = { 1583 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1584 .name = "4ch Duplication", 1585 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, 1586 .info = snd_ymfpci_info_dup4ch, 1587 .get = snd_ymfpci_get_dup4ch, 1588 .put = snd_ymfpci_put_dup4ch, 1589 }; 1590 1591 static const struct snd_kcontrol_new snd_ymfpci_controls[] = { 1592 { 1593 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1594 .name = "Wave Playback Volume", 1595 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | 1596 SNDRV_CTL_ELEM_ACCESS_TLV_READ, 1597 .info = snd_ymfpci_info_double, 1598 .get = snd_ymfpci_get_double, 1599 .put = snd_ymfpci_put_nativedacvol, 1600 .private_value = YDSXGR_NATIVEDACOUTVOL, 1601 .tlv = { .p = db_scale_native }, 1602 }, 1603 YMFPCI_DOUBLE("Wave Capture Volume", 0, YDSXGR_NATIVEDACLOOPVOL), 1604 YMFPCI_DOUBLE("Digital Capture Volume", 0, YDSXGR_NATIVEDACINVOL), 1605 YMFPCI_DOUBLE("Digital Capture Volume", 1, YDSXGR_NATIVEADCINVOL), 1606 YMFPCI_DOUBLE("ADC Playback Volume", 0, YDSXGR_PRIADCOUTVOL), 1607 YMFPCI_DOUBLE("ADC Capture Volume", 0, YDSXGR_PRIADCLOOPVOL), 1608 YMFPCI_DOUBLE("ADC Playback Volume", 1, YDSXGR_SECADCOUTVOL), 1609 YMFPCI_DOUBLE("ADC Capture Volume", 1, YDSXGR_SECADCLOOPVOL), 1610 YMFPCI_DOUBLE("FM Legacy Playback Volume", 0, YDSXGR_LEGACYOUTVOL), 1611 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ", PLAYBACK,VOLUME), 0, YDSXGR_ZVOUTVOL), 1612 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("", CAPTURE,VOLUME), 0, YDSXGR_ZVLOOPVOL), 1613 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ",PLAYBACK,VOLUME), 1, YDSXGR_SPDIFOUTVOL), 1614 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,VOLUME), 1, YDSXGR_SPDIFLOOPVOL), 1615 YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), 0, YDSXGR_SPDIFOUTCTRL, 0), 1616 YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), 0, YDSXGR_SPDIFINCTRL, 0), 1617 YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("Loop",NONE,NONE), 0, YDSXGR_SPDIFINCTRL, 4), 1618 }; 1619 1620 1621 /* 1622 * GPIO 1623 */ 1624 1625 static int snd_ymfpci_get_gpio_out(struct snd_ymfpci *chip, int pin) 1626 { 1627 u16 reg, mode; 1628 unsigned long flags; 1629 1630 spin_lock_irqsave(&chip->reg_lock, flags); 1631 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE); 1632 reg &= ~(1 << (pin + 8)); 1633 reg |= (1 << pin); 1634 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg); 1635 /* set the level mode for input line */ 1636 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOTYPECONFIG); 1637 mode &= ~(3 << (pin * 2)); 1638 snd_ymfpci_writew(chip, YDSXGR_GPIOTYPECONFIG, mode); 1639 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8))); 1640 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOINSTATUS); 1641 spin_unlock_irqrestore(&chip->reg_lock, flags); 1642 return (mode >> pin) & 1; 1643 } 1644 1645 static int snd_ymfpci_set_gpio_out(struct snd_ymfpci *chip, int pin, int enable) 1646 { 1647 u16 reg; 1648 unsigned long flags; 1649 1650 spin_lock_irqsave(&chip->reg_lock, flags); 1651 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE); 1652 reg &= ~(1 << pin); 1653 reg &= ~(1 << (pin + 8)); 1654 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg); 1655 snd_ymfpci_writew(chip, YDSXGR_GPIOOUTCTRL, enable << pin); 1656 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8))); 1657 spin_unlock_irqrestore(&chip->reg_lock, flags); 1658 1659 return 0; 1660 } 1661 1662 #define snd_ymfpci_gpio_sw_info snd_ctl_boolean_mono_info 1663 1664 static int snd_ymfpci_gpio_sw_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1665 { 1666 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1667 int pin = (int)kcontrol->private_value; 1668 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin); 1669 return 0; 1670 } 1671 1672 static int snd_ymfpci_gpio_sw_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1673 { 1674 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1675 int pin = (int)kcontrol->private_value; 1676 1677 if (snd_ymfpci_get_gpio_out(chip, pin) != ucontrol->value.integer.value[0]) { 1678 snd_ymfpci_set_gpio_out(chip, pin, !!ucontrol->value.integer.value[0]); 1679 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin); 1680 return 1; 1681 } 1682 return 0; 1683 } 1684 1685 static const struct snd_kcontrol_new snd_ymfpci_rear_shared = { 1686 .name = "Shared Rear/Line-In Switch", 1687 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1688 .info = snd_ymfpci_gpio_sw_info, 1689 .get = snd_ymfpci_gpio_sw_get, 1690 .put = snd_ymfpci_gpio_sw_put, 1691 .private_value = 2, 1692 }; 1693 1694 /* 1695 * PCM voice volume 1696 */ 1697 1698 static int snd_ymfpci_pcm_vol_info(struct snd_kcontrol *kcontrol, 1699 struct snd_ctl_elem_info *uinfo) 1700 { 1701 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 1702 uinfo->count = 2; 1703 uinfo->value.integer.min = 0; 1704 uinfo->value.integer.max = 0x8000; 1705 return 0; 1706 } 1707 1708 static int snd_ymfpci_pcm_vol_get(struct snd_kcontrol *kcontrol, 1709 struct snd_ctl_elem_value *ucontrol) 1710 { 1711 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1712 unsigned int subs = kcontrol->id.subdevice; 1713 1714 ucontrol->value.integer.value[0] = chip->pcm_mixer[subs].left; 1715 ucontrol->value.integer.value[1] = chip->pcm_mixer[subs].right; 1716 return 0; 1717 } 1718 1719 static int snd_ymfpci_pcm_vol_put(struct snd_kcontrol *kcontrol, 1720 struct snd_ctl_elem_value *ucontrol) 1721 { 1722 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1723 unsigned int subs = kcontrol->id.subdevice; 1724 struct snd_pcm_substream *substream; 1725 unsigned long flags; 1726 1727 if (ucontrol->value.integer.value[0] != chip->pcm_mixer[subs].left || 1728 ucontrol->value.integer.value[1] != chip->pcm_mixer[subs].right) { 1729 chip->pcm_mixer[subs].left = ucontrol->value.integer.value[0]; 1730 chip->pcm_mixer[subs].right = ucontrol->value.integer.value[1]; 1731 if (chip->pcm_mixer[subs].left > 0x8000) 1732 chip->pcm_mixer[subs].left = 0x8000; 1733 if (chip->pcm_mixer[subs].right > 0x8000) 1734 chip->pcm_mixer[subs].right = 0x8000; 1735 1736 substream = (struct snd_pcm_substream *)kcontrol->private_value; 1737 spin_lock_irqsave(&chip->voice_lock, flags); 1738 if (substream->runtime && substream->runtime->private_data) { 1739 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data; 1740 if (!ypcm->use_441_slot) 1741 ypcm->update_pcm_vol = 2; 1742 } 1743 spin_unlock_irqrestore(&chip->voice_lock, flags); 1744 return 1; 1745 } 1746 return 0; 1747 } 1748 1749 static const struct snd_kcontrol_new snd_ymfpci_pcm_volume = { 1750 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1751 .name = "PCM Playback Volume", 1752 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | 1753 SNDRV_CTL_ELEM_ACCESS_INACTIVE, 1754 .info = snd_ymfpci_pcm_vol_info, 1755 .get = snd_ymfpci_pcm_vol_get, 1756 .put = snd_ymfpci_pcm_vol_put, 1757 }; 1758 1759 1760 /* 1761 * Mixer routines 1762 */ 1763 1764 static void snd_ymfpci_mixer_free_ac97_bus(struct snd_ac97_bus *bus) 1765 { 1766 struct snd_ymfpci *chip = bus->private_data; 1767 chip->ac97_bus = NULL; 1768 } 1769 1770 static void snd_ymfpci_mixer_free_ac97(struct snd_ac97 *ac97) 1771 { 1772 struct snd_ymfpci *chip = ac97->private_data; 1773 chip->ac97 = NULL; 1774 } 1775 1776 int snd_ymfpci_mixer(struct snd_ymfpci *chip, int rear_switch) 1777 { 1778 struct snd_ac97_template ac97; 1779 struct snd_kcontrol *kctl; 1780 struct snd_pcm_substream *substream; 1781 unsigned int idx; 1782 int err; 1783 static const struct snd_ac97_bus_ops ops = { 1784 .write = snd_ymfpci_codec_write, 1785 .read = snd_ymfpci_codec_read, 1786 }; 1787 1788 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0) 1789 return err; 1790 chip->ac97_bus->private_free = snd_ymfpci_mixer_free_ac97_bus; 1791 chip->ac97_bus->no_vra = 1; /* YMFPCI doesn't need VRA */ 1792 1793 memset(&ac97, 0, sizeof(ac97)); 1794 ac97.private_data = chip; 1795 ac97.private_free = snd_ymfpci_mixer_free_ac97; 1796 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0) 1797 return err; 1798 1799 /* to be sure */ 1800 snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS, 1801 AC97_EA_VRA|AC97_EA_VRM, 0); 1802 1803 for (idx = 0; idx < ARRAY_SIZE(snd_ymfpci_controls); idx++) { 1804 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_controls[idx], chip))) < 0) 1805 return err; 1806 } 1807 if (chip->ac97->ext_id & AC97_EI_SDAC) { 1808 kctl = snd_ctl_new1(&snd_ymfpci_dup4ch, chip); 1809 err = snd_ctl_add(chip->card, kctl); 1810 if (err < 0) 1811 return err; 1812 } 1813 1814 /* add S/PDIF control */ 1815 if (snd_BUG_ON(!chip->pcm_spdif)) 1816 return -ENXIO; 1817 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_default, chip))) < 0) 1818 return err; 1819 kctl->id.device = chip->pcm_spdif->device; 1820 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_mask, chip))) < 0) 1821 return err; 1822 kctl->id.device = chip->pcm_spdif->device; 1823 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_stream, chip))) < 0) 1824 return err; 1825 kctl->id.device = chip->pcm_spdif->device; 1826 chip->spdif_pcm_ctl = kctl; 1827 1828 /* direct recording source */ 1829 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_754 && 1830 (err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_drec_source, chip))) < 0) 1831 return err; 1832 1833 /* 1834 * shared rear/line-in 1835 */ 1836 if (rear_switch) { 1837 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_rear_shared, chip))) < 0) 1838 return err; 1839 } 1840 1841 /* per-voice volume */ 1842 substream = chip->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream; 1843 for (idx = 0; idx < 32; ++idx) { 1844 kctl = snd_ctl_new1(&snd_ymfpci_pcm_volume, chip); 1845 if (!kctl) 1846 return -ENOMEM; 1847 kctl->id.device = chip->pcm->device; 1848 kctl->id.subdevice = idx; 1849 kctl->private_value = (unsigned long)substream; 1850 if ((err = snd_ctl_add(chip->card, kctl)) < 0) 1851 return err; 1852 chip->pcm_mixer[idx].left = 0x8000; 1853 chip->pcm_mixer[idx].right = 0x8000; 1854 chip->pcm_mixer[idx].ctl = kctl; 1855 substream = substream->next; 1856 } 1857 1858 return 0; 1859 } 1860 1861 1862 /* 1863 * timer 1864 */ 1865 1866 static int snd_ymfpci_timer_start(struct snd_timer *timer) 1867 { 1868 struct snd_ymfpci *chip; 1869 unsigned long flags; 1870 unsigned int count; 1871 1872 chip = snd_timer_chip(timer); 1873 spin_lock_irqsave(&chip->reg_lock, flags); 1874 if (timer->sticks > 1) { 1875 chip->timer_ticks = timer->sticks; 1876 count = timer->sticks - 1; 1877 } else { 1878 /* 1879 * Divisor 1 is not allowed; fake it by using divisor 2 and 1880 * counting two ticks for each interrupt. 1881 */ 1882 chip->timer_ticks = 2; 1883 count = 2 - 1; 1884 } 1885 snd_ymfpci_writew(chip, YDSXGR_TIMERCOUNT, count); 1886 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x03); 1887 spin_unlock_irqrestore(&chip->reg_lock, flags); 1888 return 0; 1889 } 1890 1891 static int snd_ymfpci_timer_stop(struct snd_timer *timer) 1892 { 1893 struct snd_ymfpci *chip; 1894 unsigned long flags; 1895 1896 chip = snd_timer_chip(timer); 1897 spin_lock_irqsave(&chip->reg_lock, flags); 1898 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x00); 1899 spin_unlock_irqrestore(&chip->reg_lock, flags); 1900 return 0; 1901 } 1902 1903 static int snd_ymfpci_timer_precise_resolution(struct snd_timer *timer, 1904 unsigned long *num, unsigned long *den) 1905 { 1906 *num = 1; 1907 *den = 96000; 1908 return 0; 1909 } 1910 1911 static const struct snd_timer_hardware snd_ymfpci_timer_hw = { 1912 .flags = SNDRV_TIMER_HW_AUTO, 1913 .resolution = 10417, /* 1 / 96 kHz = 10.41666...us */ 1914 .ticks = 0x10000, 1915 .start = snd_ymfpci_timer_start, 1916 .stop = snd_ymfpci_timer_stop, 1917 .precise_resolution = snd_ymfpci_timer_precise_resolution, 1918 }; 1919 1920 int snd_ymfpci_timer(struct snd_ymfpci *chip, int device) 1921 { 1922 struct snd_timer *timer = NULL; 1923 struct snd_timer_id tid; 1924 int err; 1925 1926 tid.dev_class = SNDRV_TIMER_CLASS_CARD; 1927 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE; 1928 tid.card = chip->card->number; 1929 tid.device = device; 1930 tid.subdevice = 0; 1931 if ((err = snd_timer_new(chip->card, "YMFPCI", &tid, &timer)) >= 0) { 1932 strcpy(timer->name, "YMFPCI timer"); 1933 timer->private_data = chip; 1934 timer->hw = snd_ymfpci_timer_hw; 1935 } 1936 chip->timer = timer; 1937 return err; 1938 } 1939 1940 1941 /* 1942 * proc interface 1943 */ 1944 1945 static void snd_ymfpci_proc_read(struct snd_info_entry *entry, 1946 struct snd_info_buffer *buffer) 1947 { 1948 struct snd_ymfpci *chip = entry->private_data; 1949 int i; 1950 1951 snd_iprintf(buffer, "YMFPCI\n\n"); 1952 for (i = 0; i <= YDSXGR_WORKBASE; i += 4) 1953 snd_iprintf(buffer, "%04x: %04x\n", i, snd_ymfpci_readl(chip, i)); 1954 } 1955 1956 static int snd_ymfpci_proc_init(struct snd_card *card, struct snd_ymfpci *chip) 1957 { 1958 return snd_card_ro_proc_new(card, "ymfpci", chip, snd_ymfpci_proc_read); 1959 } 1960 1961 /* 1962 * initialization routines 1963 */ 1964 1965 static void snd_ymfpci_aclink_reset(struct pci_dev * pci) 1966 { 1967 u8 cmd; 1968 1969 pci_read_config_byte(pci, PCIR_DSXG_CTRL, &cmd); 1970 #if 0 // force to reset 1971 if (cmd & 0x03) { 1972 #endif 1973 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc); 1974 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd | 0x03); 1975 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc); 1976 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL1, 0); 1977 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL2, 0); 1978 #if 0 1979 } 1980 #endif 1981 } 1982 1983 static void snd_ymfpci_enable_dsp(struct snd_ymfpci *chip) 1984 { 1985 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000001); 1986 } 1987 1988 static void snd_ymfpci_disable_dsp(struct snd_ymfpci *chip) 1989 { 1990 u32 val; 1991 int timeout = 1000; 1992 1993 val = snd_ymfpci_readl(chip, YDSXGR_CONFIG); 1994 if (val) 1995 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000000); 1996 while (timeout-- > 0) { 1997 val = snd_ymfpci_readl(chip, YDSXGR_STATUS); 1998 if ((val & 0x00000002) == 0) 1999 break; 2000 } 2001 } 2002 2003 static int snd_ymfpci_request_firmware(struct snd_ymfpci *chip) 2004 { 2005 int err, is_1e; 2006 const char *name; 2007 2008 err = request_firmware(&chip->dsp_microcode, "yamaha/ds1_dsp.fw", 2009 &chip->pci->dev); 2010 if (err >= 0) { 2011 if (chip->dsp_microcode->size != YDSXG_DSPLENGTH) { 2012 dev_err(chip->card->dev, 2013 "DSP microcode has wrong size\n"); 2014 err = -EINVAL; 2015 } 2016 } 2017 if (err < 0) 2018 return err; 2019 is_1e = chip->device_id == PCI_DEVICE_ID_YAMAHA_724F || 2020 chip->device_id == PCI_DEVICE_ID_YAMAHA_740C || 2021 chip->device_id == PCI_DEVICE_ID_YAMAHA_744 || 2022 chip->device_id == PCI_DEVICE_ID_YAMAHA_754; 2023 name = is_1e ? "yamaha/ds1e_ctrl.fw" : "yamaha/ds1_ctrl.fw"; 2024 err = request_firmware(&chip->controller_microcode, name, 2025 &chip->pci->dev); 2026 if (err >= 0) { 2027 if (chip->controller_microcode->size != YDSXG_CTRLLENGTH) { 2028 dev_err(chip->card->dev, 2029 "controller microcode has wrong size\n"); 2030 err = -EINVAL; 2031 } 2032 } 2033 if (err < 0) 2034 return err; 2035 return 0; 2036 } 2037 2038 MODULE_FIRMWARE("yamaha/ds1_dsp.fw"); 2039 MODULE_FIRMWARE("yamaha/ds1_ctrl.fw"); 2040 MODULE_FIRMWARE("yamaha/ds1e_ctrl.fw"); 2041 2042 static void snd_ymfpci_download_image(struct snd_ymfpci *chip) 2043 { 2044 int i; 2045 u16 ctrl; 2046 const __le32 *inst; 2047 2048 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x00000000); 2049 snd_ymfpci_disable_dsp(chip); 2050 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00010000); 2051 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00000000); 2052 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, 0x00000000); 2053 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 0x00000000); 2054 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0x00000000); 2055 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0x00000000); 2056 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0x00000000); 2057 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); 2058 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007); 2059 2060 /* setup DSP instruction code */ 2061 inst = (const __le32 *)chip->dsp_microcode->data; 2062 for (i = 0; i < YDSXG_DSPLENGTH / 4; i++) 2063 snd_ymfpci_writel(chip, YDSXGR_DSPINSTRAM + (i << 2), 2064 le32_to_cpu(inst[i])); 2065 2066 /* setup control instruction code */ 2067 inst = (const __le32 *)chip->controller_microcode->data; 2068 for (i = 0; i < YDSXG_CTRLLENGTH / 4; i++) 2069 snd_ymfpci_writel(chip, YDSXGR_CTRLINSTRAM + (i << 2), 2070 le32_to_cpu(inst[i])); 2071 2072 snd_ymfpci_enable_dsp(chip); 2073 } 2074 2075 static int snd_ymfpci_memalloc(struct snd_ymfpci *chip) 2076 { 2077 long size, playback_ctrl_size; 2078 int voice, bank, reg; 2079 u8 *ptr; 2080 dma_addr_t ptr_addr; 2081 2082 playback_ctrl_size = 4 + 4 * YDSXG_PLAYBACK_VOICES; 2083 chip->bank_size_playback = snd_ymfpci_readl(chip, YDSXGR_PLAYCTRLSIZE) << 2; 2084 chip->bank_size_capture = snd_ymfpci_readl(chip, YDSXGR_RECCTRLSIZE) << 2; 2085 chip->bank_size_effect = snd_ymfpci_readl(chip, YDSXGR_EFFCTRLSIZE) << 2; 2086 chip->work_size = YDSXG_DEFAULT_WORK_SIZE; 2087 2088 size = ALIGN(playback_ctrl_size, 0x100) + 2089 ALIGN(chip->bank_size_playback * 2 * YDSXG_PLAYBACK_VOICES, 0x100) + 2090 ALIGN(chip->bank_size_capture * 2 * YDSXG_CAPTURE_VOICES, 0x100) + 2091 ALIGN(chip->bank_size_effect * 2 * YDSXG_EFFECT_VOICES, 0x100) + 2092 chip->work_size; 2093 /* work_ptr must be aligned to 256 bytes, but it's already 2094 covered with the kernel page allocation mechanism */ 2095 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &chip->pci->dev, 2096 size, &chip->work_ptr) < 0) 2097 return -ENOMEM; 2098 ptr = chip->work_ptr.area; 2099 ptr_addr = chip->work_ptr.addr; 2100 memset(ptr, 0, size); /* for sure */ 2101 2102 chip->bank_base_playback = ptr; 2103 chip->bank_base_playback_addr = ptr_addr; 2104 chip->ctrl_playback = (__le32 *)ptr; 2105 chip->ctrl_playback[0] = cpu_to_le32(YDSXG_PLAYBACK_VOICES); 2106 ptr += ALIGN(playback_ctrl_size, 0x100); 2107 ptr_addr += ALIGN(playback_ctrl_size, 0x100); 2108 for (voice = 0; voice < YDSXG_PLAYBACK_VOICES; voice++) { 2109 chip->voices[voice].number = voice; 2110 chip->voices[voice].bank = (struct snd_ymfpci_playback_bank *)ptr; 2111 chip->voices[voice].bank_addr = ptr_addr; 2112 for (bank = 0; bank < 2; bank++) { 2113 chip->bank_playback[voice][bank] = (struct snd_ymfpci_playback_bank *)ptr; 2114 ptr += chip->bank_size_playback; 2115 ptr_addr += chip->bank_size_playback; 2116 } 2117 } 2118 ptr = (char *)ALIGN((unsigned long)ptr, 0x100); 2119 ptr_addr = ALIGN(ptr_addr, 0x100); 2120 chip->bank_base_capture = ptr; 2121 chip->bank_base_capture_addr = ptr_addr; 2122 for (voice = 0; voice < YDSXG_CAPTURE_VOICES; voice++) 2123 for (bank = 0; bank < 2; bank++) { 2124 chip->bank_capture[voice][bank] = (struct snd_ymfpci_capture_bank *)ptr; 2125 ptr += chip->bank_size_capture; 2126 ptr_addr += chip->bank_size_capture; 2127 } 2128 ptr = (char *)ALIGN((unsigned long)ptr, 0x100); 2129 ptr_addr = ALIGN(ptr_addr, 0x100); 2130 chip->bank_base_effect = ptr; 2131 chip->bank_base_effect_addr = ptr_addr; 2132 for (voice = 0; voice < YDSXG_EFFECT_VOICES; voice++) 2133 for (bank = 0; bank < 2; bank++) { 2134 chip->bank_effect[voice][bank] = (struct snd_ymfpci_effect_bank *)ptr; 2135 ptr += chip->bank_size_effect; 2136 ptr_addr += chip->bank_size_effect; 2137 } 2138 ptr = (char *)ALIGN((unsigned long)ptr, 0x100); 2139 ptr_addr = ALIGN(ptr_addr, 0x100); 2140 chip->work_base = ptr; 2141 chip->work_base_addr = ptr_addr; 2142 2143 snd_BUG_ON(ptr + chip->work_size != 2144 chip->work_ptr.area + chip->work_ptr.bytes); 2145 2146 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, chip->bank_base_playback_addr); 2147 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, chip->bank_base_capture_addr); 2148 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, chip->bank_base_effect_addr); 2149 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, chip->work_base_addr); 2150 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, chip->work_size >> 2); 2151 2152 /* S/PDIF output initialization */ 2153 chip->spdif_bits = chip->spdif_pcm_bits = SNDRV_PCM_DEFAULT_CON_SPDIF & 0xffff; 2154 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 0); 2155 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits); 2156 2157 /* S/PDIF input initialization */ 2158 snd_ymfpci_writew(chip, YDSXGR_SPDIFINCTRL, 0); 2159 2160 /* digital mixer setup */ 2161 for (reg = 0x80; reg < 0xc0; reg += 4) 2162 snd_ymfpci_writel(chip, reg, 0); 2163 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x3fff3fff); 2164 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0x3fff3fff); 2165 snd_ymfpci_writel(chip, YDSXGR_ZVOUTVOL, 0x3fff3fff); 2166 snd_ymfpci_writel(chip, YDSXGR_SPDIFOUTVOL, 0x3fff3fff); 2167 snd_ymfpci_writel(chip, YDSXGR_NATIVEADCINVOL, 0x3fff3fff); 2168 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACINVOL, 0x3fff3fff); 2169 snd_ymfpci_writel(chip, YDSXGR_PRIADCLOOPVOL, 0x3fff3fff); 2170 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0x3fff3fff); 2171 2172 return 0; 2173 } 2174 2175 static int snd_ymfpci_free(struct snd_ymfpci *chip) 2176 { 2177 u16 ctrl; 2178 2179 if (snd_BUG_ON(!chip)) 2180 return -EINVAL; 2181 2182 if (chip->res_reg_area) { /* don't touch busy hardware */ 2183 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0); 2184 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0); 2185 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0); 2186 snd_ymfpci_writel(chip, YDSXGR_STATUS, ~0); 2187 snd_ymfpci_disable_dsp(chip); 2188 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0); 2189 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0); 2190 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0); 2191 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, 0); 2192 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, 0); 2193 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); 2194 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007); 2195 } 2196 2197 snd_ymfpci_ac3_done(chip); 2198 2199 /* Set PCI device to D3 state */ 2200 #if 0 2201 /* FIXME: temporarily disabled, otherwise we cannot fire up 2202 * the chip again unless reboot. ACPI bug? 2203 */ 2204 pci_set_power_state(chip->pci, PCI_D3hot); 2205 #endif 2206 2207 #ifdef CONFIG_PM_SLEEP 2208 kfree(chip->saved_regs); 2209 #endif 2210 if (chip->irq >= 0) 2211 free_irq(chip->irq, chip); 2212 release_and_free_resource(chip->mpu_res); 2213 release_and_free_resource(chip->fm_res); 2214 snd_ymfpci_free_gameport(chip); 2215 iounmap(chip->reg_area_virt); 2216 if (chip->work_ptr.area) 2217 snd_dma_free_pages(&chip->work_ptr); 2218 2219 release_and_free_resource(chip->res_reg_area); 2220 2221 pci_write_config_word(chip->pci, 0x40, chip->old_legacy_ctrl); 2222 2223 pci_disable_device(chip->pci); 2224 release_firmware(chip->dsp_microcode); 2225 release_firmware(chip->controller_microcode); 2226 kfree(chip); 2227 return 0; 2228 } 2229 2230 static int snd_ymfpci_dev_free(struct snd_device *device) 2231 { 2232 struct snd_ymfpci *chip = device->device_data; 2233 return snd_ymfpci_free(chip); 2234 } 2235 2236 #ifdef CONFIG_PM_SLEEP 2237 static const int saved_regs_index[] = { 2238 /* spdif */ 2239 YDSXGR_SPDIFOUTCTRL, 2240 YDSXGR_SPDIFOUTSTATUS, 2241 YDSXGR_SPDIFINCTRL, 2242 /* volumes */ 2243 YDSXGR_PRIADCLOOPVOL, 2244 YDSXGR_NATIVEDACINVOL, 2245 YDSXGR_NATIVEDACOUTVOL, 2246 YDSXGR_BUF441OUTVOL, 2247 YDSXGR_NATIVEADCINVOL, 2248 YDSXGR_SPDIFLOOPVOL, 2249 YDSXGR_SPDIFOUTVOL, 2250 YDSXGR_ZVOUTVOL, 2251 YDSXGR_LEGACYOUTVOL, 2252 /* address bases */ 2253 YDSXGR_PLAYCTRLBASE, 2254 YDSXGR_RECCTRLBASE, 2255 YDSXGR_EFFCTRLBASE, 2256 YDSXGR_WORKBASE, 2257 /* capture set up */ 2258 YDSXGR_MAPOFREC, 2259 YDSXGR_RECFORMAT, 2260 YDSXGR_RECSLOTSR, 2261 YDSXGR_ADCFORMAT, 2262 YDSXGR_ADCSLOTSR, 2263 }; 2264 #define YDSXGR_NUM_SAVED_REGS ARRAY_SIZE(saved_regs_index) 2265 2266 static int snd_ymfpci_suspend(struct device *dev) 2267 { 2268 struct snd_card *card = dev_get_drvdata(dev); 2269 struct snd_ymfpci *chip = card->private_data; 2270 unsigned int i; 2271 2272 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 2273 snd_ac97_suspend(chip->ac97); 2274 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++) 2275 chip->saved_regs[i] = snd_ymfpci_readl(chip, saved_regs_index[i]); 2276 chip->saved_ydsxgr_mode = snd_ymfpci_readl(chip, YDSXGR_MODE); 2277 pci_read_config_word(chip->pci, PCIR_DSXG_LEGACY, 2278 &chip->saved_dsxg_legacy); 2279 pci_read_config_word(chip->pci, PCIR_DSXG_ELEGACY, 2280 &chip->saved_dsxg_elegacy); 2281 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0); 2282 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0); 2283 snd_ymfpci_disable_dsp(chip); 2284 return 0; 2285 } 2286 2287 static int snd_ymfpci_resume(struct device *dev) 2288 { 2289 struct pci_dev *pci = to_pci_dev(dev); 2290 struct snd_card *card = dev_get_drvdata(dev); 2291 struct snd_ymfpci *chip = card->private_data; 2292 unsigned int i; 2293 2294 snd_ymfpci_aclink_reset(pci); 2295 snd_ymfpci_codec_ready(chip, 0); 2296 snd_ymfpci_download_image(chip); 2297 udelay(100); 2298 2299 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++) 2300 snd_ymfpci_writel(chip, saved_regs_index[i], chip->saved_regs[i]); 2301 2302 snd_ac97_resume(chip->ac97); 2303 2304 pci_write_config_word(chip->pci, PCIR_DSXG_LEGACY, 2305 chip->saved_dsxg_legacy); 2306 pci_write_config_word(chip->pci, PCIR_DSXG_ELEGACY, 2307 chip->saved_dsxg_elegacy); 2308 2309 /* start hw again */ 2310 if (chip->start_count > 0) { 2311 spin_lock_irq(&chip->reg_lock); 2312 snd_ymfpci_writel(chip, YDSXGR_MODE, chip->saved_ydsxgr_mode); 2313 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT); 2314 spin_unlock_irq(&chip->reg_lock); 2315 } 2316 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 2317 return 0; 2318 } 2319 2320 SIMPLE_DEV_PM_OPS(snd_ymfpci_pm, snd_ymfpci_suspend, snd_ymfpci_resume); 2321 #endif /* CONFIG_PM_SLEEP */ 2322 2323 int snd_ymfpci_create(struct snd_card *card, 2324 struct pci_dev *pci, 2325 unsigned short old_legacy_ctrl, 2326 struct snd_ymfpci **rchip) 2327 { 2328 struct snd_ymfpci *chip; 2329 int err; 2330 static const struct snd_device_ops ops = { 2331 .dev_free = snd_ymfpci_dev_free, 2332 }; 2333 2334 *rchip = NULL; 2335 2336 /* enable PCI device */ 2337 if ((err = pci_enable_device(pci)) < 0) 2338 return err; 2339 2340 chip = kzalloc(sizeof(*chip), GFP_KERNEL); 2341 if (chip == NULL) { 2342 pci_disable_device(pci); 2343 return -ENOMEM; 2344 } 2345 chip->old_legacy_ctrl = old_legacy_ctrl; 2346 spin_lock_init(&chip->reg_lock); 2347 spin_lock_init(&chip->voice_lock); 2348 init_waitqueue_head(&chip->interrupt_sleep); 2349 atomic_set(&chip->interrupt_sleep_count, 0); 2350 chip->card = card; 2351 chip->pci = pci; 2352 chip->irq = -1; 2353 chip->device_id = pci->device; 2354 chip->rev = pci->revision; 2355 chip->reg_area_phys = pci_resource_start(pci, 0); 2356 chip->reg_area_virt = ioremap(chip->reg_area_phys, 0x8000); 2357 pci_set_master(pci); 2358 chip->src441_used = -1; 2359 2360 if ((chip->res_reg_area = request_mem_region(chip->reg_area_phys, 0x8000, "YMFPCI")) == NULL) { 2361 dev_err(chip->card->dev, 2362 "unable to grab memory region 0x%lx-0x%lx\n", 2363 chip->reg_area_phys, chip->reg_area_phys + 0x8000 - 1); 2364 err = -EBUSY; 2365 goto free_chip; 2366 } 2367 if (request_irq(pci->irq, snd_ymfpci_interrupt, IRQF_SHARED, 2368 KBUILD_MODNAME, chip)) { 2369 dev_err(chip->card->dev, "unable to grab IRQ %d\n", pci->irq); 2370 err = -EBUSY; 2371 goto free_chip; 2372 } 2373 chip->irq = pci->irq; 2374 card->sync_irq = chip->irq; 2375 2376 snd_ymfpci_aclink_reset(pci); 2377 if (snd_ymfpci_codec_ready(chip, 0) < 0) { 2378 err = -EIO; 2379 goto free_chip; 2380 } 2381 2382 err = snd_ymfpci_request_firmware(chip); 2383 if (err < 0) { 2384 dev_err(chip->card->dev, "firmware request failed: %d\n", err); 2385 goto free_chip; 2386 } 2387 snd_ymfpci_download_image(chip); 2388 2389 udelay(100); /* seems we need a delay after downloading image.. */ 2390 2391 if (snd_ymfpci_memalloc(chip) < 0) { 2392 err = -EIO; 2393 goto free_chip; 2394 } 2395 2396 err = snd_ymfpci_ac3_init(chip); 2397 if (err < 0) 2398 goto free_chip; 2399 2400 #ifdef CONFIG_PM_SLEEP 2401 chip->saved_regs = kmalloc_array(YDSXGR_NUM_SAVED_REGS, sizeof(u32), 2402 GFP_KERNEL); 2403 if (chip->saved_regs == NULL) { 2404 err = -ENOMEM; 2405 goto free_chip; 2406 } 2407 #endif 2408 2409 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops); 2410 if (err < 0) 2411 goto free_chip; 2412 2413 snd_ymfpci_proc_init(card, chip); 2414 2415 *rchip = chip; 2416 return 0; 2417 2418 free_chip: 2419 snd_ymfpci_free(chip); 2420 return err; 2421 } 2422