1 /* 2 * Copyright (c) by Jaroslav Kysela <perex@perex.cz> 3 * Routines for control of YMF724/740/744/754 chips 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; either version 2 of the License, or 8 * (at your option) any later version. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 18 * 19 */ 20 21 #include <linux/delay.h> 22 #include <linux/firmware.h> 23 #include <linux/init.h> 24 #include <linux/interrupt.h> 25 #include <linux/pci.h> 26 #include <linux/sched.h> 27 #include <linux/slab.h> 28 #include <linux/mutex.h> 29 #include <linux/module.h> 30 31 #include <sound/core.h> 32 #include <sound/control.h> 33 #include <sound/info.h> 34 #include <sound/tlv.h> 35 #include "ymfpci.h" 36 #include <sound/asoundef.h> 37 #include <sound/mpu401.h> 38 39 #include <asm/io.h> 40 #include <asm/byteorder.h> 41 42 /* 43 * common I/O routines 44 */ 45 46 static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip); 47 48 static inline u8 snd_ymfpci_readb(struct snd_ymfpci *chip, u32 offset) 49 { 50 return readb(chip->reg_area_virt + offset); 51 } 52 53 static inline void snd_ymfpci_writeb(struct snd_ymfpci *chip, u32 offset, u8 val) 54 { 55 writeb(val, chip->reg_area_virt + offset); 56 } 57 58 static inline u16 snd_ymfpci_readw(struct snd_ymfpci *chip, u32 offset) 59 { 60 return readw(chip->reg_area_virt + offset); 61 } 62 63 static inline void snd_ymfpci_writew(struct snd_ymfpci *chip, u32 offset, u16 val) 64 { 65 writew(val, chip->reg_area_virt + offset); 66 } 67 68 static inline u32 snd_ymfpci_readl(struct snd_ymfpci *chip, u32 offset) 69 { 70 return readl(chip->reg_area_virt + offset); 71 } 72 73 static inline void snd_ymfpci_writel(struct snd_ymfpci *chip, u32 offset, u32 val) 74 { 75 writel(val, chip->reg_area_virt + offset); 76 } 77 78 static int snd_ymfpci_codec_ready(struct snd_ymfpci *chip, int secondary) 79 { 80 unsigned long end_time; 81 u32 reg = secondary ? YDSXGR_SECSTATUSADR : YDSXGR_PRISTATUSADR; 82 83 end_time = jiffies + msecs_to_jiffies(750); 84 do { 85 if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0) 86 return 0; 87 schedule_timeout_uninterruptible(1); 88 } while (time_before(jiffies, end_time)); 89 dev_err(chip->card->dev, 90 "codec_ready: codec %i is not ready [0x%x]\n", 91 secondary, snd_ymfpci_readw(chip, reg)); 92 return -EBUSY; 93 } 94 95 static void snd_ymfpci_codec_write(struct snd_ac97 *ac97, u16 reg, u16 val) 96 { 97 struct snd_ymfpci *chip = ac97->private_data; 98 u32 cmd; 99 100 snd_ymfpci_codec_ready(chip, 0); 101 cmd = ((YDSXG_AC97WRITECMD | reg) << 16) | val; 102 snd_ymfpci_writel(chip, YDSXGR_AC97CMDDATA, cmd); 103 } 104 105 static u16 snd_ymfpci_codec_read(struct snd_ac97 *ac97, u16 reg) 106 { 107 struct snd_ymfpci *chip = ac97->private_data; 108 109 if (snd_ymfpci_codec_ready(chip, 0)) 110 return ~0; 111 snd_ymfpci_writew(chip, YDSXGR_AC97CMDADR, YDSXG_AC97READCMD | reg); 112 if (snd_ymfpci_codec_ready(chip, 0)) 113 return ~0; 114 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_744 && chip->rev < 2) { 115 int i; 116 for (i = 0; i < 600; i++) 117 snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA); 118 } 119 return snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA); 120 } 121 122 /* 123 * Misc routines 124 */ 125 126 static u32 snd_ymfpci_calc_delta(u32 rate) 127 { 128 switch (rate) { 129 case 8000: return 0x02aaab00; 130 case 11025: return 0x03accd00; 131 case 16000: return 0x05555500; 132 case 22050: return 0x07599a00; 133 case 32000: return 0x0aaaab00; 134 case 44100: return 0x0eb33300; 135 default: return ((rate << 16) / 375) << 5; 136 } 137 } 138 139 static u32 def_rate[8] = { 140 100, 2000, 8000, 11025, 16000, 22050, 32000, 48000 141 }; 142 143 static u32 snd_ymfpci_calc_lpfK(u32 rate) 144 { 145 u32 i; 146 static u32 val[8] = { 147 0x00570000, 0x06AA0000, 0x18B20000, 0x20930000, 148 0x2B9A0000, 0x35A10000, 0x3EAA0000, 0x40000000 149 }; 150 151 if (rate == 44100) 152 return 0x40000000; /* FIXME: What's the right value? */ 153 for (i = 0; i < 8; i++) 154 if (rate <= def_rate[i]) 155 return val[i]; 156 return val[0]; 157 } 158 159 static u32 snd_ymfpci_calc_lpfQ(u32 rate) 160 { 161 u32 i; 162 static u32 val[8] = { 163 0x35280000, 0x34A70000, 0x32020000, 0x31770000, 164 0x31390000, 0x31C90000, 0x33D00000, 0x40000000 165 }; 166 167 if (rate == 44100) 168 return 0x370A0000; 169 for (i = 0; i < 8; i++) 170 if (rate <= def_rate[i]) 171 return val[i]; 172 return val[0]; 173 } 174 175 /* 176 * Hardware start management 177 */ 178 179 static void snd_ymfpci_hw_start(struct snd_ymfpci *chip) 180 { 181 unsigned long flags; 182 183 spin_lock_irqsave(&chip->reg_lock, flags); 184 if (chip->start_count++ > 0) 185 goto __end; 186 snd_ymfpci_writel(chip, YDSXGR_MODE, 187 snd_ymfpci_readl(chip, YDSXGR_MODE) | 3); 188 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1; 189 __end: 190 spin_unlock_irqrestore(&chip->reg_lock, flags); 191 } 192 193 static void snd_ymfpci_hw_stop(struct snd_ymfpci *chip) 194 { 195 unsigned long flags; 196 long timeout = 1000; 197 198 spin_lock_irqsave(&chip->reg_lock, flags); 199 if (--chip->start_count > 0) 200 goto __end; 201 snd_ymfpci_writel(chip, YDSXGR_MODE, 202 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~3); 203 while (timeout-- > 0) { 204 if ((snd_ymfpci_readl(chip, YDSXGR_STATUS) & 2) == 0) 205 break; 206 } 207 if (atomic_read(&chip->interrupt_sleep_count)) { 208 atomic_set(&chip->interrupt_sleep_count, 0); 209 wake_up(&chip->interrupt_sleep); 210 } 211 __end: 212 spin_unlock_irqrestore(&chip->reg_lock, flags); 213 } 214 215 /* 216 * Playback voice management 217 */ 218 219 static int voice_alloc(struct snd_ymfpci *chip, 220 enum snd_ymfpci_voice_type type, int pair, 221 struct snd_ymfpci_voice **rvoice) 222 { 223 struct snd_ymfpci_voice *voice, *voice2; 224 int idx; 225 226 *rvoice = NULL; 227 for (idx = 0; idx < YDSXG_PLAYBACK_VOICES; idx += pair ? 2 : 1) { 228 voice = &chip->voices[idx]; 229 voice2 = pair ? &chip->voices[idx+1] : NULL; 230 if (voice->use || (voice2 && voice2->use)) 231 continue; 232 voice->use = 1; 233 if (voice2) 234 voice2->use = 1; 235 switch (type) { 236 case YMFPCI_PCM: 237 voice->pcm = 1; 238 if (voice2) 239 voice2->pcm = 1; 240 break; 241 case YMFPCI_SYNTH: 242 voice->synth = 1; 243 break; 244 case YMFPCI_MIDI: 245 voice->midi = 1; 246 break; 247 } 248 snd_ymfpci_hw_start(chip); 249 if (voice2) 250 snd_ymfpci_hw_start(chip); 251 *rvoice = voice; 252 return 0; 253 } 254 return -ENOMEM; 255 } 256 257 static int snd_ymfpci_voice_alloc(struct snd_ymfpci *chip, 258 enum snd_ymfpci_voice_type type, int pair, 259 struct snd_ymfpci_voice **rvoice) 260 { 261 unsigned long flags; 262 int result; 263 264 if (snd_BUG_ON(!rvoice)) 265 return -EINVAL; 266 if (snd_BUG_ON(pair && type != YMFPCI_PCM)) 267 return -EINVAL; 268 269 spin_lock_irqsave(&chip->voice_lock, flags); 270 for (;;) { 271 result = voice_alloc(chip, type, pair, rvoice); 272 if (result == 0 || type != YMFPCI_PCM) 273 break; 274 /* TODO: synth/midi voice deallocation */ 275 break; 276 } 277 spin_unlock_irqrestore(&chip->voice_lock, flags); 278 return result; 279 } 280 281 static int snd_ymfpci_voice_free(struct snd_ymfpci *chip, struct snd_ymfpci_voice *pvoice) 282 { 283 unsigned long flags; 284 285 if (snd_BUG_ON(!pvoice)) 286 return -EINVAL; 287 snd_ymfpci_hw_stop(chip); 288 spin_lock_irqsave(&chip->voice_lock, flags); 289 if (pvoice->number == chip->src441_used) { 290 chip->src441_used = -1; 291 pvoice->ypcm->use_441_slot = 0; 292 } 293 pvoice->use = pvoice->pcm = pvoice->synth = pvoice->midi = 0; 294 pvoice->ypcm = NULL; 295 pvoice->interrupt = NULL; 296 spin_unlock_irqrestore(&chip->voice_lock, flags); 297 return 0; 298 } 299 300 /* 301 * PCM part 302 */ 303 304 static void snd_ymfpci_pcm_interrupt(struct snd_ymfpci *chip, struct snd_ymfpci_voice *voice) 305 { 306 struct snd_ymfpci_pcm *ypcm; 307 u32 pos, delta; 308 309 if ((ypcm = voice->ypcm) == NULL) 310 return; 311 if (ypcm->substream == NULL) 312 return; 313 spin_lock(&chip->reg_lock); 314 if (ypcm->running) { 315 pos = le32_to_cpu(voice->bank[chip->active_bank].start); 316 if (pos < ypcm->last_pos) 317 delta = pos + (ypcm->buffer_size - ypcm->last_pos); 318 else 319 delta = pos - ypcm->last_pos; 320 ypcm->period_pos += delta; 321 ypcm->last_pos = pos; 322 if (ypcm->period_pos >= ypcm->period_size) { 323 /* 324 dev_dbg(chip->card->dev, 325 "done - active_bank = 0x%x, start = 0x%x\n", 326 chip->active_bank, 327 voice->bank[chip->active_bank].start); 328 */ 329 ypcm->period_pos %= ypcm->period_size; 330 spin_unlock(&chip->reg_lock); 331 snd_pcm_period_elapsed(ypcm->substream); 332 spin_lock(&chip->reg_lock); 333 } 334 335 if (unlikely(ypcm->update_pcm_vol)) { 336 unsigned int subs = ypcm->substream->number; 337 unsigned int next_bank = 1 - chip->active_bank; 338 struct snd_ymfpci_playback_bank *bank; 339 u32 volume; 340 341 bank = &voice->bank[next_bank]; 342 volume = cpu_to_le32(chip->pcm_mixer[subs].left << 15); 343 bank->left_gain_end = volume; 344 if (ypcm->output_rear) 345 bank->eff2_gain_end = volume; 346 if (ypcm->voices[1]) 347 bank = &ypcm->voices[1]->bank[next_bank]; 348 volume = cpu_to_le32(chip->pcm_mixer[subs].right << 15); 349 bank->right_gain_end = volume; 350 if (ypcm->output_rear) 351 bank->eff3_gain_end = volume; 352 ypcm->update_pcm_vol--; 353 } 354 } 355 spin_unlock(&chip->reg_lock); 356 } 357 358 static void snd_ymfpci_pcm_capture_interrupt(struct snd_pcm_substream *substream) 359 { 360 struct snd_pcm_runtime *runtime = substream->runtime; 361 struct snd_ymfpci_pcm *ypcm = runtime->private_data; 362 struct snd_ymfpci *chip = ypcm->chip; 363 u32 pos, delta; 364 365 spin_lock(&chip->reg_lock); 366 if (ypcm->running) { 367 pos = le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift; 368 if (pos < ypcm->last_pos) 369 delta = pos + (ypcm->buffer_size - ypcm->last_pos); 370 else 371 delta = pos - ypcm->last_pos; 372 ypcm->period_pos += delta; 373 ypcm->last_pos = pos; 374 if (ypcm->period_pos >= ypcm->period_size) { 375 ypcm->period_pos %= ypcm->period_size; 376 /* 377 dev_dbg(chip->card->dev, 378 "done - active_bank = 0x%x, start = 0x%x\n", 379 chip->active_bank, 380 voice->bank[chip->active_bank].start); 381 */ 382 spin_unlock(&chip->reg_lock); 383 snd_pcm_period_elapsed(substream); 384 spin_lock(&chip->reg_lock); 385 } 386 } 387 spin_unlock(&chip->reg_lock); 388 } 389 390 static int snd_ymfpci_playback_trigger(struct snd_pcm_substream *substream, 391 int cmd) 392 { 393 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 394 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data; 395 struct snd_kcontrol *kctl = NULL; 396 int result = 0; 397 398 spin_lock(&chip->reg_lock); 399 if (ypcm->voices[0] == NULL) { 400 result = -EINVAL; 401 goto __unlock; 402 } 403 switch (cmd) { 404 case SNDRV_PCM_TRIGGER_START: 405 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 406 case SNDRV_PCM_TRIGGER_RESUME: 407 chip->ctrl_playback[ypcm->voices[0]->number + 1] = cpu_to_le32(ypcm->voices[0]->bank_addr); 408 if (ypcm->voices[1] != NULL && !ypcm->use_441_slot) 409 chip->ctrl_playback[ypcm->voices[1]->number + 1] = cpu_to_le32(ypcm->voices[1]->bank_addr); 410 ypcm->running = 1; 411 break; 412 case SNDRV_PCM_TRIGGER_STOP: 413 if (substream->pcm == chip->pcm && !ypcm->use_441_slot) { 414 kctl = chip->pcm_mixer[substream->number].ctl; 415 kctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE; 416 } 417 /* fall through */ 418 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 419 case SNDRV_PCM_TRIGGER_SUSPEND: 420 chip->ctrl_playback[ypcm->voices[0]->number + 1] = 0; 421 if (ypcm->voices[1] != NULL && !ypcm->use_441_slot) 422 chip->ctrl_playback[ypcm->voices[1]->number + 1] = 0; 423 ypcm->running = 0; 424 break; 425 default: 426 result = -EINVAL; 427 break; 428 } 429 __unlock: 430 spin_unlock(&chip->reg_lock); 431 if (kctl) 432 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id); 433 return result; 434 } 435 static int snd_ymfpci_capture_trigger(struct snd_pcm_substream *substream, 436 int cmd) 437 { 438 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 439 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data; 440 int result = 0; 441 u32 tmp; 442 443 spin_lock(&chip->reg_lock); 444 switch (cmd) { 445 case SNDRV_PCM_TRIGGER_START: 446 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 447 case SNDRV_PCM_TRIGGER_RESUME: 448 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) | (1 << ypcm->capture_bank_number); 449 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp); 450 ypcm->running = 1; 451 break; 452 case SNDRV_PCM_TRIGGER_STOP: 453 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 454 case SNDRV_PCM_TRIGGER_SUSPEND: 455 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) & ~(1 << ypcm->capture_bank_number); 456 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp); 457 ypcm->running = 0; 458 break; 459 default: 460 result = -EINVAL; 461 break; 462 } 463 spin_unlock(&chip->reg_lock); 464 return result; 465 } 466 467 static int snd_ymfpci_pcm_voice_alloc(struct snd_ymfpci_pcm *ypcm, int voices) 468 { 469 int err; 470 471 if (ypcm->voices[1] != NULL && voices < 2) { 472 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[1]); 473 ypcm->voices[1] = NULL; 474 } 475 if (voices == 1 && ypcm->voices[0] != NULL) 476 return 0; /* already allocated */ 477 if (voices == 2 && ypcm->voices[0] != NULL && ypcm->voices[1] != NULL) 478 return 0; /* already allocated */ 479 if (voices > 1) { 480 if (ypcm->voices[0] != NULL && ypcm->voices[1] == NULL) { 481 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[0]); 482 ypcm->voices[0] = NULL; 483 } 484 } 485 err = snd_ymfpci_voice_alloc(ypcm->chip, YMFPCI_PCM, voices > 1, &ypcm->voices[0]); 486 if (err < 0) 487 return err; 488 ypcm->voices[0]->ypcm = ypcm; 489 ypcm->voices[0]->interrupt = snd_ymfpci_pcm_interrupt; 490 if (voices > 1) { 491 ypcm->voices[1] = &ypcm->chip->voices[ypcm->voices[0]->number + 1]; 492 ypcm->voices[1]->ypcm = ypcm; 493 } 494 return 0; 495 } 496 497 static void snd_ymfpci_pcm_init_voice(struct snd_ymfpci_pcm *ypcm, unsigned int voiceidx, 498 struct snd_pcm_runtime *runtime, 499 int has_pcm_volume) 500 { 501 struct snd_ymfpci_voice *voice = ypcm->voices[voiceidx]; 502 u32 format; 503 u32 delta = snd_ymfpci_calc_delta(runtime->rate); 504 u32 lpfQ = snd_ymfpci_calc_lpfQ(runtime->rate); 505 u32 lpfK = snd_ymfpci_calc_lpfK(runtime->rate); 506 struct snd_ymfpci_playback_bank *bank; 507 unsigned int nbank; 508 u32 vol_left, vol_right; 509 u8 use_left, use_right; 510 unsigned long flags; 511 512 if (snd_BUG_ON(!voice)) 513 return; 514 if (runtime->channels == 1) { 515 use_left = 1; 516 use_right = 1; 517 } else { 518 use_left = (voiceidx & 1) == 0; 519 use_right = !use_left; 520 } 521 if (has_pcm_volume) { 522 vol_left = cpu_to_le32(ypcm->chip->pcm_mixer 523 [ypcm->substream->number].left << 15); 524 vol_right = cpu_to_le32(ypcm->chip->pcm_mixer 525 [ypcm->substream->number].right << 15); 526 } else { 527 vol_left = cpu_to_le32(0x40000000); 528 vol_right = cpu_to_le32(0x40000000); 529 } 530 spin_lock_irqsave(&ypcm->chip->voice_lock, flags); 531 format = runtime->channels == 2 ? 0x00010000 : 0; 532 if (snd_pcm_format_width(runtime->format) == 8) 533 format |= 0x80000000; 534 else if (ypcm->chip->device_id == PCI_DEVICE_ID_YAMAHA_754 && 535 runtime->rate == 44100 && runtime->channels == 2 && 536 voiceidx == 0 && (ypcm->chip->src441_used == -1 || 537 ypcm->chip->src441_used == voice->number)) { 538 ypcm->chip->src441_used = voice->number; 539 ypcm->use_441_slot = 1; 540 format |= 0x10000000; 541 } 542 if (ypcm->chip->src441_used == voice->number && 543 (format & 0x10000000) == 0) { 544 ypcm->chip->src441_used = -1; 545 ypcm->use_441_slot = 0; 546 } 547 if (runtime->channels == 2 && (voiceidx & 1) != 0) 548 format |= 1; 549 spin_unlock_irqrestore(&ypcm->chip->voice_lock, flags); 550 for (nbank = 0; nbank < 2; nbank++) { 551 bank = &voice->bank[nbank]; 552 memset(bank, 0, sizeof(*bank)); 553 bank->format = cpu_to_le32(format); 554 bank->base = cpu_to_le32(runtime->dma_addr); 555 bank->loop_end = cpu_to_le32(ypcm->buffer_size); 556 bank->lpfQ = cpu_to_le32(lpfQ); 557 bank->delta = 558 bank->delta_end = cpu_to_le32(delta); 559 bank->lpfK = 560 bank->lpfK_end = cpu_to_le32(lpfK); 561 bank->eg_gain = 562 bank->eg_gain_end = cpu_to_le32(0x40000000); 563 564 if (ypcm->output_front) { 565 if (use_left) { 566 bank->left_gain = 567 bank->left_gain_end = vol_left; 568 } 569 if (use_right) { 570 bank->right_gain = 571 bank->right_gain_end = vol_right; 572 } 573 } 574 if (ypcm->output_rear) { 575 if (!ypcm->swap_rear) { 576 if (use_left) { 577 bank->eff2_gain = 578 bank->eff2_gain_end = vol_left; 579 } 580 if (use_right) { 581 bank->eff3_gain = 582 bank->eff3_gain_end = vol_right; 583 } 584 } else { 585 /* The SPDIF out channels seem to be swapped, so we have 586 * to swap them here, too. The rear analog out channels 587 * will be wrong, but otherwise AC3 would not work. 588 */ 589 if (use_left) { 590 bank->eff3_gain = 591 bank->eff3_gain_end = vol_left; 592 } 593 if (use_right) { 594 bank->eff2_gain = 595 bank->eff2_gain_end = vol_right; 596 } 597 } 598 } 599 } 600 } 601 602 static int snd_ymfpci_ac3_init(struct snd_ymfpci *chip) 603 { 604 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), 605 4096, &chip->ac3_tmp_base) < 0) 606 return -ENOMEM; 607 608 chip->bank_effect[3][0]->base = 609 chip->bank_effect[3][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr); 610 chip->bank_effect[3][0]->loop_end = 611 chip->bank_effect[3][1]->loop_end = cpu_to_le32(1024); 612 chip->bank_effect[4][0]->base = 613 chip->bank_effect[4][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr + 2048); 614 chip->bank_effect[4][0]->loop_end = 615 chip->bank_effect[4][1]->loop_end = cpu_to_le32(1024); 616 617 spin_lock_irq(&chip->reg_lock); 618 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 619 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) | 3 << 3); 620 spin_unlock_irq(&chip->reg_lock); 621 return 0; 622 } 623 624 static int snd_ymfpci_ac3_done(struct snd_ymfpci *chip) 625 { 626 spin_lock_irq(&chip->reg_lock); 627 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 628 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) & ~(3 << 3)); 629 spin_unlock_irq(&chip->reg_lock); 630 // snd_ymfpci_irq_wait(chip); 631 if (chip->ac3_tmp_base.area) { 632 snd_dma_free_pages(&chip->ac3_tmp_base); 633 chip->ac3_tmp_base.area = NULL; 634 } 635 return 0; 636 } 637 638 static int snd_ymfpci_playback_hw_params(struct snd_pcm_substream *substream, 639 struct snd_pcm_hw_params *hw_params) 640 { 641 struct snd_pcm_runtime *runtime = substream->runtime; 642 struct snd_ymfpci_pcm *ypcm = runtime->private_data; 643 int err; 644 645 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0) 646 return err; 647 if ((err = snd_ymfpci_pcm_voice_alloc(ypcm, params_channels(hw_params))) < 0) 648 return err; 649 return 0; 650 } 651 652 static int snd_ymfpci_playback_hw_free(struct snd_pcm_substream *substream) 653 { 654 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 655 struct snd_pcm_runtime *runtime = substream->runtime; 656 struct snd_ymfpci_pcm *ypcm; 657 658 if (runtime->private_data == NULL) 659 return 0; 660 ypcm = runtime->private_data; 661 662 /* wait, until the PCI operations are not finished */ 663 snd_ymfpci_irq_wait(chip); 664 snd_pcm_lib_free_pages(substream); 665 if (ypcm->voices[1]) { 666 snd_ymfpci_voice_free(chip, ypcm->voices[1]); 667 ypcm->voices[1] = NULL; 668 } 669 if (ypcm->voices[0]) { 670 snd_ymfpci_voice_free(chip, ypcm->voices[0]); 671 ypcm->voices[0] = NULL; 672 } 673 return 0; 674 } 675 676 static int snd_ymfpci_playback_prepare(struct snd_pcm_substream *substream) 677 { 678 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 679 struct snd_pcm_runtime *runtime = substream->runtime; 680 struct snd_ymfpci_pcm *ypcm = runtime->private_data; 681 struct snd_kcontrol *kctl; 682 unsigned int nvoice; 683 684 ypcm->period_size = runtime->period_size; 685 ypcm->buffer_size = runtime->buffer_size; 686 ypcm->period_pos = 0; 687 ypcm->last_pos = 0; 688 for (nvoice = 0; nvoice < runtime->channels; nvoice++) 689 snd_ymfpci_pcm_init_voice(ypcm, nvoice, runtime, 690 substream->pcm == chip->pcm); 691 692 if (substream->pcm == chip->pcm && !ypcm->use_441_slot) { 693 kctl = chip->pcm_mixer[substream->number].ctl; 694 kctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE; 695 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id); 696 } 697 return 0; 698 } 699 700 static int snd_ymfpci_capture_hw_params(struct snd_pcm_substream *substream, 701 struct snd_pcm_hw_params *hw_params) 702 { 703 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 704 } 705 706 static int snd_ymfpci_capture_hw_free(struct snd_pcm_substream *substream) 707 { 708 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 709 710 /* wait, until the PCI operations are not finished */ 711 snd_ymfpci_irq_wait(chip); 712 return snd_pcm_lib_free_pages(substream); 713 } 714 715 static int snd_ymfpci_capture_prepare(struct snd_pcm_substream *substream) 716 { 717 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 718 struct snd_pcm_runtime *runtime = substream->runtime; 719 struct snd_ymfpci_pcm *ypcm = runtime->private_data; 720 struct snd_ymfpci_capture_bank * bank; 721 int nbank; 722 u32 rate, format; 723 724 ypcm->period_size = runtime->period_size; 725 ypcm->buffer_size = runtime->buffer_size; 726 ypcm->period_pos = 0; 727 ypcm->last_pos = 0; 728 ypcm->shift = 0; 729 rate = ((48000 * 4096) / runtime->rate) - 1; 730 format = 0; 731 if (runtime->channels == 2) { 732 format |= 2; 733 ypcm->shift++; 734 } 735 if (snd_pcm_format_width(runtime->format) == 8) 736 format |= 1; 737 else 738 ypcm->shift++; 739 switch (ypcm->capture_bank_number) { 740 case 0: 741 snd_ymfpci_writel(chip, YDSXGR_RECFORMAT, format); 742 snd_ymfpci_writel(chip, YDSXGR_RECSLOTSR, rate); 743 break; 744 case 1: 745 snd_ymfpci_writel(chip, YDSXGR_ADCFORMAT, format); 746 snd_ymfpci_writel(chip, YDSXGR_ADCSLOTSR, rate); 747 break; 748 } 749 for (nbank = 0; nbank < 2; nbank++) { 750 bank = chip->bank_capture[ypcm->capture_bank_number][nbank]; 751 bank->base = cpu_to_le32(runtime->dma_addr); 752 bank->loop_end = cpu_to_le32(ypcm->buffer_size << ypcm->shift); 753 bank->start = 0; 754 bank->num_of_loops = 0; 755 } 756 return 0; 757 } 758 759 static snd_pcm_uframes_t snd_ymfpci_playback_pointer(struct snd_pcm_substream *substream) 760 { 761 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 762 struct snd_pcm_runtime *runtime = substream->runtime; 763 struct snd_ymfpci_pcm *ypcm = runtime->private_data; 764 struct snd_ymfpci_voice *voice = ypcm->voices[0]; 765 766 if (!(ypcm->running && voice)) 767 return 0; 768 return le32_to_cpu(voice->bank[chip->active_bank].start); 769 } 770 771 static snd_pcm_uframes_t snd_ymfpci_capture_pointer(struct snd_pcm_substream *substream) 772 { 773 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 774 struct snd_pcm_runtime *runtime = substream->runtime; 775 struct snd_ymfpci_pcm *ypcm = runtime->private_data; 776 777 if (!ypcm->running) 778 return 0; 779 return le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift; 780 } 781 782 static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip) 783 { 784 wait_queue_t wait; 785 int loops = 4; 786 787 while (loops-- > 0) { 788 if ((snd_ymfpci_readl(chip, YDSXGR_MODE) & 3) == 0) 789 continue; 790 init_waitqueue_entry(&wait, current); 791 add_wait_queue(&chip->interrupt_sleep, &wait); 792 atomic_inc(&chip->interrupt_sleep_count); 793 schedule_timeout_uninterruptible(msecs_to_jiffies(50)); 794 remove_wait_queue(&chip->interrupt_sleep, &wait); 795 } 796 } 797 798 static irqreturn_t snd_ymfpci_interrupt(int irq, void *dev_id) 799 { 800 struct snd_ymfpci *chip = dev_id; 801 u32 status, nvoice, mode; 802 struct snd_ymfpci_voice *voice; 803 804 status = snd_ymfpci_readl(chip, YDSXGR_STATUS); 805 if (status & 0x80000000) { 806 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1; 807 spin_lock(&chip->voice_lock); 808 for (nvoice = 0; nvoice < YDSXG_PLAYBACK_VOICES; nvoice++) { 809 voice = &chip->voices[nvoice]; 810 if (voice->interrupt) 811 voice->interrupt(chip, voice); 812 } 813 for (nvoice = 0; nvoice < YDSXG_CAPTURE_VOICES; nvoice++) { 814 if (chip->capture_substream[nvoice]) 815 snd_ymfpci_pcm_capture_interrupt(chip->capture_substream[nvoice]); 816 } 817 #if 0 818 for (nvoice = 0; nvoice < YDSXG_EFFECT_VOICES; nvoice++) { 819 if (chip->effect_substream[nvoice]) 820 snd_ymfpci_pcm_effect_interrupt(chip->effect_substream[nvoice]); 821 } 822 #endif 823 spin_unlock(&chip->voice_lock); 824 spin_lock(&chip->reg_lock); 825 snd_ymfpci_writel(chip, YDSXGR_STATUS, 0x80000000); 826 mode = snd_ymfpci_readl(chip, YDSXGR_MODE) | 2; 827 snd_ymfpci_writel(chip, YDSXGR_MODE, mode); 828 spin_unlock(&chip->reg_lock); 829 830 if (atomic_read(&chip->interrupt_sleep_count)) { 831 atomic_set(&chip->interrupt_sleep_count, 0); 832 wake_up(&chip->interrupt_sleep); 833 } 834 } 835 836 status = snd_ymfpci_readw(chip, YDSXGR_INTFLAG); 837 if (status & 1) { 838 if (chip->timer) 839 snd_timer_interrupt(chip->timer, chip->timer_ticks); 840 } 841 snd_ymfpci_writew(chip, YDSXGR_INTFLAG, status); 842 843 if (chip->rawmidi) 844 snd_mpu401_uart_interrupt(irq, chip->rawmidi->private_data); 845 return IRQ_HANDLED; 846 } 847 848 static struct snd_pcm_hardware snd_ymfpci_playback = 849 { 850 .info = (SNDRV_PCM_INFO_MMAP | 851 SNDRV_PCM_INFO_MMAP_VALID | 852 SNDRV_PCM_INFO_INTERLEAVED | 853 SNDRV_PCM_INFO_BLOCK_TRANSFER | 854 SNDRV_PCM_INFO_PAUSE | 855 SNDRV_PCM_INFO_RESUME), 856 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 857 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 858 .rate_min = 8000, 859 .rate_max = 48000, 860 .channels_min = 1, 861 .channels_max = 2, 862 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */ 863 .period_bytes_min = 64, 864 .period_bytes_max = 256 * 1024, /* FIXME: enough? */ 865 .periods_min = 3, 866 .periods_max = 1024, 867 .fifo_size = 0, 868 }; 869 870 static struct snd_pcm_hardware snd_ymfpci_capture = 871 { 872 .info = (SNDRV_PCM_INFO_MMAP | 873 SNDRV_PCM_INFO_MMAP_VALID | 874 SNDRV_PCM_INFO_INTERLEAVED | 875 SNDRV_PCM_INFO_BLOCK_TRANSFER | 876 SNDRV_PCM_INFO_PAUSE | 877 SNDRV_PCM_INFO_RESUME), 878 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 879 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 880 .rate_min = 8000, 881 .rate_max = 48000, 882 .channels_min = 1, 883 .channels_max = 2, 884 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */ 885 .period_bytes_min = 64, 886 .period_bytes_max = 256 * 1024, /* FIXME: enough? */ 887 .periods_min = 3, 888 .periods_max = 1024, 889 .fifo_size = 0, 890 }; 891 892 static void snd_ymfpci_pcm_free_substream(struct snd_pcm_runtime *runtime) 893 { 894 kfree(runtime->private_data); 895 } 896 897 static int snd_ymfpci_playback_open_1(struct snd_pcm_substream *substream) 898 { 899 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 900 struct snd_pcm_runtime *runtime = substream->runtime; 901 struct snd_ymfpci_pcm *ypcm; 902 int err; 903 904 runtime->hw = snd_ymfpci_playback; 905 /* FIXME? True value is 256/48 = 5.33333 ms */ 906 err = snd_pcm_hw_constraint_minmax(runtime, 907 SNDRV_PCM_HW_PARAM_PERIOD_TIME, 908 5334, UINT_MAX); 909 if (err < 0) 910 return err; 911 err = snd_pcm_hw_rule_noresample(runtime, 48000); 912 if (err < 0) 913 return err; 914 915 ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL); 916 if (ypcm == NULL) 917 return -ENOMEM; 918 ypcm->chip = chip; 919 ypcm->type = PLAYBACK_VOICE; 920 ypcm->substream = substream; 921 runtime->private_data = ypcm; 922 runtime->private_free = snd_ymfpci_pcm_free_substream; 923 return 0; 924 } 925 926 /* call with spinlock held */ 927 static void ymfpci_open_extension(struct snd_ymfpci *chip) 928 { 929 if (! chip->rear_opened) { 930 if (! chip->spdif_opened) /* set AC3 */ 931 snd_ymfpci_writel(chip, YDSXGR_MODE, 932 snd_ymfpci_readl(chip, YDSXGR_MODE) | (1 << 30)); 933 /* enable second codec (4CHEN) */ 934 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG, 935 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) | 0x0010); 936 } 937 } 938 939 /* call with spinlock held */ 940 static void ymfpci_close_extension(struct snd_ymfpci *chip) 941 { 942 if (! chip->rear_opened) { 943 if (! chip->spdif_opened) 944 snd_ymfpci_writel(chip, YDSXGR_MODE, 945 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~(1 << 30)); 946 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG, 947 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) & ~0x0010); 948 } 949 } 950 951 static int snd_ymfpci_playback_open(struct snd_pcm_substream *substream) 952 { 953 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 954 struct snd_pcm_runtime *runtime = substream->runtime; 955 struct snd_ymfpci_pcm *ypcm; 956 int err; 957 958 if ((err = snd_ymfpci_playback_open_1(substream)) < 0) 959 return err; 960 ypcm = runtime->private_data; 961 ypcm->output_front = 1; 962 ypcm->output_rear = chip->mode_dup4ch ? 1 : 0; 963 ypcm->swap_rear = 0; 964 spin_lock_irq(&chip->reg_lock); 965 if (ypcm->output_rear) { 966 ymfpci_open_extension(chip); 967 chip->rear_opened++; 968 } 969 spin_unlock_irq(&chip->reg_lock); 970 return 0; 971 } 972 973 static int snd_ymfpci_playback_spdif_open(struct snd_pcm_substream *substream) 974 { 975 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 976 struct snd_pcm_runtime *runtime = substream->runtime; 977 struct snd_ymfpci_pcm *ypcm; 978 int err; 979 980 if ((err = snd_ymfpci_playback_open_1(substream)) < 0) 981 return err; 982 ypcm = runtime->private_data; 983 ypcm->output_front = 0; 984 ypcm->output_rear = 1; 985 ypcm->swap_rear = 1; 986 spin_lock_irq(&chip->reg_lock); 987 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 988 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) | 2); 989 ymfpci_open_extension(chip); 990 chip->spdif_pcm_bits = chip->spdif_bits; 991 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits); 992 chip->spdif_opened++; 993 spin_unlock_irq(&chip->reg_lock); 994 995 chip->spdif_pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE; 996 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE | 997 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id); 998 return 0; 999 } 1000 1001 static int snd_ymfpci_playback_4ch_open(struct snd_pcm_substream *substream) 1002 { 1003 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 1004 struct snd_pcm_runtime *runtime = substream->runtime; 1005 struct snd_ymfpci_pcm *ypcm; 1006 int err; 1007 1008 if ((err = snd_ymfpci_playback_open_1(substream)) < 0) 1009 return err; 1010 ypcm = runtime->private_data; 1011 ypcm->output_front = 0; 1012 ypcm->output_rear = 1; 1013 ypcm->swap_rear = 0; 1014 spin_lock_irq(&chip->reg_lock); 1015 ymfpci_open_extension(chip); 1016 chip->rear_opened++; 1017 spin_unlock_irq(&chip->reg_lock); 1018 return 0; 1019 } 1020 1021 static int snd_ymfpci_capture_open(struct snd_pcm_substream *substream, 1022 u32 capture_bank_number) 1023 { 1024 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 1025 struct snd_pcm_runtime *runtime = substream->runtime; 1026 struct snd_ymfpci_pcm *ypcm; 1027 int err; 1028 1029 runtime->hw = snd_ymfpci_capture; 1030 /* FIXME? True value is 256/48 = 5.33333 ms */ 1031 err = snd_pcm_hw_constraint_minmax(runtime, 1032 SNDRV_PCM_HW_PARAM_PERIOD_TIME, 1033 5334, UINT_MAX); 1034 if (err < 0) 1035 return err; 1036 err = snd_pcm_hw_rule_noresample(runtime, 48000); 1037 if (err < 0) 1038 return err; 1039 1040 ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL); 1041 if (ypcm == NULL) 1042 return -ENOMEM; 1043 ypcm->chip = chip; 1044 ypcm->type = capture_bank_number + CAPTURE_REC; 1045 ypcm->substream = substream; 1046 ypcm->capture_bank_number = capture_bank_number; 1047 chip->capture_substream[capture_bank_number] = substream; 1048 runtime->private_data = ypcm; 1049 runtime->private_free = snd_ymfpci_pcm_free_substream; 1050 snd_ymfpci_hw_start(chip); 1051 return 0; 1052 } 1053 1054 static int snd_ymfpci_capture_rec_open(struct snd_pcm_substream *substream) 1055 { 1056 return snd_ymfpci_capture_open(substream, 0); 1057 } 1058 1059 static int snd_ymfpci_capture_ac97_open(struct snd_pcm_substream *substream) 1060 { 1061 return snd_ymfpci_capture_open(substream, 1); 1062 } 1063 1064 static int snd_ymfpci_playback_close_1(struct snd_pcm_substream *substream) 1065 { 1066 return 0; 1067 } 1068 1069 static int snd_ymfpci_playback_close(struct snd_pcm_substream *substream) 1070 { 1071 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 1072 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data; 1073 1074 spin_lock_irq(&chip->reg_lock); 1075 if (ypcm->output_rear && chip->rear_opened > 0) { 1076 chip->rear_opened--; 1077 ymfpci_close_extension(chip); 1078 } 1079 spin_unlock_irq(&chip->reg_lock); 1080 return snd_ymfpci_playback_close_1(substream); 1081 } 1082 1083 static int snd_ymfpci_playback_spdif_close(struct snd_pcm_substream *substream) 1084 { 1085 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 1086 1087 spin_lock_irq(&chip->reg_lock); 1088 chip->spdif_opened = 0; 1089 ymfpci_close_extension(chip); 1090 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 1091 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & ~2); 1092 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits); 1093 spin_unlock_irq(&chip->reg_lock); 1094 chip->spdif_pcm_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE; 1095 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE | 1096 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id); 1097 return snd_ymfpci_playback_close_1(substream); 1098 } 1099 1100 static int snd_ymfpci_playback_4ch_close(struct snd_pcm_substream *substream) 1101 { 1102 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 1103 1104 spin_lock_irq(&chip->reg_lock); 1105 if (chip->rear_opened > 0) { 1106 chip->rear_opened--; 1107 ymfpci_close_extension(chip); 1108 } 1109 spin_unlock_irq(&chip->reg_lock); 1110 return snd_ymfpci_playback_close_1(substream); 1111 } 1112 1113 static int snd_ymfpci_capture_close(struct snd_pcm_substream *substream) 1114 { 1115 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 1116 struct snd_pcm_runtime *runtime = substream->runtime; 1117 struct snd_ymfpci_pcm *ypcm = runtime->private_data; 1118 1119 if (ypcm != NULL) { 1120 chip->capture_substream[ypcm->capture_bank_number] = NULL; 1121 snd_ymfpci_hw_stop(chip); 1122 } 1123 return 0; 1124 } 1125 1126 static struct snd_pcm_ops snd_ymfpci_playback_ops = { 1127 .open = snd_ymfpci_playback_open, 1128 .close = snd_ymfpci_playback_close, 1129 .ioctl = snd_pcm_lib_ioctl, 1130 .hw_params = snd_ymfpci_playback_hw_params, 1131 .hw_free = snd_ymfpci_playback_hw_free, 1132 .prepare = snd_ymfpci_playback_prepare, 1133 .trigger = snd_ymfpci_playback_trigger, 1134 .pointer = snd_ymfpci_playback_pointer, 1135 }; 1136 1137 static struct snd_pcm_ops snd_ymfpci_capture_rec_ops = { 1138 .open = snd_ymfpci_capture_rec_open, 1139 .close = snd_ymfpci_capture_close, 1140 .ioctl = snd_pcm_lib_ioctl, 1141 .hw_params = snd_ymfpci_capture_hw_params, 1142 .hw_free = snd_ymfpci_capture_hw_free, 1143 .prepare = snd_ymfpci_capture_prepare, 1144 .trigger = snd_ymfpci_capture_trigger, 1145 .pointer = snd_ymfpci_capture_pointer, 1146 }; 1147 1148 int snd_ymfpci_pcm(struct snd_ymfpci *chip, int device, struct snd_pcm **rpcm) 1149 { 1150 struct snd_pcm *pcm; 1151 int err; 1152 1153 if (rpcm) 1154 *rpcm = NULL; 1155 if ((err = snd_pcm_new(chip->card, "YMFPCI", device, 32, 1, &pcm)) < 0) 1156 return err; 1157 pcm->private_data = chip; 1158 1159 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_ops); 1160 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_rec_ops); 1161 1162 /* global setup */ 1163 pcm->info_flags = 0; 1164 strcpy(pcm->name, "YMFPCI"); 1165 chip->pcm = pcm; 1166 1167 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1168 snd_dma_pci_data(chip->pci), 64*1024, 256*1024); 1169 1170 err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK, 1171 snd_pcm_std_chmaps, 2, 0, NULL); 1172 if (err < 0) 1173 return err; 1174 1175 if (rpcm) 1176 *rpcm = pcm; 1177 return 0; 1178 } 1179 1180 static struct snd_pcm_ops snd_ymfpci_capture_ac97_ops = { 1181 .open = snd_ymfpci_capture_ac97_open, 1182 .close = snd_ymfpci_capture_close, 1183 .ioctl = snd_pcm_lib_ioctl, 1184 .hw_params = snd_ymfpci_capture_hw_params, 1185 .hw_free = snd_ymfpci_capture_hw_free, 1186 .prepare = snd_ymfpci_capture_prepare, 1187 .trigger = snd_ymfpci_capture_trigger, 1188 .pointer = snd_ymfpci_capture_pointer, 1189 }; 1190 1191 int snd_ymfpci_pcm2(struct snd_ymfpci *chip, int device, struct snd_pcm **rpcm) 1192 { 1193 struct snd_pcm *pcm; 1194 int err; 1195 1196 if (rpcm) 1197 *rpcm = NULL; 1198 if ((err = snd_pcm_new(chip->card, "YMFPCI - PCM2", device, 0, 1, &pcm)) < 0) 1199 return err; 1200 pcm->private_data = chip; 1201 1202 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_ac97_ops); 1203 1204 /* global setup */ 1205 pcm->info_flags = 0; 1206 sprintf(pcm->name, "YMFPCI - %s", 1207 chip->device_id == PCI_DEVICE_ID_YAMAHA_754 ? "Direct Recording" : "AC'97"); 1208 chip->pcm2 = pcm; 1209 1210 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1211 snd_dma_pci_data(chip->pci), 64*1024, 256*1024); 1212 1213 if (rpcm) 1214 *rpcm = pcm; 1215 return 0; 1216 } 1217 1218 static struct snd_pcm_ops snd_ymfpci_playback_spdif_ops = { 1219 .open = snd_ymfpci_playback_spdif_open, 1220 .close = snd_ymfpci_playback_spdif_close, 1221 .ioctl = snd_pcm_lib_ioctl, 1222 .hw_params = snd_ymfpci_playback_hw_params, 1223 .hw_free = snd_ymfpci_playback_hw_free, 1224 .prepare = snd_ymfpci_playback_prepare, 1225 .trigger = snd_ymfpci_playback_trigger, 1226 .pointer = snd_ymfpci_playback_pointer, 1227 }; 1228 1229 int snd_ymfpci_pcm_spdif(struct snd_ymfpci *chip, int device, 1230 struct snd_pcm **rpcm) 1231 { 1232 struct snd_pcm *pcm; 1233 int err; 1234 1235 if (rpcm) 1236 *rpcm = NULL; 1237 if ((err = snd_pcm_new(chip->card, "YMFPCI - IEC958", device, 1, 0, &pcm)) < 0) 1238 return err; 1239 pcm->private_data = chip; 1240 1241 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_spdif_ops); 1242 1243 /* global setup */ 1244 pcm->info_flags = 0; 1245 strcpy(pcm->name, "YMFPCI - IEC958"); 1246 chip->pcm_spdif = pcm; 1247 1248 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1249 snd_dma_pci_data(chip->pci), 64*1024, 256*1024); 1250 1251 if (rpcm) 1252 *rpcm = pcm; 1253 return 0; 1254 } 1255 1256 static struct snd_pcm_ops snd_ymfpci_playback_4ch_ops = { 1257 .open = snd_ymfpci_playback_4ch_open, 1258 .close = snd_ymfpci_playback_4ch_close, 1259 .ioctl = snd_pcm_lib_ioctl, 1260 .hw_params = snd_ymfpci_playback_hw_params, 1261 .hw_free = snd_ymfpci_playback_hw_free, 1262 .prepare = snd_ymfpci_playback_prepare, 1263 .trigger = snd_ymfpci_playback_trigger, 1264 .pointer = snd_ymfpci_playback_pointer, 1265 }; 1266 1267 static const struct snd_pcm_chmap_elem surround_map[] = { 1268 { .channels = 1, 1269 .map = { SNDRV_CHMAP_MONO } }, 1270 { .channels = 2, 1271 .map = { SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } }, 1272 { } 1273 }; 1274 1275 int snd_ymfpci_pcm_4ch(struct snd_ymfpci *chip, int device, 1276 struct snd_pcm **rpcm) 1277 { 1278 struct snd_pcm *pcm; 1279 int err; 1280 1281 if (rpcm) 1282 *rpcm = NULL; 1283 if ((err = snd_pcm_new(chip->card, "YMFPCI - Rear", device, 1, 0, &pcm)) < 0) 1284 return err; 1285 pcm->private_data = chip; 1286 1287 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_4ch_ops); 1288 1289 /* global setup */ 1290 pcm->info_flags = 0; 1291 strcpy(pcm->name, "YMFPCI - Rear PCM"); 1292 chip->pcm_4ch = pcm; 1293 1294 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1295 snd_dma_pci_data(chip->pci), 64*1024, 256*1024); 1296 1297 err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK, 1298 surround_map, 2, 0, NULL); 1299 if (err < 0) 1300 return err; 1301 1302 if (rpcm) 1303 *rpcm = pcm; 1304 return 0; 1305 } 1306 1307 static int snd_ymfpci_spdif_default_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1308 { 1309 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1310 uinfo->count = 1; 1311 return 0; 1312 } 1313 1314 static int snd_ymfpci_spdif_default_get(struct snd_kcontrol *kcontrol, 1315 struct snd_ctl_elem_value *ucontrol) 1316 { 1317 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1318 1319 spin_lock_irq(&chip->reg_lock); 1320 ucontrol->value.iec958.status[0] = (chip->spdif_bits >> 0) & 0xff; 1321 ucontrol->value.iec958.status[1] = (chip->spdif_bits >> 8) & 0xff; 1322 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000; 1323 spin_unlock_irq(&chip->reg_lock); 1324 return 0; 1325 } 1326 1327 static int snd_ymfpci_spdif_default_put(struct snd_kcontrol *kcontrol, 1328 struct snd_ctl_elem_value *ucontrol) 1329 { 1330 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1331 unsigned int val; 1332 int change; 1333 1334 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) | 1335 (ucontrol->value.iec958.status[1] << 8); 1336 spin_lock_irq(&chip->reg_lock); 1337 change = chip->spdif_bits != val; 1338 chip->spdif_bits = val; 1339 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 1) && chip->pcm_spdif == NULL) 1340 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits); 1341 spin_unlock_irq(&chip->reg_lock); 1342 return change; 1343 } 1344 1345 static struct snd_kcontrol_new snd_ymfpci_spdif_default = 1346 { 1347 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1348 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT), 1349 .info = snd_ymfpci_spdif_default_info, 1350 .get = snd_ymfpci_spdif_default_get, 1351 .put = snd_ymfpci_spdif_default_put 1352 }; 1353 1354 static int snd_ymfpci_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1355 { 1356 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1357 uinfo->count = 1; 1358 return 0; 1359 } 1360 1361 static int snd_ymfpci_spdif_mask_get(struct snd_kcontrol *kcontrol, 1362 struct snd_ctl_elem_value *ucontrol) 1363 { 1364 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1365 1366 spin_lock_irq(&chip->reg_lock); 1367 ucontrol->value.iec958.status[0] = 0x3e; 1368 ucontrol->value.iec958.status[1] = 0xff; 1369 spin_unlock_irq(&chip->reg_lock); 1370 return 0; 1371 } 1372 1373 static struct snd_kcontrol_new snd_ymfpci_spdif_mask = 1374 { 1375 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1376 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1377 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK), 1378 .info = snd_ymfpci_spdif_mask_info, 1379 .get = snd_ymfpci_spdif_mask_get, 1380 }; 1381 1382 static int snd_ymfpci_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1383 { 1384 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1385 uinfo->count = 1; 1386 return 0; 1387 } 1388 1389 static int snd_ymfpci_spdif_stream_get(struct snd_kcontrol *kcontrol, 1390 struct snd_ctl_elem_value *ucontrol) 1391 { 1392 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1393 1394 spin_lock_irq(&chip->reg_lock); 1395 ucontrol->value.iec958.status[0] = (chip->spdif_pcm_bits >> 0) & 0xff; 1396 ucontrol->value.iec958.status[1] = (chip->spdif_pcm_bits >> 8) & 0xff; 1397 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000; 1398 spin_unlock_irq(&chip->reg_lock); 1399 return 0; 1400 } 1401 1402 static int snd_ymfpci_spdif_stream_put(struct snd_kcontrol *kcontrol, 1403 struct snd_ctl_elem_value *ucontrol) 1404 { 1405 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1406 unsigned int val; 1407 int change; 1408 1409 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) | 1410 (ucontrol->value.iec958.status[1] << 8); 1411 spin_lock_irq(&chip->reg_lock); 1412 change = chip->spdif_pcm_bits != val; 1413 chip->spdif_pcm_bits = val; 1414 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 2)) 1415 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits); 1416 spin_unlock_irq(&chip->reg_lock); 1417 return change; 1418 } 1419 1420 static struct snd_kcontrol_new snd_ymfpci_spdif_stream = 1421 { 1422 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE, 1423 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1424 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM), 1425 .info = snd_ymfpci_spdif_stream_info, 1426 .get = snd_ymfpci_spdif_stream_get, 1427 .put = snd_ymfpci_spdif_stream_put 1428 }; 1429 1430 static int snd_ymfpci_drec_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *info) 1431 { 1432 static const char *const texts[3] = {"AC'97", "IEC958", "ZV Port"}; 1433 1434 return snd_ctl_enum_info(info, 1, 3, texts); 1435 } 1436 1437 static int snd_ymfpci_drec_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value) 1438 { 1439 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1440 u16 reg; 1441 1442 spin_lock_irq(&chip->reg_lock); 1443 reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); 1444 spin_unlock_irq(&chip->reg_lock); 1445 if (!(reg & 0x100)) 1446 value->value.enumerated.item[0] = 0; 1447 else 1448 value->value.enumerated.item[0] = 1 + ((reg & 0x200) != 0); 1449 return 0; 1450 } 1451 1452 static int snd_ymfpci_drec_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value) 1453 { 1454 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1455 u16 reg, old_reg; 1456 1457 spin_lock_irq(&chip->reg_lock); 1458 old_reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); 1459 if (value->value.enumerated.item[0] == 0) 1460 reg = old_reg & ~0x100; 1461 else 1462 reg = (old_reg & ~0x300) | 0x100 | ((value->value.enumerated.item[0] == 2) << 9); 1463 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, reg); 1464 spin_unlock_irq(&chip->reg_lock); 1465 return reg != old_reg; 1466 } 1467 1468 static struct snd_kcontrol_new snd_ymfpci_drec_source = { 1469 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, 1470 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1471 .name = "Direct Recording Source", 1472 .info = snd_ymfpci_drec_source_info, 1473 .get = snd_ymfpci_drec_source_get, 1474 .put = snd_ymfpci_drec_source_put 1475 }; 1476 1477 /* 1478 * Mixer controls 1479 */ 1480 1481 #define YMFPCI_SINGLE(xname, xindex, reg, shift) \ 1482 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1483 .info = snd_ymfpci_info_single, \ 1484 .get = snd_ymfpci_get_single, .put = snd_ymfpci_put_single, \ 1485 .private_value = ((reg) | ((shift) << 16)) } 1486 1487 #define snd_ymfpci_info_single snd_ctl_boolean_mono_info 1488 1489 static int snd_ymfpci_get_single(struct snd_kcontrol *kcontrol, 1490 struct snd_ctl_elem_value *ucontrol) 1491 { 1492 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1493 int reg = kcontrol->private_value & 0xffff; 1494 unsigned int shift = (kcontrol->private_value >> 16) & 0xff; 1495 unsigned int mask = 1; 1496 1497 switch (reg) { 1498 case YDSXGR_SPDIFOUTCTRL: break; 1499 case YDSXGR_SPDIFINCTRL: break; 1500 default: return -EINVAL; 1501 } 1502 ucontrol->value.integer.value[0] = 1503 (snd_ymfpci_readl(chip, reg) >> shift) & mask; 1504 return 0; 1505 } 1506 1507 static int snd_ymfpci_put_single(struct snd_kcontrol *kcontrol, 1508 struct snd_ctl_elem_value *ucontrol) 1509 { 1510 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1511 int reg = kcontrol->private_value & 0xffff; 1512 unsigned int shift = (kcontrol->private_value >> 16) & 0xff; 1513 unsigned int mask = 1; 1514 int change; 1515 unsigned int val, oval; 1516 1517 switch (reg) { 1518 case YDSXGR_SPDIFOUTCTRL: break; 1519 case YDSXGR_SPDIFINCTRL: break; 1520 default: return -EINVAL; 1521 } 1522 val = (ucontrol->value.integer.value[0] & mask); 1523 val <<= shift; 1524 spin_lock_irq(&chip->reg_lock); 1525 oval = snd_ymfpci_readl(chip, reg); 1526 val = (oval & ~(mask << shift)) | val; 1527 change = val != oval; 1528 snd_ymfpci_writel(chip, reg, val); 1529 spin_unlock_irq(&chip->reg_lock); 1530 return change; 1531 } 1532 1533 static const DECLARE_TLV_DB_LINEAR(db_scale_native, TLV_DB_GAIN_MUTE, 0); 1534 1535 #define YMFPCI_DOUBLE(xname, xindex, reg) \ 1536 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1537 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \ 1538 .info = snd_ymfpci_info_double, \ 1539 .get = snd_ymfpci_get_double, .put = snd_ymfpci_put_double, \ 1540 .private_value = reg, \ 1541 .tlv = { .p = db_scale_native } } 1542 1543 static int snd_ymfpci_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1544 { 1545 unsigned int reg = kcontrol->private_value; 1546 1547 if (reg < 0x80 || reg >= 0xc0) 1548 return -EINVAL; 1549 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 1550 uinfo->count = 2; 1551 uinfo->value.integer.min = 0; 1552 uinfo->value.integer.max = 16383; 1553 return 0; 1554 } 1555 1556 static int snd_ymfpci_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1557 { 1558 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1559 unsigned int reg = kcontrol->private_value; 1560 unsigned int shift_left = 0, shift_right = 16, mask = 16383; 1561 unsigned int val; 1562 1563 if (reg < 0x80 || reg >= 0xc0) 1564 return -EINVAL; 1565 spin_lock_irq(&chip->reg_lock); 1566 val = snd_ymfpci_readl(chip, reg); 1567 spin_unlock_irq(&chip->reg_lock); 1568 ucontrol->value.integer.value[0] = (val >> shift_left) & mask; 1569 ucontrol->value.integer.value[1] = (val >> shift_right) & mask; 1570 return 0; 1571 } 1572 1573 static int snd_ymfpci_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1574 { 1575 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1576 unsigned int reg = kcontrol->private_value; 1577 unsigned int shift_left = 0, shift_right = 16, mask = 16383; 1578 int change; 1579 unsigned int val1, val2, oval; 1580 1581 if (reg < 0x80 || reg >= 0xc0) 1582 return -EINVAL; 1583 val1 = ucontrol->value.integer.value[0] & mask; 1584 val2 = ucontrol->value.integer.value[1] & mask; 1585 val1 <<= shift_left; 1586 val2 <<= shift_right; 1587 spin_lock_irq(&chip->reg_lock); 1588 oval = snd_ymfpci_readl(chip, reg); 1589 val1 = (oval & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2; 1590 change = val1 != oval; 1591 snd_ymfpci_writel(chip, reg, val1); 1592 spin_unlock_irq(&chip->reg_lock); 1593 return change; 1594 } 1595 1596 static int snd_ymfpci_put_nativedacvol(struct snd_kcontrol *kcontrol, 1597 struct snd_ctl_elem_value *ucontrol) 1598 { 1599 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1600 unsigned int reg = YDSXGR_NATIVEDACOUTVOL; 1601 unsigned int reg2 = YDSXGR_BUF441OUTVOL; 1602 int change; 1603 unsigned int value, oval; 1604 1605 value = ucontrol->value.integer.value[0] & 0x3fff; 1606 value |= (ucontrol->value.integer.value[1] & 0x3fff) << 16; 1607 spin_lock_irq(&chip->reg_lock); 1608 oval = snd_ymfpci_readl(chip, reg); 1609 change = value != oval; 1610 snd_ymfpci_writel(chip, reg, value); 1611 snd_ymfpci_writel(chip, reg2, value); 1612 spin_unlock_irq(&chip->reg_lock); 1613 return change; 1614 } 1615 1616 /* 1617 * 4ch duplication 1618 */ 1619 #define snd_ymfpci_info_dup4ch snd_ctl_boolean_mono_info 1620 1621 static int snd_ymfpci_get_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1622 { 1623 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1624 ucontrol->value.integer.value[0] = chip->mode_dup4ch; 1625 return 0; 1626 } 1627 1628 static int snd_ymfpci_put_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1629 { 1630 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1631 int change; 1632 change = (ucontrol->value.integer.value[0] != chip->mode_dup4ch); 1633 if (change) 1634 chip->mode_dup4ch = !!ucontrol->value.integer.value[0]; 1635 return change; 1636 } 1637 1638 static struct snd_kcontrol_new snd_ymfpci_dup4ch = { 1639 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1640 .name = "4ch Duplication", 1641 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, 1642 .info = snd_ymfpci_info_dup4ch, 1643 .get = snd_ymfpci_get_dup4ch, 1644 .put = snd_ymfpci_put_dup4ch, 1645 }; 1646 1647 static struct snd_kcontrol_new snd_ymfpci_controls[] = { 1648 { 1649 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1650 .name = "Wave Playback Volume", 1651 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | 1652 SNDRV_CTL_ELEM_ACCESS_TLV_READ, 1653 .info = snd_ymfpci_info_double, 1654 .get = snd_ymfpci_get_double, 1655 .put = snd_ymfpci_put_nativedacvol, 1656 .private_value = YDSXGR_NATIVEDACOUTVOL, 1657 .tlv = { .p = db_scale_native }, 1658 }, 1659 YMFPCI_DOUBLE("Wave Capture Volume", 0, YDSXGR_NATIVEDACLOOPVOL), 1660 YMFPCI_DOUBLE("Digital Capture Volume", 0, YDSXGR_NATIVEDACINVOL), 1661 YMFPCI_DOUBLE("Digital Capture Volume", 1, YDSXGR_NATIVEADCINVOL), 1662 YMFPCI_DOUBLE("ADC Playback Volume", 0, YDSXGR_PRIADCOUTVOL), 1663 YMFPCI_DOUBLE("ADC Capture Volume", 0, YDSXGR_PRIADCLOOPVOL), 1664 YMFPCI_DOUBLE("ADC Playback Volume", 1, YDSXGR_SECADCOUTVOL), 1665 YMFPCI_DOUBLE("ADC Capture Volume", 1, YDSXGR_SECADCLOOPVOL), 1666 YMFPCI_DOUBLE("FM Legacy Playback Volume", 0, YDSXGR_LEGACYOUTVOL), 1667 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ", PLAYBACK,VOLUME), 0, YDSXGR_ZVOUTVOL), 1668 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("", CAPTURE,VOLUME), 0, YDSXGR_ZVLOOPVOL), 1669 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ",PLAYBACK,VOLUME), 1, YDSXGR_SPDIFOUTVOL), 1670 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,VOLUME), 1, YDSXGR_SPDIFLOOPVOL), 1671 YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), 0, YDSXGR_SPDIFOUTCTRL, 0), 1672 YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), 0, YDSXGR_SPDIFINCTRL, 0), 1673 YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("Loop",NONE,NONE), 0, YDSXGR_SPDIFINCTRL, 4), 1674 }; 1675 1676 1677 /* 1678 * GPIO 1679 */ 1680 1681 static int snd_ymfpci_get_gpio_out(struct snd_ymfpci *chip, int pin) 1682 { 1683 u16 reg, mode; 1684 unsigned long flags; 1685 1686 spin_lock_irqsave(&chip->reg_lock, flags); 1687 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE); 1688 reg &= ~(1 << (pin + 8)); 1689 reg |= (1 << pin); 1690 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg); 1691 /* set the level mode for input line */ 1692 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOTYPECONFIG); 1693 mode &= ~(3 << (pin * 2)); 1694 snd_ymfpci_writew(chip, YDSXGR_GPIOTYPECONFIG, mode); 1695 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8))); 1696 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOINSTATUS); 1697 spin_unlock_irqrestore(&chip->reg_lock, flags); 1698 return (mode >> pin) & 1; 1699 } 1700 1701 static int snd_ymfpci_set_gpio_out(struct snd_ymfpci *chip, int pin, int enable) 1702 { 1703 u16 reg; 1704 unsigned long flags; 1705 1706 spin_lock_irqsave(&chip->reg_lock, flags); 1707 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE); 1708 reg &= ~(1 << pin); 1709 reg &= ~(1 << (pin + 8)); 1710 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg); 1711 snd_ymfpci_writew(chip, YDSXGR_GPIOOUTCTRL, enable << pin); 1712 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8))); 1713 spin_unlock_irqrestore(&chip->reg_lock, flags); 1714 1715 return 0; 1716 } 1717 1718 #define snd_ymfpci_gpio_sw_info snd_ctl_boolean_mono_info 1719 1720 static int snd_ymfpci_gpio_sw_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1721 { 1722 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1723 int pin = (int)kcontrol->private_value; 1724 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin); 1725 return 0; 1726 } 1727 1728 static int snd_ymfpci_gpio_sw_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1729 { 1730 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1731 int pin = (int)kcontrol->private_value; 1732 1733 if (snd_ymfpci_get_gpio_out(chip, pin) != ucontrol->value.integer.value[0]) { 1734 snd_ymfpci_set_gpio_out(chip, pin, !!ucontrol->value.integer.value[0]); 1735 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin); 1736 return 1; 1737 } 1738 return 0; 1739 } 1740 1741 static struct snd_kcontrol_new snd_ymfpci_rear_shared = { 1742 .name = "Shared Rear/Line-In Switch", 1743 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1744 .info = snd_ymfpci_gpio_sw_info, 1745 .get = snd_ymfpci_gpio_sw_get, 1746 .put = snd_ymfpci_gpio_sw_put, 1747 .private_value = 2, 1748 }; 1749 1750 /* 1751 * PCM voice volume 1752 */ 1753 1754 static int snd_ymfpci_pcm_vol_info(struct snd_kcontrol *kcontrol, 1755 struct snd_ctl_elem_info *uinfo) 1756 { 1757 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 1758 uinfo->count = 2; 1759 uinfo->value.integer.min = 0; 1760 uinfo->value.integer.max = 0x8000; 1761 return 0; 1762 } 1763 1764 static int snd_ymfpci_pcm_vol_get(struct snd_kcontrol *kcontrol, 1765 struct snd_ctl_elem_value *ucontrol) 1766 { 1767 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1768 unsigned int subs = kcontrol->id.subdevice; 1769 1770 ucontrol->value.integer.value[0] = chip->pcm_mixer[subs].left; 1771 ucontrol->value.integer.value[1] = chip->pcm_mixer[subs].right; 1772 return 0; 1773 } 1774 1775 static int snd_ymfpci_pcm_vol_put(struct snd_kcontrol *kcontrol, 1776 struct snd_ctl_elem_value *ucontrol) 1777 { 1778 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1779 unsigned int subs = kcontrol->id.subdevice; 1780 struct snd_pcm_substream *substream; 1781 unsigned long flags; 1782 1783 if (ucontrol->value.integer.value[0] != chip->pcm_mixer[subs].left || 1784 ucontrol->value.integer.value[1] != chip->pcm_mixer[subs].right) { 1785 chip->pcm_mixer[subs].left = ucontrol->value.integer.value[0]; 1786 chip->pcm_mixer[subs].right = ucontrol->value.integer.value[1]; 1787 if (chip->pcm_mixer[subs].left > 0x8000) 1788 chip->pcm_mixer[subs].left = 0x8000; 1789 if (chip->pcm_mixer[subs].right > 0x8000) 1790 chip->pcm_mixer[subs].right = 0x8000; 1791 1792 substream = (struct snd_pcm_substream *)kcontrol->private_value; 1793 spin_lock_irqsave(&chip->voice_lock, flags); 1794 if (substream->runtime && substream->runtime->private_data) { 1795 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data; 1796 if (!ypcm->use_441_slot) 1797 ypcm->update_pcm_vol = 2; 1798 } 1799 spin_unlock_irqrestore(&chip->voice_lock, flags); 1800 return 1; 1801 } 1802 return 0; 1803 } 1804 1805 static struct snd_kcontrol_new snd_ymfpci_pcm_volume = { 1806 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1807 .name = "PCM Playback Volume", 1808 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | 1809 SNDRV_CTL_ELEM_ACCESS_INACTIVE, 1810 .info = snd_ymfpci_pcm_vol_info, 1811 .get = snd_ymfpci_pcm_vol_get, 1812 .put = snd_ymfpci_pcm_vol_put, 1813 }; 1814 1815 1816 /* 1817 * Mixer routines 1818 */ 1819 1820 static void snd_ymfpci_mixer_free_ac97_bus(struct snd_ac97_bus *bus) 1821 { 1822 struct snd_ymfpci *chip = bus->private_data; 1823 chip->ac97_bus = NULL; 1824 } 1825 1826 static void snd_ymfpci_mixer_free_ac97(struct snd_ac97 *ac97) 1827 { 1828 struct snd_ymfpci *chip = ac97->private_data; 1829 chip->ac97 = NULL; 1830 } 1831 1832 int snd_ymfpci_mixer(struct snd_ymfpci *chip, int rear_switch) 1833 { 1834 struct snd_ac97_template ac97; 1835 struct snd_kcontrol *kctl; 1836 struct snd_pcm_substream *substream; 1837 unsigned int idx; 1838 int err; 1839 static struct snd_ac97_bus_ops ops = { 1840 .write = snd_ymfpci_codec_write, 1841 .read = snd_ymfpci_codec_read, 1842 }; 1843 1844 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0) 1845 return err; 1846 chip->ac97_bus->private_free = snd_ymfpci_mixer_free_ac97_bus; 1847 chip->ac97_bus->no_vra = 1; /* YMFPCI doesn't need VRA */ 1848 1849 memset(&ac97, 0, sizeof(ac97)); 1850 ac97.private_data = chip; 1851 ac97.private_free = snd_ymfpci_mixer_free_ac97; 1852 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0) 1853 return err; 1854 1855 /* to be sure */ 1856 snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS, 1857 AC97_EA_VRA|AC97_EA_VRM, 0); 1858 1859 for (idx = 0; idx < ARRAY_SIZE(snd_ymfpci_controls); idx++) { 1860 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_controls[idx], chip))) < 0) 1861 return err; 1862 } 1863 if (chip->ac97->ext_id & AC97_EI_SDAC) { 1864 kctl = snd_ctl_new1(&snd_ymfpci_dup4ch, chip); 1865 err = snd_ctl_add(chip->card, kctl); 1866 if (err < 0) 1867 return err; 1868 } 1869 1870 /* add S/PDIF control */ 1871 if (snd_BUG_ON(!chip->pcm_spdif)) 1872 return -ENXIO; 1873 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_default, chip))) < 0) 1874 return err; 1875 kctl->id.device = chip->pcm_spdif->device; 1876 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_mask, chip))) < 0) 1877 return err; 1878 kctl->id.device = chip->pcm_spdif->device; 1879 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_stream, chip))) < 0) 1880 return err; 1881 kctl->id.device = chip->pcm_spdif->device; 1882 chip->spdif_pcm_ctl = kctl; 1883 1884 /* direct recording source */ 1885 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_754 && 1886 (err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_drec_source, chip))) < 0) 1887 return err; 1888 1889 /* 1890 * shared rear/line-in 1891 */ 1892 if (rear_switch) { 1893 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_rear_shared, chip))) < 0) 1894 return err; 1895 } 1896 1897 /* per-voice volume */ 1898 substream = chip->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream; 1899 for (idx = 0; idx < 32; ++idx) { 1900 kctl = snd_ctl_new1(&snd_ymfpci_pcm_volume, chip); 1901 if (!kctl) 1902 return -ENOMEM; 1903 kctl->id.device = chip->pcm->device; 1904 kctl->id.subdevice = idx; 1905 kctl->private_value = (unsigned long)substream; 1906 if ((err = snd_ctl_add(chip->card, kctl)) < 0) 1907 return err; 1908 chip->pcm_mixer[idx].left = 0x8000; 1909 chip->pcm_mixer[idx].right = 0x8000; 1910 chip->pcm_mixer[idx].ctl = kctl; 1911 substream = substream->next; 1912 } 1913 1914 return 0; 1915 } 1916 1917 1918 /* 1919 * timer 1920 */ 1921 1922 static int snd_ymfpci_timer_start(struct snd_timer *timer) 1923 { 1924 struct snd_ymfpci *chip; 1925 unsigned long flags; 1926 unsigned int count; 1927 1928 chip = snd_timer_chip(timer); 1929 spin_lock_irqsave(&chip->reg_lock, flags); 1930 if (timer->sticks > 1) { 1931 chip->timer_ticks = timer->sticks; 1932 count = timer->sticks - 1; 1933 } else { 1934 /* 1935 * Divisor 1 is not allowed; fake it by using divisor 2 and 1936 * counting two ticks for each interrupt. 1937 */ 1938 chip->timer_ticks = 2; 1939 count = 2 - 1; 1940 } 1941 snd_ymfpci_writew(chip, YDSXGR_TIMERCOUNT, count); 1942 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x03); 1943 spin_unlock_irqrestore(&chip->reg_lock, flags); 1944 return 0; 1945 } 1946 1947 static int snd_ymfpci_timer_stop(struct snd_timer *timer) 1948 { 1949 struct snd_ymfpci *chip; 1950 unsigned long flags; 1951 1952 chip = snd_timer_chip(timer); 1953 spin_lock_irqsave(&chip->reg_lock, flags); 1954 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x00); 1955 spin_unlock_irqrestore(&chip->reg_lock, flags); 1956 return 0; 1957 } 1958 1959 static int snd_ymfpci_timer_precise_resolution(struct snd_timer *timer, 1960 unsigned long *num, unsigned long *den) 1961 { 1962 *num = 1; 1963 *den = 96000; 1964 return 0; 1965 } 1966 1967 static struct snd_timer_hardware snd_ymfpci_timer_hw = { 1968 .flags = SNDRV_TIMER_HW_AUTO, 1969 .resolution = 10417, /* 1 / 96 kHz = 10.41666...us */ 1970 .ticks = 0x10000, 1971 .start = snd_ymfpci_timer_start, 1972 .stop = snd_ymfpci_timer_stop, 1973 .precise_resolution = snd_ymfpci_timer_precise_resolution, 1974 }; 1975 1976 int snd_ymfpci_timer(struct snd_ymfpci *chip, int device) 1977 { 1978 struct snd_timer *timer = NULL; 1979 struct snd_timer_id tid; 1980 int err; 1981 1982 tid.dev_class = SNDRV_TIMER_CLASS_CARD; 1983 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE; 1984 tid.card = chip->card->number; 1985 tid.device = device; 1986 tid.subdevice = 0; 1987 if ((err = snd_timer_new(chip->card, "YMFPCI", &tid, &timer)) >= 0) { 1988 strcpy(timer->name, "YMFPCI timer"); 1989 timer->private_data = chip; 1990 timer->hw = snd_ymfpci_timer_hw; 1991 } 1992 chip->timer = timer; 1993 return err; 1994 } 1995 1996 1997 /* 1998 * proc interface 1999 */ 2000 2001 static void snd_ymfpci_proc_read(struct snd_info_entry *entry, 2002 struct snd_info_buffer *buffer) 2003 { 2004 struct snd_ymfpci *chip = entry->private_data; 2005 int i; 2006 2007 snd_iprintf(buffer, "YMFPCI\n\n"); 2008 for (i = 0; i <= YDSXGR_WORKBASE; i += 4) 2009 snd_iprintf(buffer, "%04x: %04x\n", i, snd_ymfpci_readl(chip, i)); 2010 } 2011 2012 static int snd_ymfpci_proc_init(struct snd_card *card, struct snd_ymfpci *chip) 2013 { 2014 struct snd_info_entry *entry; 2015 2016 if (! snd_card_proc_new(card, "ymfpci", &entry)) 2017 snd_info_set_text_ops(entry, chip, snd_ymfpci_proc_read); 2018 return 0; 2019 } 2020 2021 /* 2022 * initialization routines 2023 */ 2024 2025 static void snd_ymfpci_aclink_reset(struct pci_dev * pci) 2026 { 2027 u8 cmd; 2028 2029 pci_read_config_byte(pci, PCIR_DSXG_CTRL, &cmd); 2030 #if 0 // force to reset 2031 if (cmd & 0x03) { 2032 #endif 2033 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc); 2034 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd | 0x03); 2035 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc); 2036 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL1, 0); 2037 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL2, 0); 2038 #if 0 2039 } 2040 #endif 2041 } 2042 2043 static void snd_ymfpci_enable_dsp(struct snd_ymfpci *chip) 2044 { 2045 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000001); 2046 } 2047 2048 static void snd_ymfpci_disable_dsp(struct snd_ymfpci *chip) 2049 { 2050 u32 val; 2051 int timeout = 1000; 2052 2053 val = snd_ymfpci_readl(chip, YDSXGR_CONFIG); 2054 if (val) 2055 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000000); 2056 while (timeout-- > 0) { 2057 val = snd_ymfpci_readl(chip, YDSXGR_STATUS); 2058 if ((val & 0x00000002) == 0) 2059 break; 2060 } 2061 } 2062 2063 static int snd_ymfpci_request_firmware(struct snd_ymfpci *chip) 2064 { 2065 int err, is_1e; 2066 const char *name; 2067 2068 err = request_firmware(&chip->dsp_microcode, "yamaha/ds1_dsp.fw", 2069 &chip->pci->dev); 2070 if (err >= 0) { 2071 if (chip->dsp_microcode->size != YDSXG_DSPLENGTH) { 2072 dev_err(chip->card->dev, 2073 "DSP microcode has wrong size\n"); 2074 err = -EINVAL; 2075 } 2076 } 2077 if (err < 0) 2078 return err; 2079 is_1e = chip->device_id == PCI_DEVICE_ID_YAMAHA_724F || 2080 chip->device_id == PCI_DEVICE_ID_YAMAHA_740C || 2081 chip->device_id == PCI_DEVICE_ID_YAMAHA_744 || 2082 chip->device_id == PCI_DEVICE_ID_YAMAHA_754; 2083 name = is_1e ? "yamaha/ds1e_ctrl.fw" : "yamaha/ds1_ctrl.fw"; 2084 err = request_firmware(&chip->controller_microcode, name, 2085 &chip->pci->dev); 2086 if (err >= 0) { 2087 if (chip->controller_microcode->size != YDSXG_CTRLLENGTH) { 2088 dev_err(chip->card->dev, 2089 "controller microcode has wrong size\n"); 2090 err = -EINVAL; 2091 } 2092 } 2093 if (err < 0) 2094 return err; 2095 return 0; 2096 } 2097 2098 MODULE_FIRMWARE("yamaha/ds1_dsp.fw"); 2099 MODULE_FIRMWARE("yamaha/ds1_ctrl.fw"); 2100 MODULE_FIRMWARE("yamaha/ds1e_ctrl.fw"); 2101 2102 static void snd_ymfpci_download_image(struct snd_ymfpci *chip) 2103 { 2104 int i; 2105 u16 ctrl; 2106 const __le32 *inst; 2107 2108 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x00000000); 2109 snd_ymfpci_disable_dsp(chip); 2110 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00010000); 2111 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00000000); 2112 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, 0x00000000); 2113 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 0x00000000); 2114 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0x00000000); 2115 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0x00000000); 2116 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0x00000000); 2117 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); 2118 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007); 2119 2120 /* setup DSP instruction code */ 2121 inst = (const __le32 *)chip->dsp_microcode->data; 2122 for (i = 0; i < YDSXG_DSPLENGTH / 4; i++) 2123 snd_ymfpci_writel(chip, YDSXGR_DSPINSTRAM + (i << 2), 2124 le32_to_cpu(inst[i])); 2125 2126 /* setup control instruction code */ 2127 inst = (const __le32 *)chip->controller_microcode->data; 2128 for (i = 0; i < YDSXG_CTRLLENGTH / 4; i++) 2129 snd_ymfpci_writel(chip, YDSXGR_CTRLINSTRAM + (i << 2), 2130 le32_to_cpu(inst[i])); 2131 2132 snd_ymfpci_enable_dsp(chip); 2133 } 2134 2135 static int snd_ymfpci_memalloc(struct snd_ymfpci *chip) 2136 { 2137 long size, playback_ctrl_size; 2138 int voice, bank, reg; 2139 u8 *ptr; 2140 dma_addr_t ptr_addr; 2141 2142 playback_ctrl_size = 4 + 4 * YDSXG_PLAYBACK_VOICES; 2143 chip->bank_size_playback = snd_ymfpci_readl(chip, YDSXGR_PLAYCTRLSIZE) << 2; 2144 chip->bank_size_capture = snd_ymfpci_readl(chip, YDSXGR_RECCTRLSIZE) << 2; 2145 chip->bank_size_effect = snd_ymfpci_readl(chip, YDSXGR_EFFCTRLSIZE) << 2; 2146 chip->work_size = YDSXG_DEFAULT_WORK_SIZE; 2147 2148 size = ALIGN(playback_ctrl_size, 0x100) + 2149 ALIGN(chip->bank_size_playback * 2 * YDSXG_PLAYBACK_VOICES, 0x100) + 2150 ALIGN(chip->bank_size_capture * 2 * YDSXG_CAPTURE_VOICES, 0x100) + 2151 ALIGN(chip->bank_size_effect * 2 * YDSXG_EFFECT_VOICES, 0x100) + 2152 chip->work_size; 2153 /* work_ptr must be aligned to 256 bytes, but it's already 2154 covered with the kernel page allocation mechanism */ 2155 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), 2156 size, &chip->work_ptr) < 0) 2157 return -ENOMEM; 2158 ptr = chip->work_ptr.area; 2159 ptr_addr = chip->work_ptr.addr; 2160 memset(ptr, 0, size); /* for sure */ 2161 2162 chip->bank_base_playback = ptr; 2163 chip->bank_base_playback_addr = ptr_addr; 2164 chip->ctrl_playback = (u32 *)ptr; 2165 chip->ctrl_playback[0] = cpu_to_le32(YDSXG_PLAYBACK_VOICES); 2166 ptr += ALIGN(playback_ctrl_size, 0x100); 2167 ptr_addr += ALIGN(playback_ctrl_size, 0x100); 2168 for (voice = 0; voice < YDSXG_PLAYBACK_VOICES; voice++) { 2169 chip->voices[voice].number = voice; 2170 chip->voices[voice].bank = (struct snd_ymfpci_playback_bank *)ptr; 2171 chip->voices[voice].bank_addr = ptr_addr; 2172 for (bank = 0; bank < 2; bank++) { 2173 chip->bank_playback[voice][bank] = (struct snd_ymfpci_playback_bank *)ptr; 2174 ptr += chip->bank_size_playback; 2175 ptr_addr += chip->bank_size_playback; 2176 } 2177 } 2178 ptr = (char *)ALIGN((unsigned long)ptr, 0x100); 2179 ptr_addr = ALIGN(ptr_addr, 0x100); 2180 chip->bank_base_capture = ptr; 2181 chip->bank_base_capture_addr = ptr_addr; 2182 for (voice = 0; voice < YDSXG_CAPTURE_VOICES; voice++) 2183 for (bank = 0; bank < 2; bank++) { 2184 chip->bank_capture[voice][bank] = (struct snd_ymfpci_capture_bank *)ptr; 2185 ptr += chip->bank_size_capture; 2186 ptr_addr += chip->bank_size_capture; 2187 } 2188 ptr = (char *)ALIGN((unsigned long)ptr, 0x100); 2189 ptr_addr = ALIGN(ptr_addr, 0x100); 2190 chip->bank_base_effect = ptr; 2191 chip->bank_base_effect_addr = ptr_addr; 2192 for (voice = 0; voice < YDSXG_EFFECT_VOICES; voice++) 2193 for (bank = 0; bank < 2; bank++) { 2194 chip->bank_effect[voice][bank] = (struct snd_ymfpci_effect_bank *)ptr; 2195 ptr += chip->bank_size_effect; 2196 ptr_addr += chip->bank_size_effect; 2197 } 2198 ptr = (char *)ALIGN((unsigned long)ptr, 0x100); 2199 ptr_addr = ALIGN(ptr_addr, 0x100); 2200 chip->work_base = ptr; 2201 chip->work_base_addr = ptr_addr; 2202 2203 snd_BUG_ON(ptr + chip->work_size != 2204 chip->work_ptr.area + chip->work_ptr.bytes); 2205 2206 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, chip->bank_base_playback_addr); 2207 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, chip->bank_base_capture_addr); 2208 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, chip->bank_base_effect_addr); 2209 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, chip->work_base_addr); 2210 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, chip->work_size >> 2); 2211 2212 /* S/PDIF output initialization */ 2213 chip->spdif_bits = chip->spdif_pcm_bits = SNDRV_PCM_DEFAULT_CON_SPDIF & 0xffff; 2214 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 0); 2215 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits); 2216 2217 /* S/PDIF input initialization */ 2218 snd_ymfpci_writew(chip, YDSXGR_SPDIFINCTRL, 0); 2219 2220 /* digital mixer setup */ 2221 for (reg = 0x80; reg < 0xc0; reg += 4) 2222 snd_ymfpci_writel(chip, reg, 0); 2223 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x3fff3fff); 2224 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0x3fff3fff); 2225 snd_ymfpci_writel(chip, YDSXGR_ZVOUTVOL, 0x3fff3fff); 2226 snd_ymfpci_writel(chip, YDSXGR_SPDIFOUTVOL, 0x3fff3fff); 2227 snd_ymfpci_writel(chip, YDSXGR_NATIVEADCINVOL, 0x3fff3fff); 2228 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACINVOL, 0x3fff3fff); 2229 snd_ymfpci_writel(chip, YDSXGR_PRIADCLOOPVOL, 0x3fff3fff); 2230 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0x3fff3fff); 2231 2232 return 0; 2233 } 2234 2235 static int snd_ymfpci_free(struct snd_ymfpci *chip) 2236 { 2237 u16 ctrl; 2238 2239 if (snd_BUG_ON(!chip)) 2240 return -EINVAL; 2241 2242 if (chip->res_reg_area) { /* don't touch busy hardware */ 2243 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0); 2244 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0); 2245 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0); 2246 snd_ymfpci_writel(chip, YDSXGR_STATUS, ~0); 2247 snd_ymfpci_disable_dsp(chip); 2248 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0); 2249 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0); 2250 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0); 2251 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, 0); 2252 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, 0); 2253 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); 2254 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007); 2255 } 2256 2257 snd_ymfpci_ac3_done(chip); 2258 2259 /* Set PCI device to D3 state */ 2260 #if 0 2261 /* FIXME: temporarily disabled, otherwise we cannot fire up 2262 * the chip again unless reboot. ACPI bug? 2263 */ 2264 pci_set_power_state(chip->pci, PCI_D3hot); 2265 #endif 2266 2267 #ifdef CONFIG_PM_SLEEP 2268 kfree(chip->saved_regs); 2269 #endif 2270 if (chip->irq >= 0) 2271 free_irq(chip->irq, chip); 2272 release_and_free_resource(chip->mpu_res); 2273 release_and_free_resource(chip->fm_res); 2274 snd_ymfpci_free_gameport(chip); 2275 if (chip->reg_area_virt) 2276 iounmap(chip->reg_area_virt); 2277 if (chip->work_ptr.area) 2278 snd_dma_free_pages(&chip->work_ptr); 2279 2280 release_and_free_resource(chip->res_reg_area); 2281 2282 pci_write_config_word(chip->pci, 0x40, chip->old_legacy_ctrl); 2283 2284 pci_disable_device(chip->pci); 2285 release_firmware(chip->dsp_microcode); 2286 release_firmware(chip->controller_microcode); 2287 kfree(chip); 2288 return 0; 2289 } 2290 2291 static int snd_ymfpci_dev_free(struct snd_device *device) 2292 { 2293 struct snd_ymfpci *chip = device->device_data; 2294 return snd_ymfpci_free(chip); 2295 } 2296 2297 #ifdef CONFIG_PM_SLEEP 2298 static int saved_regs_index[] = { 2299 /* spdif */ 2300 YDSXGR_SPDIFOUTCTRL, 2301 YDSXGR_SPDIFOUTSTATUS, 2302 YDSXGR_SPDIFINCTRL, 2303 /* volumes */ 2304 YDSXGR_PRIADCLOOPVOL, 2305 YDSXGR_NATIVEDACINVOL, 2306 YDSXGR_NATIVEDACOUTVOL, 2307 YDSXGR_BUF441OUTVOL, 2308 YDSXGR_NATIVEADCINVOL, 2309 YDSXGR_SPDIFLOOPVOL, 2310 YDSXGR_SPDIFOUTVOL, 2311 YDSXGR_ZVOUTVOL, 2312 YDSXGR_LEGACYOUTVOL, 2313 /* address bases */ 2314 YDSXGR_PLAYCTRLBASE, 2315 YDSXGR_RECCTRLBASE, 2316 YDSXGR_EFFCTRLBASE, 2317 YDSXGR_WORKBASE, 2318 /* capture set up */ 2319 YDSXGR_MAPOFREC, 2320 YDSXGR_RECFORMAT, 2321 YDSXGR_RECSLOTSR, 2322 YDSXGR_ADCFORMAT, 2323 YDSXGR_ADCSLOTSR, 2324 }; 2325 #define YDSXGR_NUM_SAVED_REGS ARRAY_SIZE(saved_regs_index) 2326 2327 static int snd_ymfpci_suspend(struct device *dev) 2328 { 2329 struct pci_dev *pci = to_pci_dev(dev); 2330 struct snd_card *card = dev_get_drvdata(dev); 2331 struct snd_ymfpci *chip = card->private_data; 2332 unsigned int i; 2333 2334 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 2335 snd_pcm_suspend_all(chip->pcm); 2336 snd_pcm_suspend_all(chip->pcm2); 2337 snd_pcm_suspend_all(chip->pcm_spdif); 2338 snd_pcm_suspend_all(chip->pcm_4ch); 2339 snd_ac97_suspend(chip->ac97); 2340 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++) 2341 chip->saved_regs[i] = snd_ymfpci_readl(chip, saved_regs_index[i]); 2342 chip->saved_ydsxgr_mode = snd_ymfpci_readl(chip, YDSXGR_MODE); 2343 pci_read_config_word(chip->pci, PCIR_DSXG_LEGACY, 2344 &chip->saved_dsxg_legacy); 2345 pci_read_config_word(chip->pci, PCIR_DSXG_ELEGACY, 2346 &chip->saved_dsxg_elegacy); 2347 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0); 2348 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0); 2349 snd_ymfpci_disable_dsp(chip); 2350 pci_disable_device(pci); 2351 pci_save_state(pci); 2352 pci_set_power_state(pci, PCI_D3hot); 2353 return 0; 2354 } 2355 2356 static int snd_ymfpci_resume(struct device *dev) 2357 { 2358 struct pci_dev *pci = to_pci_dev(dev); 2359 struct snd_card *card = dev_get_drvdata(dev); 2360 struct snd_ymfpci *chip = card->private_data; 2361 unsigned int i; 2362 2363 pci_set_power_state(pci, PCI_D0); 2364 pci_restore_state(pci); 2365 if (pci_enable_device(pci) < 0) { 2366 dev_err(dev, "pci_enable_device failed, disabling device\n"); 2367 snd_card_disconnect(card); 2368 return -EIO; 2369 } 2370 pci_set_master(pci); 2371 snd_ymfpci_aclink_reset(pci); 2372 snd_ymfpci_codec_ready(chip, 0); 2373 snd_ymfpci_download_image(chip); 2374 udelay(100); 2375 2376 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++) 2377 snd_ymfpci_writel(chip, saved_regs_index[i], chip->saved_regs[i]); 2378 2379 snd_ac97_resume(chip->ac97); 2380 2381 pci_write_config_word(chip->pci, PCIR_DSXG_LEGACY, 2382 chip->saved_dsxg_legacy); 2383 pci_write_config_word(chip->pci, PCIR_DSXG_ELEGACY, 2384 chip->saved_dsxg_elegacy); 2385 2386 /* start hw again */ 2387 if (chip->start_count > 0) { 2388 spin_lock_irq(&chip->reg_lock); 2389 snd_ymfpci_writel(chip, YDSXGR_MODE, chip->saved_ydsxgr_mode); 2390 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT); 2391 spin_unlock_irq(&chip->reg_lock); 2392 } 2393 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 2394 return 0; 2395 } 2396 2397 SIMPLE_DEV_PM_OPS(snd_ymfpci_pm, snd_ymfpci_suspend, snd_ymfpci_resume); 2398 #endif /* CONFIG_PM_SLEEP */ 2399 2400 int snd_ymfpci_create(struct snd_card *card, 2401 struct pci_dev *pci, 2402 unsigned short old_legacy_ctrl, 2403 struct snd_ymfpci **rchip) 2404 { 2405 struct snd_ymfpci *chip; 2406 int err; 2407 static struct snd_device_ops ops = { 2408 .dev_free = snd_ymfpci_dev_free, 2409 }; 2410 2411 *rchip = NULL; 2412 2413 /* enable PCI device */ 2414 if ((err = pci_enable_device(pci)) < 0) 2415 return err; 2416 2417 chip = kzalloc(sizeof(*chip), GFP_KERNEL); 2418 if (chip == NULL) { 2419 pci_disable_device(pci); 2420 return -ENOMEM; 2421 } 2422 chip->old_legacy_ctrl = old_legacy_ctrl; 2423 spin_lock_init(&chip->reg_lock); 2424 spin_lock_init(&chip->voice_lock); 2425 init_waitqueue_head(&chip->interrupt_sleep); 2426 atomic_set(&chip->interrupt_sleep_count, 0); 2427 chip->card = card; 2428 chip->pci = pci; 2429 chip->irq = -1; 2430 chip->device_id = pci->device; 2431 chip->rev = pci->revision; 2432 chip->reg_area_phys = pci_resource_start(pci, 0); 2433 chip->reg_area_virt = ioremap_nocache(chip->reg_area_phys, 0x8000); 2434 pci_set_master(pci); 2435 chip->src441_used = -1; 2436 2437 if ((chip->res_reg_area = request_mem_region(chip->reg_area_phys, 0x8000, "YMFPCI")) == NULL) { 2438 dev_err(chip->card->dev, 2439 "unable to grab memory region 0x%lx-0x%lx\n", 2440 chip->reg_area_phys, chip->reg_area_phys + 0x8000 - 1); 2441 snd_ymfpci_free(chip); 2442 return -EBUSY; 2443 } 2444 if (request_irq(pci->irq, snd_ymfpci_interrupt, IRQF_SHARED, 2445 KBUILD_MODNAME, chip)) { 2446 dev_err(chip->card->dev, "unable to grab IRQ %d\n", pci->irq); 2447 snd_ymfpci_free(chip); 2448 return -EBUSY; 2449 } 2450 chip->irq = pci->irq; 2451 2452 snd_ymfpci_aclink_reset(pci); 2453 if (snd_ymfpci_codec_ready(chip, 0) < 0) { 2454 snd_ymfpci_free(chip); 2455 return -EIO; 2456 } 2457 2458 err = snd_ymfpci_request_firmware(chip); 2459 if (err < 0) { 2460 dev_err(chip->card->dev, "firmware request failed: %d\n", err); 2461 snd_ymfpci_free(chip); 2462 return err; 2463 } 2464 snd_ymfpci_download_image(chip); 2465 2466 udelay(100); /* seems we need a delay after downloading image.. */ 2467 2468 if (snd_ymfpci_memalloc(chip) < 0) { 2469 snd_ymfpci_free(chip); 2470 return -EIO; 2471 } 2472 2473 if ((err = snd_ymfpci_ac3_init(chip)) < 0) { 2474 snd_ymfpci_free(chip); 2475 return err; 2476 } 2477 2478 #ifdef CONFIG_PM_SLEEP 2479 chip->saved_regs = kmalloc(YDSXGR_NUM_SAVED_REGS * sizeof(u32), 2480 GFP_KERNEL); 2481 if (chip->saved_regs == NULL) { 2482 snd_ymfpci_free(chip); 2483 return -ENOMEM; 2484 } 2485 #endif 2486 2487 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { 2488 snd_ymfpci_free(chip); 2489 return err; 2490 } 2491 2492 snd_ymfpci_proc_init(card, chip); 2493 2494 *rchip = chip; 2495 return 0; 2496 } 2497