xref: /openbmc/linux/sound/pci/ymfpci/ymfpci_main.c (revision 565d76cb)
1 /*
2  *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
3  *  Routines for control of YMF724/740/744/754 chips
4  *
5  *   This program is free software; you can redistribute it and/or modify
6  *   it under the terms of the GNU General Public License as published by
7  *   the Free Software Foundation; either version 2 of the License, or
8  *   (at your option) any later version.
9  *
10  *   This program is distributed in the hope that it will be useful,
11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  *   GNU General Public License for more details.
14  *
15  *   You should have received a copy of the GNU General Public License
16  *   along with this program; if not, write to the Free Software
17  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
18  *
19  */
20 
21 #include <linux/delay.h>
22 #include <linux/firmware.h>
23 #include <linux/init.h>
24 #include <linux/interrupt.h>
25 #include <linux/pci.h>
26 #include <linux/sched.h>
27 #include <linux/slab.h>
28 #include <linux/vmalloc.h>
29 #include <linux/mutex.h>
30 
31 #include <sound/core.h>
32 #include <sound/control.h>
33 #include <sound/info.h>
34 #include <sound/tlv.h>
35 #include <sound/ymfpci.h>
36 #include <sound/asoundef.h>
37 #include <sound/mpu401.h>
38 
39 #include <asm/io.h>
40 #include <asm/byteorder.h>
41 
42 /*
43  *  common I/O routines
44  */
45 
46 static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip);
47 
48 static inline u8 snd_ymfpci_readb(struct snd_ymfpci *chip, u32 offset)
49 {
50 	return readb(chip->reg_area_virt + offset);
51 }
52 
53 static inline void snd_ymfpci_writeb(struct snd_ymfpci *chip, u32 offset, u8 val)
54 {
55 	writeb(val, chip->reg_area_virt + offset);
56 }
57 
58 static inline u16 snd_ymfpci_readw(struct snd_ymfpci *chip, u32 offset)
59 {
60 	return readw(chip->reg_area_virt + offset);
61 }
62 
63 static inline void snd_ymfpci_writew(struct snd_ymfpci *chip, u32 offset, u16 val)
64 {
65 	writew(val, chip->reg_area_virt + offset);
66 }
67 
68 static inline u32 snd_ymfpci_readl(struct snd_ymfpci *chip, u32 offset)
69 {
70 	return readl(chip->reg_area_virt + offset);
71 }
72 
73 static inline void snd_ymfpci_writel(struct snd_ymfpci *chip, u32 offset, u32 val)
74 {
75 	writel(val, chip->reg_area_virt + offset);
76 }
77 
78 static int snd_ymfpci_codec_ready(struct snd_ymfpci *chip, int secondary)
79 {
80 	unsigned long end_time;
81 	u32 reg = secondary ? YDSXGR_SECSTATUSADR : YDSXGR_PRISTATUSADR;
82 
83 	end_time = jiffies + msecs_to_jiffies(750);
84 	do {
85 		if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0)
86 			return 0;
87 		schedule_timeout_uninterruptible(1);
88 	} while (time_before(jiffies, end_time));
89 	snd_printk(KERN_ERR "codec_ready: codec %i is not ready [0x%x]\n", secondary, snd_ymfpci_readw(chip, reg));
90 	return -EBUSY;
91 }
92 
93 static void snd_ymfpci_codec_write(struct snd_ac97 *ac97, u16 reg, u16 val)
94 {
95 	struct snd_ymfpci *chip = ac97->private_data;
96 	u32 cmd;
97 
98 	snd_ymfpci_codec_ready(chip, 0);
99 	cmd = ((YDSXG_AC97WRITECMD | reg) << 16) | val;
100 	snd_ymfpci_writel(chip, YDSXGR_AC97CMDDATA, cmd);
101 }
102 
103 static u16 snd_ymfpci_codec_read(struct snd_ac97 *ac97, u16 reg)
104 {
105 	struct snd_ymfpci *chip = ac97->private_data;
106 
107 	if (snd_ymfpci_codec_ready(chip, 0))
108 		return ~0;
109 	snd_ymfpci_writew(chip, YDSXGR_AC97CMDADR, YDSXG_AC97READCMD | reg);
110 	if (snd_ymfpci_codec_ready(chip, 0))
111 		return ~0;
112 	if (chip->device_id == PCI_DEVICE_ID_YAMAHA_744 && chip->rev < 2) {
113 		int i;
114 		for (i = 0; i < 600; i++)
115 			snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
116 	}
117 	return snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
118 }
119 
120 /*
121  *  Misc routines
122  */
123 
124 static u32 snd_ymfpci_calc_delta(u32 rate)
125 {
126 	switch (rate) {
127 	case 8000:	return 0x02aaab00;
128 	case 11025:	return 0x03accd00;
129 	case 16000:	return 0x05555500;
130 	case 22050:	return 0x07599a00;
131 	case 32000:	return 0x0aaaab00;
132 	case 44100:	return 0x0eb33300;
133 	default:	return ((rate << 16) / 375) << 5;
134 	}
135 }
136 
137 static u32 def_rate[8] = {
138 	100, 2000, 8000, 11025, 16000, 22050, 32000, 48000
139 };
140 
141 static u32 snd_ymfpci_calc_lpfK(u32 rate)
142 {
143 	u32 i;
144 	static u32 val[8] = {
145 		0x00570000, 0x06AA0000, 0x18B20000, 0x20930000,
146 		0x2B9A0000, 0x35A10000, 0x3EAA0000, 0x40000000
147 	};
148 
149 	if (rate == 44100)
150 		return 0x40000000;	/* FIXME: What's the right value? */
151 	for (i = 0; i < 8; i++)
152 		if (rate <= def_rate[i])
153 			return val[i];
154 	return val[0];
155 }
156 
157 static u32 snd_ymfpci_calc_lpfQ(u32 rate)
158 {
159 	u32 i;
160 	static u32 val[8] = {
161 		0x35280000, 0x34A70000, 0x32020000, 0x31770000,
162 		0x31390000, 0x31C90000, 0x33D00000, 0x40000000
163 	};
164 
165 	if (rate == 44100)
166 		return 0x370A0000;
167 	for (i = 0; i < 8; i++)
168 		if (rate <= def_rate[i])
169 			return val[i];
170 	return val[0];
171 }
172 
173 /*
174  *  Hardware start management
175  */
176 
177 static void snd_ymfpci_hw_start(struct snd_ymfpci *chip)
178 {
179 	unsigned long flags;
180 
181 	spin_lock_irqsave(&chip->reg_lock, flags);
182 	if (chip->start_count++ > 0)
183 		goto __end;
184 	snd_ymfpci_writel(chip, YDSXGR_MODE,
185 			  snd_ymfpci_readl(chip, YDSXGR_MODE) | 3);
186 	chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
187       __end:
188       	spin_unlock_irqrestore(&chip->reg_lock, flags);
189 }
190 
191 static void snd_ymfpci_hw_stop(struct snd_ymfpci *chip)
192 {
193 	unsigned long flags;
194 	long timeout = 1000;
195 
196 	spin_lock_irqsave(&chip->reg_lock, flags);
197 	if (--chip->start_count > 0)
198 		goto __end;
199 	snd_ymfpci_writel(chip, YDSXGR_MODE,
200 			  snd_ymfpci_readl(chip, YDSXGR_MODE) & ~3);
201 	while (timeout-- > 0) {
202 		if ((snd_ymfpci_readl(chip, YDSXGR_STATUS) & 2) == 0)
203 			break;
204 	}
205 	if (atomic_read(&chip->interrupt_sleep_count)) {
206 		atomic_set(&chip->interrupt_sleep_count, 0);
207 		wake_up(&chip->interrupt_sleep);
208 	}
209       __end:
210       	spin_unlock_irqrestore(&chip->reg_lock, flags);
211 }
212 
213 /*
214  *  Playback voice management
215  */
216 
217 static int voice_alloc(struct snd_ymfpci *chip,
218 		       enum snd_ymfpci_voice_type type, int pair,
219 		       struct snd_ymfpci_voice **rvoice)
220 {
221 	struct snd_ymfpci_voice *voice, *voice2;
222 	int idx;
223 
224 	*rvoice = NULL;
225 	for (idx = 0; idx < YDSXG_PLAYBACK_VOICES; idx += pair ? 2 : 1) {
226 		voice = &chip->voices[idx];
227 		voice2 = pair ? &chip->voices[idx+1] : NULL;
228 		if (voice->use || (voice2 && voice2->use))
229 			continue;
230 		voice->use = 1;
231 		if (voice2)
232 			voice2->use = 1;
233 		switch (type) {
234 		case YMFPCI_PCM:
235 			voice->pcm = 1;
236 			if (voice2)
237 				voice2->pcm = 1;
238 			break;
239 		case YMFPCI_SYNTH:
240 			voice->synth = 1;
241 			break;
242 		case YMFPCI_MIDI:
243 			voice->midi = 1;
244 			break;
245 		}
246 		snd_ymfpci_hw_start(chip);
247 		if (voice2)
248 			snd_ymfpci_hw_start(chip);
249 		*rvoice = voice;
250 		return 0;
251 	}
252 	return -ENOMEM;
253 }
254 
255 static int snd_ymfpci_voice_alloc(struct snd_ymfpci *chip,
256 				  enum snd_ymfpci_voice_type type, int pair,
257 				  struct snd_ymfpci_voice **rvoice)
258 {
259 	unsigned long flags;
260 	int result;
261 
262 	if (snd_BUG_ON(!rvoice))
263 		return -EINVAL;
264 	if (snd_BUG_ON(pair && type != YMFPCI_PCM))
265 		return -EINVAL;
266 
267 	spin_lock_irqsave(&chip->voice_lock, flags);
268 	for (;;) {
269 		result = voice_alloc(chip, type, pair, rvoice);
270 		if (result == 0 || type != YMFPCI_PCM)
271 			break;
272 		/* TODO: synth/midi voice deallocation */
273 		break;
274 	}
275 	spin_unlock_irqrestore(&chip->voice_lock, flags);
276 	return result;
277 }
278 
279 static int snd_ymfpci_voice_free(struct snd_ymfpci *chip, struct snd_ymfpci_voice *pvoice)
280 {
281 	unsigned long flags;
282 
283 	if (snd_BUG_ON(!pvoice))
284 		return -EINVAL;
285 	snd_ymfpci_hw_stop(chip);
286 	spin_lock_irqsave(&chip->voice_lock, flags);
287 	if (pvoice->number == chip->src441_used) {
288 		chip->src441_used = -1;
289 		pvoice->ypcm->use_441_slot = 0;
290 	}
291 	pvoice->use = pvoice->pcm = pvoice->synth = pvoice->midi = 0;
292 	pvoice->ypcm = NULL;
293 	pvoice->interrupt = NULL;
294 	spin_unlock_irqrestore(&chip->voice_lock, flags);
295 	return 0;
296 }
297 
298 /*
299  *  PCM part
300  */
301 
302 static void snd_ymfpci_pcm_interrupt(struct snd_ymfpci *chip, struct snd_ymfpci_voice *voice)
303 {
304 	struct snd_ymfpci_pcm *ypcm;
305 	u32 pos, delta;
306 
307 	if ((ypcm = voice->ypcm) == NULL)
308 		return;
309 	if (ypcm->substream == NULL)
310 		return;
311 	spin_lock(&chip->reg_lock);
312 	if (ypcm->running) {
313 		pos = le32_to_cpu(voice->bank[chip->active_bank].start);
314 		if (pos < ypcm->last_pos)
315 			delta = pos + (ypcm->buffer_size - ypcm->last_pos);
316 		else
317 			delta = pos - ypcm->last_pos;
318 		ypcm->period_pos += delta;
319 		ypcm->last_pos = pos;
320 		if (ypcm->period_pos >= ypcm->period_size) {
321 			/*
322 			printk(KERN_DEBUG
323 			       "done - active_bank = 0x%x, start = 0x%x\n",
324 			       chip->active_bank,
325 			       voice->bank[chip->active_bank].start);
326 			*/
327 			ypcm->period_pos %= ypcm->period_size;
328 			spin_unlock(&chip->reg_lock);
329 			snd_pcm_period_elapsed(ypcm->substream);
330 			spin_lock(&chip->reg_lock);
331 		}
332 
333 		if (unlikely(ypcm->update_pcm_vol)) {
334 			unsigned int subs = ypcm->substream->number;
335 			unsigned int next_bank = 1 - chip->active_bank;
336 			struct snd_ymfpci_playback_bank *bank;
337 			u32 volume;
338 
339 			bank = &voice->bank[next_bank];
340 			volume = cpu_to_le32(chip->pcm_mixer[subs].left << 15);
341 			bank->left_gain_end = volume;
342 			if (ypcm->output_rear)
343 				bank->eff2_gain_end = volume;
344 			if (ypcm->voices[1])
345 				bank = &ypcm->voices[1]->bank[next_bank];
346 			volume = cpu_to_le32(chip->pcm_mixer[subs].right << 15);
347 			bank->right_gain_end = volume;
348 			if (ypcm->output_rear)
349 				bank->eff3_gain_end = volume;
350 			ypcm->update_pcm_vol--;
351 		}
352 	}
353 	spin_unlock(&chip->reg_lock);
354 }
355 
356 static void snd_ymfpci_pcm_capture_interrupt(struct snd_pcm_substream *substream)
357 {
358 	struct snd_pcm_runtime *runtime = substream->runtime;
359 	struct snd_ymfpci_pcm *ypcm = runtime->private_data;
360 	struct snd_ymfpci *chip = ypcm->chip;
361 	u32 pos, delta;
362 
363 	spin_lock(&chip->reg_lock);
364 	if (ypcm->running) {
365 		pos = le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
366 		if (pos < ypcm->last_pos)
367 			delta = pos + (ypcm->buffer_size - ypcm->last_pos);
368 		else
369 			delta = pos - ypcm->last_pos;
370 		ypcm->period_pos += delta;
371 		ypcm->last_pos = pos;
372 		if (ypcm->period_pos >= ypcm->period_size) {
373 			ypcm->period_pos %= ypcm->period_size;
374 			/*
375 			printk(KERN_DEBUG
376 			       "done - active_bank = 0x%x, start = 0x%x\n",
377 			       chip->active_bank,
378 			       voice->bank[chip->active_bank].start);
379 			*/
380 			spin_unlock(&chip->reg_lock);
381 			snd_pcm_period_elapsed(substream);
382 			spin_lock(&chip->reg_lock);
383 		}
384 	}
385 	spin_unlock(&chip->reg_lock);
386 }
387 
388 static int snd_ymfpci_playback_trigger(struct snd_pcm_substream *substream,
389 				       int cmd)
390 {
391 	struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
392 	struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
393 	struct snd_kcontrol *kctl = NULL;
394 	int result = 0;
395 
396 	spin_lock(&chip->reg_lock);
397 	if (ypcm->voices[0] == NULL) {
398 		result = -EINVAL;
399 		goto __unlock;
400 	}
401 	switch (cmd) {
402 	case SNDRV_PCM_TRIGGER_START:
403 	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
404 	case SNDRV_PCM_TRIGGER_RESUME:
405 		chip->ctrl_playback[ypcm->voices[0]->number + 1] = cpu_to_le32(ypcm->voices[0]->bank_addr);
406 		if (ypcm->voices[1] != NULL && !ypcm->use_441_slot)
407 			chip->ctrl_playback[ypcm->voices[1]->number + 1] = cpu_to_le32(ypcm->voices[1]->bank_addr);
408 		ypcm->running = 1;
409 		break;
410 	case SNDRV_PCM_TRIGGER_STOP:
411 		if (substream->pcm == chip->pcm && !ypcm->use_441_slot) {
412 			kctl = chip->pcm_mixer[substream->number].ctl;
413 			kctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
414 		}
415 		/* fall through */
416 	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
417 	case SNDRV_PCM_TRIGGER_SUSPEND:
418 		chip->ctrl_playback[ypcm->voices[0]->number + 1] = 0;
419 		if (ypcm->voices[1] != NULL && !ypcm->use_441_slot)
420 			chip->ctrl_playback[ypcm->voices[1]->number + 1] = 0;
421 		ypcm->running = 0;
422 		break;
423 	default:
424 		result = -EINVAL;
425 		break;
426 	}
427       __unlock:
428 	spin_unlock(&chip->reg_lock);
429 	if (kctl)
430 		snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
431 	return result;
432 }
433 static int snd_ymfpci_capture_trigger(struct snd_pcm_substream *substream,
434 				      int cmd)
435 {
436 	struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
437 	struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
438 	int result = 0;
439 	u32 tmp;
440 
441 	spin_lock(&chip->reg_lock);
442 	switch (cmd) {
443 	case SNDRV_PCM_TRIGGER_START:
444 	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
445 	case SNDRV_PCM_TRIGGER_RESUME:
446 		tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) | (1 << ypcm->capture_bank_number);
447 		snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
448 		ypcm->running = 1;
449 		break;
450 	case SNDRV_PCM_TRIGGER_STOP:
451 	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
452 	case SNDRV_PCM_TRIGGER_SUSPEND:
453 		tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) & ~(1 << ypcm->capture_bank_number);
454 		snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
455 		ypcm->running = 0;
456 		break;
457 	default:
458 		result = -EINVAL;
459 		break;
460 	}
461 	spin_unlock(&chip->reg_lock);
462 	return result;
463 }
464 
465 static int snd_ymfpci_pcm_voice_alloc(struct snd_ymfpci_pcm *ypcm, int voices)
466 {
467 	int err;
468 
469 	if (ypcm->voices[1] != NULL && voices < 2) {
470 		snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[1]);
471 		ypcm->voices[1] = NULL;
472 	}
473 	if (voices == 1 && ypcm->voices[0] != NULL)
474 		return 0;		/* already allocated */
475 	if (voices == 2 && ypcm->voices[0] != NULL && ypcm->voices[1] != NULL)
476 		return 0;		/* already allocated */
477 	if (voices > 1) {
478 		if (ypcm->voices[0] != NULL && ypcm->voices[1] == NULL) {
479 			snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[0]);
480 			ypcm->voices[0] = NULL;
481 		}
482 	}
483 	err = snd_ymfpci_voice_alloc(ypcm->chip, YMFPCI_PCM, voices > 1, &ypcm->voices[0]);
484 	if (err < 0)
485 		return err;
486 	ypcm->voices[0]->ypcm = ypcm;
487 	ypcm->voices[0]->interrupt = snd_ymfpci_pcm_interrupt;
488 	if (voices > 1) {
489 		ypcm->voices[1] = &ypcm->chip->voices[ypcm->voices[0]->number + 1];
490 		ypcm->voices[1]->ypcm = ypcm;
491 	}
492 	return 0;
493 }
494 
495 static void snd_ymfpci_pcm_init_voice(struct snd_ymfpci_pcm *ypcm, unsigned int voiceidx,
496 				      struct snd_pcm_runtime *runtime,
497 				      int has_pcm_volume)
498 {
499 	struct snd_ymfpci_voice *voice = ypcm->voices[voiceidx];
500 	u32 format;
501 	u32 delta = snd_ymfpci_calc_delta(runtime->rate);
502 	u32 lpfQ = snd_ymfpci_calc_lpfQ(runtime->rate);
503 	u32 lpfK = snd_ymfpci_calc_lpfK(runtime->rate);
504 	struct snd_ymfpci_playback_bank *bank;
505 	unsigned int nbank;
506 	u32 vol_left, vol_right;
507 	u8 use_left, use_right;
508 	unsigned long flags;
509 
510 	if (snd_BUG_ON(!voice))
511 		return;
512 	if (runtime->channels == 1) {
513 		use_left = 1;
514 		use_right = 1;
515 	} else {
516 		use_left = (voiceidx & 1) == 0;
517 		use_right = !use_left;
518 	}
519 	if (has_pcm_volume) {
520 		vol_left = cpu_to_le32(ypcm->chip->pcm_mixer
521 				       [ypcm->substream->number].left << 15);
522 		vol_right = cpu_to_le32(ypcm->chip->pcm_mixer
523 					[ypcm->substream->number].right << 15);
524 	} else {
525 		vol_left = cpu_to_le32(0x40000000);
526 		vol_right = cpu_to_le32(0x40000000);
527 	}
528 	spin_lock_irqsave(&ypcm->chip->voice_lock, flags);
529 	format = runtime->channels == 2 ? 0x00010000 : 0;
530 	if (snd_pcm_format_width(runtime->format) == 8)
531 		format |= 0x80000000;
532 	else if (ypcm->chip->device_id == PCI_DEVICE_ID_YAMAHA_754 &&
533 		 runtime->rate == 44100 && runtime->channels == 2 &&
534 		 voiceidx == 0 && (ypcm->chip->src441_used == -1 ||
535 				   ypcm->chip->src441_used == voice->number)) {
536 		ypcm->chip->src441_used = voice->number;
537 		ypcm->use_441_slot = 1;
538 		format |= 0x10000000;
539 	}
540 	if (ypcm->chip->src441_used == voice->number &&
541 	    (format & 0x10000000) == 0) {
542 		ypcm->chip->src441_used = -1;
543 		ypcm->use_441_slot = 0;
544 	}
545 	if (runtime->channels == 2 && (voiceidx & 1) != 0)
546 		format |= 1;
547 	spin_unlock_irqrestore(&ypcm->chip->voice_lock, flags);
548 	for (nbank = 0; nbank < 2; nbank++) {
549 		bank = &voice->bank[nbank];
550 		memset(bank, 0, sizeof(*bank));
551 		bank->format = cpu_to_le32(format);
552 		bank->base = cpu_to_le32(runtime->dma_addr);
553 		bank->loop_end = cpu_to_le32(ypcm->buffer_size);
554 		bank->lpfQ = cpu_to_le32(lpfQ);
555 		bank->delta =
556 		bank->delta_end = cpu_to_le32(delta);
557 		bank->lpfK =
558 		bank->lpfK_end = cpu_to_le32(lpfK);
559 		bank->eg_gain =
560 		bank->eg_gain_end = cpu_to_le32(0x40000000);
561 
562 		if (ypcm->output_front) {
563 			if (use_left) {
564 				bank->left_gain =
565 				bank->left_gain_end = vol_left;
566 			}
567 			if (use_right) {
568 				bank->right_gain =
569 				bank->right_gain_end = vol_right;
570 			}
571 		}
572 		if (ypcm->output_rear) {
573 		        if (!ypcm->swap_rear) {
574         			if (use_left) {
575         				bank->eff2_gain =
576         				bank->eff2_gain_end = vol_left;
577         			}
578         			if (use_right) {
579         				bank->eff3_gain =
580         				bank->eff3_gain_end = vol_right;
581         			}
582 		        } else {
583         			/* The SPDIF out channels seem to be swapped, so we have
584         			 * to swap them here, too.  The rear analog out channels
585         			 * will be wrong, but otherwise AC3 would not work.
586         			 */
587         			if (use_left) {
588         				bank->eff3_gain =
589         				bank->eff3_gain_end = vol_left;
590         			}
591         			if (use_right) {
592         				bank->eff2_gain =
593         				bank->eff2_gain_end = vol_right;
594         			}
595         		}
596                 }
597 	}
598 }
599 
600 static int __devinit snd_ymfpci_ac3_init(struct snd_ymfpci *chip)
601 {
602 	if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
603 				4096, &chip->ac3_tmp_base) < 0)
604 		return -ENOMEM;
605 
606 	chip->bank_effect[3][0]->base =
607 	chip->bank_effect[3][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr);
608 	chip->bank_effect[3][0]->loop_end =
609 	chip->bank_effect[3][1]->loop_end = cpu_to_le32(1024);
610 	chip->bank_effect[4][0]->base =
611 	chip->bank_effect[4][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr + 2048);
612 	chip->bank_effect[4][0]->loop_end =
613 	chip->bank_effect[4][1]->loop_end = cpu_to_le32(1024);
614 
615 	spin_lock_irq(&chip->reg_lock);
616 	snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
617 			  snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) | 3 << 3);
618 	spin_unlock_irq(&chip->reg_lock);
619 	return 0;
620 }
621 
622 static int snd_ymfpci_ac3_done(struct snd_ymfpci *chip)
623 {
624 	spin_lock_irq(&chip->reg_lock);
625 	snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
626 			  snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) & ~(3 << 3));
627 	spin_unlock_irq(&chip->reg_lock);
628 	// snd_ymfpci_irq_wait(chip);
629 	if (chip->ac3_tmp_base.area) {
630 		snd_dma_free_pages(&chip->ac3_tmp_base);
631 		chip->ac3_tmp_base.area = NULL;
632 	}
633 	return 0;
634 }
635 
636 static int snd_ymfpci_playback_hw_params(struct snd_pcm_substream *substream,
637 					 struct snd_pcm_hw_params *hw_params)
638 {
639 	struct snd_pcm_runtime *runtime = substream->runtime;
640 	struct snd_ymfpci_pcm *ypcm = runtime->private_data;
641 	int err;
642 
643 	if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
644 		return err;
645 	if ((err = snd_ymfpci_pcm_voice_alloc(ypcm, params_channels(hw_params))) < 0)
646 		return err;
647 	return 0;
648 }
649 
650 static int snd_ymfpci_playback_hw_free(struct snd_pcm_substream *substream)
651 {
652 	struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
653 	struct snd_pcm_runtime *runtime = substream->runtime;
654 	struct snd_ymfpci_pcm *ypcm;
655 
656 	if (runtime->private_data == NULL)
657 		return 0;
658 	ypcm = runtime->private_data;
659 
660 	/* wait, until the PCI operations are not finished */
661 	snd_ymfpci_irq_wait(chip);
662 	snd_pcm_lib_free_pages(substream);
663 	if (ypcm->voices[1]) {
664 		snd_ymfpci_voice_free(chip, ypcm->voices[1]);
665 		ypcm->voices[1] = NULL;
666 	}
667 	if (ypcm->voices[0]) {
668 		snd_ymfpci_voice_free(chip, ypcm->voices[0]);
669 		ypcm->voices[0] = NULL;
670 	}
671 	return 0;
672 }
673 
674 static int snd_ymfpci_playback_prepare(struct snd_pcm_substream *substream)
675 {
676 	struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
677 	struct snd_pcm_runtime *runtime = substream->runtime;
678 	struct snd_ymfpci_pcm *ypcm = runtime->private_data;
679 	struct snd_kcontrol *kctl;
680 	unsigned int nvoice;
681 
682 	ypcm->period_size = runtime->period_size;
683 	ypcm->buffer_size = runtime->buffer_size;
684 	ypcm->period_pos = 0;
685 	ypcm->last_pos = 0;
686 	for (nvoice = 0; nvoice < runtime->channels; nvoice++)
687 		snd_ymfpci_pcm_init_voice(ypcm, nvoice, runtime,
688 					  substream->pcm == chip->pcm);
689 
690 	if (substream->pcm == chip->pcm && !ypcm->use_441_slot) {
691 		kctl = chip->pcm_mixer[substream->number].ctl;
692 		kctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
693 		snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
694 	}
695 	return 0;
696 }
697 
698 static int snd_ymfpci_capture_hw_params(struct snd_pcm_substream *substream,
699 					struct snd_pcm_hw_params *hw_params)
700 {
701 	return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
702 }
703 
704 static int snd_ymfpci_capture_hw_free(struct snd_pcm_substream *substream)
705 {
706 	struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
707 
708 	/* wait, until the PCI operations are not finished */
709 	snd_ymfpci_irq_wait(chip);
710 	return snd_pcm_lib_free_pages(substream);
711 }
712 
713 static int snd_ymfpci_capture_prepare(struct snd_pcm_substream *substream)
714 {
715 	struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
716 	struct snd_pcm_runtime *runtime = substream->runtime;
717 	struct snd_ymfpci_pcm *ypcm = runtime->private_data;
718 	struct snd_ymfpci_capture_bank * bank;
719 	int nbank;
720 	u32 rate, format;
721 
722 	ypcm->period_size = runtime->period_size;
723 	ypcm->buffer_size = runtime->buffer_size;
724 	ypcm->period_pos = 0;
725 	ypcm->last_pos = 0;
726 	ypcm->shift = 0;
727 	rate = ((48000 * 4096) / runtime->rate) - 1;
728 	format = 0;
729 	if (runtime->channels == 2) {
730 		format |= 2;
731 		ypcm->shift++;
732 	}
733 	if (snd_pcm_format_width(runtime->format) == 8)
734 		format |= 1;
735 	else
736 		ypcm->shift++;
737 	switch (ypcm->capture_bank_number) {
738 	case 0:
739 		snd_ymfpci_writel(chip, YDSXGR_RECFORMAT, format);
740 		snd_ymfpci_writel(chip, YDSXGR_RECSLOTSR, rate);
741 		break;
742 	case 1:
743 		snd_ymfpci_writel(chip, YDSXGR_ADCFORMAT, format);
744 		snd_ymfpci_writel(chip, YDSXGR_ADCSLOTSR, rate);
745 		break;
746 	}
747 	for (nbank = 0; nbank < 2; nbank++) {
748 		bank = chip->bank_capture[ypcm->capture_bank_number][nbank];
749 		bank->base = cpu_to_le32(runtime->dma_addr);
750 		bank->loop_end = cpu_to_le32(ypcm->buffer_size << ypcm->shift);
751 		bank->start = 0;
752 		bank->num_of_loops = 0;
753 	}
754 	return 0;
755 }
756 
757 static snd_pcm_uframes_t snd_ymfpci_playback_pointer(struct snd_pcm_substream *substream)
758 {
759 	struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
760 	struct snd_pcm_runtime *runtime = substream->runtime;
761 	struct snd_ymfpci_pcm *ypcm = runtime->private_data;
762 	struct snd_ymfpci_voice *voice = ypcm->voices[0];
763 
764 	if (!(ypcm->running && voice))
765 		return 0;
766 	return le32_to_cpu(voice->bank[chip->active_bank].start);
767 }
768 
769 static snd_pcm_uframes_t snd_ymfpci_capture_pointer(struct snd_pcm_substream *substream)
770 {
771 	struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
772 	struct snd_pcm_runtime *runtime = substream->runtime;
773 	struct snd_ymfpci_pcm *ypcm = runtime->private_data;
774 
775 	if (!ypcm->running)
776 		return 0;
777 	return le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
778 }
779 
780 static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip)
781 {
782 	wait_queue_t wait;
783 	int loops = 4;
784 
785 	while (loops-- > 0) {
786 		if ((snd_ymfpci_readl(chip, YDSXGR_MODE) & 3) == 0)
787 		 	continue;
788 		init_waitqueue_entry(&wait, current);
789 		add_wait_queue(&chip->interrupt_sleep, &wait);
790 		atomic_inc(&chip->interrupt_sleep_count);
791 		schedule_timeout_uninterruptible(msecs_to_jiffies(50));
792 		remove_wait_queue(&chip->interrupt_sleep, &wait);
793 	}
794 }
795 
796 static irqreturn_t snd_ymfpci_interrupt(int irq, void *dev_id)
797 {
798 	struct snd_ymfpci *chip = dev_id;
799 	u32 status, nvoice, mode;
800 	struct snd_ymfpci_voice *voice;
801 
802 	status = snd_ymfpci_readl(chip, YDSXGR_STATUS);
803 	if (status & 0x80000000) {
804 		chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
805 		spin_lock(&chip->voice_lock);
806 		for (nvoice = 0; nvoice < YDSXG_PLAYBACK_VOICES; nvoice++) {
807 			voice = &chip->voices[nvoice];
808 			if (voice->interrupt)
809 				voice->interrupt(chip, voice);
810 		}
811 		for (nvoice = 0; nvoice < YDSXG_CAPTURE_VOICES; nvoice++) {
812 			if (chip->capture_substream[nvoice])
813 				snd_ymfpci_pcm_capture_interrupt(chip->capture_substream[nvoice]);
814 		}
815 #if 0
816 		for (nvoice = 0; nvoice < YDSXG_EFFECT_VOICES; nvoice++) {
817 			if (chip->effect_substream[nvoice])
818 				snd_ymfpci_pcm_effect_interrupt(chip->effect_substream[nvoice]);
819 		}
820 #endif
821 		spin_unlock(&chip->voice_lock);
822 		spin_lock(&chip->reg_lock);
823 		snd_ymfpci_writel(chip, YDSXGR_STATUS, 0x80000000);
824 		mode = snd_ymfpci_readl(chip, YDSXGR_MODE) | 2;
825 		snd_ymfpci_writel(chip, YDSXGR_MODE, mode);
826 		spin_unlock(&chip->reg_lock);
827 
828 		if (atomic_read(&chip->interrupt_sleep_count)) {
829 			atomic_set(&chip->interrupt_sleep_count, 0);
830 			wake_up(&chip->interrupt_sleep);
831 		}
832 	}
833 
834 	status = snd_ymfpci_readw(chip, YDSXGR_INTFLAG);
835 	if (status & 1) {
836 		if (chip->timer)
837 			snd_timer_interrupt(chip->timer, chip->timer_ticks);
838 	}
839 	snd_ymfpci_writew(chip, YDSXGR_INTFLAG, status);
840 
841 	if (chip->rawmidi)
842 		snd_mpu401_uart_interrupt(irq, chip->rawmidi->private_data);
843 	return IRQ_HANDLED;
844 }
845 
846 static struct snd_pcm_hardware snd_ymfpci_playback =
847 {
848 	.info =			(SNDRV_PCM_INFO_MMAP |
849 				 SNDRV_PCM_INFO_MMAP_VALID |
850 				 SNDRV_PCM_INFO_INTERLEAVED |
851 				 SNDRV_PCM_INFO_BLOCK_TRANSFER |
852 				 SNDRV_PCM_INFO_PAUSE |
853 				 SNDRV_PCM_INFO_RESUME),
854 	.formats =		SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
855 	.rates =		SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
856 	.rate_min =		8000,
857 	.rate_max =		48000,
858 	.channels_min =		1,
859 	.channels_max =		2,
860 	.buffer_bytes_max =	256 * 1024, /* FIXME: enough? */
861 	.period_bytes_min =	64,
862 	.period_bytes_max =	256 * 1024, /* FIXME: enough? */
863 	.periods_min =		3,
864 	.periods_max =		1024,
865 	.fifo_size =		0,
866 };
867 
868 static struct snd_pcm_hardware snd_ymfpci_capture =
869 {
870 	.info =			(SNDRV_PCM_INFO_MMAP |
871 				 SNDRV_PCM_INFO_MMAP_VALID |
872 				 SNDRV_PCM_INFO_INTERLEAVED |
873 				 SNDRV_PCM_INFO_BLOCK_TRANSFER |
874 				 SNDRV_PCM_INFO_PAUSE |
875 				 SNDRV_PCM_INFO_RESUME),
876 	.formats =		SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
877 	.rates =		SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
878 	.rate_min =		8000,
879 	.rate_max =		48000,
880 	.channels_min =		1,
881 	.channels_max =		2,
882 	.buffer_bytes_max =	256 * 1024, /* FIXME: enough? */
883 	.period_bytes_min =	64,
884 	.period_bytes_max =	256 * 1024, /* FIXME: enough? */
885 	.periods_min =		3,
886 	.periods_max =		1024,
887 	.fifo_size =		0,
888 };
889 
890 static void snd_ymfpci_pcm_free_substream(struct snd_pcm_runtime *runtime)
891 {
892 	kfree(runtime->private_data);
893 }
894 
895 static int snd_ymfpci_playback_open_1(struct snd_pcm_substream *substream)
896 {
897 	struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
898 	struct snd_pcm_runtime *runtime = substream->runtime;
899 	struct snd_ymfpci_pcm *ypcm;
900 
901 	ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
902 	if (ypcm == NULL)
903 		return -ENOMEM;
904 	ypcm->chip = chip;
905 	ypcm->type = PLAYBACK_VOICE;
906 	ypcm->substream = substream;
907 	runtime->hw = snd_ymfpci_playback;
908 	runtime->private_data = ypcm;
909 	runtime->private_free = snd_ymfpci_pcm_free_substream;
910 	/* FIXME? True value is 256/48 = 5.33333 ms */
911 	snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX);
912 	return 0;
913 }
914 
915 /* call with spinlock held */
916 static void ymfpci_open_extension(struct snd_ymfpci *chip)
917 {
918 	if (! chip->rear_opened) {
919 		if (! chip->spdif_opened) /* set AC3 */
920 			snd_ymfpci_writel(chip, YDSXGR_MODE,
921 					  snd_ymfpci_readl(chip, YDSXGR_MODE) | (1 << 30));
922 		/* enable second codec (4CHEN) */
923 		snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
924 				  (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) | 0x0010);
925 	}
926 }
927 
928 /* call with spinlock held */
929 static void ymfpci_close_extension(struct snd_ymfpci *chip)
930 {
931 	if (! chip->rear_opened) {
932 		if (! chip->spdif_opened)
933 			snd_ymfpci_writel(chip, YDSXGR_MODE,
934 					  snd_ymfpci_readl(chip, YDSXGR_MODE) & ~(1 << 30));
935 		snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
936 				  (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) & ~0x0010);
937 	}
938 }
939 
940 static int snd_ymfpci_playback_open(struct snd_pcm_substream *substream)
941 {
942 	struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
943 	struct snd_pcm_runtime *runtime = substream->runtime;
944 	struct snd_ymfpci_pcm *ypcm;
945 	int err;
946 
947 	if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
948 		return err;
949 	ypcm = runtime->private_data;
950 	ypcm->output_front = 1;
951 	ypcm->output_rear = chip->mode_dup4ch ? 1 : 0;
952 	ypcm->swap_rear = 0;
953 	spin_lock_irq(&chip->reg_lock);
954 	if (ypcm->output_rear) {
955 		ymfpci_open_extension(chip);
956 		chip->rear_opened++;
957 	}
958 	spin_unlock_irq(&chip->reg_lock);
959 	return 0;
960 }
961 
962 static int snd_ymfpci_playback_spdif_open(struct snd_pcm_substream *substream)
963 {
964 	struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
965 	struct snd_pcm_runtime *runtime = substream->runtime;
966 	struct snd_ymfpci_pcm *ypcm;
967 	int err;
968 
969 	if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
970 		return err;
971 	ypcm = runtime->private_data;
972 	ypcm->output_front = 0;
973 	ypcm->output_rear = 1;
974 	ypcm->swap_rear = 1;
975 	spin_lock_irq(&chip->reg_lock);
976 	snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
977 			  snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) | 2);
978 	ymfpci_open_extension(chip);
979 	chip->spdif_pcm_bits = chip->spdif_bits;
980 	snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
981 	chip->spdif_opened++;
982 	spin_unlock_irq(&chip->reg_lock);
983 
984 	chip->spdif_pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
985 	snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
986 		       SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
987 	return 0;
988 }
989 
990 static int snd_ymfpci_playback_4ch_open(struct snd_pcm_substream *substream)
991 {
992 	struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
993 	struct snd_pcm_runtime *runtime = substream->runtime;
994 	struct snd_ymfpci_pcm *ypcm;
995 	int err;
996 
997 	if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
998 		return err;
999 	ypcm = runtime->private_data;
1000 	ypcm->output_front = 0;
1001 	ypcm->output_rear = 1;
1002 	ypcm->swap_rear = 0;
1003 	spin_lock_irq(&chip->reg_lock);
1004 	ymfpci_open_extension(chip);
1005 	chip->rear_opened++;
1006 	spin_unlock_irq(&chip->reg_lock);
1007 	return 0;
1008 }
1009 
1010 static int snd_ymfpci_capture_open(struct snd_pcm_substream *substream,
1011 				   u32 capture_bank_number)
1012 {
1013 	struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1014 	struct snd_pcm_runtime *runtime = substream->runtime;
1015 	struct snd_ymfpci_pcm *ypcm;
1016 
1017 	ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
1018 	if (ypcm == NULL)
1019 		return -ENOMEM;
1020 	ypcm->chip = chip;
1021 	ypcm->type = capture_bank_number + CAPTURE_REC;
1022 	ypcm->substream = substream;
1023 	ypcm->capture_bank_number = capture_bank_number;
1024 	chip->capture_substream[capture_bank_number] = substream;
1025 	runtime->hw = snd_ymfpci_capture;
1026 	/* FIXME? True value is 256/48 = 5.33333 ms */
1027 	snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX);
1028 	runtime->private_data = ypcm;
1029 	runtime->private_free = snd_ymfpci_pcm_free_substream;
1030 	snd_ymfpci_hw_start(chip);
1031 	return 0;
1032 }
1033 
1034 static int snd_ymfpci_capture_rec_open(struct snd_pcm_substream *substream)
1035 {
1036 	return snd_ymfpci_capture_open(substream, 0);
1037 }
1038 
1039 static int snd_ymfpci_capture_ac97_open(struct snd_pcm_substream *substream)
1040 {
1041 	return snd_ymfpci_capture_open(substream, 1);
1042 }
1043 
1044 static int snd_ymfpci_playback_close_1(struct snd_pcm_substream *substream)
1045 {
1046 	return 0;
1047 }
1048 
1049 static int snd_ymfpci_playback_close(struct snd_pcm_substream *substream)
1050 {
1051 	struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1052 	struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
1053 
1054 	spin_lock_irq(&chip->reg_lock);
1055 	if (ypcm->output_rear && chip->rear_opened > 0) {
1056 		chip->rear_opened--;
1057 		ymfpci_close_extension(chip);
1058 	}
1059 	spin_unlock_irq(&chip->reg_lock);
1060 	return snd_ymfpci_playback_close_1(substream);
1061 }
1062 
1063 static int snd_ymfpci_playback_spdif_close(struct snd_pcm_substream *substream)
1064 {
1065 	struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1066 
1067 	spin_lock_irq(&chip->reg_lock);
1068 	chip->spdif_opened = 0;
1069 	ymfpci_close_extension(chip);
1070 	snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
1071 			  snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & ~2);
1072 	snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
1073 	spin_unlock_irq(&chip->reg_lock);
1074 	chip->spdif_pcm_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1075 	snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
1076 		       SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
1077 	return snd_ymfpci_playback_close_1(substream);
1078 }
1079 
1080 static int snd_ymfpci_playback_4ch_close(struct snd_pcm_substream *substream)
1081 {
1082 	struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1083 
1084 	spin_lock_irq(&chip->reg_lock);
1085 	if (chip->rear_opened > 0) {
1086 		chip->rear_opened--;
1087 		ymfpci_close_extension(chip);
1088 	}
1089 	spin_unlock_irq(&chip->reg_lock);
1090 	return snd_ymfpci_playback_close_1(substream);
1091 }
1092 
1093 static int snd_ymfpci_capture_close(struct snd_pcm_substream *substream)
1094 {
1095 	struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1096 	struct snd_pcm_runtime *runtime = substream->runtime;
1097 	struct snd_ymfpci_pcm *ypcm = runtime->private_data;
1098 
1099 	if (ypcm != NULL) {
1100 		chip->capture_substream[ypcm->capture_bank_number] = NULL;
1101 		snd_ymfpci_hw_stop(chip);
1102 	}
1103 	return 0;
1104 }
1105 
1106 static struct snd_pcm_ops snd_ymfpci_playback_ops = {
1107 	.open =			snd_ymfpci_playback_open,
1108 	.close =		snd_ymfpci_playback_close,
1109 	.ioctl =		snd_pcm_lib_ioctl,
1110 	.hw_params =		snd_ymfpci_playback_hw_params,
1111 	.hw_free =		snd_ymfpci_playback_hw_free,
1112 	.prepare =		snd_ymfpci_playback_prepare,
1113 	.trigger =		snd_ymfpci_playback_trigger,
1114 	.pointer =		snd_ymfpci_playback_pointer,
1115 };
1116 
1117 static struct snd_pcm_ops snd_ymfpci_capture_rec_ops = {
1118 	.open =			snd_ymfpci_capture_rec_open,
1119 	.close =		snd_ymfpci_capture_close,
1120 	.ioctl =		snd_pcm_lib_ioctl,
1121 	.hw_params =		snd_ymfpci_capture_hw_params,
1122 	.hw_free =		snd_ymfpci_capture_hw_free,
1123 	.prepare =		snd_ymfpci_capture_prepare,
1124 	.trigger =		snd_ymfpci_capture_trigger,
1125 	.pointer =		snd_ymfpci_capture_pointer,
1126 };
1127 
1128 int __devinit snd_ymfpci_pcm(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
1129 {
1130 	struct snd_pcm *pcm;
1131 	int err;
1132 
1133 	if (rpcm)
1134 		*rpcm = NULL;
1135 	if ((err = snd_pcm_new(chip->card, "YMFPCI", device, 32, 1, &pcm)) < 0)
1136 		return err;
1137 	pcm->private_data = chip;
1138 
1139 	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_ops);
1140 	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_rec_ops);
1141 
1142 	/* global setup */
1143 	pcm->info_flags = 0;
1144 	strcpy(pcm->name, "YMFPCI");
1145 	chip->pcm = pcm;
1146 
1147 	snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1148 					      snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1149 
1150 	if (rpcm)
1151 		*rpcm = pcm;
1152 	return 0;
1153 }
1154 
1155 static struct snd_pcm_ops snd_ymfpci_capture_ac97_ops = {
1156 	.open =			snd_ymfpci_capture_ac97_open,
1157 	.close =		snd_ymfpci_capture_close,
1158 	.ioctl =		snd_pcm_lib_ioctl,
1159 	.hw_params =		snd_ymfpci_capture_hw_params,
1160 	.hw_free =		snd_ymfpci_capture_hw_free,
1161 	.prepare =		snd_ymfpci_capture_prepare,
1162 	.trigger =		snd_ymfpci_capture_trigger,
1163 	.pointer =		snd_ymfpci_capture_pointer,
1164 };
1165 
1166 int __devinit snd_ymfpci_pcm2(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
1167 {
1168 	struct snd_pcm *pcm;
1169 	int err;
1170 
1171 	if (rpcm)
1172 		*rpcm = NULL;
1173 	if ((err = snd_pcm_new(chip->card, "YMFPCI - PCM2", device, 0, 1, &pcm)) < 0)
1174 		return err;
1175 	pcm->private_data = chip;
1176 
1177 	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_ac97_ops);
1178 
1179 	/* global setup */
1180 	pcm->info_flags = 0;
1181 	sprintf(pcm->name, "YMFPCI - %s",
1182 		chip->device_id == PCI_DEVICE_ID_YAMAHA_754 ? "Direct Recording" : "AC'97");
1183 	chip->pcm2 = pcm;
1184 
1185 	snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1186 					      snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1187 
1188 	if (rpcm)
1189 		*rpcm = pcm;
1190 	return 0;
1191 }
1192 
1193 static struct snd_pcm_ops snd_ymfpci_playback_spdif_ops = {
1194 	.open =			snd_ymfpci_playback_spdif_open,
1195 	.close =		snd_ymfpci_playback_spdif_close,
1196 	.ioctl =		snd_pcm_lib_ioctl,
1197 	.hw_params =		snd_ymfpci_playback_hw_params,
1198 	.hw_free =		snd_ymfpci_playback_hw_free,
1199 	.prepare =		snd_ymfpci_playback_prepare,
1200 	.trigger =		snd_ymfpci_playback_trigger,
1201 	.pointer =		snd_ymfpci_playback_pointer,
1202 };
1203 
1204 int __devinit snd_ymfpci_pcm_spdif(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
1205 {
1206 	struct snd_pcm *pcm;
1207 	int err;
1208 
1209 	if (rpcm)
1210 		*rpcm = NULL;
1211 	if ((err = snd_pcm_new(chip->card, "YMFPCI - IEC958", device, 1, 0, &pcm)) < 0)
1212 		return err;
1213 	pcm->private_data = chip;
1214 
1215 	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_spdif_ops);
1216 
1217 	/* global setup */
1218 	pcm->info_flags = 0;
1219 	strcpy(pcm->name, "YMFPCI - IEC958");
1220 	chip->pcm_spdif = pcm;
1221 
1222 	snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1223 					      snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1224 
1225 	if (rpcm)
1226 		*rpcm = pcm;
1227 	return 0;
1228 }
1229 
1230 static struct snd_pcm_ops snd_ymfpci_playback_4ch_ops = {
1231 	.open =			snd_ymfpci_playback_4ch_open,
1232 	.close =		snd_ymfpci_playback_4ch_close,
1233 	.ioctl =		snd_pcm_lib_ioctl,
1234 	.hw_params =		snd_ymfpci_playback_hw_params,
1235 	.hw_free =		snd_ymfpci_playback_hw_free,
1236 	.prepare =		snd_ymfpci_playback_prepare,
1237 	.trigger =		snd_ymfpci_playback_trigger,
1238 	.pointer =		snd_ymfpci_playback_pointer,
1239 };
1240 
1241 int __devinit snd_ymfpci_pcm_4ch(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
1242 {
1243 	struct snd_pcm *pcm;
1244 	int err;
1245 
1246 	if (rpcm)
1247 		*rpcm = NULL;
1248 	if ((err = snd_pcm_new(chip->card, "YMFPCI - Rear", device, 1, 0, &pcm)) < 0)
1249 		return err;
1250 	pcm->private_data = chip;
1251 
1252 	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_4ch_ops);
1253 
1254 	/* global setup */
1255 	pcm->info_flags = 0;
1256 	strcpy(pcm->name, "YMFPCI - Rear PCM");
1257 	chip->pcm_4ch = pcm;
1258 
1259 	snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1260 					      snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1261 
1262 	if (rpcm)
1263 		*rpcm = pcm;
1264 	return 0;
1265 }
1266 
1267 static int snd_ymfpci_spdif_default_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1268 {
1269 	uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1270 	uinfo->count = 1;
1271 	return 0;
1272 }
1273 
1274 static int snd_ymfpci_spdif_default_get(struct snd_kcontrol *kcontrol,
1275 					struct snd_ctl_elem_value *ucontrol)
1276 {
1277 	struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1278 
1279 	spin_lock_irq(&chip->reg_lock);
1280 	ucontrol->value.iec958.status[0] = (chip->spdif_bits >> 0) & 0xff;
1281 	ucontrol->value.iec958.status[1] = (chip->spdif_bits >> 8) & 0xff;
1282 	ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
1283 	spin_unlock_irq(&chip->reg_lock);
1284 	return 0;
1285 }
1286 
1287 static int snd_ymfpci_spdif_default_put(struct snd_kcontrol *kcontrol,
1288 					 struct snd_ctl_elem_value *ucontrol)
1289 {
1290 	struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1291 	unsigned int val;
1292 	int change;
1293 
1294 	val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
1295 	      (ucontrol->value.iec958.status[1] << 8);
1296 	spin_lock_irq(&chip->reg_lock);
1297 	change = chip->spdif_bits != val;
1298 	chip->spdif_bits = val;
1299 	if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 1) && chip->pcm_spdif == NULL)
1300 		snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
1301 	spin_unlock_irq(&chip->reg_lock);
1302 	return change;
1303 }
1304 
1305 static struct snd_kcontrol_new snd_ymfpci_spdif_default __devinitdata =
1306 {
1307 	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
1308 	.name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1309 	.info =		snd_ymfpci_spdif_default_info,
1310 	.get =		snd_ymfpci_spdif_default_get,
1311 	.put =		snd_ymfpci_spdif_default_put
1312 };
1313 
1314 static int snd_ymfpci_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1315 {
1316 	uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1317 	uinfo->count = 1;
1318 	return 0;
1319 }
1320 
1321 static int snd_ymfpci_spdif_mask_get(struct snd_kcontrol *kcontrol,
1322 				      struct snd_ctl_elem_value *ucontrol)
1323 {
1324 	struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1325 
1326 	spin_lock_irq(&chip->reg_lock);
1327 	ucontrol->value.iec958.status[0] = 0x3e;
1328 	ucontrol->value.iec958.status[1] = 0xff;
1329 	spin_unlock_irq(&chip->reg_lock);
1330 	return 0;
1331 }
1332 
1333 static struct snd_kcontrol_new snd_ymfpci_spdif_mask __devinitdata =
1334 {
1335 	.access =	SNDRV_CTL_ELEM_ACCESS_READ,
1336 	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
1337 	.name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1338 	.info =		snd_ymfpci_spdif_mask_info,
1339 	.get =		snd_ymfpci_spdif_mask_get,
1340 };
1341 
1342 static int snd_ymfpci_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1343 {
1344 	uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1345 	uinfo->count = 1;
1346 	return 0;
1347 }
1348 
1349 static int snd_ymfpci_spdif_stream_get(struct snd_kcontrol *kcontrol,
1350 					struct snd_ctl_elem_value *ucontrol)
1351 {
1352 	struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1353 
1354 	spin_lock_irq(&chip->reg_lock);
1355 	ucontrol->value.iec958.status[0] = (chip->spdif_pcm_bits >> 0) & 0xff;
1356 	ucontrol->value.iec958.status[1] = (chip->spdif_pcm_bits >> 8) & 0xff;
1357 	ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
1358 	spin_unlock_irq(&chip->reg_lock);
1359 	return 0;
1360 }
1361 
1362 static int snd_ymfpci_spdif_stream_put(struct snd_kcontrol *kcontrol,
1363 					struct snd_ctl_elem_value *ucontrol)
1364 {
1365 	struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1366 	unsigned int val;
1367 	int change;
1368 
1369 	val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
1370 	      (ucontrol->value.iec958.status[1] << 8);
1371 	spin_lock_irq(&chip->reg_lock);
1372 	change = chip->spdif_pcm_bits != val;
1373 	chip->spdif_pcm_bits = val;
1374 	if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 2))
1375 		snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
1376 	spin_unlock_irq(&chip->reg_lock);
1377 	return change;
1378 }
1379 
1380 static struct snd_kcontrol_new snd_ymfpci_spdif_stream __devinitdata =
1381 {
1382 	.access =	SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1383 	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
1384 	.name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1385 	.info =		snd_ymfpci_spdif_stream_info,
1386 	.get =		snd_ymfpci_spdif_stream_get,
1387 	.put =		snd_ymfpci_spdif_stream_put
1388 };
1389 
1390 static int snd_ymfpci_drec_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *info)
1391 {
1392 	static const char *const texts[3] = {"AC'97", "IEC958", "ZV Port"};
1393 
1394 	return snd_ctl_enum_info(info, 1, 3, texts);
1395 }
1396 
1397 static int snd_ymfpci_drec_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
1398 {
1399 	struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1400 	u16 reg;
1401 
1402 	spin_lock_irq(&chip->reg_lock);
1403 	reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1404 	spin_unlock_irq(&chip->reg_lock);
1405 	if (!(reg & 0x100))
1406 		value->value.enumerated.item[0] = 0;
1407 	else
1408 		value->value.enumerated.item[0] = 1 + ((reg & 0x200) != 0);
1409 	return 0;
1410 }
1411 
1412 static int snd_ymfpci_drec_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
1413 {
1414 	struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1415 	u16 reg, old_reg;
1416 
1417 	spin_lock_irq(&chip->reg_lock);
1418 	old_reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1419 	if (value->value.enumerated.item[0] == 0)
1420 		reg = old_reg & ~0x100;
1421 	else
1422 		reg = (old_reg & ~0x300) | 0x100 | ((value->value.enumerated.item[0] == 2) << 9);
1423 	snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, reg);
1424 	spin_unlock_irq(&chip->reg_lock);
1425 	return reg != old_reg;
1426 }
1427 
1428 static struct snd_kcontrol_new snd_ymfpci_drec_source __devinitdata = {
1429 	.access =	SNDRV_CTL_ELEM_ACCESS_READWRITE,
1430 	.iface =	SNDRV_CTL_ELEM_IFACE_MIXER,
1431 	.name =		"Direct Recording Source",
1432 	.info =		snd_ymfpci_drec_source_info,
1433 	.get =		snd_ymfpci_drec_source_get,
1434 	.put =		snd_ymfpci_drec_source_put
1435 };
1436 
1437 /*
1438  *  Mixer controls
1439  */
1440 
1441 #define YMFPCI_SINGLE(xname, xindex, reg, shift) \
1442 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1443   .info = snd_ymfpci_info_single, \
1444   .get = snd_ymfpci_get_single, .put = snd_ymfpci_put_single, \
1445   .private_value = ((reg) | ((shift) << 16)) }
1446 
1447 #define snd_ymfpci_info_single		snd_ctl_boolean_mono_info
1448 
1449 static int snd_ymfpci_get_single(struct snd_kcontrol *kcontrol,
1450 				 struct snd_ctl_elem_value *ucontrol)
1451 {
1452 	struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1453 	int reg = kcontrol->private_value & 0xffff;
1454 	unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
1455 	unsigned int mask = 1;
1456 
1457 	switch (reg) {
1458 	case YDSXGR_SPDIFOUTCTRL: break;
1459 	case YDSXGR_SPDIFINCTRL: break;
1460 	default: return -EINVAL;
1461 	}
1462 	ucontrol->value.integer.value[0] =
1463 		(snd_ymfpci_readl(chip, reg) >> shift) & mask;
1464 	return 0;
1465 }
1466 
1467 static int snd_ymfpci_put_single(struct snd_kcontrol *kcontrol,
1468 				 struct snd_ctl_elem_value *ucontrol)
1469 {
1470 	struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1471 	int reg = kcontrol->private_value & 0xffff;
1472 	unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
1473  	unsigned int mask = 1;
1474 	int change;
1475 	unsigned int val, oval;
1476 
1477 	switch (reg) {
1478 	case YDSXGR_SPDIFOUTCTRL: break;
1479 	case YDSXGR_SPDIFINCTRL: break;
1480 	default: return -EINVAL;
1481 	}
1482 	val = (ucontrol->value.integer.value[0] & mask);
1483 	val <<= shift;
1484 	spin_lock_irq(&chip->reg_lock);
1485 	oval = snd_ymfpci_readl(chip, reg);
1486 	val = (oval & ~(mask << shift)) | val;
1487 	change = val != oval;
1488 	snd_ymfpci_writel(chip, reg, val);
1489 	spin_unlock_irq(&chip->reg_lock);
1490 	return change;
1491 }
1492 
1493 static const DECLARE_TLV_DB_LINEAR(db_scale_native, TLV_DB_GAIN_MUTE, 0);
1494 
1495 #define YMFPCI_DOUBLE(xname, xindex, reg) \
1496 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1497   .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
1498   .info = snd_ymfpci_info_double, \
1499   .get = snd_ymfpci_get_double, .put = snd_ymfpci_put_double, \
1500   .private_value = reg, \
1501   .tlv = { .p = db_scale_native } }
1502 
1503 static int snd_ymfpci_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1504 {
1505 	unsigned int reg = kcontrol->private_value;
1506 
1507 	if (reg < 0x80 || reg >= 0xc0)
1508 		return -EINVAL;
1509 	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1510 	uinfo->count = 2;
1511 	uinfo->value.integer.min = 0;
1512 	uinfo->value.integer.max = 16383;
1513 	return 0;
1514 }
1515 
1516 static int snd_ymfpci_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1517 {
1518 	struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1519 	unsigned int reg = kcontrol->private_value;
1520 	unsigned int shift_left = 0, shift_right = 16, mask = 16383;
1521 	unsigned int val;
1522 
1523 	if (reg < 0x80 || reg >= 0xc0)
1524 		return -EINVAL;
1525 	spin_lock_irq(&chip->reg_lock);
1526 	val = snd_ymfpci_readl(chip, reg);
1527 	spin_unlock_irq(&chip->reg_lock);
1528 	ucontrol->value.integer.value[0] = (val >> shift_left) & mask;
1529 	ucontrol->value.integer.value[1] = (val >> shift_right) & mask;
1530 	return 0;
1531 }
1532 
1533 static int snd_ymfpci_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1534 {
1535 	struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1536 	unsigned int reg = kcontrol->private_value;
1537 	unsigned int shift_left = 0, shift_right = 16, mask = 16383;
1538 	int change;
1539 	unsigned int val1, val2, oval;
1540 
1541 	if (reg < 0x80 || reg >= 0xc0)
1542 		return -EINVAL;
1543 	val1 = ucontrol->value.integer.value[0] & mask;
1544 	val2 = ucontrol->value.integer.value[1] & mask;
1545 	val1 <<= shift_left;
1546 	val2 <<= shift_right;
1547 	spin_lock_irq(&chip->reg_lock);
1548 	oval = snd_ymfpci_readl(chip, reg);
1549 	val1 = (oval & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
1550 	change = val1 != oval;
1551 	snd_ymfpci_writel(chip, reg, val1);
1552 	spin_unlock_irq(&chip->reg_lock);
1553 	return change;
1554 }
1555 
1556 static int snd_ymfpci_put_nativedacvol(struct snd_kcontrol *kcontrol,
1557 				       struct snd_ctl_elem_value *ucontrol)
1558 {
1559 	struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1560 	unsigned int reg = YDSXGR_NATIVEDACOUTVOL;
1561 	unsigned int reg2 = YDSXGR_BUF441OUTVOL;
1562 	int change;
1563 	unsigned int value, oval;
1564 
1565 	value = ucontrol->value.integer.value[0] & 0x3fff;
1566 	value |= (ucontrol->value.integer.value[1] & 0x3fff) << 16;
1567 	spin_lock_irq(&chip->reg_lock);
1568 	oval = snd_ymfpci_readl(chip, reg);
1569 	change = value != oval;
1570 	snd_ymfpci_writel(chip, reg, value);
1571 	snd_ymfpci_writel(chip, reg2, value);
1572 	spin_unlock_irq(&chip->reg_lock);
1573 	return change;
1574 }
1575 
1576 /*
1577  * 4ch duplication
1578  */
1579 #define snd_ymfpci_info_dup4ch		snd_ctl_boolean_mono_info
1580 
1581 static int snd_ymfpci_get_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1582 {
1583 	struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1584 	ucontrol->value.integer.value[0] = chip->mode_dup4ch;
1585 	return 0;
1586 }
1587 
1588 static int snd_ymfpci_put_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1589 {
1590 	struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1591 	int change;
1592 	change = (ucontrol->value.integer.value[0] != chip->mode_dup4ch);
1593 	if (change)
1594 		chip->mode_dup4ch = !!ucontrol->value.integer.value[0];
1595 	return change;
1596 }
1597 
1598 
1599 static struct snd_kcontrol_new snd_ymfpci_controls[] __devinitdata = {
1600 {
1601 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1602 	.name = "Wave Playback Volume",
1603 	.access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
1604 		  SNDRV_CTL_ELEM_ACCESS_TLV_READ,
1605 	.info = snd_ymfpci_info_double,
1606 	.get = snd_ymfpci_get_double,
1607 	.put = snd_ymfpci_put_nativedacvol,
1608 	.private_value = YDSXGR_NATIVEDACOUTVOL,
1609 	.tlv = { .p = db_scale_native },
1610 },
1611 YMFPCI_DOUBLE("Wave Capture Volume", 0, YDSXGR_NATIVEDACLOOPVOL),
1612 YMFPCI_DOUBLE("Digital Capture Volume", 0, YDSXGR_NATIVEDACINVOL),
1613 YMFPCI_DOUBLE("Digital Capture Volume", 1, YDSXGR_NATIVEADCINVOL),
1614 YMFPCI_DOUBLE("ADC Playback Volume", 0, YDSXGR_PRIADCOUTVOL),
1615 YMFPCI_DOUBLE("ADC Capture Volume", 0, YDSXGR_PRIADCLOOPVOL),
1616 YMFPCI_DOUBLE("ADC Playback Volume", 1, YDSXGR_SECADCOUTVOL),
1617 YMFPCI_DOUBLE("ADC Capture Volume", 1, YDSXGR_SECADCLOOPVOL),
1618 YMFPCI_DOUBLE("FM Legacy Volume", 0, YDSXGR_LEGACYOUTVOL),
1619 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ", PLAYBACK,VOLUME), 0, YDSXGR_ZVOUTVOL),
1620 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("", CAPTURE,VOLUME), 0, YDSXGR_ZVLOOPVOL),
1621 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ",PLAYBACK,VOLUME), 1, YDSXGR_SPDIFOUTVOL),
1622 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,VOLUME), 1, YDSXGR_SPDIFLOOPVOL),
1623 YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), 0, YDSXGR_SPDIFOUTCTRL, 0),
1624 YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), 0, YDSXGR_SPDIFINCTRL, 0),
1625 YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("Loop",NONE,NONE), 0, YDSXGR_SPDIFINCTRL, 4),
1626 {
1627 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1628 	.name = "4ch Duplication",
1629 	.info = snd_ymfpci_info_dup4ch,
1630 	.get = snd_ymfpci_get_dup4ch,
1631 	.put = snd_ymfpci_put_dup4ch,
1632 },
1633 };
1634 
1635 
1636 /*
1637  * GPIO
1638  */
1639 
1640 static int snd_ymfpci_get_gpio_out(struct snd_ymfpci *chip, int pin)
1641 {
1642 	u16 reg, mode;
1643 	unsigned long flags;
1644 
1645 	spin_lock_irqsave(&chip->reg_lock, flags);
1646 	reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
1647 	reg &= ~(1 << (pin + 8));
1648 	reg |= (1 << pin);
1649 	snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
1650 	/* set the level mode for input line */
1651 	mode = snd_ymfpci_readw(chip, YDSXGR_GPIOTYPECONFIG);
1652 	mode &= ~(3 << (pin * 2));
1653 	snd_ymfpci_writew(chip, YDSXGR_GPIOTYPECONFIG, mode);
1654 	snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
1655 	mode = snd_ymfpci_readw(chip, YDSXGR_GPIOINSTATUS);
1656 	spin_unlock_irqrestore(&chip->reg_lock, flags);
1657 	return (mode >> pin) & 1;
1658 }
1659 
1660 static int snd_ymfpci_set_gpio_out(struct snd_ymfpci *chip, int pin, int enable)
1661 {
1662 	u16 reg;
1663 	unsigned long flags;
1664 
1665 	spin_lock_irqsave(&chip->reg_lock, flags);
1666 	reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
1667 	reg &= ~(1 << pin);
1668 	reg &= ~(1 << (pin + 8));
1669 	snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
1670 	snd_ymfpci_writew(chip, YDSXGR_GPIOOUTCTRL, enable << pin);
1671 	snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
1672 	spin_unlock_irqrestore(&chip->reg_lock, flags);
1673 
1674 	return 0;
1675 }
1676 
1677 #define snd_ymfpci_gpio_sw_info		snd_ctl_boolean_mono_info
1678 
1679 static int snd_ymfpci_gpio_sw_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1680 {
1681 	struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1682 	int pin = (int)kcontrol->private_value;
1683 	ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
1684 	return 0;
1685 }
1686 
1687 static int snd_ymfpci_gpio_sw_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1688 {
1689 	struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1690 	int pin = (int)kcontrol->private_value;
1691 
1692 	if (snd_ymfpci_get_gpio_out(chip, pin) != ucontrol->value.integer.value[0]) {
1693 		snd_ymfpci_set_gpio_out(chip, pin, !!ucontrol->value.integer.value[0]);
1694 		ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
1695 		return 1;
1696 	}
1697 	return 0;
1698 }
1699 
1700 static struct snd_kcontrol_new snd_ymfpci_rear_shared __devinitdata = {
1701 	.name = "Shared Rear/Line-In Switch",
1702 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1703 	.info = snd_ymfpci_gpio_sw_info,
1704 	.get = snd_ymfpci_gpio_sw_get,
1705 	.put = snd_ymfpci_gpio_sw_put,
1706 	.private_value = 2,
1707 };
1708 
1709 /*
1710  * PCM voice volume
1711  */
1712 
1713 static int snd_ymfpci_pcm_vol_info(struct snd_kcontrol *kcontrol,
1714 				   struct snd_ctl_elem_info *uinfo)
1715 {
1716 	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1717 	uinfo->count = 2;
1718 	uinfo->value.integer.min = 0;
1719 	uinfo->value.integer.max = 0x8000;
1720 	return 0;
1721 }
1722 
1723 static int snd_ymfpci_pcm_vol_get(struct snd_kcontrol *kcontrol,
1724 				  struct snd_ctl_elem_value *ucontrol)
1725 {
1726 	struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1727 	unsigned int subs = kcontrol->id.subdevice;
1728 
1729 	ucontrol->value.integer.value[0] = chip->pcm_mixer[subs].left;
1730 	ucontrol->value.integer.value[1] = chip->pcm_mixer[subs].right;
1731 	return 0;
1732 }
1733 
1734 static int snd_ymfpci_pcm_vol_put(struct snd_kcontrol *kcontrol,
1735 				  struct snd_ctl_elem_value *ucontrol)
1736 {
1737 	struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1738 	unsigned int subs = kcontrol->id.subdevice;
1739 	struct snd_pcm_substream *substream;
1740 	unsigned long flags;
1741 
1742 	if (ucontrol->value.integer.value[0] != chip->pcm_mixer[subs].left ||
1743 	    ucontrol->value.integer.value[1] != chip->pcm_mixer[subs].right) {
1744 		chip->pcm_mixer[subs].left = ucontrol->value.integer.value[0];
1745 		chip->pcm_mixer[subs].right = ucontrol->value.integer.value[1];
1746 		if (chip->pcm_mixer[subs].left > 0x8000)
1747 			chip->pcm_mixer[subs].left = 0x8000;
1748 		if (chip->pcm_mixer[subs].right > 0x8000)
1749 			chip->pcm_mixer[subs].right = 0x8000;
1750 
1751 		substream = (struct snd_pcm_substream *)kcontrol->private_value;
1752 		spin_lock_irqsave(&chip->voice_lock, flags);
1753 		if (substream->runtime && substream->runtime->private_data) {
1754 			struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
1755 			if (!ypcm->use_441_slot)
1756 				ypcm->update_pcm_vol = 2;
1757 		}
1758 		spin_unlock_irqrestore(&chip->voice_lock, flags);
1759 		return 1;
1760 	}
1761 	return 0;
1762 }
1763 
1764 static struct snd_kcontrol_new snd_ymfpci_pcm_volume __devinitdata = {
1765 	.iface = SNDRV_CTL_ELEM_IFACE_PCM,
1766 	.name = "PCM Playback Volume",
1767 	.access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
1768 		SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1769 	.info = snd_ymfpci_pcm_vol_info,
1770 	.get = snd_ymfpci_pcm_vol_get,
1771 	.put = snd_ymfpci_pcm_vol_put,
1772 };
1773 
1774 
1775 /*
1776  *  Mixer routines
1777  */
1778 
1779 static void snd_ymfpci_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
1780 {
1781 	struct snd_ymfpci *chip = bus->private_data;
1782 	chip->ac97_bus = NULL;
1783 }
1784 
1785 static void snd_ymfpci_mixer_free_ac97(struct snd_ac97 *ac97)
1786 {
1787 	struct snd_ymfpci *chip = ac97->private_data;
1788 	chip->ac97 = NULL;
1789 }
1790 
1791 int __devinit snd_ymfpci_mixer(struct snd_ymfpci *chip, int rear_switch)
1792 {
1793 	struct snd_ac97_template ac97;
1794 	struct snd_kcontrol *kctl;
1795 	struct snd_pcm_substream *substream;
1796 	unsigned int idx;
1797 	int err;
1798 	static struct snd_ac97_bus_ops ops = {
1799 		.write = snd_ymfpci_codec_write,
1800 		.read = snd_ymfpci_codec_read,
1801 	};
1802 
1803 	if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
1804 		return err;
1805 	chip->ac97_bus->private_free = snd_ymfpci_mixer_free_ac97_bus;
1806 	chip->ac97_bus->no_vra = 1; /* YMFPCI doesn't need VRA */
1807 
1808 	memset(&ac97, 0, sizeof(ac97));
1809 	ac97.private_data = chip;
1810 	ac97.private_free = snd_ymfpci_mixer_free_ac97;
1811 	if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
1812 		return err;
1813 
1814 	/* to be sure */
1815 	snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS,
1816 			     AC97_EA_VRA|AC97_EA_VRM, 0);
1817 
1818 	for (idx = 0; idx < ARRAY_SIZE(snd_ymfpci_controls); idx++) {
1819 		if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_controls[idx], chip))) < 0)
1820 			return err;
1821 	}
1822 
1823 	/* add S/PDIF control */
1824 	if (snd_BUG_ON(!chip->pcm_spdif))
1825 		return -ENXIO;
1826 	if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_default, chip))) < 0)
1827 		return err;
1828 	kctl->id.device = chip->pcm_spdif->device;
1829 	if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_mask, chip))) < 0)
1830 		return err;
1831 	kctl->id.device = chip->pcm_spdif->device;
1832 	if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_stream, chip))) < 0)
1833 		return err;
1834 	kctl->id.device = chip->pcm_spdif->device;
1835 	chip->spdif_pcm_ctl = kctl;
1836 
1837 	/* direct recording source */
1838 	if (chip->device_id == PCI_DEVICE_ID_YAMAHA_754 &&
1839 	    (err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_drec_source, chip))) < 0)
1840 		return err;
1841 
1842 	/*
1843 	 * shared rear/line-in
1844 	 */
1845 	if (rear_switch) {
1846 		if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_rear_shared, chip))) < 0)
1847 			return err;
1848 	}
1849 
1850 	/* per-voice volume */
1851 	substream = chip->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
1852 	for (idx = 0; idx < 32; ++idx) {
1853 		kctl = snd_ctl_new1(&snd_ymfpci_pcm_volume, chip);
1854 		if (!kctl)
1855 			return -ENOMEM;
1856 		kctl->id.device = chip->pcm->device;
1857 		kctl->id.subdevice = idx;
1858 		kctl->private_value = (unsigned long)substream;
1859 		if ((err = snd_ctl_add(chip->card, kctl)) < 0)
1860 			return err;
1861 		chip->pcm_mixer[idx].left = 0x8000;
1862 		chip->pcm_mixer[idx].right = 0x8000;
1863 		chip->pcm_mixer[idx].ctl = kctl;
1864 		substream = substream->next;
1865 	}
1866 
1867 	return 0;
1868 }
1869 
1870 
1871 /*
1872  * timer
1873  */
1874 
1875 static int snd_ymfpci_timer_start(struct snd_timer *timer)
1876 {
1877 	struct snd_ymfpci *chip;
1878 	unsigned long flags;
1879 	unsigned int count;
1880 
1881 	chip = snd_timer_chip(timer);
1882 	spin_lock_irqsave(&chip->reg_lock, flags);
1883 	if (timer->sticks > 1) {
1884 		chip->timer_ticks = timer->sticks;
1885 		count = timer->sticks - 1;
1886 	} else {
1887 		/*
1888 		 * Divisor 1 is not allowed; fake it by using divisor 2 and
1889 		 * counting two ticks for each interrupt.
1890 		 */
1891 		chip->timer_ticks = 2;
1892 		count = 2 - 1;
1893 	}
1894 	snd_ymfpci_writew(chip, YDSXGR_TIMERCOUNT, count);
1895 	snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x03);
1896 	spin_unlock_irqrestore(&chip->reg_lock, flags);
1897 	return 0;
1898 }
1899 
1900 static int snd_ymfpci_timer_stop(struct snd_timer *timer)
1901 {
1902 	struct snd_ymfpci *chip;
1903 	unsigned long flags;
1904 
1905 	chip = snd_timer_chip(timer);
1906 	spin_lock_irqsave(&chip->reg_lock, flags);
1907 	snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x00);
1908 	spin_unlock_irqrestore(&chip->reg_lock, flags);
1909 	return 0;
1910 }
1911 
1912 static int snd_ymfpci_timer_precise_resolution(struct snd_timer *timer,
1913 					       unsigned long *num, unsigned long *den)
1914 {
1915 	*num = 1;
1916 	*den = 96000;
1917 	return 0;
1918 }
1919 
1920 static struct snd_timer_hardware snd_ymfpci_timer_hw = {
1921 	.flags = SNDRV_TIMER_HW_AUTO,
1922 	.resolution = 10417, /* 1 / 96 kHz = 10.41666...us */
1923 	.ticks = 0x10000,
1924 	.start = snd_ymfpci_timer_start,
1925 	.stop = snd_ymfpci_timer_stop,
1926 	.precise_resolution = snd_ymfpci_timer_precise_resolution,
1927 };
1928 
1929 int __devinit snd_ymfpci_timer(struct snd_ymfpci *chip, int device)
1930 {
1931 	struct snd_timer *timer = NULL;
1932 	struct snd_timer_id tid;
1933 	int err;
1934 
1935 	tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1936 	tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1937 	tid.card = chip->card->number;
1938 	tid.device = device;
1939 	tid.subdevice = 0;
1940 	if ((err = snd_timer_new(chip->card, "YMFPCI", &tid, &timer)) >= 0) {
1941 		strcpy(timer->name, "YMFPCI timer");
1942 		timer->private_data = chip;
1943 		timer->hw = snd_ymfpci_timer_hw;
1944 	}
1945 	chip->timer = timer;
1946 	return err;
1947 }
1948 
1949 
1950 /*
1951  *  proc interface
1952  */
1953 
1954 static void snd_ymfpci_proc_read(struct snd_info_entry *entry,
1955 				 struct snd_info_buffer *buffer)
1956 {
1957 	struct snd_ymfpci *chip = entry->private_data;
1958 	int i;
1959 
1960 	snd_iprintf(buffer, "YMFPCI\n\n");
1961 	for (i = 0; i <= YDSXGR_WORKBASE; i += 4)
1962 		snd_iprintf(buffer, "%04x: %04x\n", i, snd_ymfpci_readl(chip, i));
1963 }
1964 
1965 static int __devinit snd_ymfpci_proc_init(struct snd_card *card, struct snd_ymfpci *chip)
1966 {
1967 	struct snd_info_entry *entry;
1968 
1969 	if (! snd_card_proc_new(card, "ymfpci", &entry))
1970 		snd_info_set_text_ops(entry, chip, snd_ymfpci_proc_read);
1971 	return 0;
1972 }
1973 
1974 /*
1975  *  initialization routines
1976  */
1977 
1978 static void snd_ymfpci_aclink_reset(struct pci_dev * pci)
1979 {
1980 	u8 cmd;
1981 
1982 	pci_read_config_byte(pci, PCIR_DSXG_CTRL, &cmd);
1983 #if 0 // force to reset
1984 	if (cmd & 0x03) {
1985 #endif
1986 		pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
1987 		pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd | 0x03);
1988 		pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
1989 		pci_write_config_word(pci, PCIR_DSXG_PWRCTRL1, 0);
1990 		pci_write_config_word(pci, PCIR_DSXG_PWRCTRL2, 0);
1991 #if 0
1992 	}
1993 #endif
1994 }
1995 
1996 static void snd_ymfpci_enable_dsp(struct snd_ymfpci *chip)
1997 {
1998 	snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000001);
1999 }
2000 
2001 static void snd_ymfpci_disable_dsp(struct snd_ymfpci *chip)
2002 {
2003 	u32 val;
2004 	int timeout = 1000;
2005 
2006 	val = snd_ymfpci_readl(chip, YDSXGR_CONFIG);
2007 	if (val)
2008 		snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000000);
2009 	while (timeout-- > 0) {
2010 		val = snd_ymfpci_readl(chip, YDSXGR_STATUS);
2011 		if ((val & 0x00000002) == 0)
2012 			break;
2013 	}
2014 }
2015 
2016 static int snd_ymfpci_request_firmware(struct snd_ymfpci *chip)
2017 {
2018 	int err, is_1e;
2019 	const char *name;
2020 
2021 	err = request_firmware(&chip->dsp_microcode, "yamaha/ds1_dsp.fw",
2022 			       &chip->pci->dev);
2023 	if (err >= 0) {
2024 		if (chip->dsp_microcode->size != YDSXG_DSPLENGTH) {
2025 			snd_printk(KERN_ERR "DSP microcode has wrong size\n");
2026 			err = -EINVAL;
2027 		}
2028 	}
2029 	if (err < 0)
2030 		return err;
2031 	is_1e = chip->device_id == PCI_DEVICE_ID_YAMAHA_724F ||
2032 		chip->device_id == PCI_DEVICE_ID_YAMAHA_740C ||
2033 		chip->device_id == PCI_DEVICE_ID_YAMAHA_744 ||
2034 		chip->device_id == PCI_DEVICE_ID_YAMAHA_754;
2035 	name = is_1e ? "yamaha/ds1e_ctrl.fw" : "yamaha/ds1_ctrl.fw";
2036 	err = request_firmware(&chip->controller_microcode, name,
2037 			       &chip->pci->dev);
2038 	if (err >= 0) {
2039 		if (chip->controller_microcode->size != YDSXG_CTRLLENGTH) {
2040 			snd_printk(KERN_ERR "controller microcode"
2041 				   " has wrong size\n");
2042 			err = -EINVAL;
2043 		}
2044 	}
2045 	if (err < 0)
2046 		return err;
2047 	return 0;
2048 }
2049 
2050 MODULE_FIRMWARE("yamaha/ds1_dsp.fw");
2051 MODULE_FIRMWARE("yamaha/ds1_ctrl.fw");
2052 MODULE_FIRMWARE("yamaha/ds1e_ctrl.fw");
2053 
2054 static void snd_ymfpci_download_image(struct snd_ymfpci *chip)
2055 {
2056 	int i;
2057 	u16 ctrl;
2058 	const __le32 *inst;
2059 
2060 	snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x00000000);
2061 	snd_ymfpci_disable_dsp(chip);
2062 	snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00010000);
2063 	snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00000000);
2064 	snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, 0x00000000);
2065 	snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 0x00000000);
2066 	snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0x00000000);
2067 	snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0x00000000);
2068 	snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0x00000000);
2069 	ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
2070 	snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
2071 
2072 	/* setup DSP instruction code */
2073 	inst = (const __le32 *)chip->dsp_microcode->data;
2074 	for (i = 0; i < YDSXG_DSPLENGTH / 4; i++)
2075 		snd_ymfpci_writel(chip, YDSXGR_DSPINSTRAM + (i << 2),
2076 				  le32_to_cpu(inst[i]));
2077 
2078 	/* setup control instruction code */
2079 	inst = (const __le32 *)chip->controller_microcode->data;
2080 	for (i = 0; i < YDSXG_CTRLLENGTH / 4; i++)
2081 		snd_ymfpci_writel(chip, YDSXGR_CTRLINSTRAM + (i << 2),
2082 				  le32_to_cpu(inst[i]));
2083 
2084 	snd_ymfpci_enable_dsp(chip);
2085 }
2086 
2087 static int __devinit snd_ymfpci_memalloc(struct snd_ymfpci *chip)
2088 {
2089 	long size, playback_ctrl_size;
2090 	int voice, bank, reg;
2091 	u8 *ptr;
2092 	dma_addr_t ptr_addr;
2093 
2094 	playback_ctrl_size = 4 + 4 * YDSXG_PLAYBACK_VOICES;
2095 	chip->bank_size_playback = snd_ymfpci_readl(chip, YDSXGR_PLAYCTRLSIZE) << 2;
2096 	chip->bank_size_capture = snd_ymfpci_readl(chip, YDSXGR_RECCTRLSIZE) << 2;
2097 	chip->bank_size_effect = snd_ymfpci_readl(chip, YDSXGR_EFFCTRLSIZE) << 2;
2098 	chip->work_size = YDSXG_DEFAULT_WORK_SIZE;
2099 
2100 	size = ALIGN(playback_ctrl_size, 0x100) +
2101 	       ALIGN(chip->bank_size_playback * 2 * YDSXG_PLAYBACK_VOICES, 0x100) +
2102 	       ALIGN(chip->bank_size_capture * 2 * YDSXG_CAPTURE_VOICES, 0x100) +
2103 	       ALIGN(chip->bank_size_effect * 2 * YDSXG_EFFECT_VOICES, 0x100) +
2104 	       chip->work_size;
2105 	/* work_ptr must be aligned to 256 bytes, but it's already
2106 	   covered with the kernel page allocation mechanism */
2107 	if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
2108 				size, &chip->work_ptr) < 0)
2109 		return -ENOMEM;
2110 	ptr = chip->work_ptr.area;
2111 	ptr_addr = chip->work_ptr.addr;
2112 	memset(ptr, 0, size);	/* for sure */
2113 
2114 	chip->bank_base_playback = ptr;
2115 	chip->bank_base_playback_addr = ptr_addr;
2116 	chip->ctrl_playback = (u32 *)ptr;
2117 	chip->ctrl_playback[0] = cpu_to_le32(YDSXG_PLAYBACK_VOICES);
2118 	ptr += ALIGN(playback_ctrl_size, 0x100);
2119 	ptr_addr += ALIGN(playback_ctrl_size, 0x100);
2120 	for (voice = 0; voice < YDSXG_PLAYBACK_VOICES; voice++) {
2121 		chip->voices[voice].number = voice;
2122 		chip->voices[voice].bank = (struct snd_ymfpci_playback_bank *)ptr;
2123 		chip->voices[voice].bank_addr = ptr_addr;
2124 		for (bank = 0; bank < 2; bank++) {
2125 			chip->bank_playback[voice][bank] = (struct snd_ymfpci_playback_bank *)ptr;
2126 			ptr += chip->bank_size_playback;
2127 			ptr_addr += chip->bank_size_playback;
2128 		}
2129 	}
2130 	ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
2131 	ptr_addr = ALIGN(ptr_addr, 0x100);
2132 	chip->bank_base_capture = ptr;
2133 	chip->bank_base_capture_addr = ptr_addr;
2134 	for (voice = 0; voice < YDSXG_CAPTURE_VOICES; voice++)
2135 		for (bank = 0; bank < 2; bank++) {
2136 			chip->bank_capture[voice][bank] = (struct snd_ymfpci_capture_bank *)ptr;
2137 			ptr += chip->bank_size_capture;
2138 			ptr_addr += chip->bank_size_capture;
2139 		}
2140 	ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
2141 	ptr_addr = ALIGN(ptr_addr, 0x100);
2142 	chip->bank_base_effect = ptr;
2143 	chip->bank_base_effect_addr = ptr_addr;
2144 	for (voice = 0; voice < YDSXG_EFFECT_VOICES; voice++)
2145 		for (bank = 0; bank < 2; bank++) {
2146 			chip->bank_effect[voice][bank] = (struct snd_ymfpci_effect_bank *)ptr;
2147 			ptr += chip->bank_size_effect;
2148 			ptr_addr += chip->bank_size_effect;
2149 		}
2150 	ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
2151 	ptr_addr = ALIGN(ptr_addr, 0x100);
2152 	chip->work_base = ptr;
2153 	chip->work_base_addr = ptr_addr;
2154 
2155 	snd_BUG_ON(ptr + chip->work_size !=
2156 		   chip->work_ptr.area + chip->work_ptr.bytes);
2157 
2158 	snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, chip->bank_base_playback_addr);
2159 	snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, chip->bank_base_capture_addr);
2160 	snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, chip->bank_base_effect_addr);
2161 	snd_ymfpci_writel(chip, YDSXGR_WORKBASE, chip->work_base_addr);
2162 	snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, chip->work_size >> 2);
2163 
2164 	/* S/PDIF output initialization */
2165 	chip->spdif_bits = chip->spdif_pcm_bits = SNDRV_PCM_DEFAULT_CON_SPDIF & 0xffff;
2166 	snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 0);
2167 	snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
2168 
2169 	/* S/PDIF input initialization */
2170 	snd_ymfpci_writew(chip, YDSXGR_SPDIFINCTRL, 0);
2171 
2172 	/* digital mixer setup */
2173 	for (reg = 0x80; reg < 0xc0; reg += 4)
2174 		snd_ymfpci_writel(chip, reg, 0);
2175 	snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x3fff3fff);
2176 	snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0x3fff3fff);
2177 	snd_ymfpci_writel(chip, YDSXGR_ZVOUTVOL, 0x3fff3fff);
2178 	snd_ymfpci_writel(chip, YDSXGR_SPDIFOUTVOL, 0x3fff3fff);
2179 	snd_ymfpci_writel(chip, YDSXGR_NATIVEADCINVOL, 0x3fff3fff);
2180 	snd_ymfpci_writel(chip, YDSXGR_NATIVEDACINVOL, 0x3fff3fff);
2181 	snd_ymfpci_writel(chip, YDSXGR_PRIADCLOOPVOL, 0x3fff3fff);
2182 	snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0x3fff3fff);
2183 
2184 	return 0;
2185 }
2186 
2187 static int snd_ymfpci_free(struct snd_ymfpci *chip)
2188 {
2189 	u16 ctrl;
2190 
2191 	if (snd_BUG_ON(!chip))
2192 		return -EINVAL;
2193 
2194 	if (chip->res_reg_area) {	/* don't touch busy hardware */
2195 		snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
2196 		snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0);
2197 		snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0);
2198 		snd_ymfpci_writel(chip, YDSXGR_STATUS, ~0);
2199 		snd_ymfpci_disable_dsp(chip);
2200 		snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0);
2201 		snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0);
2202 		snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0);
2203 		snd_ymfpci_writel(chip, YDSXGR_WORKBASE, 0);
2204 		snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, 0);
2205 		ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
2206 		snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
2207 	}
2208 
2209 	snd_ymfpci_ac3_done(chip);
2210 
2211 	/* Set PCI device to D3 state */
2212 #if 0
2213 	/* FIXME: temporarily disabled, otherwise we cannot fire up
2214 	 * the chip again unless reboot.  ACPI bug?
2215 	 */
2216 	pci_set_power_state(chip->pci, 3);
2217 #endif
2218 
2219 #ifdef CONFIG_PM
2220 	vfree(chip->saved_regs);
2221 #endif
2222 	if (chip->irq >= 0)
2223 		free_irq(chip->irq, chip);
2224 	release_and_free_resource(chip->mpu_res);
2225 	release_and_free_resource(chip->fm_res);
2226 	snd_ymfpci_free_gameport(chip);
2227 	if (chip->reg_area_virt)
2228 		iounmap(chip->reg_area_virt);
2229 	if (chip->work_ptr.area)
2230 		snd_dma_free_pages(&chip->work_ptr);
2231 
2232 	release_and_free_resource(chip->res_reg_area);
2233 
2234 	pci_write_config_word(chip->pci, 0x40, chip->old_legacy_ctrl);
2235 
2236 	pci_disable_device(chip->pci);
2237 	release_firmware(chip->dsp_microcode);
2238 	release_firmware(chip->controller_microcode);
2239 	kfree(chip);
2240 	return 0;
2241 }
2242 
2243 static int snd_ymfpci_dev_free(struct snd_device *device)
2244 {
2245 	struct snd_ymfpci *chip = device->device_data;
2246 	return snd_ymfpci_free(chip);
2247 }
2248 
2249 #ifdef CONFIG_PM
2250 static int saved_regs_index[] = {
2251 	/* spdif */
2252 	YDSXGR_SPDIFOUTCTRL,
2253 	YDSXGR_SPDIFOUTSTATUS,
2254 	YDSXGR_SPDIFINCTRL,
2255 	/* volumes */
2256 	YDSXGR_PRIADCLOOPVOL,
2257 	YDSXGR_NATIVEDACINVOL,
2258 	YDSXGR_NATIVEDACOUTVOL,
2259 	YDSXGR_BUF441OUTVOL,
2260 	YDSXGR_NATIVEADCINVOL,
2261 	YDSXGR_SPDIFLOOPVOL,
2262 	YDSXGR_SPDIFOUTVOL,
2263 	YDSXGR_ZVOUTVOL,
2264 	YDSXGR_LEGACYOUTVOL,
2265 	/* address bases */
2266 	YDSXGR_PLAYCTRLBASE,
2267 	YDSXGR_RECCTRLBASE,
2268 	YDSXGR_EFFCTRLBASE,
2269 	YDSXGR_WORKBASE,
2270 	/* capture set up */
2271 	YDSXGR_MAPOFREC,
2272 	YDSXGR_RECFORMAT,
2273 	YDSXGR_RECSLOTSR,
2274 	YDSXGR_ADCFORMAT,
2275 	YDSXGR_ADCSLOTSR,
2276 };
2277 #define YDSXGR_NUM_SAVED_REGS	ARRAY_SIZE(saved_regs_index)
2278 
2279 int snd_ymfpci_suspend(struct pci_dev *pci, pm_message_t state)
2280 {
2281 	struct snd_card *card = pci_get_drvdata(pci);
2282 	struct snd_ymfpci *chip = card->private_data;
2283 	unsigned int i;
2284 
2285 	snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
2286 	snd_pcm_suspend_all(chip->pcm);
2287 	snd_pcm_suspend_all(chip->pcm2);
2288 	snd_pcm_suspend_all(chip->pcm_spdif);
2289 	snd_pcm_suspend_all(chip->pcm_4ch);
2290 	snd_ac97_suspend(chip->ac97);
2291 	for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
2292 		chip->saved_regs[i] = snd_ymfpci_readl(chip, saved_regs_index[i]);
2293 	chip->saved_ydsxgr_mode = snd_ymfpci_readl(chip, YDSXGR_MODE);
2294 	snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
2295 	snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0);
2296 	snd_ymfpci_disable_dsp(chip);
2297 	pci_disable_device(pci);
2298 	pci_save_state(pci);
2299 	pci_set_power_state(pci, pci_choose_state(pci, state));
2300 	return 0;
2301 }
2302 
2303 int snd_ymfpci_resume(struct pci_dev *pci)
2304 {
2305 	struct snd_card *card = pci_get_drvdata(pci);
2306 	struct snd_ymfpci *chip = card->private_data;
2307 	unsigned int i;
2308 
2309 	pci_set_power_state(pci, PCI_D0);
2310 	pci_restore_state(pci);
2311 	if (pci_enable_device(pci) < 0) {
2312 		printk(KERN_ERR "ymfpci: pci_enable_device failed, "
2313 		       "disabling device\n");
2314 		snd_card_disconnect(card);
2315 		return -EIO;
2316 	}
2317 	pci_set_master(pci);
2318 	snd_ymfpci_aclink_reset(pci);
2319 	snd_ymfpci_codec_ready(chip, 0);
2320 	snd_ymfpci_download_image(chip);
2321 	udelay(100);
2322 
2323 	for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
2324 		snd_ymfpci_writel(chip, saved_regs_index[i], chip->saved_regs[i]);
2325 
2326 	snd_ac97_resume(chip->ac97);
2327 
2328 	/* start hw again */
2329 	if (chip->start_count > 0) {
2330 		spin_lock_irq(&chip->reg_lock);
2331 		snd_ymfpci_writel(chip, YDSXGR_MODE, chip->saved_ydsxgr_mode);
2332 		chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT);
2333 		spin_unlock_irq(&chip->reg_lock);
2334 	}
2335 	snd_power_change_state(card, SNDRV_CTL_POWER_D0);
2336 	return 0;
2337 }
2338 #endif /* CONFIG_PM */
2339 
2340 int __devinit snd_ymfpci_create(struct snd_card *card,
2341 				struct pci_dev * pci,
2342 				unsigned short old_legacy_ctrl,
2343 				struct snd_ymfpci ** rchip)
2344 {
2345 	struct snd_ymfpci *chip;
2346 	int err;
2347 	static struct snd_device_ops ops = {
2348 		.dev_free =	snd_ymfpci_dev_free,
2349 	};
2350 
2351 	*rchip = NULL;
2352 
2353 	/* enable PCI device */
2354 	if ((err = pci_enable_device(pci)) < 0)
2355 		return err;
2356 
2357 	chip = kzalloc(sizeof(*chip), GFP_KERNEL);
2358 	if (chip == NULL) {
2359 		pci_disable_device(pci);
2360 		return -ENOMEM;
2361 	}
2362 	chip->old_legacy_ctrl = old_legacy_ctrl;
2363 	spin_lock_init(&chip->reg_lock);
2364 	spin_lock_init(&chip->voice_lock);
2365 	init_waitqueue_head(&chip->interrupt_sleep);
2366 	atomic_set(&chip->interrupt_sleep_count, 0);
2367 	chip->card = card;
2368 	chip->pci = pci;
2369 	chip->irq = -1;
2370 	chip->device_id = pci->device;
2371 	chip->rev = pci->revision;
2372 	chip->reg_area_phys = pci_resource_start(pci, 0);
2373 	chip->reg_area_virt = ioremap_nocache(chip->reg_area_phys, 0x8000);
2374 	pci_set_master(pci);
2375 	chip->src441_used = -1;
2376 
2377 	if ((chip->res_reg_area = request_mem_region(chip->reg_area_phys, 0x8000, "YMFPCI")) == NULL) {
2378 		snd_printk(KERN_ERR "unable to grab memory region 0x%lx-0x%lx\n", chip->reg_area_phys, chip->reg_area_phys + 0x8000 - 1);
2379 		snd_ymfpci_free(chip);
2380 		return -EBUSY;
2381 	}
2382 	if (request_irq(pci->irq, snd_ymfpci_interrupt, IRQF_SHARED,
2383 			"YMFPCI", chip)) {
2384 		snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
2385 		snd_ymfpci_free(chip);
2386 		return -EBUSY;
2387 	}
2388 	chip->irq = pci->irq;
2389 
2390 	snd_ymfpci_aclink_reset(pci);
2391 	if (snd_ymfpci_codec_ready(chip, 0) < 0) {
2392 		snd_ymfpci_free(chip);
2393 		return -EIO;
2394 	}
2395 
2396 	err = snd_ymfpci_request_firmware(chip);
2397 	if (err < 0) {
2398 		snd_printk(KERN_ERR "firmware request failed: %d\n", err);
2399 		snd_ymfpci_free(chip);
2400 		return err;
2401 	}
2402 	snd_ymfpci_download_image(chip);
2403 
2404 	udelay(100); /* seems we need a delay after downloading image.. */
2405 
2406 	if (snd_ymfpci_memalloc(chip) < 0) {
2407 		snd_ymfpci_free(chip);
2408 		return -EIO;
2409 	}
2410 
2411 	if ((err = snd_ymfpci_ac3_init(chip)) < 0) {
2412 		snd_ymfpci_free(chip);
2413 		return err;
2414 	}
2415 
2416 #ifdef CONFIG_PM
2417 	chip->saved_regs = vmalloc(YDSXGR_NUM_SAVED_REGS * sizeof(u32));
2418 	if (chip->saved_regs == NULL) {
2419 		snd_ymfpci_free(chip);
2420 		return -ENOMEM;
2421 	}
2422 #endif
2423 
2424 	if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
2425 		snd_ymfpci_free(chip);
2426 		return err;
2427 	}
2428 
2429 	snd_ymfpci_proc_init(card, chip);
2430 
2431 	snd_card_set_dev(card, &pci->dev);
2432 
2433 	*rchip = chip;
2434 	return 0;
2435 }
2436