xref: /openbmc/linux/sound/pci/vx222/vx222.h (revision d3964221)
1 /*
2  * Driver for Digigram VX222 PCI soundcards
3  *
4  * Copyright (c) 2002 by Takashi Iwai <tiwai@suse.de>
5  *
6  *   This program is free software; you can redistribute it and/or modify
7  *   it under the terms of the GNU General Public License as published by
8  *   the Free Software Foundation; either version 2 of the License, or
9  *   (at your option) any later version.
10  *
11  *   This program is distributed in the hope that it will be useful,
12  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
13  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  *   GNU General Public License for more details.
15  *
16  *   You should have received a copy of the GNU General Public License
17  *   along with this program; if not, write to the Free Software
18  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
19  */
20 
21 #ifndef __VX222_H
22 #define __VX222_H
23 
24 #include <sound/vx_core.h>
25 
26 struct snd_vx222 {
27 
28 	struct vx_core core;
29 
30 	/* h/w config; for PLX and for DSP */
31 	struct pci_dev *pci;
32 	unsigned long port[2];
33 
34 	unsigned int regCDSP;	/* current CDSP register */
35 	unsigned int regCFG;	/* current CFG register */
36 	unsigned int regSELMIC;	/* current SELMIC reg. (for VX222 Mic) */
37 
38 	int input_level[2];	/* input level for vx222 mic */
39 	int mic_level;		/* mic level for vx222 mic */
40 };
41 
42 #define to_vx222(x)	container_of(x, struct snd_vx222, core)
43 
44 /* we use a lookup table with 148 values, see vx_mixer.c */
45 #define VX2_AKM_LEVEL_MAX	0x93
46 
47 extern struct snd_vx_ops vx222_ops;
48 extern struct snd_vx_ops vx222_old_ops;
49 
50 /* Offset of registers with base equal to portDSP. */
51 #define VX_RESET_DMA_REGISTER_OFFSET    0x00000008
52 
53 /* Constants used to access the INTCSR register. */
54 #define VX_INTCSR_VALUE                 0x00000001
55 #define VX_PCI_INTERRUPT_MASK           0x00000040
56 
57 /* Constants used to access the CDSP register (0x20). */
58 #define VX_CDSP_TEST1_MASK              0x00000080
59 #define VX_CDSP_TOR1_MASK               0x00000040
60 #define VX_CDSP_TOR2_MASK               0x00000020
61 #define VX_CDSP_RESERVED0_0_MASK        0x00000010
62 #define VX_CDSP_CODEC_RESET_MASK        0x00000008
63 #define VX_CDSP_VALID_IRQ_MASK          0x00000004
64 #define VX_CDSP_TEST0_MASK              0x00000002
65 #define VX_CDSP_DSP_RESET_MASK          0x00000001
66 
67 #define VX_CDSP_GPIO_OUT_MASK           0x00000060
68 #define VX_GPIO_OUT_BIT_OFFSET          5               // transform output to bit 0 and 1
69 
70 /* Constants used to access the CFG register (0x24). */
71 #define VX_CFG_SYNCDSP_MASK             0x00000080
72 #define VX_CFG_RESERVED0_0_MASK         0x00000040
73 #define VX_CFG_RESERVED1_0_MASK         0x00000020
74 #define VX_CFG_RESERVED2_0_MASK         0x00000010
75 #define VX_CFG_DATAIN_SEL_MASK          0x00000008     // 0 (ana), 1 (UER)
76 #define VX_CFG_RESERVED3_0_MASK         0x00000004
77 #define VX_CFG_RESERVED4_0_MASK         0x00000002
78 #define VX_CFG_CLOCKIN_SEL_MASK         0x00000001     // 0 (internal), 1 (AES/EBU)
79 
80 /* Constants used to access the STATUS register (0x30). */
81 #define VX_STATUS_DATA_XICOR_MASK       0x00000080
82 #define VX_STATUS_VAL_TEST1_MASK        0x00000040
83 #define VX_STATUS_VAL_TEST0_MASK        0x00000020
84 #define VX_STATUS_RESERVED0_MASK        0x00000010
85 #define VX_STATUS_VAL_TOR1_MASK         0x00000008
86 #define VX_STATUS_VAL_TOR0_MASK         0x00000004
87 #define VX_STATUS_LEVEL_IN_MASK         0x00000002    // 6 dBu (0), 22 dBu (1)
88 #define VX_STATUS_MEMIRQ_MASK           0x00000001
89 
90 #define VX_STATUS_GPIO_IN_MASK          0x0000000C
91 #define VX_GPIO_IN_BIT_OFFSET           0             // leave input as bit 2 and 3
92 
93 /* Constants used to access the MICRO INPUT SELECT register (0x40). */
94 #define MICRO_SELECT_INPUT_NORM        0x00
95 #define MICRO_SELECT_INPUT_MUTE        0x01
96 #define MICRO_SELECT_INPUT_LIMIT       0x02
97 #define MICRO_SELECT_INPUT_MASK        0x03
98 
99 #define MICRO_SELECT_PREAMPLI_G_0      0x00
100 #define MICRO_SELECT_PREAMPLI_G_1      0x04
101 #define MICRO_SELECT_PREAMPLI_G_2      0x08
102 #define MICRO_SELECT_PREAMPLI_G_3      0x0C
103 #define MICRO_SELECT_PREAMPLI_MASK     0x0C
104 #define MICRO_SELECT_PREAMPLI_OFFSET   2
105 
106 #define MICRO_SELECT_RAISE_COMPR       0x10
107 
108 #define MICRO_SELECT_NOISE_T_52DB      0x00
109 #define MICRO_SELECT_NOISE_T_42DB      0x20
110 #define MICRO_SELECT_NOISE_T_32DB      0x40
111 #define MICRO_SELECT_NOISE_T_MASK      0x60
112 
113 #define MICRO_SELECT_PHANTOM_ALIM      0x80
114 
115 
116 #endif /* __VX222_H */
117