11a59d1b8SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */ 21da177e4SLinus Torvalds /* 31da177e4SLinus Torvalds * Driver for Digigram VX222 PCI soundcards 41da177e4SLinus Torvalds * 51da177e4SLinus Torvalds * Copyright (c) 2002 by Takashi Iwai <tiwai@suse.de> 61da177e4SLinus Torvalds */ 71da177e4SLinus Torvalds 81da177e4SLinus Torvalds #ifndef __VX222_H 91da177e4SLinus Torvalds #define __VX222_H 101da177e4SLinus Torvalds 111da177e4SLinus Torvalds #include <sound/vx_core.h> 121da177e4SLinus Torvalds 131da177e4SLinus Torvalds struct snd_vx222 { 141da177e4SLinus Torvalds 15af26367fSTakashi Iwai struct vx_core core; 161da177e4SLinus Torvalds 171da177e4SLinus Torvalds /* h/w config; for PLX and for DSP */ 181da177e4SLinus Torvalds struct pci_dev *pci; 191da177e4SLinus Torvalds unsigned long port[2]; 201da177e4SLinus Torvalds 211da177e4SLinus Torvalds unsigned int regCDSP; /* current CDSP register */ 221da177e4SLinus Torvalds unsigned int regCFG; /* current CFG register */ 231da177e4SLinus Torvalds unsigned int regSELMIC; /* current SELMIC reg. (for VX222 Mic) */ 241da177e4SLinus Torvalds 251da177e4SLinus Torvalds int input_level[2]; /* input level for vx222 mic */ 261da177e4SLinus Torvalds int mic_level; /* mic level for vx222 mic */ 271da177e4SLinus Torvalds }; 281da177e4SLinus Torvalds 295f976f58STakashi Iwai #define to_vx222(x) container_of(x, struct snd_vx222, core) 305f976f58STakashi Iwai 311da177e4SLinus Torvalds /* we use a lookup table with 148 values, see vx_mixer.c */ 321da177e4SLinus Torvalds #define VX2_AKM_LEVEL_MAX 0x93 331da177e4SLinus Torvalds 34f8ae2d29STakashi Iwai extern const struct snd_vx_ops vx222_ops; 35f8ae2d29STakashi Iwai extern const struct snd_vx_ops vx222_old_ops; 361da177e4SLinus Torvalds 371da177e4SLinus Torvalds /* Offset of registers with base equal to portDSP. */ 381da177e4SLinus Torvalds #define VX_RESET_DMA_REGISTER_OFFSET 0x00000008 391da177e4SLinus Torvalds 401da177e4SLinus Torvalds /* Constants used to access the INTCSR register. */ 411da177e4SLinus Torvalds #define VX_INTCSR_VALUE 0x00000001 421da177e4SLinus Torvalds #define VX_PCI_INTERRUPT_MASK 0x00000040 431da177e4SLinus Torvalds 441da177e4SLinus Torvalds /* Constants used to access the CDSP register (0x20). */ 451da177e4SLinus Torvalds #define VX_CDSP_TEST1_MASK 0x00000080 461da177e4SLinus Torvalds #define VX_CDSP_TOR1_MASK 0x00000040 471da177e4SLinus Torvalds #define VX_CDSP_TOR2_MASK 0x00000020 481da177e4SLinus Torvalds #define VX_CDSP_RESERVED0_0_MASK 0x00000010 491da177e4SLinus Torvalds #define VX_CDSP_CODEC_RESET_MASK 0x00000008 501da177e4SLinus Torvalds #define VX_CDSP_VALID_IRQ_MASK 0x00000004 511da177e4SLinus Torvalds #define VX_CDSP_TEST0_MASK 0x00000002 521da177e4SLinus Torvalds #define VX_CDSP_DSP_RESET_MASK 0x00000001 531da177e4SLinus Torvalds 541da177e4SLinus Torvalds #define VX_CDSP_GPIO_OUT_MASK 0x00000060 551da177e4SLinus Torvalds #define VX_GPIO_OUT_BIT_OFFSET 5 // transform output to bit 0 and 1 561da177e4SLinus Torvalds 571da177e4SLinus Torvalds /* Constants used to access the CFG register (0x24). */ 581da177e4SLinus Torvalds #define VX_CFG_SYNCDSP_MASK 0x00000080 591da177e4SLinus Torvalds #define VX_CFG_RESERVED0_0_MASK 0x00000040 601da177e4SLinus Torvalds #define VX_CFG_RESERVED1_0_MASK 0x00000020 611da177e4SLinus Torvalds #define VX_CFG_RESERVED2_0_MASK 0x00000010 621da177e4SLinus Torvalds #define VX_CFG_DATAIN_SEL_MASK 0x00000008 // 0 (ana), 1 (UER) 631da177e4SLinus Torvalds #define VX_CFG_RESERVED3_0_MASK 0x00000004 641da177e4SLinus Torvalds #define VX_CFG_RESERVED4_0_MASK 0x00000002 651da177e4SLinus Torvalds #define VX_CFG_CLOCKIN_SEL_MASK 0x00000001 // 0 (internal), 1 (AES/EBU) 661da177e4SLinus Torvalds 671da177e4SLinus Torvalds /* Constants used to access the STATUS register (0x30). */ 681da177e4SLinus Torvalds #define VX_STATUS_DATA_XICOR_MASK 0x00000080 691da177e4SLinus Torvalds #define VX_STATUS_VAL_TEST1_MASK 0x00000040 701da177e4SLinus Torvalds #define VX_STATUS_VAL_TEST0_MASK 0x00000020 711da177e4SLinus Torvalds #define VX_STATUS_RESERVED0_MASK 0x00000010 721da177e4SLinus Torvalds #define VX_STATUS_VAL_TOR1_MASK 0x00000008 731da177e4SLinus Torvalds #define VX_STATUS_VAL_TOR0_MASK 0x00000004 741da177e4SLinus Torvalds #define VX_STATUS_LEVEL_IN_MASK 0x00000002 // 6 dBu (0), 22 dBu (1) 751da177e4SLinus Torvalds #define VX_STATUS_MEMIRQ_MASK 0x00000001 761da177e4SLinus Torvalds 771da177e4SLinus Torvalds #define VX_STATUS_GPIO_IN_MASK 0x0000000C 781da177e4SLinus Torvalds #define VX_GPIO_IN_BIT_OFFSET 0 // leave input as bit 2 and 3 791da177e4SLinus Torvalds 801da177e4SLinus Torvalds /* Constants used to access the MICRO INPUT SELECT register (0x40). */ 811da177e4SLinus Torvalds #define MICRO_SELECT_INPUT_NORM 0x00 821da177e4SLinus Torvalds #define MICRO_SELECT_INPUT_MUTE 0x01 831da177e4SLinus Torvalds #define MICRO_SELECT_INPUT_LIMIT 0x02 841da177e4SLinus Torvalds #define MICRO_SELECT_INPUT_MASK 0x03 851da177e4SLinus Torvalds 861da177e4SLinus Torvalds #define MICRO_SELECT_PREAMPLI_G_0 0x00 871da177e4SLinus Torvalds #define MICRO_SELECT_PREAMPLI_G_1 0x04 881da177e4SLinus Torvalds #define MICRO_SELECT_PREAMPLI_G_2 0x08 891da177e4SLinus Torvalds #define MICRO_SELECT_PREAMPLI_G_3 0x0C 901da177e4SLinus Torvalds #define MICRO_SELECT_PREAMPLI_MASK 0x0C 911da177e4SLinus Torvalds #define MICRO_SELECT_PREAMPLI_OFFSET 2 921da177e4SLinus Torvalds 931da177e4SLinus Torvalds #define MICRO_SELECT_RAISE_COMPR 0x10 941da177e4SLinus Torvalds 951da177e4SLinus Torvalds #define MICRO_SELECT_NOISE_T_52DB 0x00 961da177e4SLinus Torvalds #define MICRO_SELECT_NOISE_T_42DB 0x20 971da177e4SLinus Torvalds #define MICRO_SELECT_NOISE_T_32DB 0x40 981da177e4SLinus Torvalds #define MICRO_SELECT_NOISE_T_MASK 0x60 991da177e4SLinus Torvalds 1001da177e4SLinus Torvalds #define MICRO_SELECT_PHANTOM_ALIM 0x80 1011da177e4SLinus Torvalds 1021da177e4SLinus Torvalds 1031da177e4SLinus Torvalds #endif /* __VX222_H */ 104