1 /* 2 * ALSA driver for RME Digi9652 audio interfaces 3 * 4 * Copyright (c) 1999 IEM - Winfried Ritsch 5 * Copyright (c) 1999-2001 Paul Davis 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 20 * 21 */ 22 23 #include <linux/delay.h> 24 #include <linux/init.h> 25 #include <linux/interrupt.h> 26 #include <linux/pci.h> 27 #include <linux/module.h> 28 29 #include <sound/core.h> 30 #include <sound/control.h> 31 #include <sound/pcm.h> 32 #include <sound/info.h> 33 #include <sound/asoundef.h> 34 #include <sound/initval.h> 35 36 #include <asm/current.h> 37 #include <asm/io.h> 38 39 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 40 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 41 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ 42 static bool precise_ptr[SNDRV_CARDS]; /* Enable precise pointer */ 43 44 module_param_array(index, int, NULL, 0444); 45 MODULE_PARM_DESC(index, "Index value for RME Digi9652 (Hammerfall) soundcard."); 46 module_param_array(id, charp, NULL, 0444); 47 MODULE_PARM_DESC(id, "ID string for RME Digi9652 (Hammerfall) soundcard."); 48 module_param_array(enable, bool, NULL, 0444); 49 MODULE_PARM_DESC(enable, "Enable/disable specific RME96{52,36} soundcards."); 50 module_param_array(precise_ptr, bool, NULL, 0444); 51 MODULE_PARM_DESC(precise_ptr, "Enable precise pointer (doesn't work reliably)."); 52 MODULE_AUTHOR("Paul Davis <pbd@op.net>, Winfried Ritsch"); 53 MODULE_DESCRIPTION("RME Digi9652/Digi9636"); 54 MODULE_LICENSE("GPL"); 55 MODULE_SUPPORTED_DEVICE("{{RME,Hammerfall}," 56 "{RME,Hammerfall-Light}}"); 57 58 /* The Hammerfall has two sets of 24 ADAT + 2 S/PDIF channels, one for 59 capture, one for playback. Both the ADAT and S/PDIF channels appear 60 to the host CPU in the same block of memory. There is no functional 61 difference between them in terms of access. 62 63 The Hammerfall Light is identical to the Hammerfall, except that it 64 has 2 sets 18 channels (16 ADAT + 2 S/PDIF) for capture and playback. 65 */ 66 67 #define RME9652_NCHANNELS 26 68 #define RME9636_NCHANNELS 18 69 70 /* Preferred sync source choices - used by "sync_pref" control switch */ 71 72 #define RME9652_SYNC_FROM_SPDIF 0 73 #define RME9652_SYNC_FROM_ADAT1 1 74 #define RME9652_SYNC_FROM_ADAT2 2 75 #define RME9652_SYNC_FROM_ADAT3 3 76 77 /* Possible sources of S/PDIF input */ 78 79 #define RME9652_SPDIFIN_OPTICAL 0 /* optical (ADAT1) */ 80 #define RME9652_SPDIFIN_COAXIAL 1 /* coaxial (RCA) */ 81 #define RME9652_SPDIFIN_INTERN 2 /* internal (CDROM) */ 82 83 /* ------------- Status-Register bits --------------------- */ 84 85 #define RME9652_IRQ (1<<0) /* IRQ is High if not reset by irq_clear */ 86 #define RME9652_lock_2 (1<<1) /* ADAT 3-PLL: 1=locked, 0=unlocked */ 87 #define RME9652_lock_1 (1<<2) /* ADAT 2-PLL: 1=locked, 0=unlocked */ 88 #define RME9652_lock_0 (1<<3) /* ADAT 1-PLL: 1=locked, 0=unlocked */ 89 #define RME9652_fs48 (1<<4) /* sample rate is 0=44.1/88.2,1=48/96 Khz */ 90 #define RME9652_wsel_rd (1<<5) /* if Word-Clock is used and valid then 1 */ 91 /* bits 6-15 encode h/w buffer pointer position */ 92 #define RME9652_sync_2 (1<<16) /* if ADAT-IN 3 in sync to system clock */ 93 #define RME9652_sync_1 (1<<17) /* if ADAT-IN 2 in sync to system clock */ 94 #define RME9652_sync_0 (1<<18) /* if ADAT-IN 1 in sync to system clock */ 95 #define RME9652_DS_rd (1<<19) /* 1=Double Speed Mode, 0=Normal Speed */ 96 #define RME9652_tc_busy (1<<20) /* 1=time-code copy in progress (960ms) */ 97 #define RME9652_tc_out (1<<21) /* time-code out bit */ 98 #define RME9652_F_0 (1<<22) /* 000=64kHz, 100=88.2kHz, 011=96kHz */ 99 #define RME9652_F_1 (1<<23) /* 111=32kHz, 110=44.1kHz, 101=48kHz, */ 100 #define RME9652_F_2 (1<<24) /* external Crystal Chip if ERF=1 */ 101 #define RME9652_ERF (1<<25) /* Error-Flag of SDPIF Receiver (1=No Lock) */ 102 #define RME9652_buffer_id (1<<26) /* toggles by each interrupt on rec/play */ 103 #define RME9652_tc_valid (1<<27) /* 1 = a signal is detected on time-code input */ 104 #define RME9652_SPDIF_READ (1<<28) /* byte available from Rev 1.5+ S/PDIF interface */ 105 106 #define RME9652_sync (RME9652_sync_0|RME9652_sync_1|RME9652_sync_2) 107 #define RME9652_lock (RME9652_lock_0|RME9652_lock_1|RME9652_lock_2) 108 #define RME9652_F (RME9652_F_0|RME9652_F_1|RME9652_F_2) 109 #define rme9652_decode_spdif_rate(x) ((x)>>22) 110 111 /* Bit 6..15 : h/w buffer pointer */ 112 113 #define RME9652_buf_pos 0x000FFC0 114 115 /* Bits 31,30,29 are bits 5,4,3 of h/w pointer position on later 116 Rev G EEPROMS and Rev 1.5 cards or later. 117 */ 118 119 #define RME9652_REV15_buf_pos(x) ((((x)&0xE0000000)>>26)|((x)&RME9652_buf_pos)) 120 121 /* amount of io space we remap for register access. i'm not sure we 122 even need this much, but 1K is nice round number :) 123 */ 124 125 #define RME9652_IO_EXTENT 1024 126 127 #define RME9652_init_buffer 0 128 #define RME9652_play_buffer 32 /* holds ptr to 26x64kBit host RAM */ 129 #define RME9652_rec_buffer 36 /* holds ptr to 26x64kBit host RAM */ 130 #define RME9652_control_register 64 131 #define RME9652_irq_clear 96 132 #define RME9652_time_code 100 /* useful if used with alesis adat */ 133 #define RME9652_thru_base 128 /* 132...228 Thru for 26 channels */ 134 135 /* Read-only registers */ 136 137 /* Writing to any of the register locations writes to the status 138 register. We'll use the first location as our point of access. 139 */ 140 141 #define RME9652_status_register 0 142 143 /* --------- Control-Register Bits ---------------- */ 144 145 146 #define RME9652_start_bit (1<<0) /* start record/play */ 147 /* bits 1-3 encode buffersize/latency */ 148 #define RME9652_Master (1<<4) /* Clock Mode Master=1,Slave/Auto=0 */ 149 #define RME9652_IE (1<<5) /* Interrupt Enable */ 150 #define RME9652_freq (1<<6) /* samplerate 0=44.1/88.2, 1=48/96 kHz */ 151 #define RME9652_freq1 (1<<7) /* if 0, 32kHz, else always 1 */ 152 #define RME9652_DS (1<<8) /* Doule Speed 0=44.1/48, 1=88.2/96 Khz */ 153 #define RME9652_PRO (1<<9) /* S/PDIF out: 0=consumer, 1=professional */ 154 #define RME9652_EMP (1<<10) /* Emphasis 0=None, 1=ON */ 155 #define RME9652_Dolby (1<<11) /* Non-audio bit 1=set, 0=unset */ 156 #define RME9652_opt_out (1<<12) /* Use 1st optical OUT as SPDIF: 1=yes,0=no */ 157 #define RME9652_wsel (1<<13) /* use Wordclock as sync (overwrites master) */ 158 #define RME9652_inp_0 (1<<14) /* SPDIF-IN: 00=optical (ADAT1), */ 159 #define RME9652_inp_1 (1<<15) /* 01=koaxial (Cinch), 10=Internal CDROM */ 160 #define RME9652_SyncPref_ADAT2 (1<<16) 161 #define RME9652_SyncPref_ADAT3 (1<<17) 162 #define RME9652_SPDIF_RESET (1<<18) /* Rev 1.5+: h/w S/PDIF receiver */ 163 #define RME9652_SPDIF_SELECT (1<<19) 164 #define RME9652_SPDIF_CLOCK (1<<20) 165 #define RME9652_SPDIF_WRITE (1<<21) 166 #define RME9652_ADAT1_INTERNAL (1<<22) /* Rev 1.5+: if set, internal CD connector carries ADAT */ 167 168 /* buffersize = 512Bytes * 2^n, where n is made from Bit2 ... Bit0 */ 169 170 #define RME9652_latency 0x0e 171 #define rme9652_encode_latency(x) (((x)&0x7)<<1) 172 #define rme9652_decode_latency(x) (((x)>>1)&0x7) 173 #define rme9652_running_double_speed(s) ((s)->control_register & RME9652_DS) 174 #define RME9652_inp (RME9652_inp_0|RME9652_inp_1) 175 #define rme9652_encode_spdif_in(x) (((x)&0x3)<<14) 176 #define rme9652_decode_spdif_in(x) (((x)>>14)&0x3) 177 178 #define RME9652_SyncPref_Mask (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3) 179 #define RME9652_SyncPref_ADAT1 0 180 #define RME9652_SyncPref_SPDIF (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3) 181 182 /* the size of a substream (1 mono data stream) */ 183 184 #define RME9652_CHANNEL_BUFFER_SAMPLES (16*1024) 185 #define RME9652_CHANNEL_BUFFER_BYTES (4*RME9652_CHANNEL_BUFFER_SAMPLES) 186 187 /* the size of the area we need to allocate for DMA transfers. the 188 size is the same regardless of the number of channels - the 189 9636 still uses the same memory area. 190 191 Note that we allocate 1 more channel than is apparently needed 192 because the h/w seems to write 1 byte beyond the end of the last 193 page. Sigh. 194 */ 195 196 #define RME9652_DMA_AREA_BYTES ((RME9652_NCHANNELS+1) * RME9652_CHANNEL_BUFFER_BYTES) 197 #define RME9652_DMA_AREA_KILOBYTES (RME9652_DMA_AREA_BYTES/1024) 198 199 struct snd_rme9652 { 200 int dev; 201 202 spinlock_t lock; 203 int irq; 204 unsigned long port; 205 void __iomem *iobase; 206 207 int precise_ptr; 208 209 u32 control_register; /* cached value */ 210 u32 thru_bits; /* thru 1=on, 0=off channel 1=Bit1... channel 26= Bit26 */ 211 212 u32 creg_spdif; 213 u32 creg_spdif_stream; 214 215 char *card_name; /* hammerfall or hammerfall light names */ 216 217 size_t hw_offsetmask; /* &-with status register to get real hw_offset */ 218 size_t prev_hw_offset; /* previous hw offset */ 219 size_t max_jitter; /* maximum jitter in frames for 220 hw pointer */ 221 size_t period_bytes; /* guess what this is */ 222 223 unsigned char ds_channels; 224 unsigned char ss_channels; /* different for hammerfall/hammerfall-light */ 225 226 struct snd_dma_buffer playback_dma_buf; 227 struct snd_dma_buffer capture_dma_buf; 228 229 unsigned char *capture_buffer; /* suitably aligned address */ 230 unsigned char *playback_buffer; /* suitably aligned address */ 231 232 pid_t capture_pid; 233 pid_t playback_pid; 234 235 struct snd_pcm_substream *capture_substream; 236 struct snd_pcm_substream *playback_substream; 237 int running; 238 239 int passthru; /* non-zero if doing pass-thru */ 240 int hw_rev; /* h/w rev * 10 (i.e. 1.5 has hw_rev = 15) */ 241 242 int last_spdif_sample_rate; /* so that we can catch externally ... */ 243 int last_adat_sample_rate; /* ... induced rate changes */ 244 245 char *channel_map; 246 247 struct snd_card *card; 248 struct snd_pcm *pcm; 249 struct pci_dev *pci; 250 struct snd_kcontrol *spdif_ctl; 251 252 }; 253 254 /* These tables map the ALSA channels 1..N to the channels that we 255 need to use in order to find the relevant channel buffer. RME 256 refer to this kind of mapping as between "the ADAT channel and 257 the DMA channel." We index it using the logical audio channel, 258 and the value is the DMA channel (i.e. channel buffer number) 259 where the data for that channel can be read/written from/to. 260 */ 261 262 static char channel_map_9652_ss[26] = { 263 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 264 18, 19, 20, 21, 22, 23, 24, 25 265 }; 266 267 static char channel_map_9636_ss[26] = { 268 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 269 /* channels 16 and 17 are S/PDIF */ 270 24, 25, 271 /* channels 18-25 don't exist */ 272 -1, -1, -1, -1, -1, -1, -1, -1 273 }; 274 275 static char channel_map_9652_ds[26] = { 276 /* ADAT channels are remapped */ 277 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 278 /* channels 12 and 13 are S/PDIF */ 279 24, 25, 280 /* others don't exist */ 281 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 282 }; 283 284 static char channel_map_9636_ds[26] = { 285 /* ADAT channels are remapped */ 286 1, 3, 5, 7, 9, 11, 13, 15, 287 /* channels 8 and 9 are S/PDIF */ 288 24, 25 289 /* others don't exist */ 290 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 291 }; 292 293 static int snd_hammerfall_get_buffer(struct pci_dev *pci, struct snd_dma_buffer *dmab, size_t size) 294 { 295 dmab->dev.type = SNDRV_DMA_TYPE_DEV; 296 dmab->dev.dev = snd_dma_pci_data(pci); 297 if (snd_dma_get_reserved_buf(dmab, snd_dma_pci_buf_id(pci))) { 298 if (dmab->bytes >= size) 299 return 0; 300 } 301 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci), 302 size, dmab) < 0) 303 return -ENOMEM; 304 return 0; 305 } 306 307 static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci) 308 { 309 if (dmab->area) { 310 dmab->dev.dev = NULL; /* make it anonymous */ 311 snd_dma_reserve_buf(dmab, snd_dma_pci_buf_id(pci)); 312 } 313 } 314 315 316 static DEFINE_PCI_DEVICE_TABLE(snd_rme9652_ids) = { 317 { 318 .vendor = 0x10ee, 319 .device = 0x3fc4, 320 .subvendor = PCI_ANY_ID, 321 .subdevice = PCI_ANY_ID, 322 }, /* RME Digi9652 */ 323 { 0, }, 324 }; 325 326 MODULE_DEVICE_TABLE(pci, snd_rme9652_ids); 327 328 static inline void rme9652_write(struct snd_rme9652 *rme9652, int reg, int val) 329 { 330 writel(val, rme9652->iobase + reg); 331 } 332 333 static inline unsigned int rme9652_read(struct snd_rme9652 *rme9652, int reg) 334 { 335 return readl(rme9652->iobase + reg); 336 } 337 338 static inline int snd_rme9652_use_is_exclusive(struct snd_rme9652 *rme9652) 339 { 340 unsigned long flags; 341 int ret = 1; 342 343 spin_lock_irqsave(&rme9652->lock, flags); 344 if ((rme9652->playback_pid != rme9652->capture_pid) && 345 (rme9652->playback_pid >= 0) && (rme9652->capture_pid >= 0)) { 346 ret = 0; 347 } 348 spin_unlock_irqrestore(&rme9652->lock, flags); 349 return ret; 350 } 351 352 static inline int rme9652_adat_sample_rate(struct snd_rme9652 *rme9652) 353 { 354 if (rme9652_running_double_speed(rme9652)) { 355 return (rme9652_read(rme9652, RME9652_status_register) & 356 RME9652_fs48) ? 96000 : 88200; 357 } else { 358 return (rme9652_read(rme9652, RME9652_status_register) & 359 RME9652_fs48) ? 48000 : 44100; 360 } 361 } 362 363 static inline void rme9652_compute_period_size(struct snd_rme9652 *rme9652) 364 { 365 unsigned int i; 366 367 i = rme9652->control_register & RME9652_latency; 368 rme9652->period_bytes = 1 << ((rme9652_decode_latency(i) + 8)); 369 rme9652->hw_offsetmask = 370 (rme9652->period_bytes * 2 - 1) & RME9652_buf_pos; 371 rme9652->max_jitter = 80; 372 } 373 374 static snd_pcm_uframes_t rme9652_hw_pointer(struct snd_rme9652 *rme9652) 375 { 376 int status; 377 unsigned int offset, frag; 378 snd_pcm_uframes_t period_size = rme9652->period_bytes / 4; 379 snd_pcm_sframes_t delta; 380 381 status = rme9652_read(rme9652, RME9652_status_register); 382 if (!rme9652->precise_ptr) 383 return (status & RME9652_buffer_id) ? period_size : 0; 384 offset = status & RME9652_buf_pos; 385 386 /* The hardware may give a backward movement for up to 80 frames 387 Martin Kirst <martin.kirst@freenet.de> knows the details. 388 */ 389 390 delta = rme9652->prev_hw_offset - offset; 391 delta &= 0xffff; 392 if (delta <= (snd_pcm_sframes_t)rme9652->max_jitter * 4) 393 offset = rme9652->prev_hw_offset; 394 else 395 rme9652->prev_hw_offset = offset; 396 offset &= rme9652->hw_offsetmask; 397 offset /= 4; 398 frag = status & RME9652_buffer_id; 399 400 if (offset < period_size) { 401 if (offset > rme9652->max_jitter) { 402 if (frag) 403 printk(KERN_ERR "Unexpected hw_pointer position (bufid == 0): status: %x offset: %d\n", status, offset); 404 } else if (!frag) 405 return 0; 406 offset -= rme9652->max_jitter; 407 if ((int)offset < 0) 408 offset += period_size * 2; 409 } else { 410 if (offset > period_size + rme9652->max_jitter) { 411 if (!frag) 412 printk(KERN_ERR "Unexpected hw_pointer position (bufid == 1): status: %x offset: %d\n", status, offset); 413 } else if (frag) 414 return period_size; 415 offset -= rme9652->max_jitter; 416 } 417 418 return offset; 419 } 420 421 static inline void rme9652_reset_hw_pointer(struct snd_rme9652 *rme9652) 422 { 423 int i; 424 425 /* reset the FIFO pointer to zero. We do this by writing to 8 426 registers, each of which is a 32bit wide register, and set 427 them all to zero. Note that s->iobase is a pointer to 428 int32, not pointer to char. 429 */ 430 431 for (i = 0; i < 8; i++) { 432 rme9652_write(rme9652, i * 4, 0); 433 udelay(10); 434 } 435 rme9652->prev_hw_offset = 0; 436 } 437 438 static inline void rme9652_start(struct snd_rme9652 *s) 439 { 440 s->control_register |= (RME9652_IE | RME9652_start_bit); 441 rme9652_write(s, RME9652_control_register, s->control_register); 442 } 443 444 static inline void rme9652_stop(struct snd_rme9652 *s) 445 { 446 s->control_register &= ~(RME9652_start_bit | RME9652_IE); 447 rme9652_write(s, RME9652_control_register, s->control_register); 448 } 449 450 static int rme9652_set_interrupt_interval(struct snd_rme9652 *s, 451 unsigned int frames) 452 { 453 int restart = 0; 454 int n; 455 456 spin_lock_irq(&s->lock); 457 458 if ((restart = s->running)) { 459 rme9652_stop(s); 460 } 461 462 frames >>= 7; 463 n = 0; 464 while (frames) { 465 n++; 466 frames >>= 1; 467 } 468 469 s->control_register &= ~RME9652_latency; 470 s->control_register |= rme9652_encode_latency(n); 471 472 rme9652_write(s, RME9652_control_register, s->control_register); 473 474 rme9652_compute_period_size(s); 475 476 if (restart) 477 rme9652_start(s); 478 479 spin_unlock_irq(&s->lock); 480 481 return 0; 482 } 483 484 static int rme9652_set_rate(struct snd_rme9652 *rme9652, int rate) 485 { 486 int restart; 487 int reject_if_open = 0; 488 int xrate; 489 490 if (!snd_rme9652_use_is_exclusive (rme9652)) { 491 return -EBUSY; 492 } 493 494 /* Changing from a "single speed" to a "double speed" rate is 495 not allowed if any substreams are open. This is because 496 such a change causes a shift in the location of 497 the DMA buffers and a reduction in the number of available 498 buffers. 499 500 Note that a similar but essentially insoluble problem 501 exists for externally-driven rate changes. All we can do 502 is to flag rate changes in the read/write routines. 503 */ 504 505 spin_lock_irq(&rme9652->lock); 506 xrate = rme9652_adat_sample_rate(rme9652); 507 508 switch (rate) { 509 case 44100: 510 if (xrate > 48000) { 511 reject_if_open = 1; 512 } 513 rate = 0; 514 break; 515 case 48000: 516 if (xrate > 48000) { 517 reject_if_open = 1; 518 } 519 rate = RME9652_freq; 520 break; 521 case 88200: 522 if (xrate < 48000) { 523 reject_if_open = 1; 524 } 525 rate = RME9652_DS; 526 break; 527 case 96000: 528 if (xrate < 48000) { 529 reject_if_open = 1; 530 } 531 rate = RME9652_DS | RME9652_freq; 532 break; 533 default: 534 spin_unlock_irq(&rme9652->lock); 535 return -EINVAL; 536 } 537 538 if (reject_if_open && (rme9652->capture_pid >= 0 || rme9652->playback_pid >= 0)) { 539 spin_unlock_irq(&rme9652->lock); 540 return -EBUSY; 541 } 542 543 if ((restart = rme9652->running)) { 544 rme9652_stop(rme9652); 545 } 546 rme9652->control_register &= ~(RME9652_freq | RME9652_DS); 547 rme9652->control_register |= rate; 548 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 549 550 if (restart) { 551 rme9652_start(rme9652); 552 } 553 554 if (rate & RME9652_DS) { 555 if (rme9652->ss_channels == RME9652_NCHANNELS) { 556 rme9652->channel_map = channel_map_9652_ds; 557 } else { 558 rme9652->channel_map = channel_map_9636_ds; 559 } 560 } else { 561 if (rme9652->ss_channels == RME9652_NCHANNELS) { 562 rme9652->channel_map = channel_map_9652_ss; 563 } else { 564 rme9652->channel_map = channel_map_9636_ss; 565 } 566 } 567 568 spin_unlock_irq(&rme9652->lock); 569 return 0; 570 } 571 572 static void rme9652_set_thru(struct snd_rme9652 *rme9652, int channel, int enable) 573 { 574 int i; 575 576 rme9652->passthru = 0; 577 578 if (channel < 0) { 579 580 /* set thru for all channels */ 581 582 if (enable) { 583 for (i = 0; i < RME9652_NCHANNELS; i++) { 584 rme9652->thru_bits |= (1 << i); 585 rme9652_write(rme9652, RME9652_thru_base + i * 4, 1); 586 } 587 } else { 588 for (i = 0; i < RME9652_NCHANNELS; i++) { 589 rme9652->thru_bits &= ~(1 << i); 590 rme9652_write(rme9652, RME9652_thru_base + i * 4, 0); 591 } 592 } 593 594 } else { 595 int mapped_channel; 596 597 mapped_channel = rme9652->channel_map[channel]; 598 599 if (enable) { 600 rme9652->thru_bits |= (1 << mapped_channel); 601 } else { 602 rme9652->thru_bits &= ~(1 << mapped_channel); 603 } 604 605 rme9652_write(rme9652, 606 RME9652_thru_base + mapped_channel * 4, 607 enable ? 1 : 0); 608 } 609 } 610 611 static int rme9652_set_passthru(struct snd_rme9652 *rme9652, int onoff) 612 { 613 if (onoff) { 614 rme9652_set_thru(rme9652, -1, 1); 615 616 /* we don't want interrupts, so do a 617 custom version of rme9652_start(). 618 */ 619 620 rme9652->control_register = 621 RME9652_inp_0 | 622 rme9652_encode_latency(7) | 623 RME9652_start_bit; 624 625 rme9652_reset_hw_pointer(rme9652); 626 627 rme9652_write(rme9652, RME9652_control_register, 628 rme9652->control_register); 629 rme9652->passthru = 1; 630 } else { 631 rme9652_set_thru(rme9652, -1, 0); 632 rme9652_stop(rme9652); 633 rme9652->passthru = 0; 634 } 635 636 return 0; 637 } 638 639 static void rme9652_spdif_set_bit (struct snd_rme9652 *rme9652, int mask, int onoff) 640 { 641 if (onoff) 642 rme9652->control_register |= mask; 643 else 644 rme9652->control_register &= ~mask; 645 646 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 647 } 648 649 static void rme9652_spdif_write_byte (struct snd_rme9652 *rme9652, const int val) 650 { 651 long mask; 652 long i; 653 654 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) { 655 if (val & mask) 656 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 1); 657 else 658 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 0); 659 660 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1); 661 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0); 662 } 663 } 664 665 static int rme9652_spdif_read_byte (struct snd_rme9652 *rme9652) 666 { 667 long mask; 668 long val; 669 long i; 670 671 val = 0; 672 673 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) { 674 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1); 675 if (rme9652_read (rme9652, RME9652_status_register) & RME9652_SPDIF_READ) 676 val |= mask; 677 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0); 678 } 679 680 return val; 681 } 682 683 static void rme9652_write_spdif_codec (struct snd_rme9652 *rme9652, const int address, const int data) 684 { 685 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1); 686 rme9652_spdif_write_byte (rme9652, 0x20); 687 rme9652_spdif_write_byte (rme9652, address); 688 rme9652_spdif_write_byte (rme9652, data); 689 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0); 690 } 691 692 693 static int rme9652_spdif_read_codec (struct snd_rme9652 *rme9652, const int address) 694 { 695 int ret; 696 697 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1); 698 rme9652_spdif_write_byte (rme9652, 0x20); 699 rme9652_spdif_write_byte (rme9652, address); 700 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0); 701 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1); 702 703 rme9652_spdif_write_byte (rme9652, 0x21); 704 ret = rme9652_spdif_read_byte (rme9652); 705 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0); 706 707 return ret; 708 } 709 710 static void rme9652_initialize_spdif_receiver (struct snd_rme9652 *rme9652) 711 { 712 /* XXX what unsets this ? */ 713 714 rme9652->control_register |= RME9652_SPDIF_RESET; 715 716 rme9652_write_spdif_codec (rme9652, 4, 0x40); 717 rme9652_write_spdif_codec (rme9652, 17, 0x13); 718 rme9652_write_spdif_codec (rme9652, 6, 0x02); 719 } 720 721 static inline int rme9652_spdif_sample_rate(struct snd_rme9652 *s) 722 { 723 unsigned int rate_bits; 724 725 if (rme9652_read(s, RME9652_status_register) & RME9652_ERF) { 726 return -1; /* error condition */ 727 } 728 729 if (s->hw_rev == 15) { 730 731 int x, y, ret; 732 733 x = rme9652_spdif_read_codec (s, 30); 734 735 if (x != 0) 736 y = 48000 * 64 / x; 737 else 738 y = 0; 739 740 if (y > 30400 && y < 33600) ret = 32000; 741 else if (y > 41900 && y < 46000) ret = 44100; 742 else if (y > 46000 && y < 50400) ret = 48000; 743 else if (y > 60800 && y < 67200) ret = 64000; 744 else if (y > 83700 && y < 92000) ret = 88200; 745 else if (y > 92000 && y < 100000) ret = 96000; 746 else ret = 0; 747 return ret; 748 } 749 750 rate_bits = rme9652_read(s, RME9652_status_register) & RME9652_F; 751 752 switch (rme9652_decode_spdif_rate(rate_bits)) { 753 case 0x7: 754 return 32000; 755 break; 756 757 case 0x6: 758 return 44100; 759 break; 760 761 case 0x5: 762 return 48000; 763 break; 764 765 case 0x4: 766 return 88200; 767 break; 768 769 case 0x3: 770 return 96000; 771 break; 772 773 case 0x0: 774 return 64000; 775 break; 776 777 default: 778 snd_printk(KERN_ERR "%s: unknown S/PDIF input rate (bits = 0x%x)\n", 779 s->card_name, rate_bits); 780 return 0; 781 break; 782 } 783 } 784 785 /*----------------------------------------------------------------------------- 786 Control Interface 787 ----------------------------------------------------------------------------*/ 788 789 static u32 snd_rme9652_convert_from_aes(struct snd_aes_iec958 *aes) 790 { 791 u32 val = 0; 792 val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? RME9652_PRO : 0; 793 val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? RME9652_Dolby : 0; 794 if (val & RME9652_PRO) 795 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? RME9652_EMP : 0; 796 else 797 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? RME9652_EMP : 0; 798 return val; 799 } 800 801 static void snd_rme9652_convert_to_aes(struct snd_aes_iec958 *aes, u32 val) 802 { 803 aes->status[0] = ((val & RME9652_PRO) ? IEC958_AES0_PROFESSIONAL : 0) | 804 ((val & RME9652_Dolby) ? IEC958_AES0_NONAUDIO : 0); 805 if (val & RME9652_PRO) 806 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0; 807 else 808 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_CON_EMPHASIS_5015 : 0; 809 } 810 811 static int snd_rme9652_control_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 812 { 813 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 814 uinfo->count = 1; 815 return 0; 816 } 817 818 static int snd_rme9652_control_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 819 { 820 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 821 822 snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif); 823 return 0; 824 } 825 826 static int snd_rme9652_control_spdif_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 827 { 828 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 829 int change; 830 u32 val; 831 832 val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958); 833 spin_lock_irq(&rme9652->lock); 834 change = val != rme9652->creg_spdif; 835 rme9652->creg_spdif = val; 836 spin_unlock_irq(&rme9652->lock); 837 return change; 838 } 839 840 static int snd_rme9652_control_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 841 { 842 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 843 uinfo->count = 1; 844 return 0; 845 } 846 847 static int snd_rme9652_control_spdif_stream_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 848 { 849 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 850 851 snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif_stream); 852 return 0; 853 } 854 855 static int snd_rme9652_control_spdif_stream_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 856 { 857 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 858 int change; 859 u32 val; 860 861 val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958); 862 spin_lock_irq(&rme9652->lock); 863 change = val != rme9652->creg_spdif_stream; 864 rme9652->creg_spdif_stream = val; 865 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP); 866 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= val); 867 spin_unlock_irq(&rme9652->lock); 868 return change; 869 } 870 871 static int snd_rme9652_control_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 872 { 873 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 874 uinfo->count = 1; 875 return 0; 876 } 877 878 static int snd_rme9652_control_spdif_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 879 { 880 ucontrol->value.iec958.status[0] = kcontrol->private_value; 881 return 0; 882 } 883 884 #define RME9652_ADAT1_IN(xname, xindex) \ 885 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 886 .info = snd_rme9652_info_adat1_in, \ 887 .get = snd_rme9652_get_adat1_in, \ 888 .put = snd_rme9652_put_adat1_in } 889 890 static unsigned int rme9652_adat1_in(struct snd_rme9652 *rme9652) 891 { 892 if (rme9652->control_register & RME9652_ADAT1_INTERNAL) 893 return 1; 894 return 0; 895 } 896 897 static int rme9652_set_adat1_input(struct snd_rme9652 *rme9652, int internal) 898 { 899 int restart = 0; 900 901 if (internal) { 902 rme9652->control_register |= RME9652_ADAT1_INTERNAL; 903 } else { 904 rme9652->control_register &= ~RME9652_ADAT1_INTERNAL; 905 } 906 907 /* XXX do we actually need to stop the card when we do this ? */ 908 909 if ((restart = rme9652->running)) { 910 rme9652_stop(rme9652); 911 } 912 913 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 914 915 if (restart) { 916 rme9652_start(rme9652); 917 } 918 919 return 0; 920 } 921 922 static int snd_rme9652_info_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 923 { 924 static char *texts[2] = {"ADAT1", "Internal"}; 925 926 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 927 uinfo->count = 1; 928 uinfo->value.enumerated.items = 2; 929 if (uinfo->value.enumerated.item > 1) 930 uinfo->value.enumerated.item = 1; 931 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); 932 return 0; 933 } 934 935 static int snd_rme9652_get_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 936 { 937 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 938 939 spin_lock_irq(&rme9652->lock); 940 ucontrol->value.enumerated.item[0] = rme9652_adat1_in(rme9652); 941 spin_unlock_irq(&rme9652->lock); 942 return 0; 943 } 944 945 static int snd_rme9652_put_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 946 { 947 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 948 int change; 949 unsigned int val; 950 951 if (!snd_rme9652_use_is_exclusive(rme9652)) 952 return -EBUSY; 953 val = ucontrol->value.enumerated.item[0] % 2; 954 spin_lock_irq(&rme9652->lock); 955 change = val != rme9652_adat1_in(rme9652); 956 if (change) 957 rme9652_set_adat1_input(rme9652, val); 958 spin_unlock_irq(&rme9652->lock); 959 return change; 960 } 961 962 #define RME9652_SPDIF_IN(xname, xindex) \ 963 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 964 .info = snd_rme9652_info_spdif_in, \ 965 .get = snd_rme9652_get_spdif_in, .put = snd_rme9652_put_spdif_in } 966 967 static unsigned int rme9652_spdif_in(struct snd_rme9652 *rme9652) 968 { 969 return rme9652_decode_spdif_in(rme9652->control_register & 970 RME9652_inp); 971 } 972 973 static int rme9652_set_spdif_input(struct snd_rme9652 *rme9652, int in) 974 { 975 int restart = 0; 976 977 rme9652->control_register &= ~RME9652_inp; 978 rme9652->control_register |= rme9652_encode_spdif_in(in); 979 980 if ((restart = rme9652->running)) { 981 rme9652_stop(rme9652); 982 } 983 984 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 985 986 if (restart) { 987 rme9652_start(rme9652); 988 } 989 990 return 0; 991 } 992 993 static int snd_rme9652_info_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 994 { 995 static char *texts[3] = {"ADAT1", "Coaxial", "Internal"}; 996 997 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 998 uinfo->count = 1; 999 uinfo->value.enumerated.items = 3; 1000 if (uinfo->value.enumerated.item > 2) 1001 uinfo->value.enumerated.item = 2; 1002 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); 1003 return 0; 1004 } 1005 1006 static int snd_rme9652_get_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1007 { 1008 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1009 1010 spin_lock_irq(&rme9652->lock); 1011 ucontrol->value.enumerated.item[0] = rme9652_spdif_in(rme9652); 1012 spin_unlock_irq(&rme9652->lock); 1013 return 0; 1014 } 1015 1016 static int snd_rme9652_put_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1017 { 1018 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1019 int change; 1020 unsigned int val; 1021 1022 if (!snd_rme9652_use_is_exclusive(rme9652)) 1023 return -EBUSY; 1024 val = ucontrol->value.enumerated.item[0] % 3; 1025 spin_lock_irq(&rme9652->lock); 1026 change = val != rme9652_spdif_in(rme9652); 1027 if (change) 1028 rme9652_set_spdif_input(rme9652, val); 1029 spin_unlock_irq(&rme9652->lock); 1030 return change; 1031 } 1032 1033 #define RME9652_SPDIF_OUT(xname, xindex) \ 1034 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1035 .info = snd_rme9652_info_spdif_out, \ 1036 .get = snd_rme9652_get_spdif_out, .put = snd_rme9652_put_spdif_out } 1037 1038 static int rme9652_spdif_out(struct snd_rme9652 *rme9652) 1039 { 1040 return (rme9652->control_register & RME9652_opt_out) ? 1 : 0; 1041 } 1042 1043 static int rme9652_set_spdif_output(struct snd_rme9652 *rme9652, int out) 1044 { 1045 int restart = 0; 1046 1047 if (out) { 1048 rme9652->control_register |= RME9652_opt_out; 1049 } else { 1050 rme9652->control_register &= ~RME9652_opt_out; 1051 } 1052 1053 if ((restart = rme9652->running)) { 1054 rme9652_stop(rme9652); 1055 } 1056 1057 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 1058 1059 if (restart) { 1060 rme9652_start(rme9652); 1061 } 1062 1063 return 0; 1064 } 1065 1066 #define snd_rme9652_info_spdif_out snd_ctl_boolean_mono_info 1067 1068 static int snd_rme9652_get_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1069 { 1070 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1071 1072 spin_lock_irq(&rme9652->lock); 1073 ucontrol->value.integer.value[0] = rme9652_spdif_out(rme9652); 1074 spin_unlock_irq(&rme9652->lock); 1075 return 0; 1076 } 1077 1078 static int snd_rme9652_put_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1079 { 1080 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1081 int change; 1082 unsigned int val; 1083 1084 if (!snd_rme9652_use_is_exclusive(rme9652)) 1085 return -EBUSY; 1086 val = ucontrol->value.integer.value[0] & 1; 1087 spin_lock_irq(&rme9652->lock); 1088 change = (int)val != rme9652_spdif_out(rme9652); 1089 rme9652_set_spdif_output(rme9652, val); 1090 spin_unlock_irq(&rme9652->lock); 1091 return change; 1092 } 1093 1094 #define RME9652_SYNC_MODE(xname, xindex) \ 1095 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1096 .info = snd_rme9652_info_sync_mode, \ 1097 .get = snd_rme9652_get_sync_mode, .put = snd_rme9652_put_sync_mode } 1098 1099 static int rme9652_sync_mode(struct snd_rme9652 *rme9652) 1100 { 1101 if (rme9652->control_register & RME9652_wsel) { 1102 return 2; 1103 } else if (rme9652->control_register & RME9652_Master) { 1104 return 1; 1105 } else { 1106 return 0; 1107 } 1108 } 1109 1110 static int rme9652_set_sync_mode(struct snd_rme9652 *rme9652, int mode) 1111 { 1112 int restart = 0; 1113 1114 switch (mode) { 1115 case 0: 1116 rme9652->control_register &= 1117 ~(RME9652_Master | RME9652_wsel); 1118 break; 1119 case 1: 1120 rme9652->control_register = 1121 (rme9652->control_register & ~RME9652_wsel) | RME9652_Master; 1122 break; 1123 case 2: 1124 rme9652->control_register |= 1125 (RME9652_Master | RME9652_wsel); 1126 break; 1127 } 1128 1129 if ((restart = rme9652->running)) { 1130 rme9652_stop(rme9652); 1131 } 1132 1133 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 1134 1135 if (restart) { 1136 rme9652_start(rme9652); 1137 } 1138 1139 return 0; 1140 } 1141 1142 static int snd_rme9652_info_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1143 { 1144 static char *texts[3] = {"AutoSync", "Master", "Word Clock"}; 1145 1146 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1147 uinfo->count = 1; 1148 uinfo->value.enumerated.items = 3; 1149 if (uinfo->value.enumerated.item > 2) 1150 uinfo->value.enumerated.item = 2; 1151 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); 1152 return 0; 1153 } 1154 1155 static int snd_rme9652_get_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1156 { 1157 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1158 1159 spin_lock_irq(&rme9652->lock); 1160 ucontrol->value.enumerated.item[0] = rme9652_sync_mode(rme9652); 1161 spin_unlock_irq(&rme9652->lock); 1162 return 0; 1163 } 1164 1165 static int snd_rme9652_put_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1166 { 1167 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1168 int change; 1169 unsigned int val; 1170 1171 val = ucontrol->value.enumerated.item[0] % 3; 1172 spin_lock_irq(&rme9652->lock); 1173 change = (int)val != rme9652_sync_mode(rme9652); 1174 rme9652_set_sync_mode(rme9652, val); 1175 spin_unlock_irq(&rme9652->lock); 1176 return change; 1177 } 1178 1179 #define RME9652_SYNC_PREF(xname, xindex) \ 1180 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1181 .info = snd_rme9652_info_sync_pref, \ 1182 .get = snd_rme9652_get_sync_pref, .put = snd_rme9652_put_sync_pref } 1183 1184 static int rme9652_sync_pref(struct snd_rme9652 *rme9652) 1185 { 1186 switch (rme9652->control_register & RME9652_SyncPref_Mask) { 1187 case RME9652_SyncPref_ADAT1: 1188 return RME9652_SYNC_FROM_ADAT1; 1189 case RME9652_SyncPref_ADAT2: 1190 return RME9652_SYNC_FROM_ADAT2; 1191 case RME9652_SyncPref_ADAT3: 1192 return RME9652_SYNC_FROM_ADAT3; 1193 case RME9652_SyncPref_SPDIF: 1194 return RME9652_SYNC_FROM_SPDIF; 1195 } 1196 /* Not reachable */ 1197 return 0; 1198 } 1199 1200 static int rme9652_set_sync_pref(struct snd_rme9652 *rme9652, int pref) 1201 { 1202 int restart; 1203 1204 rme9652->control_register &= ~RME9652_SyncPref_Mask; 1205 switch (pref) { 1206 case RME9652_SYNC_FROM_ADAT1: 1207 rme9652->control_register |= RME9652_SyncPref_ADAT1; 1208 break; 1209 case RME9652_SYNC_FROM_ADAT2: 1210 rme9652->control_register |= RME9652_SyncPref_ADAT2; 1211 break; 1212 case RME9652_SYNC_FROM_ADAT3: 1213 rme9652->control_register |= RME9652_SyncPref_ADAT3; 1214 break; 1215 case RME9652_SYNC_FROM_SPDIF: 1216 rme9652->control_register |= RME9652_SyncPref_SPDIF; 1217 break; 1218 } 1219 1220 if ((restart = rme9652->running)) { 1221 rme9652_stop(rme9652); 1222 } 1223 1224 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 1225 1226 if (restart) { 1227 rme9652_start(rme9652); 1228 } 1229 1230 return 0; 1231 } 1232 1233 static int snd_rme9652_info_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1234 { 1235 static char *texts[4] = {"IEC958 In", "ADAT1 In", "ADAT2 In", "ADAT3 In"}; 1236 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1237 1238 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1239 uinfo->count = 1; 1240 uinfo->value.enumerated.items = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3; 1241 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 1242 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; 1243 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); 1244 return 0; 1245 } 1246 1247 static int snd_rme9652_get_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1248 { 1249 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1250 1251 spin_lock_irq(&rme9652->lock); 1252 ucontrol->value.enumerated.item[0] = rme9652_sync_pref(rme9652); 1253 spin_unlock_irq(&rme9652->lock); 1254 return 0; 1255 } 1256 1257 static int snd_rme9652_put_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1258 { 1259 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1260 int change, max; 1261 unsigned int val; 1262 1263 if (!snd_rme9652_use_is_exclusive(rme9652)) 1264 return -EBUSY; 1265 max = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3; 1266 val = ucontrol->value.enumerated.item[0] % max; 1267 spin_lock_irq(&rme9652->lock); 1268 change = (int)val != rme9652_sync_pref(rme9652); 1269 rme9652_set_sync_pref(rme9652, val); 1270 spin_unlock_irq(&rme9652->lock); 1271 return change; 1272 } 1273 1274 static int snd_rme9652_info_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1275 { 1276 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1277 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1278 uinfo->count = rme9652->ss_channels; 1279 uinfo->value.integer.min = 0; 1280 uinfo->value.integer.max = 1; 1281 return 0; 1282 } 1283 1284 static int snd_rme9652_get_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1285 { 1286 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1287 unsigned int k; 1288 u32 thru_bits = rme9652->thru_bits; 1289 1290 for (k = 0; k < rme9652->ss_channels; ++k) { 1291 ucontrol->value.integer.value[k] = !!(thru_bits & (1 << k)); 1292 } 1293 return 0; 1294 } 1295 1296 static int snd_rme9652_put_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1297 { 1298 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1299 int change; 1300 unsigned int chn; 1301 u32 thru_bits = 0; 1302 1303 if (!snd_rme9652_use_is_exclusive(rme9652)) 1304 return -EBUSY; 1305 1306 for (chn = 0; chn < rme9652->ss_channels; ++chn) { 1307 if (ucontrol->value.integer.value[chn]) 1308 thru_bits |= 1 << chn; 1309 } 1310 1311 spin_lock_irq(&rme9652->lock); 1312 change = thru_bits ^ rme9652->thru_bits; 1313 if (change) { 1314 for (chn = 0; chn < rme9652->ss_channels; ++chn) { 1315 if (!(change & (1 << chn))) 1316 continue; 1317 rme9652_set_thru(rme9652,chn,thru_bits&(1<<chn)); 1318 } 1319 } 1320 spin_unlock_irq(&rme9652->lock); 1321 return !!change; 1322 } 1323 1324 #define RME9652_PASSTHRU(xname, xindex) \ 1325 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1326 .info = snd_rme9652_info_passthru, \ 1327 .put = snd_rme9652_put_passthru, \ 1328 .get = snd_rme9652_get_passthru } 1329 1330 #define snd_rme9652_info_passthru snd_ctl_boolean_mono_info 1331 1332 static int snd_rme9652_get_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1333 { 1334 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1335 1336 spin_lock_irq(&rme9652->lock); 1337 ucontrol->value.integer.value[0] = rme9652->passthru; 1338 spin_unlock_irq(&rme9652->lock); 1339 return 0; 1340 } 1341 1342 static int snd_rme9652_put_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1343 { 1344 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1345 int change; 1346 unsigned int val; 1347 int err = 0; 1348 1349 if (!snd_rme9652_use_is_exclusive(rme9652)) 1350 return -EBUSY; 1351 1352 val = ucontrol->value.integer.value[0] & 1; 1353 spin_lock_irq(&rme9652->lock); 1354 change = (ucontrol->value.integer.value[0] != rme9652->passthru); 1355 if (change) 1356 err = rme9652_set_passthru(rme9652, val); 1357 spin_unlock_irq(&rme9652->lock); 1358 return err ? err : change; 1359 } 1360 1361 /* Read-only switches */ 1362 1363 #define RME9652_SPDIF_RATE(xname, xindex) \ 1364 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1365 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \ 1366 .info = snd_rme9652_info_spdif_rate, \ 1367 .get = snd_rme9652_get_spdif_rate } 1368 1369 static int snd_rme9652_info_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1370 { 1371 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 1372 uinfo->count = 1; 1373 uinfo->value.integer.min = 0; 1374 uinfo->value.integer.max = 96000; 1375 return 0; 1376 } 1377 1378 static int snd_rme9652_get_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1379 { 1380 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1381 1382 spin_lock_irq(&rme9652->lock); 1383 ucontrol->value.integer.value[0] = rme9652_spdif_sample_rate(rme9652); 1384 spin_unlock_irq(&rme9652->lock); 1385 return 0; 1386 } 1387 1388 #define RME9652_ADAT_SYNC(xname, xindex, xidx) \ 1389 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1390 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \ 1391 .info = snd_rme9652_info_adat_sync, \ 1392 .get = snd_rme9652_get_adat_sync, .private_value = xidx } 1393 1394 static int snd_rme9652_info_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1395 { 1396 static char *texts[4] = {"No Lock", "Lock", "No Lock Sync", "Lock Sync"}; 1397 1398 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1399 uinfo->count = 1; 1400 uinfo->value.enumerated.items = 4; 1401 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 1402 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; 1403 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); 1404 return 0; 1405 } 1406 1407 static int snd_rme9652_get_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1408 { 1409 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1410 unsigned int mask1, mask2, val; 1411 1412 switch (kcontrol->private_value) { 1413 case 0: mask1 = RME9652_lock_0; mask2 = RME9652_sync_0; break; 1414 case 1: mask1 = RME9652_lock_1; mask2 = RME9652_sync_1; break; 1415 case 2: mask1 = RME9652_lock_2; mask2 = RME9652_sync_2; break; 1416 default: return -EINVAL; 1417 } 1418 val = rme9652_read(rme9652, RME9652_status_register); 1419 ucontrol->value.enumerated.item[0] = (val & mask1) ? 1 : 0; 1420 ucontrol->value.enumerated.item[0] |= (val & mask2) ? 2 : 0; 1421 return 0; 1422 } 1423 1424 #define RME9652_TC_VALID(xname, xindex) \ 1425 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1426 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \ 1427 .info = snd_rme9652_info_tc_valid, \ 1428 .get = snd_rme9652_get_tc_valid } 1429 1430 #define snd_rme9652_info_tc_valid snd_ctl_boolean_mono_info 1431 1432 static int snd_rme9652_get_tc_valid(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1433 { 1434 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1435 1436 ucontrol->value.integer.value[0] = 1437 (rme9652_read(rme9652, RME9652_status_register) & RME9652_tc_valid) ? 1 : 0; 1438 return 0; 1439 } 1440 1441 #ifdef ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE 1442 1443 /* FIXME: this routine needs a port to the new control API --jk */ 1444 1445 static int snd_rme9652_get_tc_value(void *private_data, 1446 snd_kswitch_t *kswitch, 1447 snd_switch_t *uswitch) 1448 { 1449 struct snd_rme9652 *s = (struct snd_rme9652 *) private_data; 1450 u32 value; 1451 int i; 1452 1453 uswitch->type = SNDRV_SW_TYPE_DWORD; 1454 1455 if ((rme9652_read(s, RME9652_status_register) & 1456 RME9652_tc_valid) == 0) { 1457 uswitch->value.data32[0] = 0; 1458 return 0; 1459 } 1460 1461 /* timecode request */ 1462 1463 rme9652_write(s, RME9652_time_code, 0); 1464 1465 /* XXX bug alert: loop-based timing !!!! */ 1466 1467 for (i = 0; i < 50; i++) { 1468 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy)) 1469 break; 1470 } 1471 1472 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy)) { 1473 return -EIO; 1474 } 1475 1476 value = 0; 1477 1478 for (i = 0; i < 32; i++) { 1479 value >>= 1; 1480 1481 if (rme9652_read(s, i * 4) & RME9652_tc_out) 1482 value |= 0x80000000; 1483 } 1484 1485 if (value > 2 * 60 * 48000) { 1486 value -= 2 * 60 * 48000; 1487 } else { 1488 value = 0; 1489 } 1490 1491 uswitch->value.data32[0] = value; 1492 1493 return 0; 1494 } 1495 1496 #endif /* ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE */ 1497 1498 static struct snd_kcontrol_new snd_rme9652_controls[] = { 1499 { 1500 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1501 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT), 1502 .info = snd_rme9652_control_spdif_info, 1503 .get = snd_rme9652_control_spdif_get, 1504 .put = snd_rme9652_control_spdif_put, 1505 }, 1506 { 1507 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE, 1508 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1509 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM), 1510 .info = snd_rme9652_control_spdif_stream_info, 1511 .get = snd_rme9652_control_spdif_stream_get, 1512 .put = snd_rme9652_control_spdif_stream_put, 1513 }, 1514 { 1515 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1516 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1517 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK), 1518 .info = snd_rme9652_control_spdif_mask_info, 1519 .get = snd_rme9652_control_spdif_mask_get, 1520 .private_value = IEC958_AES0_NONAUDIO | 1521 IEC958_AES0_PROFESSIONAL | 1522 IEC958_AES0_CON_EMPHASIS, 1523 }, 1524 { 1525 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1526 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1527 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK), 1528 .info = snd_rme9652_control_spdif_mask_info, 1529 .get = snd_rme9652_control_spdif_mask_get, 1530 .private_value = IEC958_AES0_NONAUDIO | 1531 IEC958_AES0_PROFESSIONAL | 1532 IEC958_AES0_PRO_EMPHASIS, 1533 }, 1534 RME9652_SPDIF_IN("IEC958 Input Connector", 0), 1535 RME9652_SPDIF_OUT("IEC958 Output also on ADAT1", 0), 1536 RME9652_SYNC_MODE("Sync Mode", 0), 1537 RME9652_SYNC_PREF("Preferred Sync Source", 0), 1538 { 1539 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1540 .name = "Channels Thru", 1541 .index = 0, 1542 .info = snd_rme9652_info_thru, 1543 .get = snd_rme9652_get_thru, 1544 .put = snd_rme9652_put_thru, 1545 }, 1546 RME9652_SPDIF_RATE("IEC958 Sample Rate", 0), 1547 RME9652_ADAT_SYNC("ADAT1 Sync Check", 0, 0), 1548 RME9652_ADAT_SYNC("ADAT2 Sync Check", 0, 1), 1549 RME9652_TC_VALID("Timecode Valid", 0), 1550 RME9652_PASSTHRU("Passthru", 0) 1551 }; 1552 1553 static struct snd_kcontrol_new snd_rme9652_adat3_check = 1554 RME9652_ADAT_SYNC("ADAT3 Sync Check", 0, 2); 1555 1556 static struct snd_kcontrol_new snd_rme9652_adat1_input = 1557 RME9652_ADAT1_IN("ADAT1 Input Source", 0); 1558 1559 static int snd_rme9652_create_controls(struct snd_card *card, struct snd_rme9652 *rme9652) 1560 { 1561 unsigned int idx; 1562 int err; 1563 struct snd_kcontrol *kctl; 1564 1565 for (idx = 0; idx < ARRAY_SIZE(snd_rme9652_controls); idx++) { 1566 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_controls[idx], rme9652))) < 0) 1567 return err; 1568 if (idx == 1) /* IEC958 (S/PDIF) Stream */ 1569 rme9652->spdif_ctl = kctl; 1570 } 1571 1572 if (rme9652->ss_channels == RME9652_NCHANNELS) 1573 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat3_check, rme9652))) < 0) 1574 return err; 1575 1576 if (rme9652->hw_rev >= 15) 1577 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat1_input, rme9652))) < 0) 1578 return err; 1579 1580 return 0; 1581 } 1582 1583 /*------------------------------------------------------------ 1584 /proc interface 1585 ------------------------------------------------------------*/ 1586 1587 static void 1588 snd_rme9652_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer) 1589 { 1590 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) entry->private_data; 1591 u32 thru_bits = rme9652->thru_bits; 1592 int show_auto_sync_source = 0; 1593 int i; 1594 unsigned int status; 1595 int x; 1596 1597 status = rme9652_read(rme9652, RME9652_status_register); 1598 1599 snd_iprintf(buffer, "%s (Card #%d)\n", rme9652->card_name, rme9652->card->number + 1); 1600 snd_iprintf(buffer, "Buffers: capture %p playback %p\n", 1601 rme9652->capture_buffer, rme9652->playback_buffer); 1602 snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n", 1603 rme9652->irq, rme9652->port, (unsigned long)rme9652->iobase); 1604 snd_iprintf(buffer, "Control register: %x\n", rme9652->control_register); 1605 1606 snd_iprintf(buffer, "\n"); 1607 1608 x = 1 << (6 + rme9652_decode_latency(rme9652->control_register & 1609 RME9652_latency)); 1610 1611 snd_iprintf(buffer, "Latency: %d samples (2 periods of %lu bytes)\n", 1612 x, (unsigned long) rme9652->period_bytes); 1613 snd_iprintf(buffer, "Hardware pointer (frames): %ld\n", 1614 rme9652_hw_pointer(rme9652)); 1615 snd_iprintf(buffer, "Passthru: %s\n", 1616 rme9652->passthru ? "yes" : "no"); 1617 1618 if ((rme9652->control_register & (RME9652_Master | RME9652_wsel)) == 0) { 1619 snd_iprintf(buffer, "Clock mode: autosync\n"); 1620 show_auto_sync_source = 1; 1621 } else if (rme9652->control_register & RME9652_wsel) { 1622 if (status & RME9652_wsel_rd) { 1623 snd_iprintf(buffer, "Clock mode: word clock\n"); 1624 } else { 1625 snd_iprintf(buffer, "Clock mode: word clock (no signal)\n"); 1626 } 1627 } else { 1628 snd_iprintf(buffer, "Clock mode: master\n"); 1629 } 1630 1631 if (show_auto_sync_source) { 1632 switch (rme9652->control_register & RME9652_SyncPref_Mask) { 1633 case RME9652_SyncPref_ADAT1: 1634 snd_iprintf(buffer, "Pref. sync source: ADAT1\n"); 1635 break; 1636 case RME9652_SyncPref_ADAT2: 1637 snd_iprintf(buffer, "Pref. sync source: ADAT2\n"); 1638 break; 1639 case RME9652_SyncPref_ADAT3: 1640 snd_iprintf(buffer, "Pref. sync source: ADAT3\n"); 1641 break; 1642 case RME9652_SyncPref_SPDIF: 1643 snd_iprintf(buffer, "Pref. sync source: IEC958\n"); 1644 break; 1645 default: 1646 snd_iprintf(buffer, "Pref. sync source: ???\n"); 1647 } 1648 } 1649 1650 if (rme9652->hw_rev >= 15) 1651 snd_iprintf(buffer, "\nADAT1 Input source: %s\n", 1652 (rme9652->control_register & RME9652_ADAT1_INTERNAL) ? 1653 "Internal" : "ADAT1 optical"); 1654 1655 snd_iprintf(buffer, "\n"); 1656 1657 switch (rme9652_decode_spdif_in(rme9652->control_register & 1658 RME9652_inp)) { 1659 case RME9652_SPDIFIN_OPTICAL: 1660 snd_iprintf(buffer, "IEC958 input: ADAT1\n"); 1661 break; 1662 case RME9652_SPDIFIN_COAXIAL: 1663 snd_iprintf(buffer, "IEC958 input: Coaxial\n"); 1664 break; 1665 case RME9652_SPDIFIN_INTERN: 1666 snd_iprintf(buffer, "IEC958 input: Internal\n"); 1667 break; 1668 default: 1669 snd_iprintf(buffer, "IEC958 input: ???\n"); 1670 break; 1671 } 1672 1673 if (rme9652->control_register & RME9652_opt_out) { 1674 snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n"); 1675 } else { 1676 snd_iprintf(buffer, "IEC958 output: Coaxial only\n"); 1677 } 1678 1679 if (rme9652->control_register & RME9652_PRO) { 1680 snd_iprintf(buffer, "IEC958 quality: Professional\n"); 1681 } else { 1682 snd_iprintf(buffer, "IEC958 quality: Consumer\n"); 1683 } 1684 1685 if (rme9652->control_register & RME9652_EMP) { 1686 snd_iprintf(buffer, "IEC958 emphasis: on\n"); 1687 } else { 1688 snd_iprintf(buffer, "IEC958 emphasis: off\n"); 1689 } 1690 1691 if (rme9652->control_register & RME9652_Dolby) { 1692 snd_iprintf(buffer, "IEC958 Dolby: on\n"); 1693 } else { 1694 snd_iprintf(buffer, "IEC958 Dolby: off\n"); 1695 } 1696 1697 i = rme9652_spdif_sample_rate(rme9652); 1698 1699 if (i < 0) { 1700 snd_iprintf(buffer, 1701 "IEC958 sample rate: error flag set\n"); 1702 } else if (i == 0) { 1703 snd_iprintf(buffer, "IEC958 sample rate: undetermined\n"); 1704 } else { 1705 snd_iprintf(buffer, "IEC958 sample rate: %d\n", i); 1706 } 1707 1708 snd_iprintf(buffer, "\n"); 1709 1710 snd_iprintf(buffer, "ADAT Sample rate: %dHz\n", 1711 rme9652_adat_sample_rate(rme9652)); 1712 1713 /* Sync Check */ 1714 1715 x = status & RME9652_sync_0; 1716 if (status & RME9652_lock_0) { 1717 snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock"); 1718 } else { 1719 snd_iprintf(buffer, "ADAT1: No Lock\n"); 1720 } 1721 1722 x = status & RME9652_sync_1; 1723 if (status & RME9652_lock_1) { 1724 snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock"); 1725 } else { 1726 snd_iprintf(buffer, "ADAT2: No Lock\n"); 1727 } 1728 1729 x = status & RME9652_sync_2; 1730 if (status & RME9652_lock_2) { 1731 snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock"); 1732 } else { 1733 snd_iprintf(buffer, "ADAT3: No Lock\n"); 1734 } 1735 1736 snd_iprintf(buffer, "\n"); 1737 1738 snd_iprintf(buffer, "Timecode signal: %s\n", 1739 (status & RME9652_tc_valid) ? "yes" : "no"); 1740 1741 /* thru modes */ 1742 1743 snd_iprintf(buffer, "Punch Status:\n\n"); 1744 1745 for (i = 0; i < rme9652->ss_channels; i++) { 1746 if (thru_bits & (1 << i)) { 1747 snd_iprintf(buffer, "%2d: on ", i + 1); 1748 } else { 1749 snd_iprintf(buffer, "%2d: off ", i + 1); 1750 } 1751 1752 if (((i + 1) % 8) == 0) { 1753 snd_iprintf(buffer, "\n"); 1754 } 1755 } 1756 1757 snd_iprintf(buffer, "\n"); 1758 } 1759 1760 static void snd_rme9652_proc_init(struct snd_rme9652 *rme9652) 1761 { 1762 struct snd_info_entry *entry; 1763 1764 if (! snd_card_proc_new(rme9652->card, "rme9652", &entry)) 1765 snd_info_set_text_ops(entry, rme9652, snd_rme9652_proc_read); 1766 } 1767 1768 static void snd_rme9652_free_buffers(struct snd_rme9652 *rme9652) 1769 { 1770 snd_hammerfall_free_buffer(&rme9652->capture_dma_buf, rme9652->pci); 1771 snd_hammerfall_free_buffer(&rme9652->playback_dma_buf, rme9652->pci); 1772 } 1773 1774 static int snd_rme9652_free(struct snd_rme9652 *rme9652) 1775 { 1776 if (rme9652->irq >= 0) 1777 rme9652_stop(rme9652); 1778 snd_rme9652_free_buffers(rme9652); 1779 1780 if (rme9652->irq >= 0) 1781 free_irq(rme9652->irq, (void *)rme9652); 1782 if (rme9652->iobase) 1783 iounmap(rme9652->iobase); 1784 if (rme9652->port) 1785 pci_release_regions(rme9652->pci); 1786 1787 pci_disable_device(rme9652->pci); 1788 return 0; 1789 } 1790 1791 static int snd_rme9652_initialize_memory(struct snd_rme9652 *rme9652) 1792 { 1793 unsigned long pb_bus, cb_bus; 1794 1795 if (snd_hammerfall_get_buffer(rme9652->pci, &rme9652->capture_dma_buf, RME9652_DMA_AREA_BYTES) < 0 || 1796 snd_hammerfall_get_buffer(rme9652->pci, &rme9652->playback_dma_buf, RME9652_DMA_AREA_BYTES) < 0) { 1797 if (rme9652->capture_dma_buf.area) 1798 snd_dma_free_pages(&rme9652->capture_dma_buf); 1799 printk(KERN_ERR "%s: no buffers available\n", rme9652->card_name); 1800 return -ENOMEM; 1801 } 1802 1803 /* Align to bus-space 64K boundary */ 1804 1805 cb_bus = ALIGN(rme9652->capture_dma_buf.addr, 0x10000ul); 1806 pb_bus = ALIGN(rme9652->playback_dma_buf.addr, 0x10000ul); 1807 1808 /* Tell the card where it is */ 1809 1810 rme9652_write(rme9652, RME9652_rec_buffer, cb_bus); 1811 rme9652_write(rme9652, RME9652_play_buffer, pb_bus); 1812 1813 rme9652->capture_buffer = rme9652->capture_dma_buf.area + (cb_bus - rme9652->capture_dma_buf.addr); 1814 rme9652->playback_buffer = rme9652->playback_dma_buf.area + (pb_bus - rme9652->playback_dma_buf.addr); 1815 1816 return 0; 1817 } 1818 1819 static void snd_rme9652_set_defaults(struct snd_rme9652 *rme9652) 1820 { 1821 unsigned int k; 1822 1823 /* ASSUMPTION: rme9652->lock is either held, or 1824 there is no need to hold it (e.g. during module 1825 initialization). 1826 */ 1827 1828 /* set defaults: 1829 1830 SPDIF Input via Coax 1831 autosync clock mode 1832 maximum latency (7 = 8192 samples, 64Kbyte buffer, 1833 which implies 2 4096 sample, 32Kbyte periods). 1834 1835 if rev 1.5, initialize the S/PDIF receiver. 1836 1837 */ 1838 1839 rme9652->control_register = 1840 RME9652_inp_0 | rme9652_encode_latency(7); 1841 1842 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 1843 1844 rme9652_reset_hw_pointer(rme9652); 1845 rme9652_compute_period_size(rme9652); 1846 1847 /* default: thru off for all channels */ 1848 1849 for (k = 0; k < RME9652_NCHANNELS; ++k) 1850 rme9652_write(rme9652, RME9652_thru_base + k * 4, 0); 1851 1852 rme9652->thru_bits = 0; 1853 rme9652->passthru = 0; 1854 1855 /* set a default rate so that the channel map is set up */ 1856 1857 rme9652_set_rate(rme9652, 48000); 1858 } 1859 1860 static irqreturn_t snd_rme9652_interrupt(int irq, void *dev_id) 1861 { 1862 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) dev_id; 1863 1864 if (!(rme9652_read(rme9652, RME9652_status_register) & RME9652_IRQ)) { 1865 return IRQ_NONE; 1866 } 1867 1868 rme9652_write(rme9652, RME9652_irq_clear, 0); 1869 1870 if (rme9652->capture_substream) { 1871 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream); 1872 } 1873 1874 if (rme9652->playback_substream) { 1875 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream); 1876 } 1877 return IRQ_HANDLED; 1878 } 1879 1880 static snd_pcm_uframes_t snd_rme9652_hw_pointer(struct snd_pcm_substream *substream) 1881 { 1882 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 1883 return rme9652_hw_pointer(rme9652); 1884 } 1885 1886 static char *rme9652_channel_buffer_location(struct snd_rme9652 *rme9652, 1887 int stream, 1888 int channel) 1889 1890 { 1891 int mapped_channel; 1892 1893 if (snd_BUG_ON(channel < 0 || channel >= RME9652_NCHANNELS)) 1894 return NULL; 1895 1896 if ((mapped_channel = rme9652->channel_map[channel]) < 0) { 1897 return NULL; 1898 } 1899 1900 if (stream == SNDRV_PCM_STREAM_CAPTURE) { 1901 return rme9652->capture_buffer + 1902 (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES); 1903 } else { 1904 return rme9652->playback_buffer + 1905 (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES); 1906 } 1907 } 1908 1909 static int snd_rme9652_playback_copy(struct snd_pcm_substream *substream, int channel, 1910 snd_pcm_uframes_t pos, void __user *src, snd_pcm_uframes_t count) 1911 { 1912 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 1913 char *channel_buf; 1914 1915 if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES / 4)) 1916 return -EINVAL; 1917 1918 channel_buf = rme9652_channel_buffer_location (rme9652, 1919 substream->pstr->stream, 1920 channel); 1921 if (snd_BUG_ON(!channel_buf)) 1922 return -EIO; 1923 if (copy_from_user(channel_buf + pos * 4, src, count * 4)) 1924 return -EFAULT; 1925 return count; 1926 } 1927 1928 static int snd_rme9652_capture_copy(struct snd_pcm_substream *substream, int channel, 1929 snd_pcm_uframes_t pos, void __user *dst, snd_pcm_uframes_t count) 1930 { 1931 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 1932 char *channel_buf; 1933 1934 if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES / 4)) 1935 return -EINVAL; 1936 1937 channel_buf = rme9652_channel_buffer_location (rme9652, 1938 substream->pstr->stream, 1939 channel); 1940 if (snd_BUG_ON(!channel_buf)) 1941 return -EIO; 1942 if (copy_to_user(dst, channel_buf + pos * 4, count * 4)) 1943 return -EFAULT; 1944 return count; 1945 } 1946 1947 static int snd_rme9652_hw_silence(struct snd_pcm_substream *substream, int channel, 1948 snd_pcm_uframes_t pos, snd_pcm_uframes_t count) 1949 { 1950 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 1951 char *channel_buf; 1952 1953 channel_buf = rme9652_channel_buffer_location (rme9652, 1954 substream->pstr->stream, 1955 channel); 1956 if (snd_BUG_ON(!channel_buf)) 1957 return -EIO; 1958 memset(channel_buf + pos * 4, 0, count * 4); 1959 return count; 1960 } 1961 1962 static int snd_rme9652_reset(struct snd_pcm_substream *substream) 1963 { 1964 struct snd_pcm_runtime *runtime = substream->runtime; 1965 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 1966 struct snd_pcm_substream *other; 1967 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 1968 other = rme9652->capture_substream; 1969 else 1970 other = rme9652->playback_substream; 1971 if (rme9652->running) 1972 runtime->status->hw_ptr = rme9652_hw_pointer(rme9652); 1973 else 1974 runtime->status->hw_ptr = 0; 1975 if (other) { 1976 struct snd_pcm_substream *s; 1977 struct snd_pcm_runtime *oruntime = other->runtime; 1978 snd_pcm_group_for_each_entry(s, substream) { 1979 if (s == other) { 1980 oruntime->status->hw_ptr = runtime->status->hw_ptr; 1981 break; 1982 } 1983 } 1984 } 1985 return 0; 1986 } 1987 1988 static int snd_rme9652_hw_params(struct snd_pcm_substream *substream, 1989 struct snd_pcm_hw_params *params) 1990 { 1991 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 1992 int err; 1993 pid_t this_pid; 1994 pid_t other_pid; 1995 1996 spin_lock_irq(&rme9652->lock); 1997 1998 if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) { 1999 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP); 2000 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= rme9652->creg_spdif_stream); 2001 this_pid = rme9652->playback_pid; 2002 other_pid = rme9652->capture_pid; 2003 } else { 2004 this_pid = rme9652->capture_pid; 2005 other_pid = rme9652->playback_pid; 2006 } 2007 2008 if ((other_pid > 0) && (this_pid != other_pid)) { 2009 2010 /* The other stream is open, and not by the same 2011 task as this one. Make sure that the parameters 2012 that matter are the same. 2013 */ 2014 2015 if ((int)params_rate(params) != 2016 rme9652_adat_sample_rate(rme9652)) { 2017 spin_unlock_irq(&rme9652->lock); 2018 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE); 2019 return -EBUSY; 2020 } 2021 2022 if (params_period_size(params) != rme9652->period_bytes / 4) { 2023 spin_unlock_irq(&rme9652->lock); 2024 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE); 2025 return -EBUSY; 2026 } 2027 2028 /* We're fine. */ 2029 2030 spin_unlock_irq(&rme9652->lock); 2031 return 0; 2032 2033 } else { 2034 spin_unlock_irq(&rme9652->lock); 2035 } 2036 2037 /* how to make sure that the rate matches an externally-set one ? 2038 */ 2039 2040 if ((err = rme9652_set_rate(rme9652, params_rate(params))) < 0) { 2041 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE); 2042 return err; 2043 } 2044 2045 if ((err = rme9652_set_interrupt_interval(rme9652, params_period_size(params))) < 0) { 2046 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE); 2047 return err; 2048 } 2049 2050 return 0; 2051 } 2052 2053 static int snd_rme9652_channel_info(struct snd_pcm_substream *substream, 2054 struct snd_pcm_channel_info *info) 2055 { 2056 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 2057 int chn; 2058 2059 if (snd_BUG_ON(info->channel >= RME9652_NCHANNELS)) 2060 return -EINVAL; 2061 2062 if ((chn = rme9652->channel_map[info->channel]) < 0) { 2063 return -EINVAL; 2064 } 2065 2066 info->offset = chn * RME9652_CHANNEL_BUFFER_BYTES; 2067 info->first = 0; 2068 info->step = 32; 2069 return 0; 2070 } 2071 2072 static int snd_rme9652_ioctl(struct snd_pcm_substream *substream, 2073 unsigned int cmd, void *arg) 2074 { 2075 switch (cmd) { 2076 case SNDRV_PCM_IOCTL1_RESET: 2077 { 2078 return snd_rme9652_reset(substream); 2079 } 2080 case SNDRV_PCM_IOCTL1_CHANNEL_INFO: 2081 { 2082 struct snd_pcm_channel_info *info = arg; 2083 return snd_rme9652_channel_info(substream, info); 2084 } 2085 default: 2086 break; 2087 } 2088 2089 return snd_pcm_lib_ioctl(substream, cmd, arg); 2090 } 2091 2092 static void rme9652_silence_playback(struct snd_rme9652 *rme9652) 2093 { 2094 memset(rme9652->playback_buffer, 0, RME9652_DMA_AREA_BYTES); 2095 } 2096 2097 static int snd_rme9652_trigger(struct snd_pcm_substream *substream, 2098 int cmd) 2099 { 2100 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 2101 struct snd_pcm_substream *other; 2102 int running; 2103 spin_lock(&rme9652->lock); 2104 running = rme9652->running; 2105 switch (cmd) { 2106 case SNDRV_PCM_TRIGGER_START: 2107 running |= 1 << substream->stream; 2108 break; 2109 case SNDRV_PCM_TRIGGER_STOP: 2110 running &= ~(1 << substream->stream); 2111 break; 2112 default: 2113 snd_BUG(); 2114 spin_unlock(&rme9652->lock); 2115 return -EINVAL; 2116 } 2117 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 2118 other = rme9652->capture_substream; 2119 else 2120 other = rme9652->playback_substream; 2121 2122 if (other) { 2123 struct snd_pcm_substream *s; 2124 snd_pcm_group_for_each_entry(s, substream) { 2125 if (s == other) { 2126 snd_pcm_trigger_done(s, substream); 2127 if (cmd == SNDRV_PCM_TRIGGER_START) 2128 running |= 1 << s->stream; 2129 else 2130 running &= ~(1 << s->stream); 2131 goto _ok; 2132 } 2133 } 2134 if (cmd == SNDRV_PCM_TRIGGER_START) { 2135 if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) && 2136 substream->stream == SNDRV_PCM_STREAM_CAPTURE) 2137 rme9652_silence_playback(rme9652); 2138 } else { 2139 if (running && 2140 substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 2141 rme9652_silence_playback(rme9652); 2142 } 2143 } else { 2144 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) 2145 rme9652_silence_playback(rme9652); 2146 } 2147 _ok: 2148 snd_pcm_trigger_done(substream, substream); 2149 if (!rme9652->running && running) 2150 rme9652_start(rme9652); 2151 else if (rme9652->running && !running) 2152 rme9652_stop(rme9652); 2153 rme9652->running = running; 2154 spin_unlock(&rme9652->lock); 2155 2156 return 0; 2157 } 2158 2159 static int snd_rme9652_prepare(struct snd_pcm_substream *substream) 2160 { 2161 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 2162 unsigned long flags; 2163 int result = 0; 2164 2165 spin_lock_irqsave(&rme9652->lock, flags); 2166 if (!rme9652->running) 2167 rme9652_reset_hw_pointer(rme9652); 2168 spin_unlock_irqrestore(&rme9652->lock, flags); 2169 return result; 2170 } 2171 2172 static struct snd_pcm_hardware snd_rme9652_playback_subinfo = 2173 { 2174 .info = (SNDRV_PCM_INFO_MMAP | 2175 SNDRV_PCM_INFO_MMAP_VALID | 2176 SNDRV_PCM_INFO_NONINTERLEAVED | 2177 SNDRV_PCM_INFO_SYNC_START | 2178 SNDRV_PCM_INFO_DOUBLE), 2179 .formats = SNDRV_PCM_FMTBIT_S32_LE, 2180 .rates = (SNDRV_PCM_RATE_44100 | 2181 SNDRV_PCM_RATE_48000 | 2182 SNDRV_PCM_RATE_88200 | 2183 SNDRV_PCM_RATE_96000), 2184 .rate_min = 44100, 2185 .rate_max = 96000, 2186 .channels_min = 10, 2187 .channels_max = 26, 2188 .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES * 26, 2189 .period_bytes_min = (64 * 4) * 10, 2190 .period_bytes_max = (8192 * 4) * 26, 2191 .periods_min = 2, 2192 .periods_max = 2, 2193 .fifo_size = 0, 2194 }; 2195 2196 static struct snd_pcm_hardware snd_rme9652_capture_subinfo = 2197 { 2198 .info = (SNDRV_PCM_INFO_MMAP | 2199 SNDRV_PCM_INFO_MMAP_VALID | 2200 SNDRV_PCM_INFO_NONINTERLEAVED | 2201 SNDRV_PCM_INFO_SYNC_START), 2202 .formats = SNDRV_PCM_FMTBIT_S32_LE, 2203 .rates = (SNDRV_PCM_RATE_44100 | 2204 SNDRV_PCM_RATE_48000 | 2205 SNDRV_PCM_RATE_88200 | 2206 SNDRV_PCM_RATE_96000), 2207 .rate_min = 44100, 2208 .rate_max = 96000, 2209 .channels_min = 10, 2210 .channels_max = 26, 2211 .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES *26, 2212 .period_bytes_min = (64 * 4) * 10, 2213 .period_bytes_max = (8192 * 4) * 26, 2214 .periods_min = 2, 2215 .periods_max = 2, 2216 .fifo_size = 0, 2217 }; 2218 2219 static unsigned int period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 }; 2220 2221 static struct snd_pcm_hw_constraint_list hw_constraints_period_sizes = { 2222 .count = ARRAY_SIZE(period_sizes), 2223 .list = period_sizes, 2224 .mask = 0 2225 }; 2226 2227 static int snd_rme9652_hw_rule_channels(struct snd_pcm_hw_params *params, 2228 struct snd_pcm_hw_rule *rule) 2229 { 2230 struct snd_rme9652 *rme9652 = rule->private; 2231 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); 2232 unsigned int list[2] = { rme9652->ds_channels, rme9652->ss_channels }; 2233 return snd_interval_list(c, 2, list, 0); 2234 } 2235 2236 static int snd_rme9652_hw_rule_channels_rate(struct snd_pcm_hw_params *params, 2237 struct snd_pcm_hw_rule *rule) 2238 { 2239 struct snd_rme9652 *rme9652 = rule->private; 2240 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); 2241 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE); 2242 if (r->min > 48000) { 2243 struct snd_interval t = { 2244 .min = rme9652->ds_channels, 2245 .max = rme9652->ds_channels, 2246 .integer = 1, 2247 }; 2248 return snd_interval_refine(c, &t); 2249 } else if (r->max < 88200) { 2250 struct snd_interval t = { 2251 .min = rme9652->ss_channels, 2252 .max = rme9652->ss_channels, 2253 .integer = 1, 2254 }; 2255 return snd_interval_refine(c, &t); 2256 } 2257 return 0; 2258 } 2259 2260 static int snd_rme9652_hw_rule_rate_channels(struct snd_pcm_hw_params *params, 2261 struct snd_pcm_hw_rule *rule) 2262 { 2263 struct snd_rme9652 *rme9652 = rule->private; 2264 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); 2265 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE); 2266 if (c->min >= rme9652->ss_channels) { 2267 struct snd_interval t = { 2268 .min = 44100, 2269 .max = 48000, 2270 .integer = 1, 2271 }; 2272 return snd_interval_refine(r, &t); 2273 } else if (c->max <= rme9652->ds_channels) { 2274 struct snd_interval t = { 2275 .min = 88200, 2276 .max = 96000, 2277 .integer = 1, 2278 }; 2279 return snd_interval_refine(r, &t); 2280 } 2281 return 0; 2282 } 2283 2284 static int snd_rme9652_playback_open(struct snd_pcm_substream *substream) 2285 { 2286 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 2287 struct snd_pcm_runtime *runtime = substream->runtime; 2288 2289 spin_lock_irq(&rme9652->lock); 2290 2291 snd_pcm_set_sync(substream); 2292 2293 runtime->hw = snd_rme9652_playback_subinfo; 2294 runtime->dma_area = rme9652->playback_buffer; 2295 runtime->dma_bytes = RME9652_DMA_AREA_BYTES; 2296 2297 if (rme9652->capture_substream == NULL) { 2298 rme9652_stop(rme9652); 2299 rme9652_set_thru(rme9652, -1, 0); 2300 } 2301 2302 rme9652->playback_pid = current->pid; 2303 rme9652->playback_substream = substream; 2304 2305 spin_unlock_irq(&rme9652->lock); 2306 2307 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 2308 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes); 2309 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2310 snd_rme9652_hw_rule_channels, rme9652, 2311 SNDRV_PCM_HW_PARAM_CHANNELS, -1); 2312 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2313 snd_rme9652_hw_rule_channels_rate, rme9652, 2314 SNDRV_PCM_HW_PARAM_RATE, -1); 2315 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 2316 snd_rme9652_hw_rule_rate_channels, rme9652, 2317 SNDRV_PCM_HW_PARAM_CHANNELS, -1); 2318 2319 rme9652->creg_spdif_stream = rme9652->creg_spdif; 2320 rme9652->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE; 2321 snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE | 2322 SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id); 2323 return 0; 2324 } 2325 2326 static int snd_rme9652_playback_release(struct snd_pcm_substream *substream) 2327 { 2328 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 2329 2330 spin_lock_irq(&rme9652->lock); 2331 2332 rme9652->playback_pid = -1; 2333 rme9652->playback_substream = NULL; 2334 2335 spin_unlock_irq(&rme9652->lock); 2336 2337 rme9652->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE; 2338 snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE | 2339 SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id); 2340 return 0; 2341 } 2342 2343 2344 static int snd_rme9652_capture_open(struct snd_pcm_substream *substream) 2345 { 2346 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 2347 struct snd_pcm_runtime *runtime = substream->runtime; 2348 2349 spin_lock_irq(&rme9652->lock); 2350 2351 snd_pcm_set_sync(substream); 2352 2353 runtime->hw = snd_rme9652_capture_subinfo; 2354 runtime->dma_area = rme9652->capture_buffer; 2355 runtime->dma_bytes = RME9652_DMA_AREA_BYTES; 2356 2357 if (rme9652->playback_substream == NULL) { 2358 rme9652_stop(rme9652); 2359 rme9652_set_thru(rme9652, -1, 0); 2360 } 2361 2362 rme9652->capture_pid = current->pid; 2363 rme9652->capture_substream = substream; 2364 2365 spin_unlock_irq(&rme9652->lock); 2366 2367 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 2368 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes); 2369 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2370 snd_rme9652_hw_rule_channels, rme9652, 2371 SNDRV_PCM_HW_PARAM_CHANNELS, -1); 2372 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2373 snd_rme9652_hw_rule_channels_rate, rme9652, 2374 SNDRV_PCM_HW_PARAM_RATE, -1); 2375 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 2376 snd_rme9652_hw_rule_rate_channels, rme9652, 2377 SNDRV_PCM_HW_PARAM_CHANNELS, -1); 2378 return 0; 2379 } 2380 2381 static int snd_rme9652_capture_release(struct snd_pcm_substream *substream) 2382 { 2383 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 2384 2385 spin_lock_irq(&rme9652->lock); 2386 2387 rme9652->capture_pid = -1; 2388 rme9652->capture_substream = NULL; 2389 2390 spin_unlock_irq(&rme9652->lock); 2391 return 0; 2392 } 2393 2394 static struct snd_pcm_ops snd_rme9652_playback_ops = { 2395 .open = snd_rme9652_playback_open, 2396 .close = snd_rme9652_playback_release, 2397 .ioctl = snd_rme9652_ioctl, 2398 .hw_params = snd_rme9652_hw_params, 2399 .prepare = snd_rme9652_prepare, 2400 .trigger = snd_rme9652_trigger, 2401 .pointer = snd_rme9652_hw_pointer, 2402 .copy = snd_rme9652_playback_copy, 2403 .silence = snd_rme9652_hw_silence, 2404 }; 2405 2406 static struct snd_pcm_ops snd_rme9652_capture_ops = { 2407 .open = snd_rme9652_capture_open, 2408 .close = snd_rme9652_capture_release, 2409 .ioctl = snd_rme9652_ioctl, 2410 .hw_params = snd_rme9652_hw_params, 2411 .prepare = snd_rme9652_prepare, 2412 .trigger = snd_rme9652_trigger, 2413 .pointer = snd_rme9652_hw_pointer, 2414 .copy = snd_rme9652_capture_copy, 2415 }; 2416 2417 static int snd_rme9652_create_pcm(struct snd_card *card, 2418 struct snd_rme9652 *rme9652) 2419 { 2420 struct snd_pcm *pcm; 2421 int err; 2422 2423 if ((err = snd_pcm_new(card, 2424 rme9652->card_name, 2425 0, 1, 1, &pcm)) < 0) { 2426 return err; 2427 } 2428 2429 rme9652->pcm = pcm; 2430 pcm->private_data = rme9652; 2431 strcpy(pcm->name, rme9652->card_name); 2432 2433 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_rme9652_playback_ops); 2434 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_rme9652_capture_ops); 2435 2436 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX; 2437 2438 return 0; 2439 } 2440 2441 static int snd_rme9652_create(struct snd_card *card, 2442 struct snd_rme9652 *rme9652, 2443 int precise_ptr) 2444 { 2445 struct pci_dev *pci = rme9652->pci; 2446 int err; 2447 int status; 2448 unsigned short rev; 2449 2450 rme9652->irq = -1; 2451 rme9652->card = card; 2452 2453 pci_read_config_word(rme9652->pci, PCI_CLASS_REVISION, &rev); 2454 2455 switch (rev & 0xff) { 2456 case 3: 2457 case 4: 2458 case 8: 2459 case 9: 2460 break; 2461 2462 default: 2463 /* who knows? */ 2464 return -ENODEV; 2465 } 2466 2467 if ((err = pci_enable_device(pci)) < 0) 2468 return err; 2469 2470 spin_lock_init(&rme9652->lock); 2471 2472 if ((err = pci_request_regions(pci, "rme9652")) < 0) 2473 return err; 2474 rme9652->port = pci_resource_start(pci, 0); 2475 rme9652->iobase = ioremap_nocache(rme9652->port, RME9652_IO_EXTENT); 2476 if (rme9652->iobase == NULL) { 2477 snd_printk(KERN_ERR "unable to remap region 0x%lx-0x%lx\n", rme9652->port, rme9652->port + RME9652_IO_EXTENT - 1); 2478 return -EBUSY; 2479 } 2480 2481 if (request_irq(pci->irq, snd_rme9652_interrupt, IRQF_SHARED, 2482 KBUILD_MODNAME, rme9652)) { 2483 snd_printk(KERN_ERR "unable to request IRQ %d\n", pci->irq); 2484 return -EBUSY; 2485 } 2486 rme9652->irq = pci->irq; 2487 rme9652->precise_ptr = precise_ptr; 2488 2489 /* Determine the h/w rev level of the card. This seems like 2490 a particularly kludgy way to encode it, but its what RME 2491 chose to do, so we follow them ... 2492 */ 2493 2494 status = rme9652_read(rme9652, RME9652_status_register); 2495 if (rme9652_decode_spdif_rate(status&RME9652_F) == 1) { 2496 rme9652->hw_rev = 15; 2497 } else { 2498 rme9652->hw_rev = 11; 2499 } 2500 2501 /* Differentiate between the standard Hammerfall, and the 2502 "Light", which does not have the expansion board. This 2503 method comes from information received from Mathhias 2504 Clausen at RME. Display the EEPROM and h/w revID where 2505 relevant. 2506 */ 2507 2508 switch (rev) { 2509 case 8: /* original eprom */ 2510 strcpy(card->driver, "RME9636"); 2511 if (rme9652->hw_rev == 15) { 2512 rme9652->card_name = "RME Digi9636 (Rev 1.5)"; 2513 } else { 2514 rme9652->card_name = "RME Digi9636"; 2515 } 2516 rme9652->ss_channels = RME9636_NCHANNELS; 2517 break; 2518 case 9: /* W36_G EPROM */ 2519 strcpy(card->driver, "RME9636"); 2520 rme9652->card_name = "RME Digi9636 (Rev G)"; 2521 rme9652->ss_channels = RME9636_NCHANNELS; 2522 break; 2523 case 4: /* W52_G EPROM */ 2524 strcpy(card->driver, "RME9652"); 2525 rme9652->card_name = "RME Digi9652 (Rev G)"; 2526 rme9652->ss_channels = RME9652_NCHANNELS; 2527 break; 2528 case 3: /* original eprom */ 2529 strcpy(card->driver, "RME9652"); 2530 if (rme9652->hw_rev == 15) { 2531 rme9652->card_name = "RME Digi9652 (Rev 1.5)"; 2532 } else { 2533 rme9652->card_name = "RME Digi9652"; 2534 } 2535 rme9652->ss_channels = RME9652_NCHANNELS; 2536 break; 2537 } 2538 2539 rme9652->ds_channels = (rme9652->ss_channels - 2) / 2 + 2; 2540 2541 pci_set_master(rme9652->pci); 2542 2543 if ((err = snd_rme9652_initialize_memory(rme9652)) < 0) { 2544 return err; 2545 } 2546 2547 if ((err = snd_rme9652_create_pcm(card, rme9652)) < 0) { 2548 return err; 2549 } 2550 2551 if ((err = snd_rme9652_create_controls(card, rme9652)) < 0) { 2552 return err; 2553 } 2554 2555 snd_rme9652_proc_init(rme9652); 2556 2557 rme9652->last_spdif_sample_rate = -1; 2558 rme9652->last_adat_sample_rate = -1; 2559 rme9652->playback_pid = -1; 2560 rme9652->capture_pid = -1; 2561 rme9652->capture_substream = NULL; 2562 rme9652->playback_substream = NULL; 2563 2564 snd_rme9652_set_defaults(rme9652); 2565 2566 if (rme9652->hw_rev == 15) { 2567 rme9652_initialize_spdif_receiver (rme9652); 2568 } 2569 2570 return 0; 2571 } 2572 2573 static void snd_rme9652_card_free(struct snd_card *card) 2574 { 2575 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) card->private_data; 2576 2577 if (rme9652) 2578 snd_rme9652_free(rme9652); 2579 } 2580 2581 static int snd_rme9652_probe(struct pci_dev *pci, 2582 const struct pci_device_id *pci_id) 2583 { 2584 static int dev; 2585 struct snd_rme9652 *rme9652; 2586 struct snd_card *card; 2587 int err; 2588 2589 if (dev >= SNDRV_CARDS) 2590 return -ENODEV; 2591 if (!enable[dev]) { 2592 dev++; 2593 return -ENOENT; 2594 } 2595 2596 err = snd_card_create(index[dev], id[dev], THIS_MODULE, 2597 sizeof(struct snd_rme9652), &card); 2598 2599 if (err < 0) 2600 return err; 2601 2602 rme9652 = (struct snd_rme9652 *) card->private_data; 2603 card->private_free = snd_rme9652_card_free; 2604 rme9652->dev = dev; 2605 rme9652->pci = pci; 2606 snd_card_set_dev(card, &pci->dev); 2607 2608 if ((err = snd_rme9652_create(card, rme9652, precise_ptr[dev])) < 0) { 2609 snd_card_free(card); 2610 return err; 2611 } 2612 2613 strcpy(card->shortname, rme9652->card_name); 2614 2615 sprintf(card->longname, "%s at 0x%lx, irq %d", 2616 card->shortname, rme9652->port, rme9652->irq); 2617 2618 2619 if ((err = snd_card_register(card)) < 0) { 2620 snd_card_free(card); 2621 return err; 2622 } 2623 pci_set_drvdata(pci, card); 2624 dev++; 2625 return 0; 2626 } 2627 2628 static void snd_rme9652_remove(struct pci_dev *pci) 2629 { 2630 snd_card_free(pci_get_drvdata(pci)); 2631 pci_set_drvdata(pci, NULL); 2632 } 2633 2634 static struct pci_driver rme9652_driver = { 2635 .name = KBUILD_MODNAME, 2636 .id_table = snd_rme9652_ids, 2637 .probe = snd_rme9652_probe, 2638 .remove = snd_rme9652_remove, 2639 }; 2640 2641 module_pci_driver(rme9652_driver); 2642