xref: /openbmc/linux/sound/pci/rme9652/rme9652.c (revision 8ffdff6a)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  *   ALSA driver for RME Digi9652 audio interfaces
4  *
5  *	Copyright (c) 1999 IEM - Winfried Ritsch
6  *      Copyright (c) 1999-2001  Paul Davis
7  */
8 
9 #include <linux/delay.h>
10 #include <linux/init.h>
11 #include <linux/interrupt.h>
12 #include <linux/pci.h>
13 #include <linux/module.h>
14 #include <linux/io.h>
15 #include <linux/nospec.h>
16 
17 #include <sound/core.h>
18 #include <sound/control.h>
19 #include <sound/pcm.h>
20 #include <sound/info.h>
21 #include <sound/asoundef.h>
22 #include <sound/initval.h>
23 
24 #include <asm/current.h>
25 
26 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;	/* Index 0-MAX */
27 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;	/* ID for this card */
28 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;	/* Enable this card */
29 static bool precise_ptr[SNDRV_CARDS];			/* Enable precise pointer */
30 
31 module_param_array(index, int, NULL, 0444);
32 MODULE_PARM_DESC(index, "Index value for RME Digi9652 (Hammerfall) soundcard.");
33 module_param_array(id, charp, NULL, 0444);
34 MODULE_PARM_DESC(id, "ID string for RME Digi9652 (Hammerfall) soundcard.");
35 module_param_array(enable, bool, NULL, 0444);
36 MODULE_PARM_DESC(enable, "Enable/disable specific RME96{52,36} soundcards.");
37 module_param_array(precise_ptr, bool, NULL, 0444);
38 MODULE_PARM_DESC(precise_ptr, "Enable precise pointer (doesn't work reliably).");
39 MODULE_AUTHOR("Paul Davis <pbd@op.net>, Winfried Ritsch");
40 MODULE_DESCRIPTION("RME Digi9652/Digi9636");
41 MODULE_LICENSE("GPL");
42 
43 /* The Hammerfall has two sets of 24 ADAT + 2 S/PDIF channels, one for
44    capture, one for playback. Both the ADAT and S/PDIF channels appear
45    to the host CPU in the same block of memory. There is no functional
46    difference between them in terms of access.
47 
48    The Hammerfall Light is identical to the Hammerfall, except that it
49    has 2 sets 18 channels (16 ADAT + 2 S/PDIF) for capture and playback.
50 */
51 
52 #define RME9652_NCHANNELS       26
53 #define RME9636_NCHANNELS       18
54 
55 /* Preferred sync source choices - used by "sync_pref" control switch */
56 
57 #define RME9652_SYNC_FROM_SPDIF 0
58 #define RME9652_SYNC_FROM_ADAT1 1
59 #define RME9652_SYNC_FROM_ADAT2 2
60 #define RME9652_SYNC_FROM_ADAT3 3
61 
62 /* Possible sources of S/PDIF input */
63 
64 #define RME9652_SPDIFIN_OPTICAL 0	/* optical (ADAT1) */
65 #define RME9652_SPDIFIN_COAXIAL 1	/* coaxial (RCA) */
66 #define RME9652_SPDIFIN_INTERN  2	/* internal (CDROM) */
67 
68 /* ------------- Status-Register bits --------------------- */
69 
70 #define RME9652_IRQ	   (1<<0)	/* IRQ is High if not reset by irq_clear */
71 #define RME9652_lock_2	   (1<<1)	/* ADAT 3-PLL: 1=locked, 0=unlocked */
72 #define RME9652_lock_1	   (1<<2)	/* ADAT 2-PLL: 1=locked, 0=unlocked */
73 #define RME9652_lock_0	   (1<<3)	/* ADAT 1-PLL: 1=locked, 0=unlocked */
74 #define RME9652_fs48	   (1<<4)	/* sample rate is 0=44.1/88.2,1=48/96 Khz */
75 #define RME9652_wsel_rd	   (1<<5)	/* if Word-Clock is used and valid then 1 */
76                                         /* bits 6-15 encode h/w buffer pointer position */
77 #define RME9652_sync_2	   (1<<16)	/* if ADAT-IN 3 in sync to system clock */
78 #define RME9652_sync_1	   (1<<17)	/* if ADAT-IN 2 in sync to system clock */
79 #define RME9652_sync_0	   (1<<18)	/* if ADAT-IN 1 in sync to system clock */
80 #define RME9652_DS_rd	   (1<<19)	/* 1=Double Speed Mode, 0=Normal Speed */
81 #define RME9652_tc_busy	   (1<<20)	/* 1=time-code copy in progress (960ms) */
82 #define RME9652_tc_out	   (1<<21)	/* time-code out bit */
83 #define RME9652_F_0	   (1<<22)	/* 000=64kHz, 100=88.2kHz, 011=96kHz  */
84 #define RME9652_F_1	   (1<<23)	/* 111=32kHz, 110=44.1kHz, 101=48kHz, */
85 #define RME9652_F_2	   (1<<24)	/* external Crystal Chip if ERF=1 */
86 #define RME9652_ERF	   (1<<25)	/* Error-Flag of SDPIF Receiver (1=No Lock) */
87 #define RME9652_buffer_id  (1<<26)	/* toggles by each interrupt on rec/play */
88 #define RME9652_tc_valid   (1<<27)	/* 1 = a signal is detected on time-code input */
89 #define RME9652_SPDIF_READ (1<<28)      /* byte available from Rev 1.5+ S/PDIF interface */
90 
91 #define RME9652_sync	  (RME9652_sync_0|RME9652_sync_1|RME9652_sync_2)
92 #define RME9652_lock	  (RME9652_lock_0|RME9652_lock_1|RME9652_lock_2)
93 #define RME9652_F	  (RME9652_F_0|RME9652_F_1|RME9652_F_2)
94 #define rme9652_decode_spdif_rate(x) ((x)>>22)
95 
96 /* Bit 6..15 : h/w buffer pointer */
97 
98 #define RME9652_buf_pos	  0x000FFC0
99 
100 /* Bits 31,30,29 are bits 5,4,3 of h/w pointer position on later
101    Rev G EEPROMS and Rev 1.5 cards or later.
102 */
103 
104 #define RME9652_REV15_buf_pos(x) ((((x)&0xE0000000)>>26)|((x)&RME9652_buf_pos))
105 
106 /* amount of io space we remap for register access. i'm not sure we
107    even need this much, but 1K is nice round number :)
108 */
109 
110 #define RME9652_IO_EXTENT     1024
111 
112 #define RME9652_init_buffer       0
113 #define RME9652_play_buffer       32	/* holds ptr to 26x64kBit host RAM */
114 #define RME9652_rec_buffer        36	/* holds ptr to 26x64kBit host RAM */
115 #define RME9652_control_register  64
116 #define RME9652_irq_clear         96
117 #define RME9652_time_code         100	/* useful if used with alesis adat */
118 #define RME9652_thru_base         128	/* 132...228 Thru for 26 channels */
119 
120 /* Read-only registers */
121 
122 /* Writing to any of the register locations writes to the status
123    register. We'll use the first location as our point of access.
124 */
125 
126 #define RME9652_status_register    0
127 
128 /* --------- Control-Register Bits ---------------- */
129 
130 
131 #define RME9652_start_bit	   (1<<0)	/* start record/play */
132                                                 /* bits 1-3 encode buffersize/latency */
133 #define RME9652_Master		   (1<<4)	/* Clock Mode Master=1,Slave/Auto=0 */
134 #define RME9652_IE		   (1<<5)	/* Interrupt Enable */
135 #define RME9652_freq		   (1<<6)       /* samplerate 0=44.1/88.2, 1=48/96 kHz */
136 #define RME9652_freq1		   (1<<7)       /* if 0, 32kHz, else always 1 */
137 #define RME9652_DS                 (1<<8)	/* Doule Speed 0=44.1/48, 1=88.2/96 Khz */
138 #define RME9652_PRO		   (1<<9)	/* S/PDIF out: 0=consumer, 1=professional */
139 #define RME9652_EMP		   (1<<10)	/*  Emphasis 0=None, 1=ON */
140 #define RME9652_Dolby		   (1<<11)	/*  Non-audio bit 1=set, 0=unset */
141 #define RME9652_opt_out	           (1<<12)	/* Use 1st optical OUT as SPDIF: 1=yes,0=no */
142 #define RME9652_wsel		   (1<<13)	/* use Wordclock as sync (overwrites master) */
143 #define RME9652_inp_0		   (1<<14)	/* SPDIF-IN: 00=optical (ADAT1),     */
144 #define RME9652_inp_1		   (1<<15)	/* 01=koaxial (Cinch), 10=Internal CDROM */
145 #define RME9652_SyncPref_ADAT2	   (1<<16)
146 #define RME9652_SyncPref_ADAT3	   (1<<17)
147 #define RME9652_SPDIF_RESET        (1<<18)      /* Rev 1.5+: h/w S/PDIF receiver */
148 #define RME9652_SPDIF_SELECT       (1<<19)
149 #define RME9652_SPDIF_CLOCK        (1<<20)
150 #define RME9652_SPDIF_WRITE        (1<<21)
151 #define RME9652_ADAT1_INTERNAL     (1<<22)      /* Rev 1.5+: if set, internal CD connector carries ADAT */
152 
153 /* buffersize = 512Bytes * 2^n, where n is made from Bit2 ... Bit0 */
154 
155 #define RME9652_latency            0x0e
156 #define rme9652_encode_latency(x)  (((x)&0x7)<<1)
157 #define rme9652_decode_latency(x)  (((x)>>1)&0x7)
158 #define rme9652_running_double_speed(s) ((s)->control_register & RME9652_DS)
159 #define RME9652_inp                (RME9652_inp_0|RME9652_inp_1)
160 #define rme9652_encode_spdif_in(x) (((x)&0x3)<<14)
161 #define rme9652_decode_spdif_in(x) (((x)>>14)&0x3)
162 
163 #define RME9652_SyncPref_Mask      (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
164 #define RME9652_SyncPref_ADAT1	   0
165 #define RME9652_SyncPref_SPDIF	   (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
166 
167 /* the size of a substream (1 mono data stream) */
168 
169 #define RME9652_CHANNEL_BUFFER_SAMPLES  (16*1024)
170 #define RME9652_CHANNEL_BUFFER_BYTES    (4*RME9652_CHANNEL_BUFFER_SAMPLES)
171 
172 /* the size of the area we need to allocate for DMA transfers. the
173    size is the same regardless of the number of channels - the
174    9636 still uses the same memory area.
175 
176    Note that we allocate 1 more channel than is apparently needed
177    because the h/w seems to write 1 byte beyond the end of the last
178    page. Sigh.
179 */
180 
181 #define RME9652_DMA_AREA_BYTES ((RME9652_NCHANNELS+1) * RME9652_CHANNEL_BUFFER_BYTES)
182 #define RME9652_DMA_AREA_KILOBYTES (RME9652_DMA_AREA_BYTES/1024)
183 
184 struct snd_rme9652 {
185 	int dev;
186 
187 	spinlock_t lock;
188 	int irq;
189 	unsigned long port;
190 	void __iomem *iobase;
191 
192 	int precise_ptr;
193 
194 	u32 control_register;	/* cached value */
195 	u32 thru_bits;		/* thru 1=on, 0=off channel 1=Bit1... channel 26= Bit26 */
196 
197 	u32 creg_spdif;
198 	u32 creg_spdif_stream;
199 
200 	char *card_name;		/* hammerfall or hammerfall light names */
201 
202         size_t hw_offsetmask;     	/* &-with status register to get real hw_offset */
203 	size_t prev_hw_offset;		/* previous hw offset */
204 	size_t max_jitter;		/* maximum jitter in frames for
205 					   hw pointer */
206 	size_t period_bytes;		/* guess what this is */
207 
208 	unsigned char ds_channels;
209 	unsigned char ss_channels;	/* different for hammerfall/hammerfall-light */
210 
211 	struct snd_dma_buffer playback_dma_buf;
212 	struct snd_dma_buffer capture_dma_buf;
213 
214 	unsigned char *capture_buffer;	/* suitably aligned address */
215 	unsigned char *playback_buffer;	/* suitably aligned address */
216 
217 	pid_t capture_pid;
218 	pid_t playback_pid;
219 
220 	struct snd_pcm_substream *capture_substream;
221 	struct snd_pcm_substream *playback_substream;
222 	int running;
223 
224         int passthru;                   /* non-zero if doing pass-thru */
225         int hw_rev;                     /* h/w rev * 10 (i.e. 1.5 has hw_rev = 15) */
226 
227 	int last_spdif_sample_rate;	/* so that we can catch externally ... */
228 	int last_adat_sample_rate;	/* ... induced rate changes            */
229 
230 	const char *channel_map;
231 
232 	struct snd_card *card;
233 	struct snd_pcm *pcm;
234 	struct pci_dev *pci;
235 	struct snd_kcontrol *spdif_ctl;
236 
237 };
238 
239 /* These tables map the ALSA channels 1..N to the channels that we
240    need to use in order to find the relevant channel buffer. RME
241    refer to this kind of mapping as between "the ADAT channel and
242    the DMA channel." We index it using the logical audio channel,
243    and the value is the DMA channel (i.e. channel buffer number)
244    where the data for that channel can be read/written from/to.
245 */
246 
247 static const char channel_map_9652_ss[26] = {
248 	0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
249 	18, 19, 20, 21, 22, 23, 24, 25
250 };
251 
252 static const char channel_map_9636_ss[26] = {
253 	0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
254 	/* channels 16 and 17 are S/PDIF */
255 	24, 25,
256 	/* channels 18-25 don't exist */
257 	-1, -1, -1, -1, -1, -1, -1, -1
258 };
259 
260 static const char channel_map_9652_ds[26] = {
261 	/* ADAT channels are remapped */
262 	1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23,
263 	/* channels 12 and 13 are S/PDIF */
264 	24, 25,
265 	/* others don't exist */
266 	-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
267 };
268 
269 static const char channel_map_9636_ds[26] = {
270 	/* ADAT channels are remapped */
271 	1, 3, 5, 7, 9, 11, 13, 15,
272 	/* channels 8 and 9 are S/PDIF */
273 	24, 25,
274 	/* others don't exist */
275 	-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
276 };
277 
278 static int snd_hammerfall_get_buffer(struct pci_dev *pci, struct snd_dma_buffer *dmab, size_t size)
279 {
280 	return snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &pci->dev, size, dmab);
281 }
282 
283 static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci)
284 {
285 	if (dmab->area)
286 		snd_dma_free_pages(dmab);
287 }
288 
289 
290 static const struct pci_device_id snd_rme9652_ids[] = {
291 	{
292 		.vendor	   = 0x10ee,
293 		.device	   = 0x3fc4,
294 		.subvendor = PCI_ANY_ID,
295 		.subdevice = PCI_ANY_ID,
296 	},	/* RME Digi9652 */
297 	{ 0, },
298 };
299 
300 MODULE_DEVICE_TABLE(pci, snd_rme9652_ids);
301 
302 static inline void rme9652_write(struct snd_rme9652 *rme9652, int reg, int val)
303 {
304 	writel(val, rme9652->iobase + reg);
305 }
306 
307 static inline unsigned int rme9652_read(struct snd_rme9652 *rme9652, int reg)
308 {
309 	return readl(rme9652->iobase + reg);
310 }
311 
312 static inline int snd_rme9652_use_is_exclusive(struct snd_rme9652 *rme9652)
313 {
314 	unsigned long flags;
315 	int ret = 1;
316 
317 	spin_lock_irqsave(&rme9652->lock, flags);
318 	if ((rme9652->playback_pid != rme9652->capture_pid) &&
319 	    (rme9652->playback_pid >= 0) && (rme9652->capture_pid >= 0)) {
320 		ret = 0;
321 	}
322 	spin_unlock_irqrestore(&rme9652->lock, flags);
323 	return ret;
324 }
325 
326 static inline int rme9652_adat_sample_rate(struct snd_rme9652 *rme9652)
327 {
328 	if (rme9652_running_double_speed(rme9652)) {
329 		return (rme9652_read(rme9652, RME9652_status_register) &
330 			RME9652_fs48) ? 96000 : 88200;
331 	} else {
332 		return (rme9652_read(rme9652, RME9652_status_register) &
333 			RME9652_fs48) ? 48000 : 44100;
334 	}
335 }
336 
337 static inline void rme9652_compute_period_size(struct snd_rme9652 *rme9652)
338 {
339 	unsigned int i;
340 
341 	i = rme9652->control_register & RME9652_latency;
342 	rme9652->period_bytes = 1 << ((rme9652_decode_latency(i) + 8));
343 	rme9652->hw_offsetmask =
344 		(rme9652->period_bytes * 2 - 1) & RME9652_buf_pos;
345 	rme9652->max_jitter = 80;
346 }
347 
348 static snd_pcm_uframes_t rme9652_hw_pointer(struct snd_rme9652 *rme9652)
349 {
350 	int status;
351 	unsigned int offset, frag;
352 	snd_pcm_uframes_t period_size = rme9652->period_bytes / 4;
353 	snd_pcm_sframes_t delta;
354 
355 	status = rme9652_read(rme9652, RME9652_status_register);
356 	if (!rme9652->precise_ptr)
357 		return (status & RME9652_buffer_id) ? period_size : 0;
358 	offset = status & RME9652_buf_pos;
359 
360 	/* The hardware may give a backward movement for up to 80 frames
361            Martin Kirst <martin.kirst@freenet.de> knows the details.
362 	*/
363 
364 	delta = rme9652->prev_hw_offset - offset;
365 	delta &= 0xffff;
366 	if (delta <= (snd_pcm_sframes_t)rme9652->max_jitter * 4)
367 		offset = rme9652->prev_hw_offset;
368 	else
369 		rme9652->prev_hw_offset = offset;
370 	offset &= rme9652->hw_offsetmask;
371 	offset /= 4;
372 	frag = status & RME9652_buffer_id;
373 
374 	if (offset < period_size) {
375 		if (offset > rme9652->max_jitter) {
376 			if (frag)
377 				dev_err(rme9652->card->dev,
378 					"Unexpected hw_pointer position (bufid == 0): status: %x offset: %d\n",
379 					status, offset);
380 		} else if (!frag)
381 			return 0;
382 		offset -= rme9652->max_jitter;
383 		if ((int)offset < 0)
384 			offset += period_size * 2;
385 	} else {
386 		if (offset > period_size + rme9652->max_jitter) {
387 			if (!frag)
388 				dev_err(rme9652->card->dev,
389 					"Unexpected hw_pointer position (bufid == 1): status: %x offset: %d\n",
390 					status, offset);
391 		} else if (frag)
392 			return period_size;
393 		offset -= rme9652->max_jitter;
394 	}
395 
396 	return offset;
397 }
398 
399 static inline void rme9652_reset_hw_pointer(struct snd_rme9652 *rme9652)
400 {
401 	int i;
402 
403 	/* reset the FIFO pointer to zero. We do this by writing to 8
404 	   registers, each of which is a 32bit wide register, and set
405 	   them all to zero. Note that s->iobase is a pointer to
406 	   int32, not pointer to char.
407 	*/
408 
409 	for (i = 0; i < 8; i++) {
410 		rme9652_write(rme9652, i * 4, 0);
411 		udelay(10);
412 	}
413 	rme9652->prev_hw_offset = 0;
414 }
415 
416 static inline void rme9652_start(struct snd_rme9652 *s)
417 {
418 	s->control_register |= (RME9652_IE | RME9652_start_bit);
419 	rme9652_write(s, RME9652_control_register, s->control_register);
420 }
421 
422 static inline void rme9652_stop(struct snd_rme9652 *s)
423 {
424 	s->control_register &= ~(RME9652_start_bit | RME9652_IE);
425 	rme9652_write(s, RME9652_control_register, s->control_register);
426 }
427 
428 static int rme9652_set_interrupt_interval(struct snd_rme9652 *s,
429 					  unsigned int frames)
430 {
431 	int restart = 0;
432 	int n;
433 
434 	spin_lock_irq(&s->lock);
435 
436 	if ((restart = s->running)) {
437 		rme9652_stop(s);
438 	}
439 
440 	frames >>= 7;
441 	n = 0;
442 	while (frames) {
443 		n++;
444 		frames >>= 1;
445 	}
446 
447 	s->control_register &= ~RME9652_latency;
448 	s->control_register |= rme9652_encode_latency(n);
449 
450 	rme9652_write(s, RME9652_control_register, s->control_register);
451 
452 	rme9652_compute_period_size(s);
453 
454 	if (restart)
455 		rme9652_start(s);
456 
457 	spin_unlock_irq(&s->lock);
458 
459 	return 0;
460 }
461 
462 static int rme9652_set_rate(struct snd_rme9652 *rme9652, int rate)
463 {
464 	int restart;
465 	int reject_if_open = 0;
466 	int xrate;
467 
468 	if (!snd_rme9652_use_is_exclusive (rme9652)) {
469 		return -EBUSY;
470 	}
471 
472 	/* Changing from a "single speed" to a "double speed" rate is
473 	   not allowed if any substreams are open. This is because
474 	   such a change causes a shift in the location of
475 	   the DMA buffers and a reduction in the number of available
476 	   buffers.
477 
478 	   Note that a similar but essentially insoluble problem
479 	   exists for externally-driven rate changes. All we can do
480 	   is to flag rate changes in the read/write routines.
481 	 */
482 
483 	spin_lock_irq(&rme9652->lock);
484 	xrate = rme9652_adat_sample_rate(rme9652);
485 
486 	switch (rate) {
487 	case 44100:
488 		if (xrate > 48000) {
489 			reject_if_open = 1;
490 		}
491 		rate = 0;
492 		break;
493 	case 48000:
494 		if (xrate > 48000) {
495 			reject_if_open = 1;
496 		}
497 		rate = RME9652_freq;
498 		break;
499 	case 88200:
500 		if (xrate < 48000) {
501 			reject_if_open = 1;
502 		}
503 		rate = RME9652_DS;
504 		break;
505 	case 96000:
506 		if (xrate < 48000) {
507 			reject_if_open = 1;
508 		}
509 		rate = RME9652_DS | RME9652_freq;
510 		break;
511 	default:
512 		spin_unlock_irq(&rme9652->lock);
513 		return -EINVAL;
514 	}
515 
516 	if (reject_if_open && (rme9652->capture_pid >= 0 || rme9652->playback_pid >= 0)) {
517 		spin_unlock_irq(&rme9652->lock);
518 		return -EBUSY;
519 	}
520 
521 	if ((restart = rme9652->running)) {
522 		rme9652_stop(rme9652);
523 	}
524 	rme9652->control_register &= ~(RME9652_freq | RME9652_DS);
525 	rme9652->control_register |= rate;
526 	rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
527 
528 	if (restart) {
529 		rme9652_start(rme9652);
530 	}
531 
532 	if (rate & RME9652_DS) {
533 		if (rme9652->ss_channels == RME9652_NCHANNELS) {
534 			rme9652->channel_map = channel_map_9652_ds;
535 		} else {
536 			rme9652->channel_map = channel_map_9636_ds;
537 		}
538 	} else {
539 		if (rme9652->ss_channels == RME9652_NCHANNELS) {
540 			rme9652->channel_map = channel_map_9652_ss;
541 		} else {
542 			rme9652->channel_map = channel_map_9636_ss;
543 		}
544 	}
545 
546 	spin_unlock_irq(&rme9652->lock);
547 	return 0;
548 }
549 
550 static void rme9652_set_thru(struct snd_rme9652 *rme9652, int channel, int enable)
551 {
552 	int i;
553 
554 	rme9652->passthru = 0;
555 
556 	if (channel < 0) {
557 
558 		/* set thru for all channels */
559 
560 		if (enable) {
561 			for (i = 0; i < RME9652_NCHANNELS; i++) {
562 				rme9652->thru_bits |= (1 << i);
563 				rme9652_write(rme9652, RME9652_thru_base + i * 4, 1);
564 			}
565 		} else {
566 			for (i = 0; i < RME9652_NCHANNELS; i++) {
567 				rme9652->thru_bits &= ~(1 << i);
568 				rme9652_write(rme9652, RME9652_thru_base + i * 4, 0);
569 			}
570 		}
571 
572 	} else {
573 		int mapped_channel;
574 
575 		mapped_channel = rme9652->channel_map[channel];
576 
577 		if (enable) {
578 			rme9652->thru_bits |= (1 << mapped_channel);
579 		} else {
580 			rme9652->thru_bits &= ~(1 << mapped_channel);
581 		}
582 
583 		rme9652_write(rme9652,
584 			       RME9652_thru_base + mapped_channel * 4,
585 			       enable ? 1 : 0);
586 	}
587 }
588 
589 static int rme9652_set_passthru(struct snd_rme9652 *rme9652, int onoff)
590 {
591 	if (onoff) {
592 		rme9652_set_thru(rme9652, -1, 1);
593 
594 		/* we don't want interrupts, so do a
595 		   custom version of rme9652_start().
596 		*/
597 
598 		rme9652->control_register =
599 			RME9652_inp_0 |
600 			rme9652_encode_latency(7) |
601 			RME9652_start_bit;
602 
603 		rme9652_reset_hw_pointer(rme9652);
604 
605 		rme9652_write(rme9652, RME9652_control_register,
606 			      rme9652->control_register);
607 		rme9652->passthru = 1;
608 	} else {
609 		rme9652_set_thru(rme9652, -1, 0);
610 		rme9652_stop(rme9652);
611 		rme9652->passthru = 0;
612 	}
613 
614 	return 0;
615 }
616 
617 static void rme9652_spdif_set_bit (struct snd_rme9652 *rme9652, int mask, int onoff)
618 {
619 	if (onoff)
620 		rme9652->control_register |= mask;
621 	else
622 		rme9652->control_register &= ~mask;
623 
624 	rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
625 }
626 
627 static void rme9652_spdif_write_byte (struct snd_rme9652 *rme9652, const int val)
628 {
629 	long mask;
630 	long i;
631 
632 	for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
633 		if (val & mask)
634 			rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 1);
635 		else
636 			rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 0);
637 
638 		rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
639 		rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
640 	}
641 }
642 
643 static int rme9652_spdif_read_byte (struct snd_rme9652 *rme9652)
644 {
645 	long mask;
646 	long val;
647 	long i;
648 
649 	val = 0;
650 
651 	for (i = 0, mask = 0x80;  i < 8; i++, mask >>= 1) {
652 		rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
653 		if (rme9652_read (rme9652, RME9652_status_register) & RME9652_SPDIF_READ)
654 			val |= mask;
655 		rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
656 	}
657 
658 	return val;
659 }
660 
661 static void rme9652_write_spdif_codec (struct snd_rme9652 *rme9652, const int address, const int data)
662 {
663 	rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
664 	rme9652_spdif_write_byte (rme9652, 0x20);
665 	rme9652_spdif_write_byte (rme9652, address);
666 	rme9652_spdif_write_byte (rme9652, data);
667 	rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
668 }
669 
670 
671 static int rme9652_spdif_read_codec (struct snd_rme9652 *rme9652, const int address)
672 {
673 	int ret;
674 
675 	rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
676 	rme9652_spdif_write_byte (rme9652, 0x20);
677 	rme9652_spdif_write_byte (rme9652, address);
678 	rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
679 	rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
680 
681 	rme9652_spdif_write_byte (rme9652, 0x21);
682 	ret = rme9652_spdif_read_byte (rme9652);
683 	rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
684 
685 	return ret;
686 }
687 
688 static void rme9652_initialize_spdif_receiver (struct snd_rme9652 *rme9652)
689 {
690 	/* XXX what unsets this ? */
691 
692 	rme9652->control_register |= RME9652_SPDIF_RESET;
693 
694 	rme9652_write_spdif_codec (rme9652, 4, 0x40);
695 	rme9652_write_spdif_codec (rme9652, 17, 0x13);
696 	rme9652_write_spdif_codec (rme9652, 6, 0x02);
697 }
698 
699 static inline int rme9652_spdif_sample_rate(struct snd_rme9652 *s)
700 {
701 	unsigned int rate_bits;
702 
703 	if (rme9652_read(s, RME9652_status_register) & RME9652_ERF) {
704 		return -1;	/* error condition */
705 	}
706 
707 	if (s->hw_rev == 15) {
708 
709 		int x, y, ret;
710 
711 		x = rme9652_spdif_read_codec (s, 30);
712 
713 		if (x != 0)
714 			y = 48000 * 64 / x;
715 		else
716 			y = 0;
717 
718 		if      (y > 30400 && y < 33600)  ret = 32000;
719 		else if (y > 41900 && y < 46000)  ret = 44100;
720 		else if (y > 46000 && y < 50400)  ret = 48000;
721 		else if (y > 60800 && y < 67200)  ret = 64000;
722 		else if (y > 83700 && y < 92000)  ret = 88200;
723 		else if (y > 92000 && y < 100000) ret = 96000;
724 		else                              ret = 0;
725 		return ret;
726 	}
727 
728 	rate_bits = rme9652_read(s, RME9652_status_register) & RME9652_F;
729 
730 	switch (rme9652_decode_spdif_rate(rate_bits)) {
731 	case 0x7:
732 		return 32000;
733 
734 	case 0x6:
735 		return 44100;
736 
737 	case 0x5:
738 		return 48000;
739 
740 	case 0x4:
741 		return 88200;
742 
743 	case 0x3:
744 		return 96000;
745 
746 	case 0x0:
747 		return 64000;
748 
749 	default:
750 		dev_err(s->card->dev,
751 			"%s: unknown S/PDIF input rate (bits = 0x%x)\n",
752 			   s->card_name, rate_bits);
753 		return 0;
754 	}
755 }
756 
757 /*-----------------------------------------------------------------------------
758   Control Interface
759   ----------------------------------------------------------------------------*/
760 
761 static u32 snd_rme9652_convert_from_aes(struct snd_aes_iec958 *aes)
762 {
763 	u32 val = 0;
764 	val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? RME9652_PRO : 0;
765 	val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? RME9652_Dolby : 0;
766 	if (val & RME9652_PRO)
767 		val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? RME9652_EMP : 0;
768 	else
769 		val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? RME9652_EMP : 0;
770 	return val;
771 }
772 
773 static void snd_rme9652_convert_to_aes(struct snd_aes_iec958 *aes, u32 val)
774 {
775 	aes->status[0] = ((val & RME9652_PRO) ? IEC958_AES0_PROFESSIONAL : 0) |
776 			 ((val & RME9652_Dolby) ? IEC958_AES0_NONAUDIO : 0);
777 	if (val & RME9652_PRO)
778 		aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
779 	else
780 		aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
781 }
782 
783 static int snd_rme9652_control_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
784 {
785 	uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
786 	uinfo->count = 1;
787 	return 0;
788 }
789 
790 static int snd_rme9652_control_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
791 {
792 	struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
793 
794 	snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif);
795 	return 0;
796 }
797 
798 static int snd_rme9652_control_spdif_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
799 {
800 	struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
801 	int change;
802 	u32 val;
803 
804 	val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
805 	spin_lock_irq(&rme9652->lock);
806 	change = val != rme9652->creg_spdif;
807 	rme9652->creg_spdif = val;
808 	spin_unlock_irq(&rme9652->lock);
809 	return change;
810 }
811 
812 static int snd_rme9652_control_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
813 {
814 	uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
815 	uinfo->count = 1;
816 	return 0;
817 }
818 
819 static int snd_rme9652_control_spdif_stream_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
820 {
821 	struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
822 
823 	snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif_stream);
824 	return 0;
825 }
826 
827 static int snd_rme9652_control_spdif_stream_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
828 {
829 	struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
830 	int change;
831 	u32 val;
832 
833 	val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
834 	spin_lock_irq(&rme9652->lock);
835 	change = val != rme9652->creg_spdif_stream;
836 	rme9652->creg_spdif_stream = val;
837 	rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
838 	rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= val);
839 	spin_unlock_irq(&rme9652->lock);
840 	return change;
841 }
842 
843 static int snd_rme9652_control_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
844 {
845 	uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
846 	uinfo->count = 1;
847 	return 0;
848 }
849 
850 static int snd_rme9652_control_spdif_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
851 {
852 	ucontrol->value.iec958.status[0] = kcontrol->private_value;
853 	return 0;
854 }
855 
856 #define RME9652_ADAT1_IN(xname, xindex) \
857 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
858   .info = snd_rme9652_info_adat1_in, \
859   .get = snd_rme9652_get_adat1_in, \
860   .put = snd_rme9652_put_adat1_in }
861 
862 static unsigned int rme9652_adat1_in(struct snd_rme9652 *rme9652)
863 {
864 	if (rme9652->control_register & RME9652_ADAT1_INTERNAL)
865 		return 1;
866 	return 0;
867 }
868 
869 static int rme9652_set_adat1_input(struct snd_rme9652 *rme9652, int internal)
870 {
871 	int restart = 0;
872 
873 	if (internal) {
874 		rme9652->control_register |= RME9652_ADAT1_INTERNAL;
875 	} else {
876 		rme9652->control_register &= ~RME9652_ADAT1_INTERNAL;
877 	}
878 
879 	/* XXX do we actually need to stop the card when we do this ? */
880 
881 	if ((restart = rme9652->running)) {
882 		rme9652_stop(rme9652);
883 	}
884 
885 	rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
886 
887 	if (restart) {
888 		rme9652_start(rme9652);
889 	}
890 
891 	return 0;
892 }
893 
894 static int snd_rme9652_info_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
895 {
896 	static const char * const texts[2] = {"ADAT1", "Internal"};
897 
898 	return snd_ctl_enum_info(uinfo, 1, 2, texts);
899 }
900 
901 static int snd_rme9652_get_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
902 {
903 	struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
904 
905 	spin_lock_irq(&rme9652->lock);
906 	ucontrol->value.enumerated.item[0] = rme9652_adat1_in(rme9652);
907 	spin_unlock_irq(&rme9652->lock);
908 	return 0;
909 }
910 
911 static int snd_rme9652_put_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
912 {
913 	struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
914 	int change;
915 	unsigned int val;
916 
917 	if (!snd_rme9652_use_is_exclusive(rme9652))
918 		return -EBUSY;
919 	val = ucontrol->value.enumerated.item[0] % 2;
920 	spin_lock_irq(&rme9652->lock);
921 	change = val != rme9652_adat1_in(rme9652);
922 	if (change)
923 		rme9652_set_adat1_input(rme9652, val);
924 	spin_unlock_irq(&rme9652->lock);
925 	return change;
926 }
927 
928 #define RME9652_SPDIF_IN(xname, xindex) \
929 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
930   .info = snd_rme9652_info_spdif_in, \
931   .get = snd_rme9652_get_spdif_in, .put = snd_rme9652_put_spdif_in }
932 
933 static unsigned int rme9652_spdif_in(struct snd_rme9652 *rme9652)
934 {
935 	return rme9652_decode_spdif_in(rme9652->control_register &
936 				       RME9652_inp);
937 }
938 
939 static int rme9652_set_spdif_input(struct snd_rme9652 *rme9652, int in)
940 {
941 	int restart = 0;
942 
943 	rme9652->control_register &= ~RME9652_inp;
944 	rme9652->control_register |= rme9652_encode_spdif_in(in);
945 
946 	if ((restart = rme9652->running)) {
947 		rme9652_stop(rme9652);
948 	}
949 
950 	rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
951 
952 	if (restart) {
953 		rme9652_start(rme9652);
954 	}
955 
956 	return 0;
957 }
958 
959 static int snd_rme9652_info_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
960 {
961 	static const char * const texts[3] = {"ADAT1", "Coaxial", "Internal"};
962 
963 	return snd_ctl_enum_info(uinfo, 1, 3, texts);
964 }
965 
966 static int snd_rme9652_get_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
967 {
968 	struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
969 
970 	spin_lock_irq(&rme9652->lock);
971 	ucontrol->value.enumerated.item[0] = rme9652_spdif_in(rme9652);
972 	spin_unlock_irq(&rme9652->lock);
973 	return 0;
974 }
975 
976 static int snd_rme9652_put_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
977 {
978 	struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
979 	int change;
980 	unsigned int val;
981 
982 	if (!snd_rme9652_use_is_exclusive(rme9652))
983 		return -EBUSY;
984 	val = ucontrol->value.enumerated.item[0] % 3;
985 	spin_lock_irq(&rme9652->lock);
986 	change = val != rme9652_spdif_in(rme9652);
987 	if (change)
988 		rme9652_set_spdif_input(rme9652, val);
989 	spin_unlock_irq(&rme9652->lock);
990 	return change;
991 }
992 
993 #define RME9652_SPDIF_OUT(xname, xindex) \
994 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
995   .info = snd_rme9652_info_spdif_out, \
996   .get = snd_rme9652_get_spdif_out, .put = snd_rme9652_put_spdif_out }
997 
998 static int rme9652_spdif_out(struct snd_rme9652 *rme9652)
999 {
1000 	return (rme9652->control_register & RME9652_opt_out) ? 1 : 0;
1001 }
1002 
1003 static int rme9652_set_spdif_output(struct snd_rme9652 *rme9652, int out)
1004 {
1005 	int restart = 0;
1006 
1007 	if (out) {
1008 		rme9652->control_register |= RME9652_opt_out;
1009 	} else {
1010 		rme9652->control_register &= ~RME9652_opt_out;
1011 	}
1012 
1013 	if ((restart = rme9652->running)) {
1014 		rme9652_stop(rme9652);
1015 	}
1016 
1017 	rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1018 
1019 	if (restart) {
1020 		rme9652_start(rme9652);
1021 	}
1022 
1023 	return 0;
1024 }
1025 
1026 #define snd_rme9652_info_spdif_out	snd_ctl_boolean_mono_info
1027 
1028 static int snd_rme9652_get_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1029 {
1030 	struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1031 
1032 	spin_lock_irq(&rme9652->lock);
1033 	ucontrol->value.integer.value[0] = rme9652_spdif_out(rme9652);
1034 	spin_unlock_irq(&rme9652->lock);
1035 	return 0;
1036 }
1037 
1038 static int snd_rme9652_put_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1039 {
1040 	struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1041 	int change;
1042 	unsigned int val;
1043 
1044 	if (!snd_rme9652_use_is_exclusive(rme9652))
1045 		return -EBUSY;
1046 	val = ucontrol->value.integer.value[0] & 1;
1047 	spin_lock_irq(&rme9652->lock);
1048 	change = (int)val != rme9652_spdif_out(rme9652);
1049 	rme9652_set_spdif_output(rme9652, val);
1050 	spin_unlock_irq(&rme9652->lock);
1051 	return change;
1052 }
1053 
1054 #define RME9652_SYNC_MODE(xname, xindex) \
1055 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1056   .info = snd_rme9652_info_sync_mode, \
1057   .get = snd_rme9652_get_sync_mode, .put = snd_rme9652_put_sync_mode }
1058 
1059 static int rme9652_sync_mode(struct snd_rme9652 *rme9652)
1060 {
1061 	if (rme9652->control_register & RME9652_wsel) {
1062 		return 2;
1063 	} else if (rme9652->control_register & RME9652_Master) {
1064 		return 1;
1065 	} else {
1066 		return 0;
1067 	}
1068 }
1069 
1070 static int rme9652_set_sync_mode(struct snd_rme9652 *rme9652, int mode)
1071 {
1072 	int restart = 0;
1073 
1074 	switch (mode) {
1075 	case 0:
1076 		rme9652->control_register &=
1077 		    ~(RME9652_Master | RME9652_wsel);
1078 		break;
1079 	case 1:
1080 		rme9652->control_register =
1081 		    (rme9652->control_register & ~RME9652_wsel) | RME9652_Master;
1082 		break;
1083 	case 2:
1084 		rme9652->control_register |=
1085 		    (RME9652_Master | RME9652_wsel);
1086 		break;
1087 	}
1088 
1089 	if ((restart = rme9652->running)) {
1090 		rme9652_stop(rme9652);
1091 	}
1092 
1093 	rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1094 
1095 	if (restart) {
1096 		rme9652_start(rme9652);
1097 	}
1098 
1099 	return 0;
1100 }
1101 
1102 static int snd_rme9652_info_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1103 {
1104 	static const char * const texts[3] = {
1105 		"AutoSync", "Master", "Word Clock"
1106 	};
1107 
1108 	return snd_ctl_enum_info(uinfo, 1, 3, texts);
1109 }
1110 
1111 static int snd_rme9652_get_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1112 {
1113 	struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1114 
1115 	spin_lock_irq(&rme9652->lock);
1116 	ucontrol->value.enumerated.item[0] = rme9652_sync_mode(rme9652);
1117 	spin_unlock_irq(&rme9652->lock);
1118 	return 0;
1119 }
1120 
1121 static int snd_rme9652_put_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1122 {
1123 	struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1124 	int change;
1125 	unsigned int val;
1126 
1127 	val = ucontrol->value.enumerated.item[0] % 3;
1128 	spin_lock_irq(&rme9652->lock);
1129 	change = (int)val != rme9652_sync_mode(rme9652);
1130 	rme9652_set_sync_mode(rme9652, val);
1131 	spin_unlock_irq(&rme9652->lock);
1132 	return change;
1133 }
1134 
1135 #define RME9652_SYNC_PREF(xname, xindex) \
1136 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1137   .info = snd_rme9652_info_sync_pref, \
1138   .get = snd_rme9652_get_sync_pref, .put = snd_rme9652_put_sync_pref }
1139 
1140 static int rme9652_sync_pref(struct snd_rme9652 *rme9652)
1141 {
1142 	switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1143 	case RME9652_SyncPref_ADAT1:
1144 		return RME9652_SYNC_FROM_ADAT1;
1145 	case RME9652_SyncPref_ADAT2:
1146 		return RME9652_SYNC_FROM_ADAT2;
1147 	case RME9652_SyncPref_ADAT3:
1148 		return RME9652_SYNC_FROM_ADAT3;
1149 	case RME9652_SyncPref_SPDIF:
1150 		return RME9652_SYNC_FROM_SPDIF;
1151 	}
1152 	/* Not reachable */
1153 	return 0;
1154 }
1155 
1156 static int rme9652_set_sync_pref(struct snd_rme9652 *rme9652, int pref)
1157 {
1158 	int restart;
1159 
1160 	rme9652->control_register &= ~RME9652_SyncPref_Mask;
1161 	switch (pref) {
1162 	case RME9652_SYNC_FROM_ADAT1:
1163 		rme9652->control_register |= RME9652_SyncPref_ADAT1;
1164 		break;
1165 	case RME9652_SYNC_FROM_ADAT2:
1166 		rme9652->control_register |= RME9652_SyncPref_ADAT2;
1167 		break;
1168 	case RME9652_SYNC_FROM_ADAT3:
1169 		rme9652->control_register |= RME9652_SyncPref_ADAT3;
1170 		break;
1171 	case RME9652_SYNC_FROM_SPDIF:
1172 		rme9652->control_register |= RME9652_SyncPref_SPDIF;
1173 		break;
1174 	}
1175 
1176 	if ((restart = rme9652->running)) {
1177 		rme9652_stop(rme9652);
1178 	}
1179 
1180 	rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1181 
1182 	if (restart) {
1183 		rme9652_start(rme9652);
1184 	}
1185 
1186 	return 0;
1187 }
1188 
1189 static int snd_rme9652_info_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1190 {
1191 	static const char * const texts[4] = {
1192 		"IEC958 In", "ADAT1 In", "ADAT2 In", "ADAT3 In"
1193 	};
1194 	struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1195 
1196 	return snd_ctl_enum_info(uinfo, 1,
1197 				 rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3,
1198 				 texts);
1199 }
1200 
1201 static int snd_rme9652_get_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1202 {
1203 	struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1204 
1205 	spin_lock_irq(&rme9652->lock);
1206 	ucontrol->value.enumerated.item[0] = rme9652_sync_pref(rme9652);
1207 	spin_unlock_irq(&rme9652->lock);
1208 	return 0;
1209 }
1210 
1211 static int snd_rme9652_put_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1212 {
1213 	struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1214 	int change, max;
1215 	unsigned int val;
1216 
1217 	if (!snd_rme9652_use_is_exclusive(rme9652))
1218 		return -EBUSY;
1219 	max = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3;
1220 	val = ucontrol->value.enumerated.item[0] % max;
1221 	spin_lock_irq(&rme9652->lock);
1222 	change = (int)val != rme9652_sync_pref(rme9652);
1223 	rme9652_set_sync_pref(rme9652, val);
1224 	spin_unlock_irq(&rme9652->lock);
1225 	return change;
1226 }
1227 
1228 static int snd_rme9652_info_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1229 {
1230 	struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1231 	uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1232 	uinfo->count = rme9652->ss_channels;
1233 	uinfo->value.integer.min = 0;
1234 	uinfo->value.integer.max = 1;
1235 	return 0;
1236 }
1237 
1238 static int snd_rme9652_get_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1239 {
1240 	struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1241 	unsigned int k;
1242 	u32 thru_bits = rme9652->thru_bits;
1243 
1244 	for (k = 0; k < rme9652->ss_channels; ++k) {
1245 		ucontrol->value.integer.value[k] = !!(thru_bits & (1 << k));
1246 	}
1247 	return 0;
1248 }
1249 
1250 static int snd_rme9652_put_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1251 {
1252 	struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1253 	int change;
1254 	unsigned int chn;
1255 	u32 thru_bits = 0;
1256 
1257 	if (!snd_rme9652_use_is_exclusive(rme9652))
1258 		return -EBUSY;
1259 
1260 	for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1261 		if (ucontrol->value.integer.value[chn])
1262 			thru_bits |= 1 << chn;
1263 	}
1264 
1265 	spin_lock_irq(&rme9652->lock);
1266 	change = thru_bits ^ rme9652->thru_bits;
1267 	if (change) {
1268 		for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1269 			if (!(change & (1 << chn)))
1270 				continue;
1271 			rme9652_set_thru(rme9652,chn,thru_bits&(1<<chn));
1272 		}
1273 	}
1274 	spin_unlock_irq(&rme9652->lock);
1275 	return !!change;
1276 }
1277 
1278 #define RME9652_PASSTHRU(xname, xindex) \
1279 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1280   .info = snd_rme9652_info_passthru, \
1281   .put = snd_rme9652_put_passthru, \
1282   .get = snd_rme9652_get_passthru }
1283 
1284 #define snd_rme9652_info_passthru	snd_ctl_boolean_mono_info
1285 
1286 static int snd_rme9652_get_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1287 {
1288 	struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1289 
1290 	spin_lock_irq(&rme9652->lock);
1291 	ucontrol->value.integer.value[0] = rme9652->passthru;
1292 	spin_unlock_irq(&rme9652->lock);
1293 	return 0;
1294 }
1295 
1296 static int snd_rme9652_put_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1297 {
1298 	struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1299 	int change;
1300 	unsigned int val;
1301 	int err = 0;
1302 
1303 	if (!snd_rme9652_use_is_exclusive(rme9652))
1304 		return -EBUSY;
1305 
1306 	val = ucontrol->value.integer.value[0] & 1;
1307 	spin_lock_irq(&rme9652->lock);
1308 	change = (ucontrol->value.integer.value[0] != rme9652->passthru);
1309 	if (change)
1310 		err = rme9652_set_passthru(rme9652, val);
1311 	spin_unlock_irq(&rme9652->lock);
1312 	return err ? err : change;
1313 }
1314 
1315 /* Read-only switches */
1316 
1317 #define RME9652_SPDIF_RATE(xname, xindex) \
1318 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1319   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1320   .info = snd_rme9652_info_spdif_rate, \
1321   .get = snd_rme9652_get_spdif_rate }
1322 
1323 static int snd_rme9652_info_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1324 {
1325 	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1326 	uinfo->count = 1;
1327 	uinfo->value.integer.min = 0;
1328 	uinfo->value.integer.max = 96000;
1329 	return 0;
1330 }
1331 
1332 static int snd_rme9652_get_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1333 {
1334 	struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1335 
1336 	spin_lock_irq(&rme9652->lock);
1337 	ucontrol->value.integer.value[0] = rme9652_spdif_sample_rate(rme9652);
1338 	spin_unlock_irq(&rme9652->lock);
1339 	return 0;
1340 }
1341 
1342 #define RME9652_ADAT_SYNC(xname, xindex, xidx) \
1343 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1344   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1345   .info = snd_rme9652_info_adat_sync, \
1346   .get = snd_rme9652_get_adat_sync, .private_value = xidx }
1347 
1348 static int snd_rme9652_info_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1349 {
1350 	static const char * const texts[4] = {
1351 		"No Lock", "Lock", "No Lock Sync", "Lock Sync"
1352 	};
1353 
1354 	return snd_ctl_enum_info(uinfo, 1, 4, texts);
1355 }
1356 
1357 static int snd_rme9652_get_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1358 {
1359 	struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1360 	unsigned int mask1, mask2, val;
1361 
1362 	switch (kcontrol->private_value) {
1363 	case 0: mask1 = RME9652_lock_0; mask2 = RME9652_sync_0; break;
1364 	case 1: mask1 = RME9652_lock_1; mask2 = RME9652_sync_1; break;
1365 	case 2: mask1 = RME9652_lock_2; mask2 = RME9652_sync_2; break;
1366 	default: return -EINVAL;
1367 	}
1368 	val = rme9652_read(rme9652, RME9652_status_register);
1369 	ucontrol->value.enumerated.item[0] = (val & mask1) ? 1 : 0;
1370 	ucontrol->value.enumerated.item[0] |= (val & mask2) ? 2 : 0;
1371 	return 0;
1372 }
1373 
1374 #define RME9652_TC_VALID(xname, xindex) \
1375 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1376   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1377   .info = snd_rme9652_info_tc_valid, \
1378   .get = snd_rme9652_get_tc_valid }
1379 
1380 #define snd_rme9652_info_tc_valid	snd_ctl_boolean_mono_info
1381 
1382 static int snd_rme9652_get_tc_valid(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1383 {
1384 	struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1385 
1386 	ucontrol->value.integer.value[0] =
1387 		(rme9652_read(rme9652, RME9652_status_register) & RME9652_tc_valid) ? 1 : 0;
1388 	return 0;
1389 }
1390 
1391 #ifdef ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE
1392 
1393 /* FIXME: this routine needs a port to the new control API --jk */
1394 
1395 static int snd_rme9652_get_tc_value(void *private_data,
1396 				    snd_kswitch_t *kswitch,
1397 				    snd_switch_t *uswitch)
1398 {
1399 	struct snd_rme9652 *s = (struct snd_rme9652 *) private_data;
1400 	u32 value;
1401 	int i;
1402 
1403 	uswitch->type = SNDRV_SW_TYPE_DWORD;
1404 
1405 	if ((rme9652_read(s, RME9652_status_register) &
1406 	     RME9652_tc_valid) == 0) {
1407 		uswitch->value.data32[0] = 0;
1408 		return 0;
1409 	}
1410 
1411 	/* timecode request */
1412 
1413 	rme9652_write(s, RME9652_time_code, 0);
1414 
1415 	/* XXX bug alert: loop-based timing !!!! */
1416 
1417 	for (i = 0; i < 50; i++) {
1418 		if (!(rme9652_read(s, i * 4) & RME9652_tc_busy))
1419 			break;
1420 	}
1421 
1422 	if (!(rme9652_read(s, i * 4) & RME9652_tc_busy)) {
1423 		return -EIO;
1424 	}
1425 
1426 	value = 0;
1427 
1428 	for (i = 0; i < 32; i++) {
1429 		value >>= 1;
1430 
1431 		if (rme9652_read(s, i * 4) & RME9652_tc_out)
1432 			value |= 0x80000000;
1433 	}
1434 
1435 	if (value > 2 * 60 * 48000) {
1436 		value -= 2 * 60 * 48000;
1437 	} else {
1438 		value = 0;
1439 	}
1440 
1441 	uswitch->value.data32[0] = value;
1442 
1443 	return 0;
1444 }
1445 
1446 #endif				/* ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE */
1447 
1448 static const struct snd_kcontrol_new snd_rme9652_controls[] = {
1449 {
1450 	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
1451 	.name =		SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1452 	.info =		snd_rme9652_control_spdif_info,
1453 	.get =		snd_rme9652_control_spdif_get,
1454 	.put =		snd_rme9652_control_spdif_put,
1455 },
1456 {
1457 	.access =	SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1458 	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
1459 	.name =		SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1460 	.info =		snd_rme9652_control_spdif_stream_info,
1461 	.get =		snd_rme9652_control_spdif_stream_get,
1462 	.put =		snd_rme9652_control_spdif_stream_put,
1463 },
1464 {
1465 	.access =	SNDRV_CTL_ELEM_ACCESS_READ,
1466 	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
1467 	.name =		SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1468 	.info =		snd_rme9652_control_spdif_mask_info,
1469 	.get =		snd_rme9652_control_spdif_mask_get,
1470 	.private_value = IEC958_AES0_NONAUDIO |
1471 			IEC958_AES0_PROFESSIONAL |
1472 			IEC958_AES0_CON_EMPHASIS,
1473 },
1474 {
1475 	.access =	SNDRV_CTL_ELEM_ACCESS_READ,
1476 	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
1477 	.name =		SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
1478 	.info =		snd_rme9652_control_spdif_mask_info,
1479 	.get =		snd_rme9652_control_spdif_mask_get,
1480 	.private_value = IEC958_AES0_NONAUDIO |
1481 			IEC958_AES0_PROFESSIONAL |
1482 			IEC958_AES0_PRO_EMPHASIS,
1483 },
1484 RME9652_SPDIF_IN("IEC958 Input Connector", 0),
1485 RME9652_SPDIF_OUT("IEC958 Output also on ADAT1", 0),
1486 RME9652_SYNC_MODE("Sync Mode", 0),
1487 RME9652_SYNC_PREF("Preferred Sync Source", 0),
1488 {
1489 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1490 	.name = "Channels Thru",
1491 	.index = 0,
1492 	.info = snd_rme9652_info_thru,
1493 	.get = snd_rme9652_get_thru,
1494 	.put = snd_rme9652_put_thru,
1495 },
1496 RME9652_SPDIF_RATE("IEC958 Sample Rate", 0),
1497 RME9652_ADAT_SYNC("ADAT1 Sync Check", 0, 0),
1498 RME9652_ADAT_SYNC("ADAT2 Sync Check", 0, 1),
1499 RME9652_TC_VALID("Timecode Valid", 0),
1500 RME9652_PASSTHRU("Passthru", 0)
1501 };
1502 
1503 static const struct snd_kcontrol_new snd_rme9652_adat3_check =
1504 RME9652_ADAT_SYNC("ADAT3 Sync Check", 0, 2);
1505 
1506 static const struct snd_kcontrol_new snd_rme9652_adat1_input =
1507 RME9652_ADAT1_IN("ADAT1 Input Source", 0);
1508 
1509 static int snd_rme9652_create_controls(struct snd_card *card, struct snd_rme9652 *rme9652)
1510 {
1511 	unsigned int idx;
1512 	int err;
1513 	struct snd_kcontrol *kctl;
1514 
1515 	for (idx = 0; idx < ARRAY_SIZE(snd_rme9652_controls); idx++) {
1516 		if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_controls[idx], rme9652))) < 0)
1517 			return err;
1518 		if (idx == 1)	/* IEC958 (S/PDIF) Stream */
1519 			rme9652->spdif_ctl = kctl;
1520 	}
1521 
1522 	if (rme9652->ss_channels == RME9652_NCHANNELS)
1523 		if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat3_check, rme9652))) < 0)
1524 			return err;
1525 
1526 	if (rme9652->hw_rev >= 15)
1527 		if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat1_input, rme9652))) < 0)
1528 			return err;
1529 
1530 	return 0;
1531 }
1532 
1533 /*------------------------------------------------------------
1534    /proc interface
1535  ------------------------------------------------------------*/
1536 
1537 static void
1538 snd_rme9652_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
1539 {
1540 	struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) entry->private_data;
1541 	u32 thru_bits = rme9652->thru_bits;
1542 	int show_auto_sync_source = 0;
1543 	int i;
1544 	unsigned int status;
1545 	int x;
1546 
1547 	status = rme9652_read(rme9652, RME9652_status_register);
1548 
1549 	snd_iprintf(buffer, "%s (Card #%d)\n", rme9652->card_name, rme9652->card->number + 1);
1550 	snd_iprintf(buffer, "Buffers: capture %p playback %p\n",
1551 		    rme9652->capture_buffer, rme9652->playback_buffer);
1552 	snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
1553 		    rme9652->irq, rme9652->port, (unsigned long)rme9652->iobase);
1554 	snd_iprintf(buffer, "Control register: %x\n", rme9652->control_register);
1555 
1556 	snd_iprintf(buffer, "\n");
1557 
1558 	x = 1 << (6 + rme9652_decode_latency(rme9652->control_register &
1559 					     RME9652_latency));
1560 
1561 	snd_iprintf(buffer, "Latency: %d samples (2 periods of %lu bytes)\n",
1562 		    x, (unsigned long) rme9652->period_bytes);
1563 	snd_iprintf(buffer, "Hardware pointer (frames): %ld\n",
1564 		    rme9652_hw_pointer(rme9652));
1565 	snd_iprintf(buffer, "Passthru: %s\n",
1566 		    rme9652->passthru ? "yes" : "no");
1567 
1568 	if ((rme9652->control_register & (RME9652_Master | RME9652_wsel)) == 0) {
1569 		snd_iprintf(buffer, "Clock mode: autosync\n");
1570 		show_auto_sync_source = 1;
1571 	} else if (rme9652->control_register & RME9652_wsel) {
1572 		if (status & RME9652_wsel_rd) {
1573 			snd_iprintf(buffer, "Clock mode: word clock\n");
1574 		} else {
1575 			snd_iprintf(buffer, "Clock mode: word clock (no signal)\n");
1576 		}
1577 	} else {
1578 		snd_iprintf(buffer, "Clock mode: master\n");
1579 	}
1580 
1581 	if (show_auto_sync_source) {
1582 		switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1583 		case RME9652_SyncPref_ADAT1:
1584 			snd_iprintf(buffer, "Pref. sync source: ADAT1\n");
1585 			break;
1586 		case RME9652_SyncPref_ADAT2:
1587 			snd_iprintf(buffer, "Pref. sync source: ADAT2\n");
1588 			break;
1589 		case RME9652_SyncPref_ADAT3:
1590 			snd_iprintf(buffer, "Pref. sync source: ADAT3\n");
1591 			break;
1592 		case RME9652_SyncPref_SPDIF:
1593 			snd_iprintf(buffer, "Pref. sync source: IEC958\n");
1594 			break;
1595 		default:
1596 			snd_iprintf(buffer, "Pref. sync source: ???\n");
1597 		}
1598 	}
1599 
1600 	if (rme9652->hw_rev >= 15)
1601 		snd_iprintf(buffer, "\nADAT1 Input source: %s\n",
1602 			    (rme9652->control_register & RME9652_ADAT1_INTERNAL) ?
1603 			    "Internal" : "ADAT1 optical");
1604 
1605 	snd_iprintf(buffer, "\n");
1606 
1607 	switch (rme9652_decode_spdif_in(rme9652->control_register &
1608 					RME9652_inp)) {
1609 	case RME9652_SPDIFIN_OPTICAL:
1610 		snd_iprintf(buffer, "IEC958 input: ADAT1\n");
1611 		break;
1612 	case RME9652_SPDIFIN_COAXIAL:
1613 		snd_iprintf(buffer, "IEC958 input: Coaxial\n");
1614 		break;
1615 	case RME9652_SPDIFIN_INTERN:
1616 		snd_iprintf(buffer, "IEC958 input: Internal\n");
1617 		break;
1618 	default:
1619 		snd_iprintf(buffer, "IEC958 input: ???\n");
1620 		break;
1621 	}
1622 
1623 	if (rme9652->control_register & RME9652_opt_out) {
1624 		snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n");
1625 	} else {
1626 		snd_iprintf(buffer, "IEC958 output: Coaxial only\n");
1627 	}
1628 
1629 	if (rme9652->control_register & RME9652_PRO) {
1630 		snd_iprintf(buffer, "IEC958 quality: Professional\n");
1631 	} else {
1632 		snd_iprintf(buffer, "IEC958 quality: Consumer\n");
1633 	}
1634 
1635 	if (rme9652->control_register & RME9652_EMP) {
1636 		snd_iprintf(buffer, "IEC958 emphasis: on\n");
1637 	} else {
1638 		snd_iprintf(buffer, "IEC958 emphasis: off\n");
1639 	}
1640 
1641 	if (rme9652->control_register & RME9652_Dolby) {
1642 		snd_iprintf(buffer, "IEC958 Dolby: on\n");
1643 	} else {
1644 		snd_iprintf(buffer, "IEC958 Dolby: off\n");
1645 	}
1646 
1647 	i = rme9652_spdif_sample_rate(rme9652);
1648 
1649 	if (i < 0) {
1650 		snd_iprintf(buffer,
1651 			    "IEC958 sample rate: error flag set\n");
1652 	} else if (i == 0) {
1653 		snd_iprintf(buffer, "IEC958 sample rate: undetermined\n");
1654 	} else {
1655 		snd_iprintf(buffer, "IEC958 sample rate: %d\n", i);
1656 	}
1657 
1658 	snd_iprintf(buffer, "\n");
1659 
1660 	snd_iprintf(buffer, "ADAT Sample rate: %dHz\n",
1661 		    rme9652_adat_sample_rate(rme9652));
1662 
1663 	/* Sync Check */
1664 
1665 	x = status & RME9652_sync_0;
1666 	if (status & RME9652_lock_0) {
1667 		snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock");
1668 	} else {
1669 		snd_iprintf(buffer, "ADAT1: No Lock\n");
1670 	}
1671 
1672 	x = status & RME9652_sync_1;
1673 	if (status & RME9652_lock_1) {
1674 		snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock");
1675 	} else {
1676 		snd_iprintf(buffer, "ADAT2: No Lock\n");
1677 	}
1678 
1679 	x = status & RME9652_sync_2;
1680 	if (status & RME9652_lock_2) {
1681 		snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock");
1682 	} else {
1683 		snd_iprintf(buffer, "ADAT3: No Lock\n");
1684 	}
1685 
1686 	snd_iprintf(buffer, "\n");
1687 
1688 	snd_iprintf(buffer, "Timecode signal: %s\n",
1689 		    (status & RME9652_tc_valid) ? "yes" : "no");
1690 
1691 	/* thru modes */
1692 
1693 	snd_iprintf(buffer, "Punch Status:\n\n");
1694 
1695 	for (i = 0; i < rme9652->ss_channels; i++) {
1696 		if (thru_bits & (1 << i)) {
1697 			snd_iprintf(buffer, "%2d:  on ", i + 1);
1698 		} else {
1699 			snd_iprintf(buffer, "%2d: off ", i + 1);
1700 		}
1701 
1702 		if (((i + 1) % 8) == 0) {
1703 			snd_iprintf(buffer, "\n");
1704 		}
1705 	}
1706 
1707 	snd_iprintf(buffer, "\n");
1708 }
1709 
1710 static void snd_rme9652_proc_init(struct snd_rme9652 *rme9652)
1711 {
1712 	snd_card_ro_proc_new(rme9652->card, "rme9652", rme9652,
1713 			     snd_rme9652_proc_read);
1714 }
1715 
1716 static void snd_rme9652_free_buffers(struct snd_rme9652 *rme9652)
1717 {
1718 	snd_hammerfall_free_buffer(&rme9652->capture_dma_buf, rme9652->pci);
1719 	snd_hammerfall_free_buffer(&rme9652->playback_dma_buf, rme9652->pci);
1720 }
1721 
1722 static int snd_rme9652_free(struct snd_rme9652 *rme9652)
1723 {
1724 	if (rme9652->irq >= 0)
1725 		rme9652_stop(rme9652);
1726 	snd_rme9652_free_buffers(rme9652);
1727 
1728 	if (rme9652->irq >= 0)
1729 		free_irq(rme9652->irq, (void *)rme9652);
1730 	iounmap(rme9652->iobase);
1731 	if (rme9652->port)
1732 		pci_release_regions(rme9652->pci);
1733 
1734 	pci_disable_device(rme9652->pci);
1735 	return 0;
1736 }
1737 
1738 static int snd_rme9652_initialize_memory(struct snd_rme9652 *rme9652)
1739 {
1740 	unsigned long pb_bus, cb_bus;
1741 
1742 	if (snd_hammerfall_get_buffer(rme9652->pci, &rme9652->capture_dma_buf, RME9652_DMA_AREA_BYTES) < 0 ||
1743 	    snd_hammerfall_get_buffer(rme9652->pci, &rme9652->playback_dma_buf, RME9652_DMA_AREA_BYTES) < 0) {
1744 		if (rme9652->capture_dma_buf.area)
1745 			snd_dma_free_pages(&rme9652->capture_dma_buf);
1746 		dev_err(rme9652->card->dev,
1747 			"%s: no buffers available\n", rme9652->card_name);
1748 		return -ENOMEM;
1749 	}
1750 
1751 	/* Align to bus-space 64K boundary */
1752 
1753 	cb_bus = ALIGN(rme9652->capture_dma_buf.addr, 0x10000ul);
1754 	pb_bus = ALIGN(rme9652->playback_dma_buf.addr, 0x10000ul);
1755 
1756 	/* Tell the card where it is */
1757 
1758 	rme9652_write(rme9652, RME9652_rec_buffer, cb_bus);
1759 	rme9652_write(rme9652, RME9652_play_buffer, pb_bus);
1760 
1761 	rme9652->capture_buffer = rme9652->capture_dma_buf.area + (cb_bus - rme9652->capture_dma_buf.addr);
1762 	rme9652->playback_buffer = rme9652->playback_dma_buf.area + (pb_bus - rme9652->playback_dma_buf.addr);
1763 
1764 	return 0;
1765 }
1766 
1767 static void snd_rme9652_set_defaults(struct snd_rme9652 *rme9652)
1768 {
1769 	unsigned int k;
1770 
1771 	/* ASSUMPTION: rme9652->lock is either held, or
1772 	   there is no need to hold it (e.g. during module
1773 	   initialization).
1774 	 */
1775 
1776 	/* set defaults:
1777 
1778 	   SPDIF Input via Coax
1779 	   autosync clock mode
1780 	   maximum latency (7 = 8192 samples, 64Kbyte buffer,
1781 	   which implies 2 4096 sample, 32Kbyte periods).
1782 
1783 	   if rev 1.5, initialize the S/PDIF receiver.
1784 
1785 	 */
1786 
1787 	rme9652->control_register =
1788 	    RME9652_inp_0 | rme9652_encode_latency(7);
1789 
1790 	rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1791 
1792 	rme9652_reset_hw_pointer(rme9652);
1793 	rme9652_compute_period_size(rme9652);
1794 
1795 	/* default: thru off for all channels */
1796 
1797 	for (k = 0; k < RME9652_NCHANNELS; ++k)
1798 		rme9652_write(rme9652, RME9652_thru_base + k * 4, 0);
1799 
1800 	rme9652->thru_bits = 0;
1801 	rme9652->passthru = 0;
1802 
1803 	/* set a default rate so that the channel map is set up */
1804 
1805 	rme9652_set_rate(rme9652, 48000);
1806 }
1807 
1808 static irqreturn_t snd_rme9652_interrupt(int irq, void *dev_id)
1809 {
1810 	struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) dev_id;
1811 
1812 	if (!(rme9652_read(rme9652, RME9652_status_register) & RME9652_IRQ)) {
1813 		return IRQ_NONE;
1814 	}
1815 
1816 	rme9652_write(rme9652, RME9652_irq_clear, 0);
1817 
1818 	if (rme9652->capture_substream) {
1819 		snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
1820 	}
1821 
1822 	if (rme9652->playback_substream) {
1823 		snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream);
1824 	}
1825 	return IRQ_HANDLED;
1826 }
1827 
1828 static snd_pcm_uframes_t snd_rme9652_hw_pointer(struct snd_pcm_substream *substream)
1829 {
1830 	struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1831 	return rme9652_hw_pointer(rme9652);
1832 }
1833 
1834 static char *rme9652_channel_buffer_location(struct snd_rme9652 *rme9652,
1835 					     int stream,
1836 					     int channel)
1837 
1838 {
1839 	int mapped_channel;
1840 
1841 	if (snd_BUG_ON(channel < 0 || channel >= RME9652_NCHANNELS))
1842 		return NULL;
1843 
1844 	if ((mapped_channel = rme9652->channel_map[channel]) < 0) {
1845 		return NULL;
1846 	}
1847 
1848 	if (stream == SNDRV_PCM_STREAM_CAPTURE) {
1849 		return rme9652->capture_buffer +
1850 			(mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
1851 	} else {
1852 		return rme9652->playback_buffer +
1853 			(mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
1854 	}
1855 }
1856 
1857 static int snd_rme9652_playback_copy(struct snd_pcm_substream *substream,
1858 				     int channel, unsigned long pos,
1859 				     void __user *src, unsigned long count)
1860 {
1861 	struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1862 	char *channel_buf;
1863 
1864 	if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES))
1865 		return -EINVAL;
1866 
1867 	channel_buf = rme9652_channel_buffer_location (rme9652,
1868 						       substream->pstr->stream,
1869 						       channel);
1870 	if (snd_BUG_ON(!channel_buf))
1871 		return -EIO;
1872 	if (copy_from_user(channel_buf + pos, src, count))
1873 		return -EFAULT;
1874 	return 0;
1875 }
1876 
1877 static int snd_rme9652_playback_copy_kernel(struct snd_pcm_substream *substream,
1878 					    int channel, unsigned long pos,
1879 					    void *src, unsigned long count)
1880 {
1881 	struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1882 	char *channel_buf;
1883 
1884 	channel_buf = rme9652_channel_buffer_location(rme9652,
1885 						      substream->pstr->stream,
1886 						      channel);
1887 	if (snd_BUG_ON(!channel_buf))
1888 		return -EIO;
1889 	memcpy(channel_buf + pos, src, count);
1890 	return 0;
1891 }
1892 
1893 static int snd_rme9652_capture_copy(struct snd_pcm_substream *substream,
1894 				    int channel, unsigned long pos,
1895 				    void __user *dst, unsigned long count)
1896 {
1897 	struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1898 	char *channel_buf;
1899 
1900 	if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES))
1901 		return -EINVAL;
1902 
1903 	channel_buf = rme9652_channel_buffer_location (rme9652,
1904 						       substream->pstr->stream,
1905 						       channel);
1906 	if (snd_BUG_ON(!channel_buf))
1907 		return -EIO;
1908 	if (copy_to_user(dst, channel_buf + pos, count))
1909 		return -EFAULT;
1910 	return 0;
1911 }
1912 
1913 static int snd_rme9652_capture_copy_kernel(struct snd_pcm_substream *substream,
1914 					   int channel, unsigned long pos,
1915 					   void *dst, unsigned long count)
1916 {
1917 	struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1918 	char *channel_buf;
1919 
1920 	channel_buf = rme9652_channel_buffer_location(rme9652,
1921 						      substream->pstr->stream,
1922 						      channel);
1923 	if (snd_BUG_ON(!channel_buf))
1924 		return -EIO;
1925 	memcpy(dst, channel_buf + pos, count);
1926 	return 0;
1927 }
1928 
1929 static int snd_rme9652_hw_silence(struct snd_pcm_substream *substream,
1930 				  int channel, unsigned long pos,
1931 				  unsigned long count)
1932 {
1933 	struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1934 	char *channel_buf;
1935 
1936 	channel_buf = rme9652_channel_buffer_location (rme9652,
1937 						       substream->pstr->stream,
1938 						       channel);
1939 	if (snd_BUG_ON(!channel_buf))
1940 		return -EIO;
1941 	memset(channel_buf + pos, 0, count);
1942 	return 0;
1943 }
1944 
1945 static int snd_rme9652_reset(struct snd_pcm_substream *substream)
1946 {
1947 	struct snd_pcm_runtime *runtime = substream->runtime;
1948 	struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1949 	struct snd_pcm_substream *other;
1950 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
1951 		other = rme9652->capture_substream;
1952 	else
1953 		other = rme9652->playback_substream;
1954 	if (rme9652->running)
1955 		runtime->status->hw_ptr = rme9652_hw_pointer(rme9652);
1956 	else
1957 		runtime->status->hw_ptr = 0;
1958 	if (other) {
1959 		struct snd_pcm_substream *s;
1960 		struct snd_pcm_runtime *oruntime = other->runtime;
1961 		snd_pcm_group_for_each_entry(s, substream) {
1962 			if (s == other) {
1963 				oruntime->status->hw_ptr = runtime->status->hw_ptr;
1964 				break;
1965 			}
1966 		}
1967 	}
1968 	return 0;
1969 }
1970 
1971 static int snd_rme9652_hw_params(struct snd_pcm_substream *substream,
1972 				 struct snd_pcm_hw_params *params)
1973 {
1974 	struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1975 	int err;
1976 	pid_t this_pid;
1977 	pid_t other_pid;
1978 
1979 	spin_lock_irq(&rme9652->lock);
1980 
1981 	if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1982 		rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
1983 		rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= rme9652->creg_spdif_stream);
1984 		this_pid = rme9652->playback_pid;
1985 		other_pid = rme9652->capture_pid;
1986 	} else {
1987 		this_pid = rme9652->capture_pid;
1988 		other_pid = rme9652->playback_pid;
1989 	}
1990 
1991 	if ((other_pid > 0) && (this_pid != other_pid)) {
1992 
1993 		/* The other stream is open, and not by the same
1994 		   task as this one. Make sure that the parameters
1995 		   that matter are the same.
1996 		 */
1997 
1998 		if ((int)params_rate(params) !=
1999 		    rme9652_adat_sample_rate(rme9652)) {
2000 			spin_unlock_irq(&rme9652->lock);
2001 			_snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2002 			return -EBUSY;
2003 		}
2004 
2005 		if (params_period_size(params) != rme9652->period_bytes / 4) {
2006 			spin_unlock_irq(&rme9652->lock);
2007 			_snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2008 			return -EBUSY;
2009 		}
2010 
2011 		/* We're fine. */
2012 
2013 		spin_unlock_irq(&rme9652->lock);
2014  		return 0;
2015 
2016 	} else {
2017 		spin_unlock_irq(&rme9652->lock);
2018 	}
2019 
2020 	/* how to make sure that the rate matches an externally-set one ?
2021 	 */
2022 
2023 	if ((err = rme9652_set_rate(rme9652, params_rate(params))) < 0) {
2024 		_snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2025 		return err;
2026 	}
2027 
2028 	if ((err = rme9652_set_interrupt_interval(rme9652, params_period_size(params))) < 0) {
2029 		_snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2030 		return err;
2031 	}
2032 
2033 	return 0;
2034 }
2035 
2036 static int snd_rme9652_channel_info(struct snd_pcm_substream *substream,
2037 				    struct snd_pcm_channel_info *info)
2038 {
2039 	struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2040 	int chn;
2041 
2042 	if (snd_BUG_ON(info->channel >= RME9652_NCHANNELS))
2043 		return -EINVAL;
2044 
2045 	chn = rme9652->channel_map[array_index_nospec(info->channel,
2046 						      RME9652_NCHANNELS)];
2047 	if (chn < 0)
2048 		return -EINVAL;
2049 
2050 	info->offset = chn * RME9652_CHANNEL_BUFFER_BYTES;
2051 	info->first = 0;
2052 	info->step = 32;
2053 	return 0;
2054 }
2055 
2056 static int snd_rme9652_ioctl(struct snd_pcm_substream *substream,
2057 			     unsigned int cmd, void *arg)
2058 {
2059 	switch (cmd) {
2060 	case SNDRV_PCM_IOCTL1_RESET:
2061 	{
2062 		return snd_rme9652_reset(substream);
2063 	}
2064 	case SNDRV_PCM_IOCTL1_CHANNEL_INFO:
2065 	{
2066 		struct snd_pcm_channel_info *info = arg;
2067 		return snd_rme9652_channel_info(substream, info);
2068 	}
2069 	default:
2070 		break;
2071 	}
2072 
2073 	return snd_pcm_lib_ioctl(substream, cmd, arg);
2074 }
2075 
2076 static void rme9652_silence_playback(struct snd_rme9652 *rme9652)
2077 {
2078 	memset(rme9652->playback_buffer, 0, RME9652_DMA_AREA_BYTES);
2079 }
2080 
2081 static int snd_rme9652_trigger(struct snd_pcm_substream *substream,
2082 			       int cmd)
2083 {
2084 	struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2085 	struct snd_pcm_substream *other;
2086 	int running;
2087 	spin_lock(&rme9652->lock);
2088 	running = rme9652->running;
2089 	switch (cmd) {
2090 	case SNDRV_PCM_TRIGGER_START:
2091 		running |= 1 << substream->stream;
2092 		break;
2093 	case SNDRV_PCM_TRIGGER_STOP:
2094 		running &= ~(1 << substream->stream);
2095 		break;
2096 	default:
2097 		snd_BUG();
2098 		spin_unlock(&rme9652->lock);
2099 		return -EINVAL;
2100 	}
2101 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2102 		other = rme9652->capture_substream;
2103 	else
2104 		other = rme9652->playback_substream;
2105 
2106 	if (other) {
2107 		struct snd_pcm_substream *s;
2108 		snd_pcm_group_for_each_entry(s, substream) {
2109 			if (s == other) {
2110 				snd_pcm_trigger_done(s, substream);
2111 				if (cmd == SNDRV_PCM_TRIGGER_START)
2112 					running |= 1 << s->stream;
2113 				else
2114 					running &= ~(1 << s->stream);
2115 				goto _ok;
2116 			}
2117 		}
2118 		if (cmd == SNDRV_PCM_TRIGGER_START) {
2119 			if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) &&
2120 			    substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2121 				rme9652_silence_playback(rme9652);
2122 		} else {
2123 			if (running &&
2124 			    substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2125 				rme9652_silence_playback(rme9652);
2126 		}
2127 	} else {
2128 		if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2129 			rme9652_silence_playback(rme9652);
2130 	}
2131  _ok:
2132 	snd_pcm_trigger_done(substream, substream);
2133 	if (!rme9652->running && running)
2134 		rme9652_start(rme9652);
2135 	else if (rme9652->running && !running)
2136 		rme9652_stop(rme9652);
2137 	rme9652->running = running;
2138 	spin_unlock(&rme9652->lock);
2139 
2140 	return 0;
2141 }
2142 
2143 static int snd_rme9652_prepare(struct snd_pcm_substream *substream)
2144 {
2145 	struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2146 	unsigned long flags;
2147 
2148 	spin_lock_irqsave(&rme9652->lock, flags);
2149 	if (!rme9652->running)
2150 		rme9652_reset_hw_pointer(rme9652);
2151 	spin_unlock_irqrestore(&rme9652->lock, flags);
2152 	return 0;
2153 }
2154 
2155 static const struct snd_pcm_hardware snd_rme9652_playback_subinfo =
2156 {
2157 	.info =			(SNDRV_PCM_INFO_MMAP |
2158 				 SNDRV_PCM_INFO_MMAP_VALID |
2159 				 SNDRV_PCM_INFO_NONINTERLEAVED |
2160 				 SNDRV_PCM_INFO_SYNC_START |
2161 				 SNDRV_PCM_INFO_DOUBLE),
2162 	.formats =		SNDRV_PCM_FMTBIT_S32_LE,
2163 	.rates =		(SNDRV_PCM_RATE_44100 |
2164 				 SNDRV_PCM_RATE_48000 |
2165 				 SNDRV_PCM_RATE_88200 |
2166 				 SNDRV_PCM_RATE_96000),
2167 	.rate_min =		44100,
2168 	.rate_max =		96000,
2169 	.channels_min =		10,
2170 	.channels_max =		26,
2171 	.buffer_bytes_max =	RME9652_CHANNEL_BUFFER_BYTES * 26,
2172 	.period_bytes_min =	(64 * 4) * 10,
2173 	.period_bytes_max =	(8192 * 4) * 26,
2174 	.periods_min =		2,
2175 	.periods_max =		2,
2176 	.fifo_size =		0,
2177 };
2178 
2179 static const struct snd_pcm_hardware snd_rme9652_capture_subinfo =
2180 {
2181 	.info =			(SNDRV_PCM_INFO_MMAP |
2182 				 SNDRV_PCM_INFO_MMAP_VALID |
2183 				 SNDRV_PCM_INFO_NONINTERLEAVED |
2184 				 SNDRV_PCM_INFO_SYNC_START),
2185 	.formats =		SNDRV_PCM_FMTBIT_S32_LE,
2186 	.rates =		(SNDRV_PCM_RATE_44100 |
2187 				 SNDRV_PCM_RATE_48000 |
2188 				 SNDRV_PCM_RATE_88200 |
2189 				 SNDRV_PCM_RATE_96000),
2190 	.rate_min =		44100,
2191 	.rate_max =		96000,
2192 	.channels_min =		10,
2193 	.channels_max =		26,
2194 	.buffer_bytes_max =	RME9652_CHANNEL_BUFFER_BYTES *26,
2195 	.period_bytes_min =	(64 * 4) * 10,
2196 	.period_bytes_max =	(8192 * 4) * 26,
2197 	.periods_min =		2,
2198 	.periods_max =		2,
2199 	.fifo_size =		0,
2200 };
2201 
2202 static const unsigned int period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 };
2203 
2204 static const struct snd_pcm_hw_constraint_list hw_constraints_period_sizes = {
2205 	.count = ARRAY_SIZE(period_sizes),
2206 	.list = period_sizes,
2207 	.mask = 0
2208 };
2209 
2210 static int snd_rme9652_hw_rule_channels(struct snd_pcm_hw_params *params,
2211 					struct snd_pcm_hw_rule *rule)
2212 {
2213 	struct snd_rme9652 *rme9652 = rule->private;
2214 	struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2215 	unsigned int list[2] = { rme9652->ds_channels, rme9652->ss_channels };
2216 	return snd_interval_list(c, 2, list, 0);
2217 }
2218 
2219 static int snd_rme9652_hw_rule_channels_rate(struct snd_pcm_hw_params *params,
2220 					     struct snd_pcm_hw_rule *rule)
2221 {
2222 	struct snd_rme9652 *rme9652 = rule->private;
2223 	struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2224 	struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2225 	if (r->min > 48000) {
2226 		struct snd_interval t = {
2227 			.min = rme9652->ds_channels,
2228 			.max = rme9652->ds_channels,
2229 			.integer = 1,
2230 		};
2231 		return snd_interval_refine(c, &t);
2232 	} else if (r->max < 88200) {
2233 		struct snd_interval t = {
2234 			.min = rme9652->ss_channels,
2235 			.max = rme9652->ss_channels,
2236 			.integer = 1,
2237 		};
2238 		return snd_interval_refine(c, &t);
2239 	}
2240 	return 0;
2241 }
2242 
2243 static int snd_rme9652_hw_rule_rate_channels(struct snd_pcm_hw_params *params,
2244 					     struct snd_pcm_hw_rule *rule)
2245 {
2246 	struct snd_rme9652 *rme9652 = rule->private;
2247 	struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2248 	struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2249 	if (c->min >= rme9652->ss_channels) {
2250 		struct snd_interval t = {
2251 			.min = 44100,
2252 			.max = 48000,
2253 			.integer = 1,
2254 		};
2255 		return snd_interval_refine(r, &t);
2256 	} else if (c->max <= rme9652->ds_channels) {
2257 		struct snd_interval t = {
2258 			.min = 88200,
2259 			.max = 96000,
2260 			.integer = 1,
2261 		};
2262 		return snd_interval_refine(r, &t);
2263 	}
2264 	return 0;
2265 }
2266 
2267 static int snd_rme9652_playback_open(struct snd_pcm_substream *substream)
2268 {
2269 	struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2270 	struct snd_pcm_runtime *runtime = substream->runtime;
2271 
2272 	spin_lock_irq(&rme9652->lock);
2273 
2274 	snd_pcm_set_sync(substream);
2275 
2276         runtime->hw = snd_rme9652_playback_subinfo;
2277 	runtime->dma_area = rme9652->playback_buffer;
2278 	runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2279 
2280 	if (rme9652->capture_substream == NULL) {
2281 		rme9652_stop(rme9652);
2282 		rme9652_set_thru(rme9652, -1, 0);
2283 	}
2284 
2285 	rme9652->playback_pid = current->pid;
2286 	rme9652->playback_substream = substream;
2287 
2288 	spin_unlock_irq(&rme9652->lock);
2289 
2290 	snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2291 	snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2292 	snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2293 			     snd_rme9652_hw_rule_channels, rme9652,
2294 			     SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2295 	snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2296 			     snd_rme9652_hw_rule_channels_rate, rme9652,
2297 			     SNDRV_PCM_HW_PARAM_RATE, -1);
2298 	snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2299 			     snd_rme9652_hw_rule_rate_channels, rme9652,
2300 			     SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2301 
2302 	rme9652->creg_spdif_stream = rme9652->creg_spdif;
2303 	rme9652->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2304 	snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2305 		       SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2306 	return 0;
2307 }
2308 
2309 static int snd_rme9652_playback_release(struct snd_pcm_substream *substream)
2310 {
2311 	struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2312 
2313 	spin_lock_irq(&rme9652->lock);
2314 
2315 	rme9652->playback_pid = -1;
2316 	rme9652->playback_substream = NULL;
2317 
2318 	spin_unlock_irq(&rme9652->lock);
2319 
2320 	rme9652->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2321 	snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2322 		       SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2323 	return 0;
2324 }
2325 
2326 
2327 static int snd_rme9652_capture_open(struct snd_pcm_substream *substream)
2328 {
2329 	struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2330 	struct snd_pcm_runtime *runtime = substream->runtime;
2331 
2332 	spin_lock_irq(&rme9652->lock);
2333 
2334 	snd_pcm_set_sync(substream);
2335 
2336 	runtime->hw = snd_rme9652_capture_subinfo;
2337 	runtime->dma_area = rme9652->capture_buffer;
2338 	runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2339 
2340 	if (rme9652->playback_substream == NULL) {
2341 		rme9652_stop(rme9652);
2342 		rme9652_set_thru(rme9652, -1, 0);
2343 	}
2344 
2345 	rme9652->capture_pid = current->pid;
2346 	rme9652->capture_substream = substream;
2347 
2348 	spin_unlock_irq(&rme9652->lock);
2349 
2350 	snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2351 	snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2352 	snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2353 			     snd_rme9652_hw_rule_channels, rme9652,
2354 			     SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2355 	snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2356 			     snd_rme9652_hw_rule_channels_rate, rme9652,
2357 			     SNDRV_PCM_HW_PARAM_RATE, -1);
2358 	snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2359 			     snd_rme9652_hw_rule_rate_channels, rme9652,
2360 			     SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2361 	return 0;
2362 }
2363 
2364 static int snd_rme9652_capture_release(struct snd_pcm_substream *substream)
2365 {
2366 	struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2367 
2368 	spin_lock_irq(&rme9652->lock);
2369 
2370 	rme9652->capture_pid = -1;
2371 	rme9652->capture_substream = NULL;
2372 
2373 	spin_unlock_irq(&rme9652->lock);
2374 	return 0;
2375 }
2376 
2377 static const struct snd_pcm_ops snd_rme9652_playback_ops = {
2378 	.open =		snd_rme9652_playback_open,
2379 	.close =	snd_rme9652_playback_release,
2380 	.ioctl =	snd_rme9652_ioctl,
2381 	.hw_params =	snd_rme9652_hw_params,
2382 	.prepare =	snd_rme9652_prepare,
2383 	.trigger =	snd_rme9652_trigger,
2384 	.pointer =	snd_rme9652_hw_pointer,
2385 	.copy_user =	snd_rme9652_playback_copy,
2386 	.copy_kernel =	snd_rme9652_playback_copy_kernel,
2387 	.fill_silence =	snd_rme9652_hw_silence,
2388 };
2389 
2390 static const struct snd_pcm_ops snd_rme9652_capture_ops = {
2391 	.open =		snd_rme9652_capture_open,
2392 	.close =	snd_rme9652_capture_release,
2393 	.ioctl =	snd_rme9652_ioctl,
2394 	.hw_params =	snd_rme9652_hw_params,
2395 	.prepare =	snd_rme9652_prepare,
2396 	.trigger =	snd_rme9652_trigger,
2397 	.pointer =	snd_rme9652_hw_pointer,
2398 	.copy_user =	snd_rme9652_capture_copy,
2399 	.copy_kernel =	snd_rme9652_capture_copy_kernel,
2400 };
2401 
2402 static int snd_rme9652_create_pcm(struct snd_card *card,
2403 				  struct snd_rme9652 *rme9652)
2404 {
2405 	struct snd_pcm *pcm;
2406 	int err;
2407 
2408 	if ((err = snd_pcm_new(card,
2409 			       rme9652->card_name,
2410 			       0, 1, 1, &pcm)) < 0) {
2411 		return err;
2412 	}
2413 
2414 	rme9652->pcm = pcm;
2415 	pcm->private_data = rme9652;
2416 	strcpy(pcm->name, rme9652->card_name);
2417 
2418 	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_rme9652_playback_ops);
2419 	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_rme9652_capture_ops);
2420 
2421 	pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
2422 
2423 	return 0;
2424 }
2425 
2426 static int snd_rme9652_create(struct snd_card *card,
2427 			      struct snd_rme9652 *rme9652,
2428 			      int precise_ptr)
2429 {
2430 	struct pci_dev *pci = rme9652->pci;
2431 	int err;
2432 	int status;
2433 	unsigned short rev;
2434 
2435 	rme9652->irq = -1;
2436 	rme9652->card = card;
2437 
2438 	pci_read_config_word(rme9652->pci, PCI_CLASS_REVISION, &rev);
2439 
2440 	switch (rev & 0xff) {
2441 	case 3:
2442 	case 4:
2443 	case 8:
2444 	case 9:
2445 		break;
2446 
2447 	default:
2448 		/* who knows? */
2449 		return -ENODEV;
2450 	}
2451 
2452 	if ((err = pci_enable_device(pci)) < 0)
2453 		return err;
2454 
2455 	spin_lock_init(&rme9652->lock);
2456 
2457 	if ((err = pci_request_regions(pci, "rme9652")) < 0)
2458 		return err;
2459 	rme9652->port = pci_resource_start(pci, 0);
2460 	rme9652->iobase = ioremap(rme9652->port, RME9652_IO_EXTENT);
2461 	if (rme9652->iobase == NULL) {
2462 		dev_err(card->dev, "unable to remap region 0x%lx-0x%lx\n",
2463 			rme9652->port, rme9652->port + RME9652_IO_EXTENT - 1);
2464 		return -EBUSY;
2465 	}
2466 
2467 	if (request_irq(pci->irq, snd_rme9652_interrupt, IRQF_SHARED,
2468 			KBUILD_MODNAME, rme9652)) {
2469 		dev_err(card->dev, "unable to request IRQ %d\n", pci->irq);
2470 		return -EBUSY;
2471 	}
2472 	rme9652->irq = pci->irq;
2473 	card->sync_irq = rme9652->irq;
2474 	rme9652->precise_ptr = precise_ptr;
2475 
2476 	/* Determine the h/w rev level of the card. This seems like
2477 	   a particularly kludgy way to encode it, but its what RME
2478 	   chose to do, so we follow them ...
2479 	*/
2480 
2481 	status = rme9652_read(rme9652, RME9652_status_register);
2482 	if (rme9652_decode_spdif_rate(status&RME9652_F) == 1) {
2483 		rme9652->hw_rev = 15;
2484 	} else {
2485 		rme9652->hw_rev = 11;
2486 	}
2487 
2488 	/* Differentiate between the standard Hammerfall, and the
2489 	   "Light", which does not have the expansion board. This
2490 	   method comes from information received from Mathhias
2491 	   Clausen at RME. Display the EEPROM and h/w revID where
2492 	   relevant.
2493 	*/
2494 
2495 	switch (rev) {
2496 	case 8: /* original eprom */
2497 		strcpy(card->driver, "RME9636");
2498 		if (rme9652->hw_rev == 15) {
2499 			rme9652->card_name = "RME Digi9636 (Rev 1.5)";
2500 		} else {
2501 			rme9652->card_name = "RME Digi9636";
2502 		}
2503 		rme9652->ss_channels = RME9636_NCHANNELS;
2504 		break;
2505 	case 9: /* W36_G EPROM */
2506 		strcpy(card->driver, "RME9636");
2507 		rme9652->card_name = "RME Digi9636 (Rev G)";
2508 		rme9652->ss_channels = RME9636_NCHANNELS;
2509 		break;
2510 	case 4: /* W52_G EPROM */
2511 		strcpy(card->driver, "RME9652");
2512 		rme9652->card_name = "RME Digi9652 (Rev G)";
2513 		rme9652->ss_channels = RME9652_NCHANNELS;
2514 		break;
2515 	case 3: /* original eprom */
2516 		strcpy(card->driver, "RME9652");
2517 		if (rme9652->hw_rev == 15) {
2518 			rme9652->card_name = "RME Digi9652 (Rev 1.5)";
2519 		} else {
2520 			rme9652->card_name = "RME Digi9652";
2521 		}
2522 		rme9652->ss_channels = RME9652_NCHANNELS;
2523 		break;
2524 	}
2525 
2526 	rme9652->ds_channels = (rme9652->ss_channels - 2) / 2 + 2;
2527 
2528 	pci_set_master(rme9652->pci);
2529 
2530 	if ((err = snd_rme9652_initialize_memory(rme9652)) < 0) {
2531 		return err;
2532 	}
2533 
2534 	if ((err = snd_rme9652_create_pcm(card, rme9652)) < 0) {
2535 		return err;
2536 	}
2537 
2538 	if ((err = snd_rme9652_create_controls(card, rme9652)) < 0) {
2539 		return err;
2540 	}
2541 
2542 	snd_rme9652_proc_init(rme9652);
2543 
2544 	rme9652->last_spdif_sample_rate = -1;
2545 	rme9652->last_adat_sample_rate = -1;
2546 	rme9652->playback_pid = -1;
2547 	rme9652->capture_pid = -1;
2548 	rme9652->capture_substream = NULL;
2549 	rme9652->playback_substream = NULL;
2550 
2551 	snd_rme9652_set_defaults(rme9652);
2552 
2553 	if (rme9652->hw_rev == 15) {
2554 		rme9652_initialize_spdif_receiver (rme9652);
2555 	}
2556 
2557 	return 0;
2558 }
2559 
2560 static void snd_rme9652_card_free(struct snd_card *card)
2561 {
2562 	struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) card->private_data;
2563 
2564 	if (rme9652)
2565 		snd_rme9652_free(rme9652);
2566 }
2567 
2568 static int snd_rme9652_probe(struct pci_dev *pci,
2569 			     const struct pci_device_id *pci_id)
2570 {
2571 	static int dev;
2572 	struct snd_rme9652 *rme9652;
2573 	struct snd_card *card;
2574 	int err;
2575 
2576 	if (dev >= SNDRV_CARDS)
2577 		return -ENODEV;
2578 	if (!enable[dev]) {
2579 		dev++;
2580 		return -ENOENT;
2581 	}
2582 
2583 	err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
2584 			   sizeof(struct snd_rme9652), &card);
2585 
2586 	if (err < 0)
2587 		return err;
2588 
2589 	rme9652 = (struct snd_rme9652 *) card->private_data;
2590 	card->private_free = snd_rme9652_card_free;
2591 	rme9652->dev = dev;
2592 	rme9652->pci = pci;
2593 	err = snd_rme9652_create(card, rme9652, precise_ptr[dev]);
2594 	if (err)
2595 		goto free_card;
2596 
2597 	strcpy(card->shortname, rme9652->card_name);
2598 
2599 	sprintf(card->longname, "%s at 0x%lx, irq %d",
2600 		card->shortname, rme9652->port, rme9652->irq);
2601 	err = snd_card_register(card);
2602 	if (err) {
2603 free_card:
2604 		snd_card_free(card);
2605 		return err;
2606 	}
2607 	pci_set_drvdata(pci, card);
2608 	dev++;
2609 	return 0;
2610 }
2611 
2612 static void snd_rme9652_remove(struct pci_dev *pci)
2613 {
2614 	snd_card_free(pci_get_drvdata(pci));
2615 }
2616 
2617 static struct pci_driver rme9652_driver = {
2618 	.name	  = KBUILD_MODNAME,
2619 	.id_table = snd_rme9652_ids,
2620 	.probe	  = snd_rme9652_probe,
2621 	.remove	  = snd_rme9652_remove,
2622 };
2623 
2624 module_pci_driver(rme9652_driver);
2625