1 /* 2 * ALSA driver for RME Digi9652 audio interfaces 3 * 4 * Copyright (c) 1999 IEM - Winfried Ritsch 5 * Copyright (c) 1999-2001 Paul Davis 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 20 * 21 */ 22 23 #include <linux/delay.h> 24 #include <linux/init.h> 25 #include <linux/interrupt.h> 26 #include <linux/pci.h> 27 #include <linux/module.h> 28 29 #include <sound/core.h> 30 #include <sound/control.h> 31 #include <sound/pcm.h> 32 #include <sound/info.h> 33 #include <sound/asoundef.h> 34 #include <sound/initval.h> 35 36 #include <asm/current.h> 37 #include <asm/io.h> 38 39 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 40 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 41 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ 42 static bool precise_ptr[SNDRV_CARDS]; /* Enable precise pointer */ 43 44 module_param_array(index, int, NULL, 0444); 45 MODULE_PARM_DESC(index, "Index value for RME Digi9652 (Hammerfall) soundcard."); 46 module_param_array(id, charp, NULL, 0444); 47 MODULE_PARM_DESC(id, "ID string for RME Digi9652 (Hammerfall) soundcard."); 48 module_param_array(enable, bool, NULL, 0444); 49 MODULE_PARM_DESC(enable, "Enable/disable specific RME96{52,36} soundcards."); 50 module_param_array(precise_ptr, bool, NULL, 0444); 51 MODULE_PARM_DESC(precise_ptr, "Enable precise pointer (doesn't work reliably)."); 52 MODULE_AUTHOR("Paul Davis <pbd@op.net>, Winfried Ritsch"); 53 MODULE_DESCRIPTION("RME Digi9652/Digi9636"); 54 MODULE_LICENSE("GPL"); 55 MODULE_SUPPORTED_DEVICE("{{RME,Hammerfall}," 56 "{RME,Hammerfall-Light}}"); 57 58 /* The Hammerfall has two sets of 24 ADAT + 2 S/PDIF channels, one for 59 capture, one for playback. Both the ADAT and S/PDIF channels appear 60 to the host CPU in the same block of memory. There is no functional 61 difference between them in terms of access. 62 63 The Hammerfall Light is identical to the Hammerfall, except that it 64 has 2 sets 18 channels (16 ADAT + 2 S/PDIF) for capture and playback. 65 */ 66 67 #define RME9652_NCHANNELS 26 68 #define RME9636_NCHANNELS 18 69 70 /* Preferred sync source choices - used by "sync_pref" control switch */ 71 72 #define RME9652_SYNC_FROM_SPDIF 0 73 #define RME9652_SYNC_FROM_ADAT1 1 74 #define RME9652_SYNC_FROM_ADAT2 2 75 #define RME9652_SYNC_FROM_ADAT3 3 76 77 /* Possible sources of S/PDIF input */ 78 79 #define RME9652_SPDIFIN_OPTICAL 0 /* optical (ADAT1) */ 80 #define RME9652_SPDIFIN_COAXIAL 1 /* coaxial (RCA) */ 81 #define RME9652_SPDIFIN_INTERN 2 /* internal (CDROM) */ 82 83 /* ------------- Status-Register bits --------------------- */ 84 85 #define RME9652_IRQ (1<<0) /* IRQ is High if not reset by irq_clear */ 86 #define RME9652_lock_2 (1<<1) /* ADAT 3-PLL: 1=locked, 0=unlocked */ 87 #define RME9652_lock_1 (1<<2) /* ADAT 2-PLL: 1=locked, 0=unlocked */ 88 #define RME9652_lock_0 (1<<3) /* ADAT 1-PLL: 1=locked, 0=unlocked */ 89 #define RME9652_fs48 (1<<4) /* sample rate is 0=44.1/88.2,1=48/96 Khz */ 90 #define RME9652_wsel_rd (1<<5) /* if Word-Clock is used and valid then 1 */ 91 /* bits 6-15 encode h/w buffer pointer position */ 92 #define RME9652_sync_2 (1<<16) /* if ADAT-IN 3 in sync to system clock */ 93 #define RME9652_sync_1 (1<<17) /* if ADAT-IN 2 in sync to system clock */ 94 #define RME9652_sync_0 (1<<18) /* if ADAT-IN 1 in sync to system clock */ 95 #define RME9652_DS_rd (1<<19) /* 1=Double Speed Mode, 0=Normal Speed */ 96 #define RME9652_tc_busy (1<<20) /* 1=time-code copy in progress (960ms) */ 97 #define RME9652_tc_out (1<<21) /* time-code out bit */ 98 #define RME9652_F_0 (1<<22) /* 000=64kHz, 100=88.2kHz, 011=96kHz */ 99 #define RME9652_F_1 (1<<23) /* 111=32kHz, 110=44.1kHz, 101=48kHz, */ 100 #define RME9652_F_2 (1<<24) /* external Crystal Chip if ERF=1 */ 101 #define RME9652_ERF (1<<25) /* Error-Flag of SDPIF Receiver (1=No Lock) */ 102 #define RME9652_buffer_id (1<<26) /* toggles by each interrupt on rec/play */ 103 #define RME9652_tc_valid (1<<27) /* 1 = a signal is detected on time-code input */ 104 #define RME9652_SPDIF_READ (1<<28) /* byte available from Rev 1.5+ S/PDIF interface */ 105 106 #define RME9652_sync (RME9652_sync_0|RME9652_sync_1|RME9652_sync_2) 107 #define RME9652_lock (RME9652_lock_0|RME9652_lock_1|RME9652_lock_2) 108 #define RME9652_F (RME9652_F_0|RME9652_F_1|RME9652_F_2) 109 #define rme9652_decode_spdif_rate(x) ((x)>>22) 110 111 /* Bit 6..15 : h/w buffer pointer */ 112 113 #define RME9652_buf_pos 0x000FFC0 114 115 /* Bits 31,30,29 are bits 5,4,3 of h/w pointer position on later 116 Rev G EEPROMS and Rev 1.5 cards or later. 117 */ 118 119 #define RME9652_REV15_buf_pos(x) ((((x)&0xE0000000)>>26)|((x)&RME9652_buf_pos)) 120 121 /* amount of io space we remap for register access. i'm not sure we 122 even need this much, but 1K is nice round number :) 123 */ 124 125 #define RME9652_IO_EXTENT 1024 126 127 #define RME9652_init_buffer 0 128 #define RME9652_play_buffer 32 /* holds ptr to 26x64kBit host RAM */ 129 #define RME9652_rec_buffer 36 /* holds ptr to 26x64kBit host RAM */ 130 #define RME9652_control_register 64 131 #define RME9652_irq_clear 96 132 #define RME9652_time_code 100 /* useful if used with alesis adat */ 133 #define RME9652_thru_base 128 /* 132...228 Thru for 26 channels */ 134 135 /* Read-only registers */ 136 137 /* Writing to any of the register locations writes to the status 138 register. We'll use the first location as our point of access. 139 */ 140 141 #define RME9652_status_register 0 142 143 /* --------- Control-Register Bits ---------------- */ 144 145 146 #define RME9652_start_bit (1<<0) /* start record/play */ 147 /* bits 1-3 encode buffersize/latency */ 148 #define RME9652_Master (1<<4) /* Clock Mode Master=1,Slave/Auto=0 */ 149 #define RME9652_IE (1<<5) /* Interrupt Enable */ 150 #define RME9652_freq (1<<6) /* samplerate 0=44.1/88.2, 1=48/96 kHz */ 151 #define RME9652_freq1 (1<<7) /* if 0, 32kHz, else always 1 */ 152 #define RME9652_DS (1<<8) /* Doule Speed 0=44.1/48, 1=88.2/96 Khz */ 153 #define RME9652_PRO (1<<9) /* S/PDIF out: 0=consumer, 1=professional */ 154 #define RME9652_EMP (1<<10) /* Emphasis 0=None, 1=ON */ 155 #define RME9652_Dolby (1<<11) /* Non-audio bit 1=set, 0=unset */ 156 #define RME9652_opt_out (1<<12) /* Use 1st optical OUT as SPDIF: 1=yes,0=no */ 157 #define RME9652_wsel (1<<13) /* use Wordclock as sync (overwrites master) */ 158 #define RME9652_inp_0 (1<<14) /* SPDIF-IN: 00=optical (ADAT1), */ 159 #define RME9652_inp_1 (1<<15) /* 01=koaxial (Cinch), 10=Internal CDROM */ 160 #define RME9652_SyncPref_ADAT2 (1<<16) 161 #define RME9652_SyncPref_ADAT3 (1<<17) 162 #define RME9652_SPDIF_RESET (1<<18) /* Rev 1.5+: h/w S/PDIF receiver */ 163 #define RME9652_SPDIF_SELECT (1<<19) 164 #define RME9652_SPDIF_CLOCK (1<<20) 165 #define RME9652_SPDIF_WRITE (1<<21) 166 #define RME9652_ADAT1_INTERNAL (1<<22) /* Rev 1.5+: if set, internal CD connector carries ADAT */ 167 168 /* buffersize = 512Bytes * 2^n, where n is made from Bit2 ... Bit0 */ 169 170 #define RME9652_latency 0x0e 171 #define rme9652_encode_latency(x) (((x)&0x7)<<1) 172 #define rme9652_decode_latency(x) (((x)>>1)&0x7) 173 #define rme9652_running_double_speed(s) ((s)->control_register & RME9652_DS) 174 #define RME9652_inp (RME9652_inp_0|RME9652_inp_1) 175 #define rme9652_encode_spdif_in(x) (((x)&0x3)<<14) 176 #define rme9652_decode_spdif_in(x) (((x)>>14)&0x3) 177 178 #define RME9652_SyncPref_Mask (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3) 179 #define RME9652_SyncPref_ADAT1 0 180 #define RME9652_SyncPref_SPDIF (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3) 181 182 /* the size of a substream (1 mono data stream) */ 183 184 #define RME9652_CHANNEL_BUFFER_SAMPLES (16*1024) 185 #define RME9652_CHANNEL_BUFFER_BYTES (4*RME9652_CHANNEL_BUFFER_SAMPLES) 186 187 /* the size of the area we need to allocate for DMA transfers. the 188 size is the same regardless of the number of channels - the 189 9636 still uses the same memory area. 190 191 Note that we allocate 1 more channel than is apparently needed 192 because the h/w seems to write 1 byte beyond the end of the last 193 page. Sigh. 194 */ 195 196 #define RME9652_DMA_AREA_BYTES ((RME9652_NCHANNELS+1) * RME9652_CHANNEL_BUFFER_BYTES) 197 #define RME9652_DMA_AREA_KILOBYTES (RME9652_DMA_AREA_BYTES/1024) 198 199 struct snd_rme9652 { 200 int dev; 201 202 spinlock_t lock; 203 int irq; 204 unsigned long port; 205 void __iomem *iobase; 206 207 int precise_ptr; 208 209 u32 control_register; /* cached value */ 210 u32 thru_bits; /* thru 1=on, 0=off channel 1=Bit1... channel 26= Bit26 */ 211 212 u32 creg_spdif; 213 u32 creg_spdif_stream; 214 215 char *card_name; /* hammerfall or hammerfall light names */ 216 217 size_t hw_offsetmask; /* &-with status register to get real hw_offset */ 218 size_t prev_hw_offset; /* previous hw offset */ 219 size_t max_jitter; /* maximum jitter in frames for 220 hw pointer */ 221 size_t period_bytes; /* guess what this is */ 222 223 unsigned char ds_channels; 224 unsigned char ss_channels; /* different for hammerfall/hammerfall-light */ 225 226 struct snd_dma_buffer playback_dma_buf; 227 struct snd_dma_buffer capture_dma_buf; 228 229 unsigned char *capture_buffer; /* suitably aligned address */ 230 unsigned char *playback_buffer; /* suitably aligned address */ 231 232 pid_t capture_pid; 233 pid_t playback_pid; 234 235 struct snd_pcm_substream *capture_substream; 236 struct snd_pcm_substream *playback_substream; 237 int running; 238 239 int passthru; /* non-zero if doing pass-thru */ 240 int hw_rev; /* h/w rev * 10 (i.e. 1.5 has hw_rev = 15) */ 241 242 int last_spdif_sample_rate; /* so that we can catch externally ... */ 243 int last_adat_sample_rate; /* ... induced rate changes */ 244 245 char *channel_map; 246 247 struct snd_card *card; 248 struct snd_pcm *pcm; 249 struct pci_dev *pci; 250 struct snd_kcontrol *spdif_ctl; 251 252 }; 253 254 /* These tables map the ALSA channels 1..N to the channels that we 255 need to use in order to find the relevant channel buffer. RME 256 refer to this kind of mapping as between "the ADAT channel and 257 the DMA channel." We index it using the logical audio channel, 258 and the value is the DMA channel (i.e. channel buffer number) 259 where the data for that channel can be read/written from/to. 260 */ 261 262 static char channel_map_9652_ss[26] = { 263 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 264 18, 19, 20, 21, 22, 23, 24, 25 265 }; 266 267 static char channel_map_9636_ss[26] = { 268 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 269 /* channels 16 and 17 are S/PDIF */ 270 24, 25, 271 /* channels 18-25 don't exist */ 272 -1, -1, -1, -1, -1, -1, -1, -1 273 }; 274 275 static char channel_map_9652_ds[26] = { 276 /* ADAT channels are remapped */ 277 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 278 /* channels 12 and 13 are S/PDIF */ 279 24, 25, 280 /* others don't exist */ 281 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 282 }; 283 284 static char channel_map_9636_ds[26] = { 285 /* ADAT channels are remapped */ 286 1, 3, 5, 7, 9, 11, 13, 15, 287 /* channels 8 and 9 are S/PDIF */ 288 24, 25, 289 /* others don't exist */ 290 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 291 }; 292 293 static int snd_hammerfall_get_buffer(struct pci_dev *pci, struct snd_dma_buffer *dmab, size_t size) 294 { 295 dmab->dev.type = SNDRV_DMA_TYPE_DEV; 296 dmab->dev.dev = snd_dma_pci_data(pci); 297 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci), 298 size, dmab) < 0) 299 return -ENOMEM; 300 return 0; 301 } 302 303 static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci) 304 { 305 if (dmab->area) 306 snd_dma_free_pages(dmab); 307 } 308 309 310 static DEFINE_PCI_DEVICE_TABLE(snd_rme9652_ids) = { 311 { 312 .vendor = 0x10ee, 313 .device = 0x3fc4, 314 .subvendor = PCI_ANY_ID, 315 .subdevice = PCI_ANY_ID, 316 }, /* RME Digi9652 */ 317 { 0, }, 318 }; 319 320 MODULE_DEVICE_TABLE(pci, snd_rme9652_ids); 321 322 static inline void rme9652_write(struct snd_rme9652 *rme9652, int reg, int val) 323 { 324 writel(val, rme9652->iobase + reg); 325 } 326 327 static inline unsigned int rme9652_read(struct snd_rme9652 *rme9652, int reg) 328 { 329 return readl(rme9652->iobase + reg); 330 } 331 332 static inline int snd_rme9652_use_is_exclusive(struct snd_rme9652 *rme9652) 333 { 334 unsigned long flags; 335 int ret = 1; 336 337 spin_lock_irqsave(&rme9652->lock, flags); 338 if ((rme9652->playback_pid != rme9652->capture_pid) && 339 (rme9652->playback_pid >= 0) && (rme9652->capture_pid >= 0)) { 340 ret = 0; 341 } 342 spin_unlock_irqrestore(&rme9652->lock, flags); 343 return ret; 344 } 345 346 static inline int rme9652_adat_sample_rate(struct snd_rme9652 *rme9652) 347 { 348 if (rme9652_running_double_speed(rme9652)) { 349 return (rme9652_read(rme9652, RME9652_status_register) & 350 RME9652_fs48) ? 96000 : 88200; 351 } else { 352 return (rme9652_read(rme9652, RME9652_status_register) & 353 RME9652_fs48) ? 48000 : 44100; 354 } 355 } 356 357 static inline void rme9652_compute_period_size(struct snd_rme9652 *rme9652) 358 { 359 unsigned int i; 360 361 i = rme9652->control_register & RME9652_latency; 362 rme9652->period_bytes = 1 << ((rme9652_decode_latency(i) + 8)); 363 rme9652->hw_offsetmask = 364 (rme9652->period_bytes * 2 - 1) & RME9652_buf_pos; 365 rme9652->max_jitter = 80; 366 } 367 368 static snd_pcm_uframes_t rme9652_hw_pointer(struct snd_rme9652 *rme9652) 369 { 370 int status; 371 unsigned int offset, frag; 372 snd_pcm_uframes_t period_size = rme9652->period_bytes / 4; 373 snd_pcm_sframes_t delta; 374 375 status = rme9652_read(rme9652, RME9652_status_register); 376 if (!rme9652->precise_ptr) 377 return (status & RME9652_buffer_id) ? period_size : 0; 378 offset = status & RME9652_buf_pos; 379 380 /* The hardware may give a backward movement for up to 80 frames 381 Martin Kirst <martin.kirst@freenet.de> knows the details. 382 */ 383 384 delta = rme9652->prev_hw_offset - offset; 385 delta &= 0xffff; 386 if (delta <= (snd_pcm_sframes_t)rme9652->max_jitter * 4) 387 offset = rme9652->prev_hw_offset; 388 else 389 rme9652->prev_hw_offset = offset; 390 offset &= rme9652->hw_offsetmask; 391 offset /= 4; 392 frag = status & RME9652_buffer_id; 393 394 if (offset < period_size) { 395 if (offset > rme9652->max_jitter) { 396 if (frag) 397 dev_err(rme9652->card->dev, 398 "Unexpected hw_pointer position (bufid == 0): status: %x offset: %d\n", 399 status, offset); 400 } else if (!frag) 401 return 0; 402 offset -= rme9652->max_jitter; 403 if ((int)offset < 0) 404 offset += period_size * 2; 405 } else { 406 if (offset > period_size + rme9652->max_jitter) { 407 if (!frag) 408 dev_err(rme9652->card->dev, 409 "Unexpected hw_pointer position (bufid == 1): status: %x offset: %d\n", 410 status, offset); 411 } else if (frag) 412 return period_size; 413 offset -= rme9652->max_jitter; 414 } 415 416 return offset; 417 } 418 419 static inline void rme9652_reset_hw_pointer(struct snd_rme9652 *rme9652) 420 { 421 int i; 422 423 /* reset the FIFO pointer to zero. We do this by writing to 8 424 registers, each of which is a 32bit wide register, and set 425 them all to zero. Note that s->iobase is a pointer to 426 int32, not pointer to char. 427 */ 428 429 for (i = 0; i < 8; i++) { 430 rme9652_write(rme9652, i * 4, 0); 431 udelay(10); 432 } 433 rme9652->prev_hw_offset = 0; 434 } 435 436 static inline void rme9652_start(struct snd_rme9652 *s) 437 { 438 s->control_register |= (RME9652_IE | RME9652_start_bit); 439 rme9652_write(s, RME9652_control_register, s->control_register); 440 } 441 442 static inline void rme9652_stop(struct snd_rme9652 *s) 443 { 444 s->control_register &= ~(RME9652_start_bit | RME9652_IE); 445 rme9652_write(s, RME9652_control_register, s->control_register); 446 } 447 448 static int rme9652_set_interrupt_interval(struct snd_rme9652 *s, 449 unsigned int frames) 450 { 451 int restart = 0; 452 int n; 453 454 spin_lock_irq(&s->lock); 455 456 if ((restart = s->running)) { 457 rme9652_stop(s); 458 } 459 460 frames >>= 7; 461 n = 0; 462 while (frames) { 463 n++; 464 frames >>= 1; 465 } 466 467 s->control_register &= ~RME9652_latency; 468 s->control_register |= rme9652_encode_latency(n); 469 470 rme9652_write(s, RME9652_control_register, s->control_register); 471 472 rme9652_compute_period_size(s); 473 474 if (restart) 475 rme9652_start(s); 476 477 spin_unlock_irq(&s->lock); 478 479 return 0; 480 } 481 482 static int rme9652_set_rate(struct snd_rme9652 *rme9652, int rate) 483 { 484 int restart; 485 int reject_if_open = 0; 486 int xrate; 487 488 if (!snd_rme9652_use_is_exclusive (rme9652)) { 489 return -EBUSY; 490 } 491 492 /* Changing from a "single speed" to a "double speed" rate is 493 not allowed if any substreams are open. This is because 494 such a change causes a shift in the location of 495 the DMA buffers and a reduction in the number of available 496 buffers. 497 498 Note that a similar but essentially insoluble problem 499 exists for externally-driven rate changes. All we can do 500 is to flag rate changes in the read/write routines. 501 */ 502 503 spin_lock_irq(&rme9652->lock); 504 xrate = rme9652_adat_sample_rate(rme9652); 505 506 switch (rate) { 507 case 44100: 508 if (xrate > 48000) { 509 reject_if_open = 1; 510 } 511 rate = 0; 512 break; 513 case 48000: 514 if (xrate > 48000) { 515 reject_if_open = 1; 516 } 517 rate = RME9652_freq; 518 break; 519 case 88200: 520 if (xrate < 48000) { 521 reject_if_open = 1; 522 } 523 rate = RME9652_DS; 524 break; 525 case 96000: 526 if (xrate < 48000) { 527 reject_if_open = 1; 528 } 529 rate = RME9652_DS | RME9652_freq; 530 break; 531 default: 532 spin_unlock_irq(&rme9652->lock); 533 return -EINVAL; 534 } 535 536 if (reject_if_open && (rme9652->capture_pid >= 0 || rme9652->playback_pid >= 0)) { 537 spin_unlock_irq(&rme9652->lock); 538 return -EBUSY; 539 } 540 541 if ((restart = rme9652->running)) { 542 rme9652_stop(rme9652); 543 } 544 rme9652->control_register &= ~(RME9652_freq | RME9652_DS); 545 rme9652->control_register |= rate; 546 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 547 548 if (restart) { 549 rme9652_start(rme9652); 550 } 551 552 if (rate & RME9652_DS) { 553 if (rme9652->ss_channels == RME9652_NCHANNELS) { 554 rme9652->channel_map = channel_map_9652_ds; 555 } else { 556 rme9652->channel_map = channel_map_9636_ds; 557 } 558 } else { 559 if (rme9652->ss_channels == RME9652_NCHANNELS) { 560 rme9652->channel_map = channel_map_9652_ss; 561 } else { 562 rme9652->channel_map = channel_map_9636_ss; 563 } 564 } 565 566 spin_unlock_irq(&rme9652->lock); 567 return 0; 568 } 569 570 static void rme9652_set_thru(struct snd_rme9652 *rme9652, int channel, int enable) 571 { 572 int i; 573 574 rme9652->passthru = 0; 575 576 if (channel < 0) { 577 578 /* set thru for all channels */ 579 580 if (enable) { 581 for (i = 0; i < RME9652_NCHANNELS; i++) { 582 rme9652->thru_bits |= (1 << i); 583 rme9652_write(rme9652, RME9652_thru_base + i * 4, 1); 584 } 585 } else { 586 for (i = 0; i < RME9652_NCHANNELS; i++) { 587 rme9652->thru_bits &= ~(1 << i); 588 rme9652_write(rme9652, RME9652_thru_base + i * 4, 0); 589 } 590 } 591 592 } else { 593 int mapped_channel; 594 595 mapped_channel = rme9652->channel_map[channel]; 596 597 if (enable) { 598 rme9652->thru_bits |= (1 << mapped_channel); 599 } else { 600 rme9652->thru_bits &= ~(1 << mapped_channel); 601 } 602 603 rme9652_write(rme9652, 604 RME9652_thru_base + mapped_channel * 4, 605 enable ? 1 : 0); 606 } 607 } 608 609 static int rme9652_set_passthru(struct snd_rme9652 *rme9652, int onoff) 610 { 611 if (onoff) { 612 rme9652_set_thru(rme9652, -1, 1); 613 614 /* we don't want interrupts, so do a 615 custom version of rme9652_start(). 616 */ 617 618 rme9652->control_register = 619 RME9652_inp_0 | 620 rme9652_encode_latency(7) | 621 RME9652_start_bit; 622 623 rme9652_reset_hw_pointer(rme9652); 624 625 rme9652_write(rme9652, RME9652_control_register, 626 rme9652->control_register); 627 rme9652->passthru = 1; 628 } else { 629 rme9652_set_thru(rme9652, -1, 0); 630 rme9652_stop(rme9652); 631 rme9652->passthru = 0; 632 } 633 634 return 0; 635 } 636 637 static void rme9652_spdif_set_bit (struct snd_rme9652 *rme9652, int mask, int onoff) 638 { 639 if (onoff) 640 rme9652->control_register |= mask; 641 else 642 rme9652->control_register &= ~mask; 643 644 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 645 } 646 647 static void rme9652_spdif_write_byte (struct snd_rme9652 *rme9652, const int val) 648 { 649 long mask; 650 long i; 651 652 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) { 653 if (val & mask) 654 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 1); 655 else 656 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 0); 657 658 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1); 659 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0); 660 } 661 } 662 663 static int rme9652_spdif_read_byte (struct snd_rme9652 *rme9652) 664 { 665 long mask; 666 long val; 667 long i; 668 669 val = 0; 670 671 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) { 672 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1); 673 if (rme9652_read (rme9652, RME9652_status_register) & RME9652_SPDIF_READ) 674 val |= mask; 675 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0); 676 } 677 678 return val; 679 } 680 681 static void rme9652_write_spdif_codec (struct snd_rme9652 *rme9652, const int address, const int data) 682 { 683 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1); 684 rme9652_spdif_write_byte (rme9652, 0x20); 685 rme9652_spdif_write_byte (rme9652, address); 686 rme9652_spdif_write_byte (rme9652, data); 687 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0); 688 } 689 690 691 static int rme9652_spdif_read_codec (struct snd_rme9652 *rme9652, const int address) 692 { 693 int ret; 694 695 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1); 696 rme9652_spdif_write_byte (rme9652, 0x20); 697 rme9652_spdif_write_byte (rme9652, address); 698 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0); 699 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1); 700 701 rme9652_spdif_write_byte (rme9652, 0x21); 702 ret = rme9652_spdif_read_byte (rme9652); 703 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0); 704 705 return ret; 706 } 707 708 static void rme9652_initialize_spdif_receiver (struct snd_rme9652 *rme9652) 709 { 710 /* XXX what unsets this ? */ 711 712 rme9652->control_register |= RME9652_SPDIF_RESET; 713 714 rme9652_write_spdif_codec (rme9652, 4, 0x40); 715 rme9652_write_spdif_codec (rme9652, 17, 0x13); 716 rme9652_write_spdif_codec (rme9652, 6, 0x02); 717 } 718 719 static inline int rme9652_spdif_sample_rate(struct snd_rme9652 *s) 720 { 721 unsigned int rate_bits; 722 723 if (rme9652_read(s, RME9652_status_register) & RME9652_ERF) { 724 return -1; /* error condition */ 725 } 726 727 if (s->hw_rev == 15) { 728 729 int x, y, ret; 730 731 x = rme9652_spdif_read_codec (s, 30); 732 733 if (x != 0) 734 y = 48000 * 64 / x; 735 else 736 y = 0; 737 738 if (y > 30400 && y < 33600) ret = 32000; 739 else if (y > 41900 && y < 46000) ret = 44100; 740 else if (y > 46000 && y < 50400) ret = 48000; 741 else if (y > 60800 && y < 67200) ret = 64000; 742 else if (y > 83700 && y < 92000) ret = 88200; 743 else if (y > 92000 && y < 100000) ret = 96000; 744 else ret = 0; 745 return ret; 746 } 747 748 rate_bits = rme9652_read(s, RME9652_status_register) & RME9652_F; 749 750 switch (rme9652_decode_spdif_rate(rate_bits)) { 751 case 0x7: 752 return 32000; 753 break; 754 755 case 0x6: 756 return 44100; 757 break; 758 759 case 0x5: 760 return 48000; 761 break; 762 763 case 0x4: 764 return 88200; 765 break; 766 767 case 0x3: 768 return 96000; 769 break; 770 771 case 0x0: 772 return 64000; 773 break; 774 775 default: 776 dev_err(s->card->dev, 777 "%s: unknown S/PDIF input rate (bits = 0x%x)\n", 778 s->card_name, rate_bits); 779 return 0; 780 break; 781 } 782 } 783 784 /*----------------------------------------------------------------------------- 785 Control Interface 786 ----------------------------------------------------------------------------*/ 787 788 static u32 snd_rme9652_convert_from_aes(struct snd_aes_iec958 *aes) 789 { 790 u32 val = 0; 791 val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? RME9652_PRO : 0; 792 val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? RME9652_Dolby : 0; 793 if (val & RME9652_PRO) 794 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? RME9652_EMP : 0; 795 else 796 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? RME9652_EMP : 0; 797 return val; 798 } 799 800 static void snd_rme9652_convert_to_aes(struct snd_aes_iec958 *aes, u32 val) 801 { 802 aes->status[0] = ((val & RME9652_PRO) ? IEC958_AES0_PROFESSIONAL : 0) | 803 ((val & RME9652_Dolby) ? IEC958_AES0_NONAUDIO : 0); 804 if (val & RME9652_PRO) 805 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0; 806 else 807 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_CON_EMPHASIS_5015 : 0; 808 } 809 810 static int snd_rme9652_control_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 811 { 812 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 813 uinfo->count = 1; 814 return 0; 815 } 816 817 static int snd_rme9652_control_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 818 { 819 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 820 821 snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif); 822 return 0; 823 } 824 825 static int snd_rme9652_control_spdif_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 826 { 827 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 828 int change; 829 u32 val; 830 831 val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958); 832 spin_lock_irq(&rme9652->lock); 833 change = val != rme9652->creg_spdif; 834 rme9652->creg_spdif = val; 835 spin_unlock_irq(&rme9652->lock); 836 return change; 837 } 838 839 static int snd_rme9652_control_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 840 { 841 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 842 uinfo->count = 1; 843 return 0; 844 } 845 846 static int snd_rme9652_control_spdif_stream_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 847 { 848 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 849 850 snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif_stream); 851 return 0; 852 } 853 854 static int snd_rme9652_control_spdif_stream_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 855 { 856 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 857 int change; 858 u32 val; 859 860 val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958); 861 spin_lock_irq(&rme9652->lock); 862 change = val != rme9652->creg_spdif_stream; 863 rme9652->creg_spdif_stream = val; 864 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP); 865 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= val); 866 spin_unlock_irq(&rme9652->lock); 867 return change; 868 } 869 870 static int snd_rme9652_control_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 871 { 872 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 873 uinfo->count = 1; 874 return 0; 875 } 876 877 static int snd_rme9652_control_spdif_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 878 { 879 ucontrol->value.iec958.status[0] = kcontrol->private_value; 880 return 0; 881 } 882 883 #define RME9652_ADAT1_IN(xname, xindex) \ 884 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 885 .info = snd_rme9652_info_adat1_in, \ 886 .get = snd_rme9652_get_adat1_in, \ 887 .put = snd_rme9652_put_adat1_in } 888 889 static unsigned int rme9652_adat1_in(struct snd_rme9652 *rme9652) 890 { 891 if (rme9652->control_register & RME9652_ADAT1_INTERNAL) 892 return 1; 893 return 0; 894 } 895 896 static int rme9652_set_adat1_input(struct snd_rme9652 *rme9652, int internal) 897 { 898 int restart = 0; 899 900 if (internal) { 901 rme9652->control_register |= RME9652_ADAT1_INTERNAL; 902 } else { 903 rme9652->control_register &= ~RME9652_ADAT1_INTERNAL; 904 } 905 906 /* XXX do we actually need to stop the card when we do this ? */ 907 908 if ((restart = rme9652->running)) { 909 rme9652_stop(rme9652); 910 } 911 912 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 913 914 if (restart) { 915 rme9652_start(rme9652); 916 } 917 918 return 0; 919 } 920 921 static int snd_rme9652_info_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 922 { 923 static char *texts[2] = {"ADAT1", "Internal"}; 924 925 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 926 uinfo->count = 1; 927 uinfo->value.enumerated.items = 2; 928 if (uinfo->value.enumerated.item > 1) 929 uinfo->value.enumerated.item = 1; 930 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); 931 return 0; 932 } 933 934 static int snd_rme9652_get_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 935 { 936 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 937 938 spin_lock_irq(&rme9652->lock); 939 ucontrol->value.enumerated.item[0] = rme9652_adat1_in(rme9652); 940 spin_unlock_irq(&rme9652->lock); 941 return 0; 942 } 943 944 static int snd_rme9652_put_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 945 { 946 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 947 int change; 948 unsigned int val; 949 950 if (!snd_rme9652_use_is_exclusive(rme9652)) 951 return -EBUSY; 952 val = ucontrol->value.enumerated.item[0] % 2; 953 spin_lock_irq(&rme9652->lock); 954 change = val != rme9652_adat1_in(rme9652); 955 if (change) 956 rme9652_set_adat1_input(rme9652, val); 957 spin_unlock_irq(&rme9652->lock); 958 return change; 959 } 960 961 #define RME9652_SPDIF_IN(xname, xindex) \ 962 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 963 .info = snd_rme9652_info_spdif_in, \ 964 .get = snd_rme9652_get_spdif_in, .put = snd_rme9652_put_spdif_in } 965 966 static unsigned int rme9652_spdif_in(struct snd_rme9652 *rme9652) 967 { 968 return rme9652_decode_spdif_in(rme9652->control_register & 969 RME9652_inp); 970 } 971 972 static int rme9652_set_spdif_input(struct snd_rme9652 *rme9652, int in) 973 { 974 int restart = 0; 975 976 rme9652->control_register &= ~RME9652_inp; 977 rme9652->control_register |= rme9652_encode_spdif_in(in); 978 979 if ((restart = rme9652->running)) { 980 rme9652_stop(rme9652); 981 } 982 983 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 984 985 if (restart) { 986 rme9652_start(rme9652); 987 } 988 989 return 0; 990 } 991 992 static int snd_rme9652_info_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 993 { 994 static char *texts[3] = {"ADAT1", "Coaxial", "Internal"}; 995 996 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 997 uinfo->count = 1; 998 uinfo->value.enumerated.items = 3; 999 if (uinfo->value.enumerated.item > 2) 1000 uinfo->value.enumerated.item = 2; 1001 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); 1002 return 0; 1003 } 1004 1005 static int snd_rme9652_get_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1006 { 1007 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1008 1009 spin_lock_irq(&rme9652->lock); 1010 ucontrol->value.enumerated.item[0] = rme9652_spdif_in(rme9652); 1011 spin_unlock_irq(&rme9652->lock); 1012 return 0; 1013 } 1014 1015 static int snd_rme9652_put_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1016 { 1017 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1018 int change; 1019 unsigned int val; 1020 1021 if (!snd_rme9652_use_is_exclusive(rme9652)) 1022 return -EBUSY; 1023 val = ucontrol->value.enumerated.item[0] % 3; 1024 spin_lock_irq(&rme9652->lock); 1025 change = val != rme9652_spdif_in(rme9652); 1026 if (change) 1027 rme9652_set_spdif_input(rme9652, val); 1028 spin_unlock_irq(&rme9652->lock); 1029 return change; 1030 } 1031 1032 #define RME9652_SPDIF_OUT(xname, xindex) \ 1033 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1034 .info = snd_rme9652_info_spdif_out, \ 1035 .get = snd_rme9652_get_spdif_out, .put = snd_rme9652_put_spdif_out } 1036 1037 static int rme9652_spdif_out(struct snd_rme9652 *rme9652) 1038 { 1039 return (rme9652->control_register & RME9652_opt_out) ? 1 : 0; 1040 } 1041 1042 static int rme9652_set_spdif_output(struct snd_rme9652 *rme9652, int out) 1043 { 1044 int restart = 0; 1045 1046 if (out) { 1047 rme9652->control_register |= RME9652_opt_out; 1048 } else { 1049 rme9652->control_register &= ~RME9652_opt_out; 1050 } 1051 1052 if ((restart = rme9652->running)) { 1053 rme9652_stop(rme9652); 1054 } 1055 1056 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 1057 1058 if (restart) { 1059 rme9652_start(rme9652); 1060 } 1061 1062 return 0; 1063 } 1064 1065 #define snd_rme9652_info_spdif_out snd_ctl_boolean_mono_info 1066 1067 static int snd_rme9652_get_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1068 { 1069 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1070 1071 spin_lock_irq(&rme9652->lock); 1072 ucontrol->value.integer.value[0] = rme9652_spdif_out(rme9652); 1073 spin_unlock_irq(&rme9652->lock); 1074 return 0; 1075 } 1076 1077 static int snd_rme9652_put_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1078 { 1079 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1080 int change; 1081 unsigned int val; 1082 1083 if (!snd_rme9652_use_is_exclusive(rme9652)) 1084 return -EBUSY; 1085 val = ucontrol->value.integer.value[0] & 1; 1086 spin_lock_irq(&rme9652->lock); 1087 change = (int)val != rme9652_spdif_out(rme9652); 1088 rme9652_set_spdif_output(rme9652, val); 1089 spin_unlock_irq(&rme9652->lock); 1090 return change; 1091 } 1092 1093 #define RME9652_SYNC_MODE(xname, xindex) \ 1094 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1095 .info = snd_rme9652_info_sync_mode, \ 1096 .get = snd_rme9652_get_sync_mode, .put = snd_rme9652_put_sync_mode } 1097 1098 static int rme9652_sync_mode(struct snd_rme9652 *rme9652) 1099 { 1100 if (rme9652->control_register & RME9652_wsel) { 1101 return 2; 1102 } else if (rme9652->control_register & RME9652_Master) { 1103 return 1; 1104 } else { 1105 return 0; 1106 } 1107 } 1108 1109 static int rme9652_set_sync_mode(struct snd_rme9652 *rme9652, int mode) 1110 { 1111 int restart = 0; 1112 1113 switch (mode) { 1114 case 0: 1115 rme9652->control_register &= 1116 ~(RME9652_Master | RME9652_wsel); 1117 break; 1118 case 1: 1119 rme9652->control_register = 1120 (rme9652->control_register & ~RME9652_wsel) | RME9652_Master; 1121 break; 1122 case 2: 1123 rme9652->control_register |= 1124 (RME9652_Master | RME9652_wsel); 1125 break; 1126 } 1127 1128 if ((restart = rme9652->running)) { 1129 rme9652_stop(rme9652); 1130 } 1131 1132 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 1133 1134 if (restart) { 1135 rme9652_start(rme9652); 1136 } 1137 1138 return 0; 1139 } 1140 1141 static int snd_rme9652_info_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1142 { 1143 static char *texts[3] = {"AutoSync", "Master", "Word Clock"}; 1144 1145 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1146 uinfo->count = 1; 1147 uinfo->value.enumerated.items = 3; 1148 if (uinfo->value.enumerated.item > 2) 1149 uinfo->value.enumerated.item = 2; 1150 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); 1151 return 0; 1152 } 1153 1154 static int snd_rme9652_get_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1155 { 1156 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1157 1158 spin_lock_irq(&rme9652->lock); 1159 ucontrol->value.enumerated.item[0] = rme9652_sync_mode(rme9652); 1160 spin_unlock_irq(&rme9652->lock); 1161 return 0; 1162 } 1163 1164 static int snd_rme9652_put_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1165 { 1166 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1167 int change; 1168 unsigned int val; 1169 1170 val = ucontrol->value.enumerated.item[0] % 3; 1171 spin_lock_irq(&rme9652->lock); 1172 change = (int)val != rme9652_sync_mode(rme9652); 1173 rme9652_set_sync_mode(rme9652, val); 1174 spin_unlock_irq(&rme9652->lock); 1175 return change; 1176 } 1177 1178 #define RME9652_SYNC_PREF(xname, xindex) \ 1179 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1180 .info = snd_rme9652_info_sync_pref, \ 1181 .get = snd_rme9652_get_sync_pref, .put = snd_rme9652_put_sync_pref } 1182 1183 static int rme9652_sync_pref(struct snd_rme9652 *rme9652) 1184 { 1185 switch (rme9652->control_register & RME9652_SyncPref_Mask) { 1186 case RME9652_SyncPref_ADAT1: 1187 return RME9652_SYNC_FROM_ADAT1; 1188 case RME9652_SyncPref_ADAT2: 1189 return RME9652_SYNC_FROM_ADAT2; 1190 case RME9652_SyncPref_ADAT3: 1191 return RME9652_SYNC_FROM_ADAT3; 1192 case RME9652_SyncPref_SPDIF: 1193 return RME9652_SYNC_FROM_SPDIF; 1194 } 1195 /* Not reachable */ 1196 return 0; 1197 } 1198 1199 static int rme9652_set_sync_pref(struct snd_rme9652 *rme9652, int pref) 1200 { 1201 int restart; 1202 1203 rme9652->control_register &= ~RME9652_SyncPref_Mask; 1204 switch (pref) { 1205 case RME9652_SYNC_FROM_ADAT1: 1206 rme9652->control_register |= RME9652_SyncPref_ADAT1; 1207 break; 1208 case RME9652_SYNC_FROM_ADAT2: 1209 rme9652->control_register |= RME9652_SyncPref_ADAT2; 1210 break; 1211 case RME9652_SYNC_FROM_ADAT3: 1212 rme9652->control_register |= RME9652_SyncPref_ADAT3; 1213 break; 1214 case RME9652_SYNC_FROM_SPDIF: 1215 rme9652->control_register |= RME9652_SyncPref_SPDIF; 1216 break; 1217 } 1218 1219 if ((restart = rme9652->running)) { 1220 rme9652_stop(rme9652); 1221 } 1222 1223 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 1224 1225 if (restart) { 1226 rme9652_start(rme9652); 1227 } 1228 1229 return 0; 1230 } 1231 1232 static int snd_rme9652_info_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1233 { 1234 static char *texts[4] = {"IEC958 In", "ADAT1 In", "ADAT2 In", "ADAT3 In"}; 1235 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1236 1237 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1238 uinfo->count = 1; 1239 uinfo->value.enumerated.items = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3; 1240 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 1241 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; 1242 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); 1243 return 0; 1244 } 1245 1246 static int snd_rme9652_get_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1247 { 1248 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1249 1250 spin_lock_irq(&rme9652->lock); 1251 ucontrol->value.enumerated.item[0] = rme9652_sync_pref(rme9652); 1252 spin_unlock_irq(&rme9652->lock); 1253 return 0; 1254 } 1255 1256 static int snd_rme9652_put_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1257 { 1258 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1259 int change, max; 1260 unsigned int val; 1261 1262 if (!snd_rme9652_use_is_exclusive(rme9652)) 1263 return -EBUSY; 1264 max = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3; 1265 val = ucontrol->value.enumerated.item[0] % max; 1266 spin_lock_irq(&rme9652->lock); 1267 change = (int)val != rme9652_sync_pref(rme9652); 1268 rme9652_set_sync_pref(rme9652, val); 1269 spin_unlock_irq(&rme9652->lock); 1270 return change; 1271 } 1272 1273 static int snd_rme9652_info_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1274 { 1275 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1276 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1277 uinfo->count = rme9652->ss_channels; 1278 uinfo->value.integer.min = 0; 1279 uinfo->value.integer.max = 1; 1280 return 0; 1281 } 1282 1283 static int snd_rme9652_get_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1284 { 1285 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1286 unsigned int k; 1287 u32 thru_bits = rme9652->thru_bits; 1288 1289 for (k = 0; k < rme9652->ss_channels; ++k) { 1290 ucontrol->value.integer.value[k] = !!(thru_bits & (1 << k)); 1291 } 1292 return 0; 1293 } 1294 1295 static int snd_rme9652_put_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1296 { 1297 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1298 int change; 1299 unsigned int chn; 1300 u32 thru_bits = 0; 1301 1302 if (!snd_rme9652_use_is_exclusive(rme9652)) 1303 return -EBUSY; 1304 1305 for (chn = 0; chn < rme9652->ss_channels; ++chn) { 1306 if (ucontrol->value.integer.value[chn]) 1307 thru_bits |= 1 << chn; 1308 } 1309 1310 spin_lock_irq(&rme9652->lock); 1311 change = thru_bits ^ rme9652->thru_bits; 1312 if (change) { 1313 for (chn = 0; chn < rme9652->ss_channels; ++chn) { 1314 if (!(change & (1 << chn))) 1315 continue; 1316 rme9652_set_thru(rme9652,chn,thru_bits&(1<<chn)); 1317 } 1318 } 1319 spin_unlock_irq(&rme9652->lock); 1320 return !!change; 1321 } 1322 1323 #define RME9652_PASSTHRU(xname, xindex) \ 1324 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1325 .info = snd_rme9652_info_passthru, \ 1326 .put = snd_rme9652_put_passthru, \ 1327 .get = snd_rme9652_get_passthru } 1328 1329 #define snd_rme9652_info_passthru snd_ctl_boolean_mono_info 1330 1331 static int snd_rme9652_get_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1332 { 1333 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1334 1335 spin_lock_irq(&rme9652->lock); 1336 ucontrol->value.integer.value[0] = rme9652->passthru; 1337 spin_unlock_irq(&rme9652->lock); 1338 return 0; 1339 } 1340 1341 static int snd_rme9652_put_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1342 { 1343 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1344 int change; 1345 unsigned int val; 1346 int err = 0; 1347 1348 if (!snd_rme9652_use_is_exclusive(rme9652)) 1349 return -EBUSY; 1350 1351 val = ucontrol->value.integer.value[0] & 1; 1352 spin_lock_irq(&rme9652->lock); 1353 change = (ucontrol->value.integer.value[0] != rme9652->passthru); 1354 if (change) 1355 err = rme9652_set_passthru(rme9652, val); 1356 spin_unlock_irq(&rme9652->lock); 1357 return err ? err : change; 1358 } 1359 1360 /* Read-only switches */ 1361 1362 #define RME9652_SPDIF_RATE(xname, xindex) \ 1363 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1364 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \ 1365 .info = snd_rme9652_info_spdif_rate, \ 1366 .get = snd_rme9652_get_spdif_rate } 1367 1368 static int snd_rme9652_info_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1369 { 1370 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 1371 uinfo->count = 1; 1372 uinfo->value.integer.min = 0; 1373 uinfo->value.integer.max = 96000; 1374 return 0; 1375 } 1376 1377 static int snd_rme9652_get_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1378 { 1379 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1380 1381 spin_lock_irq(&rme9652->lock); 1382 ucontrol->value.integer.value[0] = rme9652_spdif_sample_rate(rme9652); 1383 spin_unlock_irq(&rme9652->lock); 1384 return 0; 1385 } 1386 1387 #define RME9652_ADAT_SYNC(xname, xindex, xidx) \ 1388 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1389 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \ 1390 .info = snd_rme9652_info_adat_sync, \ 1391 .get = snd_rme9652_get_adat_sync, .private_value = xidx } 1392 1393 static int snd_rme9652_info_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1394 { 1395 static char *texts[4] = {"No Lock", "Lock", "No Lock Sync", "Lock Sync"}; 1396 1397 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1398 uinfo->count = 1; 1399 uinfo->value.enumerated.items = 4; 1400 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 1401 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; 1402 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); 1403 return 0; 1404 } 1405 1406 static int snd_rme9652_get_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1407 { 1408 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1409 unsigned int mask1, mask2, val; 1410 1411 switch (kcontrol->private_value) { 1412 case 0: mask1 = RME9652_lock_0; mask2 = RME9652_sync_0; break; 1413 case 1: mask1 = RME9652_lock_1; mask2 = RME9652_sync_1; break; 1414 case 2: mask1 = RME9652_lock_2; mask2 = RME9652_sync_2; break; 1415 default: return -EINVAL; 1416 } 1417 val = rme9652_read(rme9652, RME9652_status_register); 1418 ucontrol->value.enumerated.item[0] = (val & mask1) ? 1 : 0; 1419 ucontrol->value.enumerated.item[0] |= (val & mask2) ? 2 : 0; 1420 return 0; 1421 } 1422 1423 #define RME9652_TC_VALID(xname, xindex) \ 1424 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1425 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \ 1426 .info = snd_rme9652_info_tc_valid, \ 1427 .get = snd_rme9652_get_tc_valid } 1428 1429 #define snd_rme9652_info_tc_valid snd_ctl_boolean_mono_info 1430 1431 static int snd_rme9652_get_tc_valid(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1432 { 1433 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1434 1435 ucontrol->value.integer.value[0] = 1436 (rme9652_read(rme9652, RME9652_status_register) & RME9652_tc_valid) ? 1 : 0; 1437 return 0; 1438 } 1439 1440 #ifdef ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE 1441 1442 /* FIXME: this routine needs a port to the new control API --jk */ 1443 1444 static int snd_rme9652_get_tc_value(void *private_data, 1445 snd_kswitch_t *kswitch, 1446 snd_switch_t *uswitch) 1447 { 1448 struct snd_rme9652 *s = (struct snd_rme9652 *) private_data; 1449 u32 value; 1450 int i; 1451 1452 uswitch->type = SNDRV_SW_TYPE_DWORD; 1453 1454 if ((rme9652_read(s, RME9652_status_register) & 1455 RME9652_tc_valid) == 0) { 1456 uswitch->value.data32[0] = 0; 1457 return 0; 1458 } 1459 1460 /* timecode request */ 1461 1462 rme9652_write(s, RME9652_time_code, 0); 1463 1464 /* XXX bug alert: loop-based timing !!!! */ 1465 1466 for (i = 0; i < 50; i++) { 1467 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy)) 1468 break; 1469 } 1470 1471 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy)) { 1472 return -EIO; 1473 } 1474 1475 value = 0; 1476 1477 for (i = 0; i < 32; i++) { 1478 value >>= 1; 1479 1480 if (rme9652_read(s, i * 4) & RME9652_tc_out) 1481 value |= 0x80000000; 1482 } 1483 1484 if (value > 2 * 60 * 48000) { 1485 value -= 2 * 60 * 48000; 1486 } else { 1487 value = 0; 1488 } 1489 1490 uswitch->value.data32[0] = value; 1491 1492 return 0; 1493 } 1494 1495 #endif /* ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE */ 1496 1497 static struct snd_kcontrol_new snd_rme9652_controls[] = { 1498 { 1499 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1500 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT), 1501 .info = snd_rme9652_control_spdif_info, 1502 .get = snd_rme9652_control_spdif_get, 1503 .put = snd_rme9652_control_spdif_put, 1504 }, 1505 { 1506 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE, 1507 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1508 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM), 1509 .info = snd_rme9652_control_spdif_stream_info, 1510 .get = snd_rme9652_control_spdif_stream_get, 1511 .put = snd_rme9652_control_spdif_stream_put, 1512 }, 1513 { 1514 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1515 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1516 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK), 1517 .info = snd_rme9652_control_spdif_mask_info, 1518 .get = snd_rme9652_control_spdif_mask_get, 1519 .private_value = IEC958_AES0_NONAUDIO | 1520 IEC958_AES0_PROFESSIONAL | 1521 IEC958_AES0_CON_EMPHASIS, 1522 }, 1523 { 1524 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1525 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1526 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK), 1527 .info = snd_rme9652_control_spdif_mask_info, 1528 .get = snd_rme9652_control_spdif_mask_get, 1529 .private_value = IEC958_AES0_NONAUDIO | 1530 IEC958_AES0_PROFESSIONAL | 1531 IEC958_AES0_PRO_EMPHASIS, 1532 }, 1533 RME9652_SPDIF_IN("IEC958 Input Connector", 0), 1534 RME9652_SPDIF_OUT("IEC958 Output also on ADAT1", 0), 1535 RME9652_SYNC_MODE("Sync Mode", 0), 1536 RME9652_SYNC_PREF("Preferred Sync Source", 0), 1537 { 1538 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1539 .name = "Channels Thru", 1540 .index = 0, 1541 .info = snd_rme9652_info_thru, 1542 .get = snd_rme9652_get_thru, 1543 .put = snd_rme9652_put_thru, 1544 }, 1545 RME9652_SPDIF_RATE("IEC958 Sample Rate", 0), 1546 RME9652_ADAT_SYNC("ADAT1 Sync Check", 0, 0), 1547 RME9652_ADAT_SYNC("ADAT2 Sync Check", 0, 1), 1548 RME9652_TC_VALID("Timecode Valid", 0), 1549 RME9652_PASSTHRU("Passthru", 0) 1550 }; 1551 1552 static struct snd_kcontrol_new snd_rme9652_adat3_check = 1553 RME9652_ADAT_SYNC("ADAT3 Sync Check", 0, 2); 1554 1555 static struct snd_kcontrol_new snd_rme9652_adat1_input = 1556 RME9652_ADAT1_IN("ADAT1 Input Source", 0); 1557 1558 static int snd_rme9652_create_controls(struct snd_card *card, struct snd_rme9652 *rme9652) 1559 { 1560 unsigned int idx; 1561 int err; 1562 struct snd_kcontrol *kctl; 1563 1564 for (idx = 0; idx < ARRAY_SIZE(snd_rme9652_controls); idx++) { 1565 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_controls[idx], rme9652))) < 0) 1566 return err; 1567 if (idx == 1) /* IEC958 (S/PDIF) Stream */ 1568 rme9652->spdif_ctl = kctl; 1569 } 1570 1571 if (rme9652->ss_channels == RME9652_NCHANNELS) 1572 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat3_check, rme9652))) < 0) 1573 return err; 1574 1575 if (rme9652->hw_rev >= 15) 1576 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat1_input, rme9652))) < 0) 1577 return err; 1578 1579 return 0; 1580 } 1581 1582 /*------------------------------------------------------------ 1583 /proc interface 1584 ------------------------------------------------------------*/ 1585 1586 static void 1587 snd_rme9652_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer) 1588 { 1589 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) entry->private_data; 1590 u32 thru_bits = rme9652->thru_bits; 1591 int show_auto_sync_source = 0; 1592 int i; 1593 unsigned int status; 1594 int x; 1595 1596 status = rme9652_read(rme9652, RME9652_status_register); 1597 1598 snd_iprintf(buffer, "%s (Card #%d)\n", rme9652->card_name, rme9652->card->number + 1); 1599 snd_iprintf(buffer, "Buffers: capture %p playback %p\n", 1600 rme9652->capture_buffer, rme9652->playback_buffer); 1601 snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n", 1602 rme9652->irq, rme9652->port, (unsigned long)rme9652->iobase); 1603 snd_iprintf(buffer, "Control register: %x\n", rme9652->control_register); 1604 1605 snd_iprintf(buffer, "\n"); 1606 1607 x = 1 << (6 + rme9652_decode_latency(rme9652->control_register & 1608 RME9652_latency)); 1609 1610 snd_iprintf(buffer, "Latency: %d samples (2 periods of %lu bytes)\n", 1611 x, (unsigned long) rme9652->period_bytes); 1612 snd_iprintf(buffer, "Hardware pointer (frames): %ld\n", 1613 rme9652_hw_pointer(rme9652)); 1614 snd_iprintf(buffer, "Passthru: %s\n", 1615 rme9652->passthru ? "yes" : "no"); 1616 1617 if ((rme9652->control_register & (RME9652_Master | RME9652_wsel)) == 0) { 1618 snd_iprintf(buffer, "Clock mode: autosync\n"); 1619 show_auto_sync_source = 1; 1620 } else if (rme9652->control_register & RME9652_wsel) { 1621 if (status & RME9652_wsel_rd) { 1622 snd_iprintf(buffer, "Clock mode: word clock\n"); 1623 } else { 1624 snd_iprintf(buffer, "Clock mode: word clock (no signal)\n"); 1625 } 1626 } else { 1627 snd_iprintf(buffer, "Clock mode: master\n"); 1628 } 1629 1630 if (show_auto_sync_source) { 1631 switch (rme9652->control_register & RME9652_SyncPref_Mask) { 1632 case RME9652_SyncPref_ADAT1: 1633 snd_iprintf(buffer, "Pref. sync source: ADAT1\n"); 1634 break; 1635 case RME9652_SyncPref_ADAT2: 1636 snd_iprintf(buffer, "Pref. sync source: ADAT2\n"); 1637 break; 1638 case RME9652_SyncPref_ADAT3: 1639 snd_iprintf(buffer, "Pref. sync source: ADAT3\n"); 1640 break; 1641 case RME9652_SyncPref_SPDIF: 1642 snd_iprintf(buffer, "Pref. sync source: IEC958\n"); 1643 break; 1644 default: 1645 snd_iprintf(buffer, "Pref. sync source: ???\n"); 1646 } 1647 } 1648 1649 if (rme9652->hw_rev >= 15) 1650 snd_iprintf(buffer, "\nADAT1 Input source: %s\n", 1651 (rme9652->control_register & RME9652_ADAT1_INTERNAL) ? 1652 "Internal" : "ADAT1 optical"); 1653 1654 snd_iprintf(buffer, "\n"); 1655 1656 switch (rme9652_decode_spdif_in(rme9652->control_register & 1657 RME9652_inp)) { 1658 case RME9652_SPDIFIN_OPTICAL: 1659 snd_iprintf(buffer, "IEC958 input: ADAT1\n"); 1660 break; 1661 case RME9652_SPDIFIN_COAXIAL: 1662 snd_iprintf(buffer, "IEC958 input: Coaxial\n"); 1663 break; 1664 case RME9652_SPDIFIN_INTERN: 1665 snd_iprintf(buffer, "IEC958 input: Internal\n"); 1666 break; 1667 default: 1668 snd_iprintf(buffer, "IEC958 input: ???\n"); 1669 break; 1670 } 1671 1672 if (rme9652->control_register & RME9652_opt_out) { 1673 snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n"); 1674 } else { 1675 snd_iprintf(buffer, "IEC958 output: Coaxial only\n"); 1676 } 1677 1678 if (rme9652->control_register & RME9652_PRO) { 1679 snd_iprintf(buffer, "IEC958 quality: Professional\n"); 1680 } else { 1681 snd_iprintf(buffer, "IEC958 quality: Consumer\n"); 1682 } 1683 1684 if (rme9652->control_register & RME9652_EMP) { 1685 snd_iprintf(buffer, "IEC958 emphasis: on\n"); 1686 } else { 1687 snd_iprintf(buffer, "IEC958 emphasis: off\n"); 1688 } 1689 1690 if (rme9652->control_register & RME9652_Dolby) { 1691 snd_iprintf(buffer, "IEC958 Dolby: on\n"); 1692 } else { 1693 snd_iprintf(buffer, "IEC958 Dolby: off\n"); 1694 } 1695 1696 i = rme9652_spdif_sample_rate(rme9652); 1697 1698 if (i < 0) { 1699 snd_iprintf(buffer, 1700 "IEC958 sample rate: error flag set\n"); 1701 } else if (i == 0) { 1702 snd_iprintf(buffer, "IEC958 sample rate: undetermined\n"); 1703 } else { 1704 snd_iprintf(buffer, "IEC958 sample rate: %d\n", i); 1705 } 1706 1707 snd_iprintf(buffer, "\n"); 1708 1709 snd_iprintf(buffer, "ADAT Sample rate: %dHz\n", 1710 rme9652_adat_sample_rate(rme9652)); 1711 1712 /* Sync Check */ 1713 1714 x = status & RME9652_sync_0; 1715 if (status & RME9652_lock_0) { 1716 snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock"); 1717 } else { 1718 snd_iprintf(buffer, "ADAT1: No Lock\n"); 1719 } 1720 1721 x = status & RME9652_sync_1; 1722 if (status & RME9652_lock_1) { 1723 snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock"); 1724 } else { 1725 snd_iprintf(buffer, "ADAT2: No Lock\n"); 1726 } 1727 1728 x = status & RME9652_sync_2; 1729 if (status & RME9652_lock_2) { 1730 snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock"); 1731 } else { 1732 snd_iprintf(buffer, "ADAT3: No Lock\n"); 1733 } 1734 1735 snd_iprintf(buffer, "\n"); 1736 1737 snd_iprintf(buffer, "Timecode signal: %s\n", 1738 (status & RME9652_tc_valid) ? "yes" : "no"); 1739 1740 /* thru modes */ 1741 1742 snd_iprintf(buffer, "Punch Status:\n\n"); 1743 1744 for (i = 0; i < rme9652->ss_channels; i++) { 1745 if (thru_bits & (1 << i)) { 1746 snd_iprintf(buffer, "%2d: on ", i + 1); 1747 } else { 1748 snd_iprintf(buffer, "%2d: off ", i + 1); 1749 } 1750 1751 if (((i + 1) % 8) == 0) { 1752 snd_iprintf(buffer, "\n"); 1753 } 1754 } 1755 1756 snd_iprintf(buffer, "\n"); 1757 } 1758 1759 static void snd_rme9652_proc_init(struct snd_rme9652 *rme9652) 1760 { 1761 struct snd_info_entry *entry; 1762 1763 if (! snd_card_proc_new(rme9652->card, "rme9652", &entry)) 1764 snd_info_set_text_ops(entry, rme9652, snd_rme9652_proc_read); 1765 } 1766 1767 static void snd_rme9652_free_buffers(struct snd_rme9652 *rme9652) 1768 { 1769 snd_hammerfall_free_buffer(&rme9652->capture_dma_buf, rme9652->pci); 1770 snd_hammerfall_free_buffer(&rme9652->playback_dma_buf, rme9652->pci); 1771 } 1772 1773 static int snd_rme9652_free(struct snd_rme9652 *rme9652) 1774 { 1775 if (rme9652->irq >= 0) 1776 rme9652_stop(rme9652); 1777 snd_rme9652_free_buffers(rme9652); 1778 1779 if (rme9652->irq >= 0) 1780 free_irq(rme9652->irq, (void *)rme9652); 1781 if (rme9652->iobase) 1782 iounmap(rme9652->iobase); 1783 if (rme9652->port) 1784 pci_release_regions(rme9652->pci); 1785 1786 pci_disable_device(rme9652->pci); 1787 return 0; 1788 } 1789 1790 static int snd_rme9652_initialize_memory(struct snd_rme9652 *rme9652) 1791 { 1792 unsigned long pb_bus, cb_bus; 1793 1794 if (snd_hammerfall_get_buffer(rme9652->pci, &rme9652->capture_dma_buf, RME9652_DMA_AREA_BYTES) < 0 || 1795 snd_hammerfall_get_buffer(rme9652->pci, &rme9652->playback_dma_buf, RME9652_DMA_AREA_BYTES) < 0) { 1796 if (rme9652->capture_dma_buf.area) 1797 snd_dma_free_pages(&rme9652->capture_dma_buf); 1798 dev_err(rme9652->card->dev, 1799 "%s: no buffers available\n", rme9652->card_name); 1800 return -ENOMEM; 1801 } 1802 1803 /* Align to bus-space 64K boundary */ 1804 1805 cb_bus = ALIGN(rme9652->capture_dma_buf.addr, 0x10000ul); 1806 pb_bus = ALIGN(rme9652->playback_dma_buf.addr, 0x10000ul); 1807 1808 /* Tell the card where it is */ 1809 1810 rme9652_write(rme9652, RME9652_rec_buffer, cb_bus); 1811 rme9652_write(rme9652, RME9652_play_buffer, pb_bus); 1812 1813 rme9652->capture_buffer = rme9652->capture_dma_buf.area + (cb_bus - rme9652->capture_dma_buf.addr); 1814 rme9652->playback_buffer = rme9652->playback_dma_buf.area + (pb_bus - rme9652->playback_dma_buf.addr); 1815 1816 return 0; 1817 } 1818 1819 static void snd_rme9652_set_defaults(struct snd_rme9652 *rme9652) 1820 { 1821 unsigned int k; 1822 1823 /* ASSUMPTION: rme9652->lock is either held, or 1824 there is no need to hold it (e.g. during module 1825 initialization). 1826 */ 1827 1828 /* set defaults: 1829 1830 SPDIF Input via Coax 1831 autosync clock mode 1832 maximum latency (7 = 8192 samples, 64Kbyte buffer, 1833 which implies 2 4096 sample, 32Kbyte periods). 1834 1835 if rev 1.5, initialize the S/PDIF receiver. 1836 1837 */ 1838 1839 rme9652->control_register = 1840 RME9652_inp_0 | rme9652_encode_latency(7); 1841 1842 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 1843 1844 rme9652_reset_hw_pointer(rme9652); 1845 rme9652_compute_period_size(rme9652); 1846 1847 /* default: thru off for all channels */ 1848 1849 for (k = 0; k < RME9652_NCHANNELS; ++k) 1850 rme9652_write(rme9652, RME9652_thru_base + k * 4, 0); 1851 1852 rme9652->thru_bits = 0; 1853 rme9652->passthru = 0; 1854 1855 /* set a default rate so that the channel map is set up */ 1856 1857 rme9652_set_rate(rme9652, 48000); 1858 } 1859 1860 static irqreturn_t snd_rme9652_interrupt(int irq, void *dev_id) 1861 { 1862 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) dev_id; 1863 1864 if (!(rme9652_read(rme9652, RME9652_status_register) & RME9652_IRQ)) { 1865 return IRQ_NONE; 1866 } 1867 1868 rme9652_write(rme9652, RME9652_irq_clear, 0); 1869 1870 if (rme9652->capture_substream) { 1871 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream); 1872 } 1873 1874 if (rme9652->playback_substream) { 1875 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream); 1876 } 1877 return IRQ_HANDLED; 1878 } 1879 1880 static snd_pcm_uframes_t snd_rme9652_hw_pointer(struct snd_pcm_substream *substream) 1881 { 1882 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 1883 return rme9652_hw_pointer(rme9652); 1884 } 1885 1886 static char *rme9652_channel_buffer_location(struct snd_rme9652 *rme9652, 1887 int stream, 1888 int channel) 1889 1890 { 1891 int mapped_channel; 1892 1893 if (snd_BUG_ON(channel < 0 || channel >= RME9652_NCHANNELS)) 1894 return NULL; 1895 1896 if ((mapped_channel = rme9652->channel_map[channel]) < 0) { 1897 return NULL; 1898 } 1899 1900 if (stream == SNDRV_PCM_STREAM_CAPTURE) { 1901 return rme9652->capture_buffer + 1902 (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES); 1903 } else { 1904 return rme9652->playback_buffer + 1905 (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES); 1906 } 1907 } 1908 1909 static int snd_rme9652_playback_copy(struct snd_pcm_substream *substream, int channel, 1910 snd_pcm_uframes_t pos, void __user *src, snd_pcm_uframes_t count) 1911 { 1912 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 1913 char *channel_buf; 1914 1915 if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES / 4)) 1916 return -EINVAL; 1917 1918 channel_buf = rme9652_channel_buffer_location (rme9652, 1919 substream->pstr->stream, 1920 channel); 1921 if (snd_BUG_ON(!channel_buf)) 1922 return -EIO; 1923 if (copy_from_user(channel_buf + pos * 4, src, count * 4)) 1924 return -EFAULT; 1925 return count; 1926 } 1927 1928 static int snd_rme9652_capture_copy(struct snd_pcm_substream *substream, int channel, 1929 snd_pcm_uframes_t pos, void __user *dst, snd_pcm_uframes_t count) 1930 { 1931 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 1932 char *channel_buf; 1933 1934 if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES / 4)) 1935 return -EINVAL; 1936 1937 channel_buf = rme9652_channel_buffer_location (rme9652, 1938 substream->pstr->stream, 1939 channel); 1940 if (snd_BUG_ON(!channel_buf)) 1941 return -EIO; 1942 if (copy_to_user(dst, channel_buf + pos * 4, count * 4)) 1943 return -EFAULT; 1944 return count; 1945 } 1946 1947 static int snd_rme9652_hw_silence(struct snd_pcm_substream *substream, int channel, 1948 snd_pcm_uframes_t pos, snd_pcm_uframes_t count) 1949 { 1950 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 1951 char *channel_buf; 1952 1953 channel_buf = rme9652_channel_buffer_location (rme9652, 1954 substream->pstr->stream, 1955 channel); 1956 if (snd_BUG_ON(!channel_buf)) 1957 return -EIO; 1958 memset(channel_buf + pos * 4, 0, count * 4); 1959 return count; 1960 } 1961 1962 static int snd_rme9652_reset(struct snd_pcm_substream *substream) 1963 { 1964 struct snd_pcm_runtime *runtime = substream->runtime; 1965 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 1966 struct snd_pcm_substream *other; 1967 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 1968 other = rme9652->capture_substream; 1969 else 1970 other = rme9652->playback_substream; 1971 if (rme9652->running) 1972 runtime->status->hw_ptr = rme9652_hw_pointer(rme9652); 1973 else 1974 runtime->status->hw_ptr = 0; 1975 if (other) { 1976 struct snd_pcm_substream *s; 1977 struct snd_pcm_runtime *oruntime = other->runtime; 1978 snd_pcm_group_for_each_entry(s, substream) { 1979 if (s == other) { 1980 oruntime->status->hw_ptr = runtime->status->hw_ptr; 1981 break; 1982 } 1983 } 1984 } 1985 return 0; 1986 } 1987 1988 static int snd_rme9652_hw_params(struct snd_pcm_substream *substream, 1989 struct snd_pcm_hw_params *params) 1990 { 1991 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 1992 int err; 1993 pid_t this_pid; 1994 pid_t other_pid; 1995 1996 spin_lock_irq(&rme9652->lock); 1997 1998 if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) { 1999 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP); 2000 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= rme9652->creg_spdif_stream); 2001 this_pid = rme9652->playback_pid; 2002 other_pid = rme9652->capture_pid; 2003 } else { 2004 this_pid = rme9652->capture_pid; 2005 other_pid = rme9652->playback_pid; 2006 } 2007 2008 if ((other_pid > 0) && (this_pid != other_pid)) { 2009 2010 /* The other stream is open, and not by the same 2011 task as this one. Make sure that the parameters 2012 that matter are the same. 2013 */ 2014 2015 if ((int)params_rate(params) != 2016 rme9652_adat_sample_rate(rme9652)) { 2017 spin_unlock_irq(&rme9652->lock); 2018 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE); 2019 return -EBUSY; 2020 } 2021 2022 if (params_period_size(params) != rme9652->period_bytes / 4) { 2023 spin_unlock_irq(&rme9652->lock); 2024 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE); 2025 return -EBUSY; 2026 } 2027 2028 /* We're fine. */ 2029 2030 spin_unlock_irq(&rme9652->lock); 2031 return 0; 2032 2033 } else { 2034 spin_unlock_irq(&rme9652->lock); 2035 } 2036 2037 /* how to make sure that the rate matches an externally-set one ? 2038 */ 2039 2040 if ((err = rme9652_set_rate(rme9652, params_rate(params))) < 0) { 2041 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE); 2042 return err; 2043 } 2044 2045 if ((err = rme9652_set_interrupt_interval(rme9652, params_period_size(params))) < 0) { 2046 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE); 2047 return err; 2048 } 2049 2050 return 0; 2051 } 2052 2053 static int snd_rme9652_channel_info(struct snd_pcm_substream *substream, 2054 struct snd_pcm_channel_info *info) 2055 { 2056 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 2057 int chn; 2058 2059 if (snd_BUG_ON(info->channel >= RME9652_NCHANNELS)) 2060 return -EINVAL; 2061 2062 if ((chn = rme9652->channel_map[info->channel]) < 0) { 2063 return -EINVAL; 2064 } 2065 2066 info->offset = chn * RME9652_CHANNEL_BUFFER_BYTES; 2067 info->first = 0; 2068 info->step = 32; 2069 return 0; 2070 } 2071 2072 static int snd_rme9652_ioctl(struct snd_pcm_substream *substream, 2073 unsigned int cmd, void *arg) 2074 { 2075 switch (cmd) { 2076 case SNDRV_PCM_IOCTL1_RESET: 2077 { 2078 return snd_rme9652_reset(substream); 2079 } 2080 case SNDRV_PCM_IOCTL1_CHANNEL_INFO: 2081 { 2082 struct snd_pcm_channel_info *info = arg; 2083 return snd_rme9652_channel_info(substream, info); 2084 } 2085 default: 2086 break; 2087 } 2088 2089 return snd_pcm_lib_ioctl(substream, cmd, arg); 2090 } 2091 2092 static void rme9652_silence_playback(struct snd_rme9652 *rme9652) 2093 { 2094 memset(rme9652->playback_buffer, 0, RME9652_DMA_AREA_BYTES); 2095 } 2096 2097 static int snd_rme9652_trigger(struct snd_pcm_substream *substream, 2098 int cmd) 2099 { 2100 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 2101 struct snd_pcm_substream *other; 2102 int running; 2103 spin_lock(&rme9652->lock); 2104 running = rme9652->running; 2105 switch (cmd) { 2106 case SNDRV_PCM_TRIGGER_START: 2107 running |= 1 << substream->stream; 2108 break; 2109 case SNDRV_PCM_TRIGGER_STOP: 2110 running &= ~(1 << substream->stream); 2111 break; 2112 default: 2113 snd_BUG(); 2114 spin_unlock(&rme9652->lock); 2115 return -EINVAL; 2116 } 2117 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 2118 other = rme9652->capture_substream; 2119 else 2120 other = rme9652->playback_substream; 2121 2122 if (other) { 2123 struct snd_pcm_substream *s; 2124 snd_pcm_group_for_each_entry(s, substream) { 2125 if (s == other) { 2126 snd_pcm_trigger_done(s, substream); 2127 if (cmd == SNDRV_PCM_TRIGGER_START) 2128 running |= 1 << s->stream; 2129 else 2130 running &= ~(1 << s->stream); 2131 goto _ok; 2132 } 2133 } 2134 if (cmd == SNDRV_PCM_TRIGGER_START) { 2135 if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) && 2136 substream->stream == SNDRV_PCM_STREAM_CAPTURE) 2137 rme9652_silence_playback(rme9652); 2138 } else { 2139 if (running && 2140 substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 2141 rme9652_silence_playback(rme9652); 2142 } 2143 } else { 2144 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) 2145 rme9652_silence_playback(rme9652); 2146 } 2147 _ok: 2148 snd_pcm_trigger_done(substream, substream); 2149 if (!rme9652->running && running) 2150 rme9652_start(rme9652); 2151 else if (rme9652->running && !running) 2152 rme9652_stop(rme9652); 2153 rme9652->running = running; 2154 spin_unlock(&rme9652->lock); 2155 2156 return 0; 2157 } 2158 2159 static int snd_rme9652_prepare(struct snd_pcm_substream *substream) 2160 { 2161 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 2162 unsigned long flags; 2163 int result = 0; 2164 2165 spin_lock_irqsave(&rme9652->lock, flags); 2166 if (!rme9652->running) 2167 rme9652_reset_hw_pointer(rme9652); 2168 spin_unlock_irqrestore(&rme9652->lock, flags); 2169 return result; 2170 } 2171 2172 static struct snd_pcm_hardware snd_rme9652_playback_subinfo = 2173 { 2174 .info = (SNDRV_PCM_INFO_MMAP | 2175 SNDRV_PCM_INFO_MMAP_VALID | 2176 SNDRV_PCM_INFO_NONINTERLEAVED | 2177 SNDRV_PCM_INFO_SYNC_START | 2178 SNDRV_PCM_INFO_DOUBLE), 2179 .formats = SNDRV_PCM_FMTBIT_S32_LE, 2180 .rates = (SNDRV_PCM_RATE_44100 | 2181 SNDRV_PCM_RATE_48000 | 2182 SNDRV_PCM_RATE_88200 | 2183 SNDRV_PCM_RATE_96000), 2184 .rate_min = 44100, 2185 .rate_max = 96000, 2186 .channels_min = 10, 2187 .channels_max = 26, 2188 .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES * 26, 2189 .period_bytes_min = (64 * 4) * 10, 2190 .period_bytes_max = (8192 * 4) * 26, 2191 .periods_min = 2, 2192 .periods_max = 2, 2193 .fifo_size = 0, 2194 }; 2195 2196 static struct snd_pcm_hardware snd_rme9652_capture_subinfo = 2197 { 2198 .info = (SNDRV_PCM_INFO_MMAP | 2199 SNDRV_PCM_INFO_MMAP_VALID | 2200 SNDRV_PCM_INFO_NONINTERLEAVED | 2201 SNDRV_PCM_INFO_SYNC_START), 2202 .formats = SNDRV_PCM_FMTBIT_S32_LE, 2203 .rates = (SNDRV_PCM_RATE_44100 | 2204 SNDRV_PCM_RATE_48000 | 2205 SNDRV_PCM_RATE_88200 | 2206 SNDRV_PCM_RATE_96000), 2207 .rate_min = 44100, 2208 .rate_max = 96000, 2209 .channels_min = 10, 2210 .channels_max = 26, 2211 .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES *26, 2212 .period_bytes_min = (64 * 4) * 10, 2213 .period_bytes_max = (8192 * 4) * 26, 2214 .periods_min = 2, 2215 .periods_max = 2, 2216 .fifo_size = 0, 2217 }; 2218 2219 static unsigned int period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 }; 2220 2221 static struct snd_pcm_hw_constraint_list hw_constraints_period_sizes = { 2222 .count = ARRAY_SIZE(period_sizes), 2223 .list = period_sizes, 2224 .mask = 0 2225 }; 2226 2227 static int snd_rme9652_hw_rule_channels(struct snd_pcm_hw_params *params, 2228 struct snd_pcm_hw_rule *rule) 2229 { 2230 struct snd_rme9652 *rme9652 = rule->private; 2231 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); 2232 unsigned int list[2] = { rme9652->ds_channels, rme9652->ss_channels }; 2233 return snd_interval_list(c, 2, list, 0); 2234 } 2235 2236 static int snd_rme9652_hw_rule_channels_rate(struct snd_pcm_hw_params *params, 2237 struct snd_pcm_hw_rule *rule) 2238 { 2239 struct snd_rme9652 *rme9652 = rule->private; 2240 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); 2241 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE); 2242 if (r->min > 48000) { 2243 struct snd_interval t = { 2244 .min = rme9652->ds_channels, 2245 .max = rme9652->ds_channels, 2246 .integer = 1, 2247 }; 2248 return snd_interval_refine(c, &t); 2249 } else if (r->max < 88200) { 2250 struct snd_interval t = { 2251 .min = rme9652->ss_channels, 2252 .max = rme9652->ss_channels, 2253 .integer = 1, 2254 }; 2255 return snd_interval_refine(c, &t); 2256 } 2257 return 0; 2258 } 2259 2260 static int snd_rme9652_hw_rule_rate_channels(struct snd_pcm_hw_params *params, 2261 struct snd_pcm_hw_rule *rule) 2262 { 2263 struct snd_rme9652 *rme9652 = rule->private; 2264 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); 2265 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE); 2266 if (c->min >= rme9652->ss_channels) { 2267 struct snd_interval t = { 2268 .min = 44100, 2269 .max = 48000, 2270 .integer = 1, 2271 }; 2272 return snd_interval_refine(r, &t); 2273 } else if (c->max <= rme9652->ds_channels) { 2274 struct snd_interval t = { 2275 .min = 88200, 2276 .max = 96000, 2277 .integer = 1, 2278 }; 2279 return snd_interval_refine(r, &t); 2280 } 2281 return 0; 2282 } 2283 2284 static int snd_rme9652_playback_open(struct snd_pcm_substream *substream) 2285 { 2286 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 2287 struct snd_pcm_runtime *runtime = substream->runtime; 2288 2289 spin_lock_irq(&rme9652->lock); 2290 2291 snd_pcm_set_sync(substream); 2292 2293 runtime->hw = snd_rme9652_playback_subinfo; 2294 runtime->dma_area = rme9652->playback_buffer; 2295 runtime->dma_bytes = RME9652_DMA_AREA_BYTES; 2296 2297 if (rme9652->capture_substream == NULL) { 2298 rme9652_stop(rme9652); 2299 rme9652_set_thru(rme9652, -1, 0); 2300 } 2301 2302 rme9652->playback_pid = current->pid; 2303 rme9652->playback_substream = substream; 2304 2305 spin_unlock_irq(&rme9652->lock); 2306 2307 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 2308 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes); 2309 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2310 snd_rme9652_hw_rule_channels, rme9652, 2311 SNDRV_PCM_HW_PARAM_CHANNELS, -1); 2312 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2313 snd_rme9652_hw_rule_channels_rate, rme9652, 2314 SNDRV_PCM_HW_PARAM_RATE, -1); 2315 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 2316 snd_rme9652_hw_rule_rate_channels, rme9652, 2317 SNDRV_PCM_HW_PARAM_CHANNELS, -1); 2318 2319 rme9652->creg_spdif_stream = rme9652->creg_spdif; 2320 rme9652->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE; 2321 snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE | 2322 SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id); 2323 return 0; 2324 } 2325 2326 static int snd_rme9652_playback_release(struct snd_pcm_substream *substream) 2327 { 2328 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 2329 2330 spin_lock_irq(&rme9652->lock); 2331 2332 rme9652->playback_pid = -1; 2333 rme9652->playback_substream = NULL; 2334 2335 spin_unlock_irq(&rme9652->lock); 2336 2337 rme9652->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE; 2338 snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE | 2339 SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id); 2340 return 0; 2341 } 2342 2343 2344 static int snd_rme9652_capture_open(struct snd_pcm_substream *substream) 2345 { 2346 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 2347 struct snd_pcm_runtime *runtime = substream->runtime; 2348 2349 spin_lock_irq(&rme9652->lock); 2350 2351 snd_pcm_set_sync(substream); 2352 2353 runtime->hw = snd_rme9652_capture_subinfo; 2354 runtime->dma_area = rme9652->capture_buffer; 2355 runtime->dma_bytes = RME9652_DMA_AREA_BYTES; 2356 2357 if (rme9652->playback_substream == NULL) { 2358 rme9652_stop(rme9652); 2359 rme9652_set_thru(rme9652, -1, 0); 2360 } 2361 2362 rme9652->capture_pid = current->pid; 2363 rme9652->capture_substream = substream; 2364 2365 spin_unlock_irq(&rme9652->lock); 2366 2367 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 2368 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes); 2369 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2370 snd_rme9652_hw_rule_channels, rme9652, 2371 SNDRV_PCM_HW_PARAM_CHANNELS, -1); 2372 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2373 snd_rme9652_hw_rule_channels_rate, rme9652, 2374 SNDRV_PCM_HW_PARAM_RATE, -1); 2375 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 2376 snd_rme9652_hw_rule_rate_channels, rme9652, 2377 SNDRV_PCM_HW_PARAM_CHANNELS, -1); 2378 return 0; 2379 } 2380 2381 static int snd_rme9652_capture_release(struct snd_pcm_substream *substream) 2382 { 2383 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 2384 2385 spin_lock_irq(&rme9652->lock); 2386 2387 rme9652->capture_pid = -1; 2388 rme9652->capture_substream = NULL; 2389 2390 spin_unlock_irq(&rme9652->lock); 2391 return 0; 2392 } 2393 2394 static struct snd_pcm_ops snd_rme9652_playback_ops = { 2395 .open = snd_rme9652_playback_open, 2396 .close = snd_rme9652_playback_release, 2397 .ioctl = snd_rme9652_ioctl, 2398 .hw_params = snd_rme9652_hw_params, 2399 .prepare = snd_rme9652_prepare, 2400 .trigger = snd_rme9652_trigger, 2401 .pointer = snd_rme9652_hw_pointer, 2402 .copy = snd_rme9652_playback_copy, 2403 .silence = snd_rme9652_hw_silence, 2404 }; 2405 2406 static struct snd_pcm_ops snd_rme9652_capture_ops = { 2407 .open = snd_rme9652_capture_open, 2408 .close = snd_rme9652_capture_release, 2409 .ioctl = snd_rme9652_ioctl, 2410 .hw_params = snd_rme9652_hw_params, 2411 .prepare = snd_rme9652_prepare, 2412 .trigger = snd_rme9652_trigger, 2413 .pointer = snd_rme9652_hw_pointer, 2414 .copy = snd_rme9652_capture_copy, 2415 }; 2416 2417 static int snd_rme9652_create_pcm(struct snd_card *card, 2418 struct snd_rme9652 *rme9652) 2419 { 2420 struct snd_pcm *pcm; 2421 int err; 2422 2423 if ((err = snd_pcm_new(card, 2424 rme9652->card_name, 2425 0, 1, 1, &pcm)) < 0) { 2426 return err; 2427 } 2428 2429 rme9652->pcm = pcm; 2430 pcm->private_data = rme9652; 2431 strcpy(pcm->name, rme9652->card_name); 2432 2433 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_rme9652_playback_ops); 2434 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_rme9652_capture_ops); 2435 2436 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX; 2437 2438 return 0; 2439 } 2440 2441 static int snd_rme9652_create(struct snd_card *card, 2442 struct snd_rme9652 *rme9652, 2443 int precise_ptr) 2444 { 2445 struct pci_dev *pci = rme9652->pci; 2446 int err; 2447 int status; 2448 unsigned short rev; 2449 2450 rme9652->irq = -1; 2451 rme9652->card = card; 2452 2453 pci_read_config_word(rme9652->pci, PCI_CLASS_REVISION, &rev); 2454 2455 switch (rev & 0xff) { 2456 case 3: 2457 case 4: 2458 case 8: 2459 case 9: 2460 break; 2461 2462 default: 2463 /* who knows? */ 2464 return -ENODEV; 2465 } 2466 2467 if ((err = pci_enable_device(pci)) < 0) 2468 return err; 2469 2470 spin_lock_init(&rme9652->lock); 2471 2472 if ((err = pci_request_regions(pci, "rme9652")) < 0) 2473 return err; 2474 rme9652->port = pci_resource_start(pci, 0); 2475 rme9652->iobase = ioremap_nocache(rme9652->port, RME9652_IO_EXTENT); 2476 if (rme9652->iobase == NULL) { 2477 dev_err(card->dev, "unable to remap region 0x%lx-0x%lx\n", 2478 rme9652->port, rme9652->port + RME9652_IO_EXTENT - 1); 2479 return -EBUSY; 2480 } 2481 2482 if (request_irq(pci->irq, snd_rme9652_interrupt, IRQF_SHARED, 2483 KBUILD_MODNAME, rme9652)) { 2484 dev_err(card->dev, "unable to request IRQ %d\n", pci->irq); 2485 return -EBUSY; 2486 } 2487 rme9652->irq = pci->irq; 2488 rme9652->precise_ptr = precise_ptr; 2489 2490 /* Determine the h/w rev level of the card. This seems like 2491 a particularly kludgy way to encode it, but its what RME 2492 chose to do, so we follow them ... 2493 */ 2494 2495 status = rme9652_read(rme9652, RME9652_status_register); 2496 if (rme9652_decode_spdif_rate(status&RME9652_F) == 1) { 2497 rme9652->hw_rev = 15; 2498 } else { 2499 rme9652->hw_rev = 11; 2500 } 2501 2502 /* Differentiate between the standard Hammerfall, and the 2503 "Light", which does not have the expansion board. This 2504 method comes from information received from Mathhias 2505 Clausen at RME. Display the EEPROM and h/w revID where 2506 relevant. 2507 */ 2508 2509 switch (rev) { 2510 case 8: /* original eprom */ 2511 strcpy(card->driver, "RME9636"); 2512 if (rme9652->hw_rev == 15) { 2513 rme9652->card_name = "RME Digi9636 (Rev 1.5)"; 2514 } else { 2515 rme9652->card_name = "RME Digi9636"; 2516 } 2517 rme9652->ss_channels = RME9636_NCHANNELS; 2518 break; 2519 case 9: /* W36_G EPROM */ 2520 strcpy(card->driver, "RME9636"); 2521 rme9652->card_name = "RME Digi9636 (Rev G)"; 2522 rme9652->ss_channels = RME9636_NCHANNELS; 2523 break; 2524 case 4: /* W52_G EPROM */ 2525 strcpy(card->driver, "RME9652"); 2526 rme9652->card_name = "RME Digi9652 (Rev G)"; 2527 rme9652->ss_channels = RME9652_NCHANNELS; 2528 break; 2529 case 3: /* original eprom */ 2530 strcpy(card->driver, "RME9652"); 2531 if (rme9652->hw_rev == 15) { 2532 rme9652->card_name = "RME Digi9652 (Rev 1.5)"; 2533 } else { 2534 rme9652->card_name = "RME Digi9652"; 2535 } 2536 rme9652->ss_channels = RME9652_NCHANNELS; 2537 break; 2538 } 2539 2540 rme9652->ds_channels = (rme9652->ss_channels - 2) / 2 + 2; 2541 2542 pci_set_master(rme9652->pci); 2543 2544 if ((err = snd_rme9652_initialize_memory(rme9652)) < 0) { 2545 return err; 2546 } 2547 2548 if ((err = snd_rme9652_create_pcm(card, rme9652)) < 0) { 2549 return err; 2550 } 2551 2552 if ((err = snd_rme9652_create_controls(card, rme9652)) < 0) { 2553 return err; 2554 } 2555 2556 snd_rme9652_proc_init(rme9652); 2557 2558 rme9652->last_spdif_sample_rate = -1; 2559 rme9652->last_adat_sample_rate = -1; 2560 rme9652->playback_pid = -1; 2561 rme9652->capture_pid = -1; 2562 rme9652->capture_substream = NULL; 2563 rme9652->playback_substream = NULL; 2564 2565 snd_rme9652_set_defaults(rme9652); 2566 2567 if (rme9652->hw_rev == 15) { 2568 rme9652_initialize_spdif_receiver (rme9652); 2569 } 2570 2571 return 0; 2572 } 2573 2574 static void snd_rme9652_card_free(struct snd_card *card) 2575 { 2576 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) card->private_data; 2577 2578 if (rme9652) 2579 snd_rme9652_free(rme9652); 2580 } 2581 2582 static int snd_rme9652_probe(struct pci_dev *pci, 2583 const struct pci_device_id *pci_id) 2584 { 2585 static int dev; 2586 struct snd_rme9652 *rme9652; 2587 struct snd_card *card; 2588 int err; 2589 2590 if (dev >= SNDRV_CARDS) 2591 return -ENODEV; 2592 if (!enable[dev]) { 2593 dev++; 2594 return -ENOENT; 2595 } 2596 2597 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE, 2598 sizeof(struct snd_rme9652), &card); 2599 2600 if (err < 0) 2601 return err; 2602 2603 rme9652 = (struct snd_rme9652 *) card->private_data; 2604 card->private_free = snd_rme9652_card_free; 2605 rme9652->dev = dev; 2606 rme9652->pci = pci; 2607 2608 if ((err = snd_rme9652_create(card, rme9652, precise_ptr[dev])) < 0) { 2609 snd_card_free(card); 2610 return err; 2611 } 2612 2613 strcpy(card->shortname, rme9652->card_name); 2614 2615 sprintf(card->longname, "%s at 0x%lx, irq %d", 2616 card->shortname, rme9652->port, rme9652->irq); 2617 2618 2619 if ((err = snd_card_register(card)) < 0) { 2620 snd_card_free(card); 2621 return err; 2622 } 2623 pci_set_drvdata(pci, card); 2624 dev++; 2625 return 0; 2626 } 2627 2628 static void snd_rme9652_remove(struct pci_dev *pci) 2629 { 2630 snd_card_free(pci_get_drvdata(pci)); 2631 } 2632 2633 static struct pci_driver rme9652_driver = { 2634 .name = KBUILD_MODNAME, 2635 .id_table = snd_rme9652_ids, 2636 .probe = snd_rme9652_probe, 2637 .remove = snd_rme9652_remove, 2638 }; 2639 2640 module_pci_driver(rme9652_driver); 2641