1 /* -*- linux-c -*- 2 * 3 * ALSA driver for RME Hammerfall DSP MADI audio interface(s) 4 * 5 * Copyright (c) 2003 Winfried Ritsch (IEM) 6 * code based on hdsp.c Paul Davis 7 * Marcus Andersson 8 * Thomas Charbonnel 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 23 * 24 */ 25 #include <sound/driver.h> 26 #include <linux/init.h> 27 #include <linux/delay.h> 28 #include <linux/interrupt.h> 29 #include <linux/moduleparam.h> 30 #include <linux/slab.h> 31 #include <linux/pci.h> 32 #include <asm/io.h> 33 34 #include <sound/core.h> 35 #include <sound/control.h> 36 #include <sound/pcm.h> 37 #include <sound/info.h> 38 #include <sound/asoundef.h> 39 #include <sound/rawmidi.h> 40 #include <sound/hwdep.h> 41 #include <sound/initval.h> 42 43 #include <sound/hdspm.h> 44 45 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 46 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 47 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;/* Enable this card */ 48 49 /* Disable precise pointer at start */ 50 static int precise_ptr[SNDRV_CARDS]; 51 52 /* Send all playback to line outs */ 53 static int line_outs_monitor[SNDRV_CARDS]; 54 55 /* Enable Analog Outs on Channel 63/64 by default */ 56 static int enable_monitor[SNDRV_CARDS]; 57 58 module_param_array(index, int, NULL, 0444); 59 MODULE_PARM_DESC(index, "Index value for RME HDSPM interface."); 60 61 module_param_array(id, charp, NULL, 0444); 62 MODULE_PARM_DESC(id, "ID string for RME HDSPM interface."); 63 64 module_param_array(enable, bool, NULL, 0444); 65 MODULE_PARM_DESC(enable, "Enable/disable specific HDSPM soundcards."); 66 67 module_param_array(precise_ptr, bool, NULL, 0444); 68 MODULE_PARM_DESC(precise_ptr, "Enable or disable precise pointer."); 69 70 module_param_array(line_outs_monitor, bool, NULL, 0444); 71 MODULE_PARM_DESC(line_outs_monitor, 72 "Send playback streams to analog outs by default."); 73 74 module_param_array(enable_monitor, bool, NULL, 0444); 75 MODULE_PARM_DESC(enable_monitor, 76 "Enable Analog Out on Channel 63/64 by default."); 77 78 MODULE_AUTHOR 79 ("Winfried Ritsch <ritsch_AT_iem.at>, Paul Davis <paul@linuxaudiosystems.com>, " 80 "Marcus Andersson, Thomas Charbonnel <thomas@undata.org>"); 81 MODULE_DESCRIPTION("RME HDSPM"); 82 MODULE_LICENSE("GPL"); 83 MODULE_SUPPORTED_DEVICE("{{RME HDSPM-MADI}}"); 84 85 /* --- Write registers. --- 86 These are defined as byte-offsets from the iobase value. */ 87 88 #define HDSPM_controlRegister 64 89 #define HDSPM_interruptConfirmation 96 90 #define HDSPM_control2Reg 256 /* not in specs ???????? */ 91 #define HDSPM_midiDataOut0 352 /* just believe in old code */ 92 #define HDSPM_midiDataOut1 356 93 94 /* DMA enable for 64 channels, only Bit 0 is relevant */ 95 #define HDSPM_outputEnableBase 512 /* 512-767 input DMA */ 96 #define HDSPM_inputEnableBase 768 /* 768-1023 output DMA */ 97 98 /* 16 page addresses for each of the 64 channels DMA buffer in and out 99 (each 64k=16*4k) Buffer must be 4k aligned (which is default i386 ????) */ 100 #define HDSPM_pageAddressBufferOut 8192 101 #define HDSPM_pageAddressBufferIn (HDSPM_pageAddressBufferOut+64*16*4) 102 103 #define HDSPM_MADI_mixerBase 32768 /* 32768-65535 for 2x64x64 Fader */ 104 105 #define HDSPM_MATRIX_MIXER_SIZE 8192 /* = 2*64*64 * 4 Byte => 32kB */ 106 107 /* --- Read registers. --- 108 These are defined as byte-offsets from the iobase value */ 109 #define HDSPM_statusRegister 0 110 #define HDSPM_statusRegister2 96 111 112 #define HDSPM_midiDataIn0 360 113 #define HDSPM_midiDataIn1 364 114 115 /* status is data bytes in MIDI-FIFO (0-128) */ 116 #define HDSPM_midiStatusOut0 384 117 #define HDSPM_midiStatusOut1 388 118 #define HDSPM_midiStatusIn0 392 119 #define HDSPM_midiStatusIn1 396 120 121 122 /* the meters are regular i/o-mapped registers, but offset 123 considerably from the rest. the peak registers are reset 124 when read; the least-significant 4 bits are full-scale counters; 125 the actual peak value is in the most-significant 24 bits. 126 */ 127 #define HDSPM_MADI_peakrmsbase 4096 /* 4096-8191 2x64x32Bit Meters */ 128 129 /* --- Control Register bits --------- */ 130 #define HDSPM_Start (1<<0) /* start engine */ 131 132 #define HDSPM_Latency0 (1<<1) /* buffer size = 2^n */ 133 #define HDSPM_Latency1 (1<<2) /* where n is defined */ 134 #define HDSPM_Latency2 (1<<3) /* by Latency{2,1,0} */ 135 136 #define HDSPM_ClockModeMaster (1<<4) /* 1=Master, 0=Slave/Autosync */ 137 138 #define HDSPM_AudioInterruptEnable (1<<5) /* what do you think ? */ 139 140 #define HDSPM_Frequency0 (1<<6) /* 0=44.1kHz/88.2kHz 1=48kHz/96kHz */ 141 #define HDSPM_Frequency1 (1<<7) /* 0=32kHz/64kHz */ 142 #define HDSPM_DoubleSpeed (1<<8) /* 0=normal speed, 1=double speed */ 143 #define HDSPM_QuadSpeed (1<<31) /* quad speed bit, not implemented now */ 144 145 #define HDSPM_TX_64ch (1<<10) /* Output 64channel MODE=1, 146 56channelMODE=0 */ 147 148 #define HDSPM_AutoInp (1<<11) /* Auto Input (takeover) == Safe Mode, 149 0=off, 1=on */ 150 151 #define HDSPM_InputSelect0 (1<<14) /* Input select 0= optical, 1=coax */ 152 #define HDSPM_InputSelect1 (1<<15) /* should be 0 */ 153 154 #define HDSPM_SyncRef0 (1<<16) /* 0=WOrd, 1=MADI */ 155 #define HDSPM_SyncRef1 (1<<17) /* should be 0 */ 156 157 #define HDSPM_clr_tms (1<<19) /* clear track marker, do not use 158 AES additional bits in 159 lower 5 Audiodatabits ??? */ 160 161 #define HDSPM_Midi0InterruptEnable (1<<22) 162 #define HDSPM_Midi1InterruptEnable (1<<23) 163 164 #define HDSPM_LineOut (1<<24) /* Analog Out on channel 63/64 on=1, mute=0 */ 165 166 167 /* --- bit helper defines */ 168 #define HDSPM_LatencyMask (HDSPM_Latency0|HDSPM_Latency1|HDSPM_Latency2) 169 #define HDSPM_FrequencyMask (HDSPM_Frequency0|HDSPM_Frequency1) 170 #define HDSPM_InputMask (HDSPM_InputSelect0|HDSPM_InputSelect1) 171 #define HDSPM_InputOptical 0 172 #define HDSPM_InputCoaxial (HDSPM_InputSelect0) 173 #define HDSPM_SyncRefMask (HDSPM_SyncRef0|HDSPM_SyncRef1) 174 #define HDSPM_SyncRef_Word 0 175 #define HDSPM_SyncRef_MADI (HDSPM_SyncRef0) 176 177 #define HDSPM_SYNC_FROM_WORD 0 /* Preferred sync reference */ 178 #define HDSPM_SYNC_FROM_MADI 1 /* choices - used by "pref_sync_ref" */ 179 180 #define HDSPM_Frequency32KHz HDSPM_Frequency0 181 #define HDSPM_Frequency44_1KHz HDSPM_Frequency1 182 #define HDSPM_Frequency48KHz (HDSPM_Frequency1|HDSPM_Frequency0) 183 #define HDSPM_Frequency64KHz (HDSPM_DoubleSpeed|HDSPM_Frequency0) 184 #define HDSPM_Frequency88_2KHz (HDSPM_DoubleSpeed|HDSPM_Frequency1) 185 #define HDSPM_Frequency96KHz (HDSPM_DoubleSpeed|HDSPM_Frequency1|HDSPM_Frequency0) 186 187 /* --- for internal discrimination */ 188 #define HDSPM_CLOCK_SOURCE_AUTOSYNC 0 /* Sample Clock Sources */ 189 #define HDSPM_CLOCK_SOURCE_INTERNAL_32KHZ 1 190 #define HDSPM_CLOCK_SOURCE_INTERNAL_44_1KHZ 2 191 #define HDSPM_CLOCK_SOURCE_INTERNAL_48KHZ 3 192 #define HDSPM_CLOCK_SOURCE_INTERNAL_64KHZ 4 193 #define HDSPM_CLOCK_SOURCE_INTERNAL_88_2KHZ 5 194 #define HDSPM_CLOCK_SOURCE_INTERNAL_96KHZ 6 195 #define HDSPM_CLOCK_SOURCE_INTERNAL_128KHZ 7 196 #define HDSPM_CLOCK_SOURCE_INTERNAL_176_4KHZ 8 197 #define HDSPM_CLOCK_SOURCE_INTERNAL_192KHZ 9 198 199 /* Synccheck Status */ 200 #define HDSPM_SYNC_CHECK_NO_LOCK 0 201 #define HDSPM_SYNC_CHECK_LOCK 1 202 #define HDSPM_SYNC_CHECK_SYNC 2 203 204 /* AutoSync References - used by "autosync_ref" control switch */ 205 #define HDSPM_AUTOSYNC_FROM_WORD 0 206 #define HDSPM_AUTOSYNC_FROM_MADI 1 207 #define HDSPM_AUTOSYNC_FROM_NONE 2 208 209 /* Possible sources of MADI input */ 210 #define HDSPM_OPTICAL 0 /* optical */ 211 #define HDSPM_COAXIAL 1 /* BNC */ 212 213 #define hdspm_encode_latency(x) (((x)<<1) & HDSPM_LatencyMask) 214 #define hdspm_decode_latency(x) (((x) & HDSPM_LatencyMask)>>1) 215 216 #define hdspm_encode_in(x) (((x)&0x3)<<14) 217 #define hdspm_decode_in(x) (((x)>>14)&0x3) 218 219 /* --- control2 register bits --- */ 220 #define HDSPM_TMS (1<<0) 221 #define HDSPM_TCK (1<<1) 222 #define HDSPM_TDI (1<<2) 223 #define HDSPM_JTAG (1<<3) 224 #define HDSPM_PWDN (1<<4) 225 #define HDSPM_PROGRAM (1<<5) 226 #define HDSPM_CONFIG_MODE_0 (1<<6) 227 #define HDSPM_CONFIG_MODE_1 (1<<7) 228 /*#define HDSPM_VERSION_BIT (1<<8) not defined any more*/ 229 #define HDSPM_BIGENDIAN_MODE (1<<9) 230 #define HDSPM_RD_MULTIPLE (1<<10) 231 232 /* --- Status Register bits --- */ 233 #define HDSPM_audioIRQPending (1<<0) /* IRQ is high and pending */ 234 #define HDSPM_RX_64ch (1<<1) /* Input 64chan. MODE=1, 56chn. MODE=0 */ 235 #define HDSPM_AB_int (1<<2) /* InputChannel Opt=0, Coax=1 (like inp0) */ 236 #define HDSPM_madiLock (1<<3) /* MADI Locked =1, no=0 */ 237 238 #define HDSPM_BufferPositionMask 0x000FFC0 /* Bit 6..15 : h/w buffer pointer */ 239 /* since 64byte accurate last 6 bits 240 are not used */ 241 242 #define HDSPM_madiSync (1<<18) /* MADI is in sync */ 243 #define HDSPM_DoubleSpeedStatus (1<<19) /* (input) card in double speed */ 244 245 #define HDSPM_madiFreq0 (1<<22) /* system freq 0=error */ 246 #define HDSPM_madiFreq1 (1<<23) /* 1=32, 2=44.1 3=48 */ 247 #define HDSPM_madiFreq2 (1<<24) /* 4=64, 5=88.2 6=96 */ 248 #define HDSPM_madiFreq3 (1<<25) /* 7=128, 8=176.4 9=192 */ 249 250 #define HDSPM_BufferID (1<<26) /* (Double)Buffer ID toggles with Interrupt */ 251 #define HDSPM_midi0IRQPending (1<<30) /* MIDI IRQ is pending */ 252 #define HDSPM_midi1IRQPending (1<<31) /* and aktiv */ 253 254 /* --- status bit helpers */ 255 #define HDSPM_madiFreqMask (HDSPM_madiFreq0|HDSPM_madiFreq1|HDSPM_madiFreq2|HDSPM_madiFreq3) 256 #define HDSPM_madiFreq32 (HDSPM_madiFreq0) 257 #define HDSPM_madiFreq44_1 (HDSPM_madiFreq1) 258 #define HDSPM_madiFreq48 (HDSPM_madiFreq0|HDSPM_madiFreq1) 259 #define HDSPM_madiFreq64 (HDSPM_madiFreq2) 260 #define HDSPM_madiFreq88_2 (HDSPM_madiFreq0|HDSPM_madiFreq2) 261 #define HDSPM_madiFreq96 (HDSPM_madiFreq1|HDSPM_madiFreq2) 262 #define HDSPM_madiFreq128 (HDSPM_madiFreq0|HDSPM_madiFreq1|HDSPM_madiFreq2) 263 #define HDSPM_madiFreq176_4 (HDSPM_madiFreq3) 264 #define HDSPM_madiFreq192 (HDSPM_madiFreq3|HDSPM_madiFreq0) 265 266 /* Status2 Register bits */ 267 268 #define HDSPM_version0 (1<<0) /* not realy defined but I guess */ 269 #define HDSPM_version1 (1<<1) /* in former cards it was ??? */ 270 #define HDSPM_version2 (1<<2) 271 272 #define HDSPM_wcLock (1<<3) /* Wordclock is detected and locked */ 273 #define HDSPM_wcSync (1<<4) /* Wordclock is in sync with systemclock */ 274 275 #define HDSPM_wc_freq0 (1<<5) /* input freq detected via autosync */ 276 #define HDSPM_wc_freq1 (1<<6) /* 001=32, 010==44.1, 011=48, */ 277 #define HDSPM_wc_freq2 (1<<7) /* 100=64, 101=88.2, 110=96, */ 278 /* missing Bit for 111=128, 1000=176.4, 1001=192 */ 279 280 #define HDSPM_SelSyncRef0 (1<<8) /* Sync Source in slave mode */ 281 #define HDSPM_SelSyncRef1 (1<<9) /* 000=word, 001=MADI, */ 282 #define HDSPM_SelSyncRef2 (1<<10) /* 111=no valid signal */ 283 284 #define HDSPM_wc_valid (HDSPM_wcLock|HDSPM_wcSync) 285 286 #define HDSPM_wcFreqMask (HDSPM_wc_freq0|HDSPM_wc_freq1|HDSPM_wc_freq2) 287 #define HDSPM_wcFreq32 (HDSPM_wc_freq0) 288 #define HDSPM_wcFreq44_1 (HDSPM_wc_freq1) 289 #define HDSPM_wcFreq48 (HDSPM_wc_freq0|HDSPM_wc_freq1) 290 #define HDSPM_wcFreq64 (HDSPM_wc_freq2) 291 #define HDSPM_wcFreq88_2 (HDSPM_wc_freq0|HDSPM_wc_freq2) 292 #define HDSPM_wcFreq96 (HDSPM_wc_freq1|HDSPM_wc_freq2) 293 294 295 #define HDSPM_SelSyncRefMask (HDSPM_SelSyncRef0|HDSPM_SelSyncRef1|HDSPM_SelSyncRef2) 296 #define HDSPM_SelSyncRef_WORD 0 297 #define HDSPM_SelSyncRef_MADI (HDSPM_SelSyncRef0) 298 #define HDSPM_SelSyncRef_NVALID (HDSPM_SelSyncRef0|HDSPM_SelSyncRef1|HDSPM_SelSyncRef2) 299 300 /* Mixer Values */ 301 #define UNITY_GAIN 32768 /* = 65536/2 */ 302 #define MINUS_INFINITY_GAIN 0 303 304 /* Number of channels for different Speed Modes */ 305 #define MADI_SS_CHANNELS 64 306 #define MADI_DS_CHANNELS 32 307 #define MADI_QS_CHANNELS 16 308 309 /* the size of a substream (1 mono data stream) */ 310 #define HDSPM_CHANNEL_BUFFER_SAMPLES (16*1024) 311 #define HDSPM_CHANNEL_BUFFER_BYTES (4*HDSPM_CHANNEL_BUFFER_SAMPLES) 312 313 /* the size of the area we need to allocate for DMA transfers. the 314 size is the same regardless of the number of channels, and 315 also the latency to use. 316 for one direction !!! 317 */ 318 #define HDSPM_DMA_AREA_BYTES (HDSPM_MAX_CHANNELS * HDSPM_CHANNEL_BUFFER_BYTES) 319 #define HDSPM_DMA_AREA_KILOBYTES (HDSPM_DMA_AREA_BYTES/1024) 320 321 struct hdspm_midi { 322 struct hdspm *hdspm; 323 int id; 324 struct snd_rawmidi *rmidi; 325 struct snd_rawmidi_substream *input; 326 struct snd_rawmidi_substream *output; 327 char istimer; /* timer in use */ 328 struct timer_list timer; 329 spinlock_t lock; 330 int pending; 331 }; 332 333 struct hdspm { 334 spinlock_t lock; 335 struct snd_pcm_substream *capture_substream; /* only one playback */ 336 struct snd_pcm_substream *playback_substream; /* and/or capture stream */ 337 338 char *card_name; /* for procinfo */ 339 unsigned short firmware_rev; /* dont know if relevant */ 340 341 int precise_ptr; /* use precise pointers, to be tested */ 342 int monitor_outs; /* set up monitoring outs init flag */ 343 344 u32 control_register; /* cached value */ 345 u32 control2_register; /* cached value */ 346 347 struct hdspm_midi midi[2]; 348 struct tasklet_struct midi_tasklet; 349 350 size_t period_bytes; 351 unsigned char ss_channels; /* channels of card in single speed */ 352 unsigned char ds_channels; /* Double Speed */ 353 unsigned char qs_channels; /* Quad Speed */ 354 355 unsigned char *playback_buffer; /* suitably aligned address */ 356 unsigned char *capture_buffer; /* suitably aligned address */ 357 358 pid_t capture_pid; /* process id which uses capture */ 359 pid_t playback_pid; /* process id which uses capture */ 360 int running; /* running status */ 361 362 int last_external_sample_rate; /* samplerate mystic ... */ 363 int last_internal_sample_rate; 364 int system_sample_rate; 365 366 char *channel_map; /* channel map for DS and Quadspeed */ 367 368 int dev; /* Hardware vars... */ 369 int irq; 370 unsigned long port; 371 void __iomem *iobase; 372 373 int irq_count; /* for debug */ 374 375 struct snd_card *card; /* one card */ 376 struct snd_pcm *pcm; /* has one pcm */ 377 struct snd_hwdep *hwdep; /* and a hwdep for additional ioctl */ 378 struct pci_dev *pci; /* and an pci info */ 379 380 /* Mixer vars */ 381 struct snd_kcontrol *playback_mixer_ctls[HDSPM_MAX_CHANNELS]; /* fast alsa mixer */ 382 struct snd_kcontrol *input_mixer_ctls[HDSPM_MAX_CHANNELS]; /* but input to much, so not used */ 383 struct hdspm_mixer *mixer; /* full mixer accessable over mixer ioctl or hwdep-device */ 384 385 }; 386 387 /* These tables map the ALSA channels 1..N to the channels that we 388 need to use in order to find the relevant channel buffer. RME 389 refer to this kind of mapping as between "the ADAT channel and 390 the DMA channel." We index it using the logical audio channel, 391 and the value is the DMA channel (i.e. channel buffer number) 392 where the data for that channel can be read/written from/to. 393 */ 394 395 static char channel_map_madi_ss[HDSPM_MAX_CHANNELS] = { 396 0, 1, 2, 3, 4, 5, 6, 7, 397 8, 9, 10, 11, 12, 13, 14, 15, 398 16, 17, 18, 19, 20, 21, 22, 23, 399 24, 25, 26, 27, 28, 29, 30, 31, 400 32, 33, 34, 35, 36, 37, 38, 39, 401 40, 41, 42, 43, 44, 45, 46, 47, 402 48, 49, 50, 51, 52, 53, 54, 55, 403 56, 57, 58, 59, 60, 61, 62, 63 404 }; 405 406 static char channel_map_madi_ds[HDSPM_MAX_CHANNELS] = { 407 0, 2, 4, 6, 8, 10, 12, 14, 408 16, 18, 20, 22, 24, 26, 28, 30, 409 32, 34, 36, 38, 40, 42, 44, 46, 410 48, 50, 52, 54, 56, 58, 60, 62, 411 -1, -1, -1, -1, -1, -1, -1, -1, 412 -1, -1, -1, -1, -1, -1, -1, -1, 413 -1, -1, -1, -1, -1, -1, -1, -1, 414 -1, -1, -1, -1, -1, -1, -1, -1 415 }; 416 417 static char channel_map_madi_qs[HDSPM_MAX_CHANNELS] = { 418 0, 4, 8, 12, 16, 20, 24, 28, 419 32, 36, 40, 44, 48, 52, 56, 60 420 -1, -1, -1, -1, -1, -1, -1, -1, 421 -1, -1, -1, -1, -1, -1, -1, -1, 422 -1, -1, -1, -1, -1, -1, -1, -1, 423 -1, -1, -1, -1, -1, -1, -1, -1, 424 -1, -1, -1, -1, -1, -1, -1, -1, 425 -1, -1, -1, -1, -1, -1, -1, -1 426 }; 427 428 429 static struct pci_device_id snd_hdspm_ids[] = { 430 { 431 .vendor = PCI_VENDOR_ID_XILINX, 432 .device = PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP_MADI, 433 .subvendor = PCI_ANY_ID, 434 .subdevice = PCI_ANY_ID, 435 .class = 0, 436 .class_mask = 0, 437 .driver_data = 0}, 438 {0,} 439 }; 440 441 MODULE_DEVICE_TABLE(pci, snd_hdspm_ids); 442 443 /* prototypes */ 444 static int __devinit snd_hdspm_create_alsa_devices(struct snd_card *card, 445 struct hdspm * hdspm); 446 static int __devinit snd_hdspm_create_pcm(struct snd_card *card, 447 struct hdspm * hdspm); 448 449 static inline void snd_hdspm_initialize_midi_flush(struct hdspm * hdspm); 450 static int hdspm_update_simple_mixer_controls(struct hdspm * hdspm); 451 static int hdspm_autosync_ref(struct hdspm * hdspm); 452 static int snd_hdspm_set_defaults(struct hdspm * hdspm); 453 static void hdspm_set_sgbuf(struct hdspm * hdspm, struct snd_sg_buf *sgbuf, 454 unsigned int reg, int channels); 455 456 /* Write/read to/from HDSPM with Adresses in Bytes 457 not words but only 32Bit writes are allowed */ 458 459 static inline void hdspm_write(struct hdspm * hdspm, unsigned int reg, 460 unsigned int val) 461 { 462 writel(val, hdspm->iobase + reg); 463 } 464 465 static inline unsigned int hdspm_read(struct hdspm * hdspm, unsigned int reg) 466 { 467 return readl(hdspm->iobase + reg); 468 } 469 470 /* for each output channel (chan) I have an Input (in) and Playback (pb) Fader 471 mixer is write only on hardware so we have to cache him for read 472 each fader is a u32, but uses only the first 16 bit */ 473 474 static inline int hdspm_read_in_gain(struct hdspm * hdspm, unsigned int chan, 475 unsigned int in) 476 { 477 if (chan > HDSPM_MIXER_CHANNELS || in > HDSPM_MIXER_CHANNELS) 478 return 0; 479 480 return hdspm->mixer->ch[chan].in[in]; 481 } 482 483 static inline int hdspm_read_pb_gain(struct hdspm * hdspm, unsigned int chan, 484 unsigned int pb) 485 { 486 if (chan > HDSPM_MIXER_CHANNELS || pb > HDSPM_MIXER_CHANNELS) 487 return 0; 488 return hdspm->mixer->ch[chan].pb[pb]; 489 } 490 491 static inline int hdspm_write_in_gain(struct hdspm * hdspm, unsigned int chan, 492 unsigned int in, unsigned short data) 493 { 494 if (chan >= HDSPM_MIXER_CHANNELS || in >= HDSPM_MIXER_CHANNELS) 495 return -1; 496 497 hdspm_write(hdspm, 498 HDSPM_MADI_mixerBase + 499 ((in + 128 * chan) * sizeof(u32)), 500 (hdspm->mixer->ch[chan].in[in] = data & 0xFFFF)); 501 return 0; 502 } 503 504 static inline int hdspm_write_pb_gain(struct hdspm * hdspm, unsigned int chan, 505 unsigned int pb, unsigned short data) 506 { 507 if (chan >= HDSPM_MIXER_CHANNELS || pb >= HDSPM_MIXER_CHANNELS) 508 return -1; 509 510 hdspm_write(hdspm, 511 HDSPM_MADI_mixerBase + 512 ((64 + pb + 128 * chan) * sizeof(u32)), 513 (hdspm->mixer->ch[chan].pb[pb] = data & 0xFFFF)); 514 return 0; 515 } 516 517 518 /* enable DMA for specific channels, now available for DSP-MADI */ 519 static inline void snd_hdspm_enable_in(struct hdspm * hdspm, int i, int v) 520 { 521 hdspm_write(hdspm, HDSPM_inputEnableBase + (4 * i), v); 522 } 523 524 static inline void snd_hdspm_enable_out(struct hdspm * hdspm, int i, int v) 525 { 526 hdspm_write(hdspm, HDSPM_outputEnableBase + (4 * i), v); 527 } 528 529 /* check if same process is writing and reading */ 530 static inline int snd_hdspm_use_is_exclusive(struct hdspm * hdspm) 531 { 532 unsigned long flags; 533 int ret = 1; 534 535 spin_lock_irqsave(&hdspm->lock, flags); 536 if ((hdspm->playback_pid != hdspm->capture_pid) && 537 (hdspm->playback_pid >= 0) && (hdspm->capture_pid >= 0)) { 538 ret = 0; 539 } 540 spin_unlock_irqrestore(&hdspm->lock, flags); 541 return ret; 542 } 543 544 /* check for external sample rate */ 545 static inline int hdspm_external_sample_rate(struct hdspm * hdspm) 546 { 547 unsigned int status2 = hdspm_read(hdspm, HDSPM_statusRegister2); 548 unsigned int status = hdspm_read(hdspm, HDSPM_statusRegister); 549 unsigned int rate_bits; 550 int rate = 0; 551 552 /* if wordclock has synced freq and wordclock is valid */ 553 if ((status2 & HDSPM_wcLock) != 0 && 554 (status & HDSPM_SelSyncRef0) == 0) { 555 556 rate_bits = status2 & HDSPM_wcFreqMask; 557 558 switch (rate_bits) { 559 case HDSPM_wcFreq32: 560 rate = 32000; 561 break; 562 case HDSPM_wcFreq44_1: 563 rate = 44100; 564 break; 565 case HDSPM_wcFreq48: 566 rate = 48000; 567 break; 568 case HDSPM_wcFreq64: 569 rate = 64000; 570 break; 571 case HDSPM_wcFreq88_2: 572 rate = 88200; 573 break; 574 case HDSPM_wcFreq96: 575 rate = 96000; 576 break; 577 /* Quadspeed Bit missing ???? */ 578 default: 579 rate = 0; 580 break; 581 } 582 } 583 584 /* if rate detected and Syncref is Word than have it, word has priority to MADI */ 585 if (rate != 0 586 && (status2 & HDSPM_SelSyncRefMask) == HDSPM_SelSyncRef_WORD) 587 return rate; 588 589 /* maby a madi input (which is taken if sel sync is madi) */ 590 if (status & HDSPM_madiLock) { 591 rate_bits = status & HDSPM_madiFreqMask; 592 593 switch (rate_bits) { 594 case HDSPM_madiFreq32: 595 rate = 32000; 596 break; 597 case HDSPM_madiFreq44_1: 598 rate = 44100; 599 break; 600 case HDSPM_madiFreq48: 601 rate = 48000; 602 break; 603 case HDSPM_madiFreq64: 604 rate = 64000; 605 break; 606 case HDSPM_madiFreq88_2: 607 rate = 88200; 608 break; 609 case HDSPM_madiFreq96: 610 rate = 96000; 611 break; 612 case HDSPM_madiFreq128: 613 rate = 128000; 614 break; 615 case HDSPM_madiFreq176_4: 616 rate = 176400; 617 break; 618 case HDSPM_madiFreq192: 619 rate = 192000; 620 break; 621 default: 622 rate = 0; 623 break; 624 } 625 } 626 return rate; 627 } 628 629 /* Latency function */ 630 static inline void hdspm_compute_period_size(struct hdspm * hdspm) 631 { 632 hdspm->period_bytes = 633 1 << ((hdspm_decode_latency(hdspm->control_register) + 8)); 634 } 635 636 static snd_pcm_uframes_t hdspm_hw_pointer(struct hdspm * hdspm) 637 { 638 int position; 639 640 position = hdspm_read(hdspm, HDSPM_statusRegister); 641 642 if (!hdspm->precise_ptr) { 643 return (position & HDSPM_BufferID) ? (hdspm->period_bytes / 644 4) : 0; 645 } 646 647 /* hwpointer comes in bytes and is 64Bytes accurate (by docu since PCI Burst) 648 i have experimented that it is at most 64 Byte to much for playing 649 so substraction of 64 byte should be ok for ALSA, but use it only 650 for application where you know what you do since if you come to 651 near with record pointer it can be a disaster */ 652 653 position &= HDSPM_BufferPositionMask; 654 position = ((position - 64) % (2 * hdspm->period_bytes)) / 4; 655 656 return position; 657 } 658 659 660 static inline void hdspm_start_audio(struct hdspm * s) 661 { 662 s->control_register |= (HDSPM_AudioInterruptEnable | HDSPM_Start); 663 hdspm_write(s, HDSPM_controlRegister, s->control_register); 664 } 665 666 static inline void hdspm_stop_audio(struct hdspm * s) 667 { 668 s->control_register &= ~(HDSPM_Start | HDSPM_AudioInterruptEnable); 669 hdspm_write(s, HDSPM_controlRegister, s->control_register); 670 } 671 672 /* should I silence all or only opened ones ? doit all for first even is 4MB*/ 673 static inline void hdspm_silence_playback(struct hdspm * hdspm) 674 { 675 int i; 676 int n = hdspm->period_bytes; 677 void *buf = hdspm->playback_buffer; 678 679 snd_assert(buf != NULL, return); 680 681 for (i = 0; i < HDSPM_MAX_CHANNELS; i++) { 682 memset(buf, 0, n); 683 buf += HDSPM_CHANNEL_BUFFER_BYTES; 684 } 685 } 686 687 static int hdspm_set_interrupt_interval(struct hdspm * s, unsigned int frames) 688 { 689 int n; 690 691 spin_lock_irq(&s->lock); 692 693 frames >>= 7; 694 n = 0; 695 while (frames) { 696 n++; 697 frames >>= 1; 698 } 699 s->control_register &= ~HDSPM_LatencyMask; 700 s->control_register |= hdspm_encode_latency(n); 701 702 hdspm_write(s, HDSPM_controlRegister, s->control_register); 703 704 hdspm_compute_period_size(s); 705 706 spin_unlock_irq(&s->lock); 707 708 return 0; 709 } 710 711 712 /* dummy set rate lets see what happens */ 713 static int hdspm_set_rate(struct hdspm * hdspm, int rate, int called_internally) 714 { 715 int reject_if_open = 0; 716 int current_rate; 717 int rate_bits; 718 int not_set = 0; 719 720 /* ASSUMPTION: hdspm->lock is either set, or there is no need for 721 it (e.g. during module initialization). 722 */ 723 724 if (!(hdspm->control_register & HDSPM_ClockModeMaster)) { 725 726 /* SLAVE --- */ 727 if (called_internally) { 728 729 /* request from ctl or card initialization 730 just make a warning an remember setting 731 for future master mode switching */ 732 733 snd_printk 734 (KERN_WARNING "HDSPM: Warning: device is not running as a clock master.\n"); 735 not_set = 1; 736 } else { 737 738 /* hw_param request while in AutoSync mode */ 739 int external_freq = 740 hdspm_external_sample_rate(hdspm); 741 742 if ((hdspm_autosync_ref(hdspm) == 743 HDSPM_AUTOSYNC_FROM_NONE)) { 744 745 snd_printk(KERN_WARNING "HDSPM: Detected no Externel Sync \n"); 746 not_set = 1; 747 748 } else if (rate != external_freq) { 749 750 snd_printk 751 (KERN_WARNING "HDSPM: Warning: No AutoSync source for requested rate\n"); 752 not_set = 1; 753 } 754 } 755 } 756 757 current_rate = hdspm->system_sample_rate; 758 759 /* Changing between Singe, Double and Quad speed is not 760 allowed if any substreams are open. This is because such a change 761 causes a shift in the location of the DMA buffers and a reduction 762 in the number of available buffers. 763 764 Note that a similar but essentially insoluble problem exists for 765 externally-driven rate changes. All we can do is to flag rate 766 changes in the read/write routines. 767 */ 768 769 switch (rate) { 770 case 32000: 771 if (current_rate > 48000) { 772 reject_if_open = 1; 773 } 774 rate_bits = HDSPM_Frequency32KHz; 775 break; 776 case 44100: 777 if (current_rate > 48000) { 778 reject_if_open = 1; 779 } 780 rate_bits = HDSPM_Frequency44_1KHz; 781 break; 782 case 48000: 783 if (current_rate > 48000) { 784 reject_if_open = 1; 785 } 786 rate_bits = HDSPM_Frequency48KHz; 787 break; 788 case 64000: 789 if (current_rate <= 48000) { 790 reject_if_open = 1; 791 } 792 rate_bits = HDSPM_Frequency64KHz; 793 break; 794 case 88200: 795 if (current_rate <= 48000) { 796 reject_if_open = 1; 797 } 798 rate_bits = HDSPM_Frequency88_2KHz; 799 break; 800 case 96000: 801 if (current_rate <= 48000) { 802 reject_if_open = 1; 803 } 804 rate_bits = HDSPM_Frequency96KHz; 805 break; 806 default: 807 return -EINVAL; 808 } 809 810 if (reject_if_open 811 && (hdspm->capture_pid >= 0 || hdspm->playback_pid >= 0)) { 812 snd_printk 813 (KERN_ERR "HDSPM: cannot change between single- and double-speed mode (capture PID = %d, playback PID = %d)\n", 814 hdspm->capture_pid, hdspm->playback_pid); 815 return -EBUSY; 816 } 817 818 hdspm->control_register &= ~HDSPM_FrequencyMask; 819 hdspm->control_register |= rate_bits; 820 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register); 821 822 if (rate > 64000) 823 hdspm->channel_map = channel_map_madi_qs; 824 else if (rate > 48000) 825 hdspm->channel_map = channel_map_madi_ds; 826 else 827 hdspm->channel_map = channel_map_madi_ss; 828 829 hdspm->system_sample_rate = rate; 830 831 if (not_set != 0) 832 return -1; 833 834 return 0; 835 } 836 837 /* mainly for init to 0 on load */ 838 static void all_in_all_mixer(struct hdspm * hdspm, int sgain) 839 { 840 int i, j; 841 unsigned int gain = 842 (sgain > UNITY_GAIN) ? UNITY_GAIN : (sgain < 0) ? 0 : sgain; 843 844 for (i = 0; i < HDSPM_MIXER_CHANNELS; i++) 845 for (j = 0; j < HDSPM_MIXER_CHANNELS; j++) { 846 hdspm_write_in_gain(hdspm, i, j, gain); 847 hdspm_write_pb_gain(hdspm, i, j, gain); 848 } 849 } 850 851 /*---------------------------------------------------------------------------- 852 MIDI 853 ----------------------------------------------------------------------------*/ 854 855 static inline unsigned char snd_hdspm_midi_read_byte (struct hdspm *hdspm, int id) 856 { 857 /* the hardware already does the relevant bit-mask with 0xff */ 858 if (id) 859 return hdspm_read(hdspm, HDSPM_midiDataIn1); 860 else 861 return hdspm_read(hdspm, HDSPM_midiDataIn0); 862 } 863 864 static inline void snd_hdspm_midi_write_byte (struct hdspm *hdspm, int id, int val) 865 { 866 /* the hardware already does the relevant bit-mask with 0xff */ 867 if (id) 868 return hdspm_write(hdspm, HDSPM_midiDataOut1, val); 869 else 870 return hdspm_write(hdspm, HDSPM_midiDataOut0, val); 871 } 872 873 static inline int snd_hdspm_midi_input_available (struct hdspm *hdspm, int id) 874 { 875 if (id) 876 return (hdspm_read(hdspm, HDSPM_midiStatusIn1) & 0xff); 877 else 878 return (hdspm_read(hdspm, HDSPM_midiStatusIn0) & 0xff); 879 } 880 881 static inline int snd_hdspm_midi_output_possible (struct hdspm *hdspm, int id) 882 { 883 int fifo_bytes_used; 884 885 if (id) 886 fifo_bytes_used = hdspm_read(hdspm, HDSPM_midiStatusOut1) & 0xff; 887 else 888 fifo_bytes_used = hdspm_read(hdspm, HDSPM_midiStatusOut0) & 0xff; 889 890 if (fifo_bytes_used < 128) 891 return 128 - fifo_bytes_used; 892 else 893 return 0; 894 } 895 896 static inline void snd_hdspm_flush_midi_input (struct hdspm *hdspm, int id) 897 { 898 while (snd_hdspm_midi_input_available (hdspm, id)) 899 snd_hdspm_midi_read_byte (hdspm, id); 900 } 901 902 static int snd_hdspm_midi_output_write (struct hdspm_midi *hmidi) 903 { 904 unsigned long flags; 905 int n_pending; 906 int to_write; 907 int i; 908 unsigned char buf[128]; 909 910 /* Output is not interrupt driven */ 911 912 spin_lock_irqsave (&hmidi->lock, flags); 913 if (hmidi->output) { 914 if (!snd_rawmidi_transmit_empty (hmidi->output)) { 915 if ((n_pending = snd_hdspm_midi_output_possible (hmidi->hdspm, hmidi->id)) > 0) { 916 if (n_pending > (int)sizeof (buf)) 917 n_pending = sizeof (buf); 918 919 if ((to_write = snd_rawmidi_transmit (hmidi->output, buf, n_pending)) > 0) { 920 for (i = 0; i < to_write; ++i) 921 snd_hdspm_midi_write_byte (hmidi->hdspm, hmidi->id, buf[i]); 922 } 923 } 924 } 925 } 926 spin_unlock_irqrestore (&hmidi->lock, flags); 927 return 0; 928 } 929 930 static int snd_hdspm_midi_input_read (struct hdspm_midi *hmidi) 931 { 932 unsigned char buf[128]; /* this buffer is designed to match the MIDI input FIFO size */ 933 unsigned long flags; 934 int n_pending; 935 int i; 936 937 spin_lock_irqsave (&hmidi->lock, flags); 938 if ((n_pending = snd_hdspm_midi_input_available (hmidi->hdspm, hmidi->id)) > 0) { 939 if (hmidi->input) { 940 if (n_pending > (int)sizeof (buf)) { 941 n_pending = sizeof (buf); 942 } 943 for (i = 0; i < n_pending; ++i) { 944 buf[i] = snd_hdspm_midi_read_byte (hmidi->hdspm, hmidi->id); 945 } 946 if (n_pending) { 947 snd_rawmidi_receive (hmidi->input, buf, n_pending); 948 } 949 } else { 950 /* flush the MIDI input FIFO */ 951 while (n_pending--) { 952 snd_hdspm_midi_read_byte (hmidi->hdspm, hmidi->id); 953 } 954 } 955 } 956 hmidi->pending = 0; 957 if (hmidi->id) { 958 hmidi->hdspm->control_register |= HDSPM_Midi1InterruptEnable; 959 } else { 960 hmidi->hdspm->control_register |= HDSPM_Midi0InterruptEnable; 961 } 962 hdspm_write(hmidi->hdspm, HDSPM_controlRegister, hmidi->hdspm->control_register); 963 spin_unlock_irqrestore (&hmidi->lock, flags); 964 return snd_hdspm_midi_output_write (hmidi); 965 } 966 967 static void snd_hdspm_midi_input_trigger(struct snd_rawmidi_substream *substream, int up) 968 { 969 struct hdspm *hdspm; 970 struct hdspm_midi *hmidi; 971 unsigned long flags; 972 u32 ie; 973 974 hmidi = (struct hdspm_midi *) substream->rmidi->private_data; 975 hdspm = hmidi->hdspm; 976 ie = hmidi->id ? HDSPM_Midi1InterruptEnable : HDSPM_Midi0InterruptEnable; 977 spin_lock_irqsave (&hdspm->lock, flags); 978 if (up) { 979 if (!(hdspm->control_register & ie)) { 980 snd_hdspm_flush_midi_input (hdspm, hmidi->id); 981 hdspm->control_register |= ie; 982 } 983 } else { 984 hdspm->control_register &= ~ie; 985 } 986 987 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register); 988 spin_unlock_irqrestore (&hdspm->lock, flags); 989 } 990 991 static void snd_hdspm_midi_output_timer(unsigned long data) 992 { 993 struct hdspm_midi *hmidi = (struct hdspm_midi *) data; 994 unsigned long flags; 995 996 snd_hdspm_midi_output_write(hmidi); 997 spin_lock_irqsave (&hmidi->lock, flags); 998 999 /* this does not bump hmidi->istimer, because the 1000 kernel automatically removed the timer when it 1001 expired, and we are now adding it back, thus 1002 leaving istimer wherever it was set before. 1003 */ 1004 1005 if (hmidi->istimer) { 1006 hmidi->timer.expires = 1 + jiffies; 1007 add_timer(&hmidi->timer); 1008 } 1009 1010 spin_unlock_irqrestore (&hmidi->lock, flags); 1011 } 1012 1013 static void snd_hdspm_midi_output_trigger(struct snd_rawmidi_substream *substream, int up) 1014 { 1015 struct hdspm_midi *hmidi; 1016 unsigned long flags; 1017 1018 hmidi = (struct hdspm_midi *) substream->rmidi->private_data; 1019 spin_lock_irqsave (&hmidi->lock, flags); 1020 if (up) { 1021 if (!hmidi->istimer) { 1022 init_timer(&hmidi->timer); 1023 hmidi->timer.function = snd_hdspm_midi_output_timer; 1024 hmidi->timer.data = (unsigned long) hmidi; 1025 hmidi->timer.expires = 1 + jiffies; 1026 add_timer(&hmidi->timer); 1027 hmidi->istimer++; 1028 } 1029 } else { 1030 if (hmidi->istimer && --hmidi->istimer <= 0) { 1031 del_timer (&hmidi->timer); 1032 } 1033 } 1034 spin_unlock_irqrestore (&hmidi->lock, flags); 1035 if (up) 1036 snd_hdspm_midi_output_write(hmidi); 1037 } 1038 1039 static int snd_hdspm_midi_input_open(struct snd_rawmidi_substream *substream) 1040 { 1041 struct hdspm_midi *hmidi; 1042 1043 hmidi = (struct hdspm_midi *) substream->rmidi->private_data; 1044 spin_lock_irq (&hmidi->lock); 1045 snd_hdspm_flush_midi_input (hmidi->hdspm, hmidi->id); 1046 hmidi->input = substream; 1047 spin_unlock_irq (&hmidi->lock); 1048 1049 return 0; 1050 } 1051 1052 static int snd_hdspm_midi_output_open(struct snd_rawmidi_substream *substream) 1053 { 1054 struct hdspm_midi *hmidi; 1055 1056 hmidi = (struct hdspm_midi *) substream->rmidi->private_data; 1057 spin_lock_irq (&hmidi->lock); 1058 hmidi->output = substream; 1059 spin_unlock_irq (&hmidi->lock); 1060 1061 return 0; 1062 } 1063 1064 static int snd_hdspm_midi_input_close(struct snd_rawmidi_substream *substream) 1065 { 1066 struct hdspm_midi *hmidi; 1067 1068 snd_hdspm_midi_input_trigger (substream, 0); 1069 1070 hmidi = (struct hdspm_midi *) substream->rmidi->private_data; 1071 spin_lock_irq (&hmidi->lock); 1072 hmidi->input = NULL; 1073 spin_unlock_irq (&hmidi->lock); 1074 1075 return 0; 1076 } 1077 1078 static int snd_hdspm_midi_output_close(struct snd_rawmidi_substream *substream) 1079 { 1080 struct hdspm_midi *hmidi; 1081 1082 snd_hdspm_midi_output_trigger (substream, 0); 1083 1084 hmidi = (struct hdspm_midi *) substream->rmidi->private_data; 1085 spin_lock_irq (&hmidi->lock); 1086 hmidi->output = NULL; 1087 spin_unlock_irq (&hmidi->lock); 1088 1089 return 0; 1090 } 1091 1092 static struct snd_rawmidi_ops snd_hdspm_midi_output = 1093 { 1094 .open = snd_hdspm_midi_output_open, 1095 .close = snd_hdspm_midi_output_close, 1096 .trigger = snd_hdspm_midi_output_trigger, 1097 }; 1098 1099 static struct snd_rawmidi_ops snd_hdspm_midi_input = 1100 { 1101 .open = snd_hdspm_midi_input_open, 1102 .close = snd_hdspm_midi_input_close, 1103 .trigger = snd_hdspm_midi_input_trigger, 1104 }; 1105 1106 static int __devinit snd_hdspm_create_midi (struct snd_card *card, struct hdspm *hdspm, int id) 1107 { 1108 int err; 1109 char buf[32]; 1110 1111 hdspm->midi[id].id = id; 1112 hdspm->midi[id].rmidi = NULL; 1113 hdspm->midi[id].input = NULL; 1114 hdspm->midi[id].output = NULL; 1115 hdspm->midi[id].hdspm = hdspm; 1116 hdspm->midi[id].istimer = 0; 1117 hdspm->midi[id].pending = 0; 1118 spin_lock_init (&hdspm->midi[id].lock); 1119 1120 sprintf (buf, "%s MIDI %d", card->shortname, id+1); 1121 if ((err = snd_rawmidi_new (card, buf, id, 1, 1, &hdspm->midi[id].rmidi)) < 0) 1122 return err; 1123 1124 sprintf (hdspm->midi[id].rmidi->name, "%s MIDI %d", card->id, id+1); 1125 hdspm->midi[id].rmidi->private_data = &hdspm->midi[id]; 1126 1127 snd_rawmidi_set_ops (hdspm->midi[id].rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, &snd_hdspm_midi_output); 1128 snd_rawmidi_set_ops (hdspm->midi[id].rmidi, SNDRV_RAWMIDI_STREAM_INPUT, &snd_hdspm_midi_input); 1129 1130 hdspm->midi[id].rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT | 1131 SNDRV_RAWMIDI_INFO_INPUT | 1132 SNDRV_RAWMIDI_INFO_DUPLEX; 1133 1134 return 0; 1135 } 1136 1137 1138 static void hdspm_midi_tasklet(unsigned long arg) 1139 { 1140 struct hdspm *hdspm = (struct hdspm *)arg; 1141 1142 if (hdspm->midi[0].pending) 1143 snd_hdspm_midi_input_read (&hdspm->midi[0]); 1144 if (hdspm->midi[1].pending) 1145 snd_hdspm_midi_input_read (&hdspm->midi[1]); 1146 } 1147 1148 1149 /*----------------------------------------------------------------------------- 1150 Status Interface 1151 ----------------------------------------------------------------------------*/ 1152 1153 /* get the system sample rate which is set */ 1154 1155 #define HDSPM_SYSTEM_SAMPLE_RATE(xname, xindex) \ 1156 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 1157 .name = xname, \ 1158 .index = xindex, \ 1159 .access = SNDRV_CTL_ELEM_ACCESS_READ, \ 1160 .info = snd_hdspm_info_system_sample_rate, \ 1161 .get = snd_hdspm_get_system_sample_rate \ 1162 } 1163 1164 static int snd_hdspm_info_system_sample_rate(struct snd_kcontrol *kcontrol, 1165 struct snd_ctl_elem_info *uinfo) 1166 { 1167 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 1168 uinfo->count = 1; 1169 return 0; 1170 } 1171 1172 static int snd_hdspm_get_system_sample_rate(struct snd_kcontrol *kcontrol, 1173 struct snd_ctl_elem_value * 1174 ucontrol) 1175 { 1176 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol); 1177 1178 ucontrol->value.enumerated.item[0] = hdspm->system_sample_rate; 1179 return 0; 1180 } 1181 1182 #define HDSPM_AUTOSYNC_SAMPLE_RATE(xname, xindex) \ 1183 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 1184 .name = xname, \ 1185 .index = xindex, \ 1186 .access = SNDRV_CTL_ELEM_ACCESS_READ, \ 1187 .info = snd_hdspm_info_autosync_sample_rate, \ 1188 .get = snd_hdspm_get_autosync_sample_rate \ 1189 } 1190 1191 static int snd_hdspm_info_autosync_sample_rate(struct snd_kcontrol *kcontrol, 1192 struct snd_ctl_elem_info *uinfo) 1193 { 1194 static char *texts[] = { "32000", "44100", "48000", 1195 "64000", "88200", "96000", 1196 "128000", "176400", "192000", 1197 "None" 1198 }; 1199 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1200 uinfo->count = 1; 1201 uinfo->value.enumerated.items = 10; 1202 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 1203 uinfo->value.enumerated.item = 1204 uinfo->value.enumerated.items - 1; 1205 strcpy(uinfo->value.enumerated.name, 1206 texts[uinfo->value.enumerated.item]); 1207 return 0; 1208 } 1209 1210 static int snd_hdspm_get_autosync_sample_rate(struct snd_kcontrol *kcontrol, 1211 struct snd_ctl_elem_value * 1212 ucontrol) 1213 { 1214 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol); 1215 1216 switch (hdspm_external_sample_rate(hdspm)) { 1217 case 32000: 1218 ucontrol->value.enumerated.item[0] = 0; 1219 break; 1220 case 44100: 1221 ucontrol->value.enumerated.item[0] = 1; 1222 break; 1223 case 48000: 1224 ucontrol->value.enumerated.item[0] = 2; 1225 break; 1226 case 64000: 1227 ucontrol->value.enumerated.item[0] = 3; 1228 break; 1229 case 88200: 1230 ucontrol->value.enumerated.item[0] = 4; 1231 break; 1232 case 96000: 1233 ucontrol->value.enumerated.item[0] = 5; 1234 break; 1235 case 128000: 1236 ucontrol->value.enumerated.item[0] = 6; 1237 break; 1238 case 176400: 1239 ucontrol->value.enumerated.item[0] = 7; 1240 break; 1241 case 192000: 1242 ucontrol->value.enumerated.item[0] = 8; 1243 break; 1244 1245 default: 1246 ucontrol->value.enumerated.item[0] = 9; 1247 } 1248 return 0; 1249 } 1250 1251 #define HDSPM_SYSTEM_CLOCK_MODE(xname, xindex) \ 1252 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 1253 .name = xname, \ 1254 .index = xindex, \ 1255 .access = SNDRV_CTL_ELEM_ACCESS_READ, \ 1256 .info = snd_hdspm_info_system_clock_mode, \ 1257 .get = snd_hdspm_get_system_clock_mode, \ 1258 } 1259 1260 1261 1262 static int hdspm_system_clock_mode(struct hdspm * hdspm) 1263 { 1264 /* Always reflect the hardware info, rme is never wrong !!!! */ 1265 1266 if (hdspm->control_register & HDSPM_ClockModeMaster) 1267 return 0; 1268 return 1; 1269 } 1270 1271 static int snd_hdspm_info_system_clock_mode(struct snd_kcontrol *kcontrol, 1272 struct snd_ctl_elem_info *uinfo) 1273 { 1274 static char *texts[] = { "Master", "Slave" }; 1275 1276 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1277 uinfo->count = 1; 1278 uinfo->value.enumerated.items = 2; 1279 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 1280 uinfo->value.enumerated.item = 1281 uinfo->value.enumerated.items - 1; 1282 strcpy(uinfo->value.enumerated.name, 1283 texts[uinfo->value.enumerated.item]); 1284 return 0; 1285 } 1286 1287 static int snd_hdspm_get_system_clock_mode(struct snd_kcontrol *kcontrol, 1288 struct snd_ctl_elem_value *ucontrol) 1289 { 1290 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol); 1291 1292 ucontrol->value.enumerated.item[0] = 1293 hdspm_system_clock_mode(hdspm); 1294 return 0; 1295 } 1296 1297 #define HDSPM_CLOCK_SOURCE(xname, xindex) \ 1298 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 1299 .name = xname, \ 1300 .index = xindex, \ 1301 .info = snd_hdspm_info_clock_source, \ 1302 .get = snd_hdspm_get_clock_source, \ 1303 .put = snd_hdspm_put_clock_source \ 1304 } 1305 1306 static int hdspm_clock_source(struct hdspm * hdspm) 1307 { 1308 if (hdspm->control_register & HDSPM_ClockModeMaster) { 1309 switch (hdspm->system_sample_rate) { 1310 case 32000: 1311 return 1; 1312 case 44100: 1313 return 2; 1314 case 48000: 1315 return 3; 1316 case 64000: 1317 return 4; 1318 case 88200: 1319 return 5; 1320 case 96000: 1321 return 6; 1322 case 128000: 1323 return 7; 1324 case 176400: 1325 return 8; 1326 case 192000: 1327 return 9; 1328 default: 1329 return 3; 1330 } 1331 } else { 1332 return 0; 1333 } 1334 } 1335 1336 static int hdspm_set_clock_source(struct hdspm * hdspm, int mode) 1337 { 1338 int rate; 1339 switch (mode) { 1340 1341 case HDSPM_CLOCK_SOURCE_AUTOSYNC: 1342 if (hdspm_external_sample_rate(hdspm) != 0) { 1343 hdspm->control_register &= ~HDSPM_ClockModeMaster; 1344 hdspm_write(hdspm, HDSPM_controlRegister, 1345 hdspm->control_register); 1346 return 0; 1347 } 1348 return -1; 1349 case HDSPM_CLOCK_SOURCE_INTERNAL_32KHZ: 1350 rate = 32000; 1351 break; 1352 case HDSPM_CLOCK_SOURCE_INTERNAL_44_1KHZ: 1353 rate = 44100; 1354 break; 1355 case HDSPM_CLOCK_SOURCE_INTERNAL_48KHZ: 1356 rate = 48000; 1357 break; 1358 case HDSPM_CLOCK_SOURCE_INTERNAL_64KHZ: 1359 rate = 64000; 1360 break; 1361 case HDSPM_CLOCK_SOURCE_INTERNAL_88_2KHZ: 1362 rate = 88200; 1363 break; 1364 case HDSPM_CLOCK_SOURCE_INTERNAL_96KHZ: 1365 rate = 96000; 1366 break; 1367 case HDSPM_CLOCK_SOURCE_INTERNAL_128KHZ: 1368 rate = 128000; 1369 break; 1370 case HDSPM_CLOCK_SOURCE_INTERNAL_176_4KHZ: 1371 rate = 176400; 1372 break; 1373 case HDSPM_CLOCK_SOURCE_INTERNAL_192KHZ: 1374 rate = 192000; 1375 break; 1376 1377 default: 1378 rate = 44100; 1379 } 1380 hdspm->control_register |= HDSPM_ClockModeMaster; 1381 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register); 1382 hdspm_set_rate(hdspm, rate, 1); 1383 return 0; 1384 } 1385 1386 static int snd_hdspm_info_clock_source(struct snd_kcontrol *kcontrol, 1387 struct snd_ctl_elem_info *uinfo) 1388 { 1389 static char *texts[] = { "AutoSync", 1390 "Internal 32.0 kHz", "Internal 44.1 kHz", 1391 "Internal 48.0 kHz", 1392 "Internal 64.0 kHz", "Internal 88.2 kHz", 1393 "Internal 96.0 kHz", 1394 "Internal 128.0 kHz", "Internal 176.4 kHz", 1395 "Internal 192.0 kHz" 1396 }; 1397 1398 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1399 uinfo->count = 1; 1400 uinfo->value.enumerated.items = 10; 1401 1402 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 1403 uinfo->value.enumerated.item = 1404 uinfo->value.enumerated.items - 1; 1405 1406 strcpy(uinfo->value.enumerated.name, 1407 texts[uinfo->value.enumerated.item]); 1408 1409 return 0; 1410 } 1411 1412 static int snd_hdspm_get_clock_source(struct snd_kcontrol *kcontrol, 1413 struct snd_ctl_elem_value *ucontrol) 1414 { 1415 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol); 1416 1417 ucontrol->value.enumerated.item[0] = hdspm_clock_source(hdspm); 1418 return 0; 1419 } 1420 1421 static int snd_hdspm_put_clock_source(struct snd_kcontrol *kcontrol, 1422 struct snd_ctl_elem_value *ucontrol) 1423 { 1424 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol); 1425 int change; 1426 int val; 1427 1428 if (!snd_hdspm_use_is_exclusive(hdspm)) 1429 return -EBUSY; 1430 val = ucontrol->value.enumerated.item[0]; 1431 if (val < 0) 1432 val = 0; 1433 if (val > 6) 1434 val = 6; 1435 spin_lock_irq(&hdspm->lock); 1436 if (val != hdspm_clock_source(hdspm)) 1437 change = (hdspm_set_clock_source(hdspm, val) == 0) ? 1 : 0; 1438 else 1439 change = 0; 1440 spin_unlock_irq(&hdspm->lock); 1441 return change; 1442 } 1443 1444 #define HDSPM_PREF_SYNC_REF(xname, xindex) \ 1445 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 1446 .name = xname, \ 1447 .index = xindex, \ 1448 .info = snd_hdspm_info_pref_sync_ref, \ 1449 .get = snd_hdspm_get_pref_sync_ref, \ 1450 .put = snd_hdspm_put_pref_sync_ref \ 1451 } 1452 1453 static int hdspm_pref_sync_ref(struct hdspm * hdspm) 1454 { 1455 /* Notice that this looks at the requested sync source, 1456 not the one actually in use. 1457 */ 1458 switch (hdspm->control_register & HDSPM_SyncRefMask) { 1459 case HDSPM_SyncRef_Word: 1460 return HDSPM_SYNC_FROM_WORD; 1461 case HDSPM_SyncRef_MADI: 1462 return HDSPM_SYNC_FROM_MADI; 1463 } 1464 1465 return HDSPM_SYNC_FROM_WORD; 1466 } 1467 1468 static int hdspm_set_pref_sync_ref(struct hdspm * hdspm, int pref) 1469 { 1470 hdspm->control_register &= ~HDSPM_SyncRefMask; 1471 1472 switch (pref) { 1473 case HDSPM_SYNC_FROM_MADI: 1474 hdspm->control_register |= HDSPM_SyncRef_MADI; 1475 break; 1476 case HDSPM_SYNC_FROM_WORD: 1477 hdspm->control_register |= HDSPM_SyncRef_Word; 1478 break; 1479 default: 1480 return -1; 1481 } 1482 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register); 1483 return 0; 1484 } 1485 1486 static int snd_hdspm_info_pref_sync_ref(struct snd_kcontrol *kcontrol, 1487 struct snd_ctl_elem_info *uinfo) 1488 { 1489 static char *texts[] = { "Word", "MADI" }; 1490 1491 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1492 uinfo->count = 1; 1493 1494 uinfo->value.enumerated.items = 2; 1495 1496 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 1497 uinfo->value.enumerated.item = 1498 uinfo->value.enumerated.items - 1; 1499 strcpy(uinfo->value.enumerated.name, 1500 texts[uinfo->value.enumerated.item]); 1501 return 0; 1502 } 1503 1504 static int snd_hdspm_get_pref_sync_ref(struct snd_kcontrol *kcontrol, 1505 struct snd_ctl_elem_value *ucontrol) 1506 { 1507 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol); 1508 1509 ucontrol->value.enumerated.item[0] = hdspm_pref_sync_ref(hdspm); 1510 return 0; 1511 } 1512 1513 static int snd_hdspm_put_pref_sync_ref(struct snd_kcontrol *kcontrol, 1514 struct snd_ctl_elem_value *ucontrol) 1515 { 1516 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol); 1517 int change, max; 1518 unsigned int val; 1519 1520 max = 2; 1521 1522 if (!snd_hdspm_use_is_exclusive(hdspm)) 1523 return -EBUSY; 1524 1525 val = ucontrol->value.enumerated.item[0] % max; 1526 1527 spin_lock_irq(&hdspm->lock); 1528 change = (int) val != hdspm_pref_sync_ref(hdspm); 1529 hdspm_set_pref_sync_ref(hdspm, val); 1530 spin_unlock_irq(&hdspm->lock); 1531 return change; 1532 } 1533 1534 #define HDSPM_AUTOSYNC_REF(xname, xindex) \ 1535 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 1536 .name = xname, \ 1537 .index = xindex, \ 1538 .access = SNDRV_CTL_ELEM_ACCESS_READ, \ 1539 .info = snd_hdspm_info_autosync_ref, \ 1540 .get = snd_hdspm_get_autosync_ref, \ 1541 } 1542 1543 static int hdspm_autosync_ref(struct hdspm * hdspm) 1544 { 1545 /* This looks at the autosync selected sync reference */ 1546 unsigned int status2 = hdspm_read(hdspm, HDSPM_statusRegister2); 1547 1548 switch (status2 & HDSPM_SelSyncRefMask) { 1549 1550 case HDSPM_SelSyncRef_WORD: 1551 return HDSPM_AUTOSYNC_FROM_WORD; 1552 1553 case HDSPM_SelSyncRef_MADI: 1554 return HDSPM_AUTOSYNC_FROM_MADI; 1555 1556 case HDSPM_SelSyncRef_NVALID: 1557 return HDSPM_AUTOSYNC_FROM_NONE; 1558 1559 default: 1560 return 0; 1561 } 1562 1563 return 0; 1564 } 1565 1566 static int snd_hdspm_info_autosync_ref(struct snd_kcontrol *kcontrol, 1567 struct snd_ctl_elem_info *uinfo) 1568 { 1569 static char *texts[] = { "WordClock", "MADI", "None" }; 1570 1571 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1572 uinfo->count = 1; 1573 uinfo->value.enumerated.items = 3; 1574 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 1575 uinfo->value.enumerated.item = 1576 uinfo->value.enumerated.items - 1; 1577 strcpy(uinfo->value.enumerated.name, 1578 texts[uinfo->value.enumerated.item]); 1579 return 0; 1580 } 1581 1582 static int snd_hdspm_get_autosync_ref(struct snd_kcontrol *kcontrol, 1583 struct snd_ctl_elem_value *ucontrol) 1584 { 1585 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol); 1586 1587 ucontrol->value.enumerated.item[0] = hdspm_pref_sync_ref(hdspm); 1588 return 0; 1589 } 1590 1591 #define HDSPM_LINE_OUT(xname, xindex) \ 1592 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 1593 .name = xname, \ 1594 .index = xindex, \ 1595 .info = snd_hdspm_info_line_out, \ 1596 .get = snd_hdspm_get_line_out, \ 1597 .put = snd_hdspm_put_line_out \ 1598 } 1599 1600 static int hdspm_line_out(struct hdspm * hdspm) 1601 { 1602 return (hdspm->control_register & HDSPM_LineOut) ? 1 : 0; 1603 } 1604 1605 1606 static int hdspm_set_line_output(struct hdspm * hdspm, int out) 1607 { 1608 if (out) 1609 hdspm->control_register |= HDSPM_LineOut; 1610 else 1611 hdspm->control_register &= ~HDSPM_LineOut; 1612 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register); 1613 1614 return 0; 1615 } 1616 1617 static int snd_hdspm_info_line_out(struct snd_kcontrol *kcontrol, 1618 struct snd_ctl_elem_info *uinfo) 1619 { 1620 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1621 uinfo->count = 1; 1622 uinfo->value.integer.min = 0; 1623 uinfo->value.integer.max = 1; 1624 return 0; 1625 } 1626 1627 static int snd_hdspm_get_line_out(struct snd_kcontrol *kcontrol, 1628 struct snd_ctl_elem_value *ucontrol) 1629 { 1630 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol); 1631 1632 spin_lock_irq(&hdspm->lock); 1633 ucontrol->value.integer.value[0] = hdspm_line_out(hdspm); 1634 spin_unlock_irq(&hdspm->lock); 1635 return 0; 1636 } 1637 1638 static int snd_hdspm_put_line_out(struct snd_kcontrol *kcontrol, 1639 struct snd_ctl_elem_value *ucontrol) 1640 { 1641 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol); 1642 int change; 1643 unsigned int val; 1644 1645 if (!snd_hdspm_use_is_exclusive(hdspm)) 1646 return -EBUSY; 1647 val = ucontrol->value.integer.value[0] & 1; 1648 spin_lock_irq(&hdspm->lock); 1649 change = (int) val != hdspm_line_out(hdspm); 1650 hdspm_set_line_output(hdspm, val); 1651 spin_unlock_irq(&hdspm->lock); 1652 return change; 1653 } 1654 1655 #define HDSPM_TX_64(xname, xindex) \ 1656 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 1657 .name = xname, \ 1658 .index = xindex, \ 1659 .info = snd_hdspm_info_tx_64, \ 1660 .get = snd_hdspm_get_tx_64, \ 1661 .put = snd_hdspm_put_tx_64 \ 1662 } 1663 1664 static int hdspm_tx_64(struct hdspm * hdspm) 1665 { 1666 return (hdspm->control_register & HDSPM_TX_64ch) ? 1 : 0; 1667 } 1668 1669 static int hdspm_set_tx_64(struct hdspm * hdspm, int out) 1670 { 1671 if (out) 1672 hdspm->control_register |= HDSPM_TX_64ch; 1673 else 1674 hdspm->control_register &= ~HDSPM_TX_64ch; 1675 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register); 1676 1677 return 0; 1678 } 1679 1680 static int snd_hdspm_info_tx_64(struct snd_kcontrol *kcontrol, 1681 struct snd_ctl_elem_info *uinfo) 1682 { 1683 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1684 uinfo->count = 1; 1685 uinfo->value.integer.min = 0; 1686 uinfo->value.integer.max = 1; 1687 return 0; 1688 } 1689 1690 static int snd_hdspm_get_tx_64(struct snd_kcontrol *kcontrol, 1691 struct snd_ctl_elem_value *ucontrol) 1692 { 1693 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol); 1694 1695 spin_lock_irq(&hdspm->lock); 1696 ucontrol->value.integer.value[0] = hdspm_tx_64(hdspm); 1697 spin_unlock_irq(&hdspm->lock); 1698 return 0; 1699 } 1700 1701 static int snd_hdspm_put_tx_64(struct snd_kcontrol *kcontrol, 1702 struct snd_ctl_elem_value *ucontrol) 1703 { 1704 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol); 1705 int change; 1706 unsigned int val; 1707 1708 if (!snd_hdspm_use_is_exclusive(hdspm)) 1709 return -EBUSY; 1710 val = ucontrol->value.integer.value[0] & 1; 1711 spin_lock_irq(&hdspm->lock); 1712 change = (int) val != hdspm_tx_64(hdspm); 1713 hdspm_set_tx_64(hdspm, val); 1714 spin_unlock_irq(&hdspm->lock); 1715 return change; 1716 } 1717 1718 #define HDSPM_C_TMS(xname, xindex) \ 1719 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 1720 .name = xname, \ 1721 .index = xindex, \ 1722 .info = snd_hdspm_info_c_tms, \ 1723 .get = snd_hdspm_get_c_tms, \ 1724 .put = snd_hdspm_put_c_tms \ 1725 } 1726 1727 static int hdspm_c_tms(struct hdspm * hdspm) 1728 { 1729 return (hdspm->control_register & HDSPM_clr_tms) ? 1 : 0; 1730 } 1731 1732 static int hdspm_set_c_tms(struct hdspm * hdspm, int out) 1733 { 1734 if (out) 1735 hdspm->control_register |= HDSPM_clr_tms; 1736 else 1737 hdspm->control_register &= ~HDSPM_clr_tms; 1738 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register); 1739 1740 return 0; 1741 } 1742 1743 static int snd_hdspm_info_c_tms(struct snd_kcontrol *kcontrol, 1744 struct snd_ctl_elem_info *uinfo) 1745 { 1746 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1747 uinfo->count = 1; 1748 uinfo->value.integer.min = 0; 1749 uinfo->value.integer.max = 1; 1750 return 0; 1751 } 1752 1753 static int snd_hdspm_get_c_tms(struct snd_kcontrol *kcontrol, 1754 struct snd_ctl_elem_value *ucontrol) 1755 { 1756 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol); 1757 1758 spin_lock_irq(&hdspm->lock); 1759 ucontrol->value.integer.value[0] = hdspm_c_tms(hdspm); 1760 spin_unlock_irq(&hdspm->lock); 1761 return 0; 1762 } 1763 1764 static int snd_hdspm_put_c_tms(struct snd_kcontrol *kcontrol, 1765 struct snd_ctl_elem_value *ucontrol) 1766 { 1767 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol); 1768 int change; 1769 unsigned int val; 1770 1771 if (!snd_hdspm_use_is_exclusive(hdspm)) 1772 return -EBUSY; 1773 val = ucontrol->value.integer.value[0] & 1; 1774 spin_lock_irq(&hdspm->lock); 1775 change = (int) val != hdspm_c_tms(hdspm); 1776 hdspm_set_c_tms(hdspm, val); 1777 spin_unlock_irq(&hdspm->lock); 1778 return change; 1779 } 1780 1781 #define HDSPM_SAFE_MODE(xname, xindex) \ 1782 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 1783 .name = xname, \ 1784 .index = xindex, \ 1785 .info = snd_hdspm_info_safe_mode, \ 1786 .get = snd_hdspm_get_safe_mode, \ 1787 .put = snd_hdspm_put_safe_mode \ 1788 } 1789 1790 static int hdspm_safe_mode(struct hdspm * hdspm) 1791 { 1792 return (hdspm->control_register & HDSPM_AutoInp) ? 1 : 0; 1793 } 1794 1795 static int hdspm_set_safe_mode(struct hdspm * hdspm, int out) 1796 { 1797 if (out) 1798 hdspm->control_register |= HDSPM_AutoInp; 1799 else 1800 hdspm->control_register &= ~HDSPM_AutoInp; 1801 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register); 1802 1803 return 0; 1804 } 1805 1806 static int snd_hdspm_info_safe_mode(struct snd_kcontrol *kcontrol, 1807 struct snd_ctl_elem_info *uinfo) 1808 { 1809 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1810 uinfo->count = 1; 1811 uinfo->value.integer.min = 0; 1812 uinfo->value.integer.max = 1; 1813 return 0; 1814 } 1815 1816 static int snd_hdspm_get_safe_mode(struct snd_kcontrol *kcontrol, 1817 struct snd_ctl_elem_value *ucontrol) 1818 { 1819 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol); 1820 1821 spin_lock_irq(&hdspm->lock); 1822 ucontrol->value.integer.value[0] = hdspm_safe_mode(hdspm); 1823 spin_unlock_irq(&hdspm->lock); 1824 return 0; 1825 } 1826 1827 static int snd_hdspm_put_safe_mode(struct snd_kcontrol *kcontrol, 1828 struct snd_ctl_elem_value *ucontrol) 1829 { 1830 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol); 1831 int change; 1832 unsigned int val; 1833 1834 if (!snd_hdspm_use_is_exclusive(hdspm)) 1835 return -EBUSY; 1836 val = ucontrol->value.integer.value[0] & 1; 1837 spin_lock_irq(&hdspm->lock); 1838 change = (int) val != hdspm_safe_mode(hdspm); 1839 hdspm_set_safe_mode(hdspm, val); 1840 spin_unlock_irq(&hdspm->lock); 1841 return change; 1842 } 1843 1844 #define HDSPM_INPUT_SELECT(xname, xindex) \ 1845 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 1846 .name = xname, \ 1847 .index = xindex, \ 1848 .info = snd_hdspm_info_input_select, \ 1849 .get = snd_hdspm_get_input_select, \ 1850 .put = snd_hdspm_put_input_select \ 1851 } 1852 1853 static int hdspm_input_select(struct hdspm * hdspm) 1854 { 1855 return (hdspm->control_register & HDSPM_InputSelect0) ? 1 : 0; 1856 } 1857 1858 static int hdspm_set_input_select(struct hdspm * hdspm, int out) 1859 { 1860 if (out) 1861 hdspm->control_register |= HDSPM_InputSelect0; 1862 else 1863 hdspm->control_register &= ~HDSPM_InputSelect0; 1864 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register); 1865 1866 return 0; 1867 } 1868 1869 static int snd_hdspm_info_input_select(struct snd_kcontrol *kcontrol, 1870 struct snd_ctl_elem_info *uinfo) 1871 { 1872 static char *texts[] = { "optical", "coaxial" }; 1873 1874 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1875 uinfo->count = 1; 1876 uinfo->value.enumerated.items = 2; 1877 1878 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 1879 uinfo->value.enumerated.item = 1880 uinfo->value.enumerated.items - 1; 1881 strcpy(uinfo->value.enumerated.name, 1882 texts[uinfo->value.enumerated.item]); 1883 1884 return 0; 1885 } 1886 1887 static int snd_hdspm_get_input_select(struct snd_kcontrol *kcontrol, 1888 struct snd_ctl_elem_value *ucontrol) 1889 { 1890 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol); 1891 1892 spin_lock_irq(&hdspm->lock); 1893 ucontrol->value.enumerated.item[0] = hdspm_input_select(hdspm); 1894 spin_unlock_irq(&hdspm->lock); 1895 return 0; 1896 } 1897 1898 static int snd_hdspm_put_input_select(struct snd_kcontrol *kcontrol, 1899 struct snd_ctl_elem_value *ucontrol) 1900 { 1901 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol); 1902 int change; 1903 unsigned int val; 1904 1905 if (!snd_hdspm_use_is_exclusive(hdspm)) 1906 return -EBUSY; 1907 val = ucontrol->value.integer.value[0] & 1; 1908 spin_lock_irq(&hdspm->lock); 1909 change = (int) val != hdspm_input_select(hdspm); 1910 hdspm_set_input_select(hdspm, val); 1911 spin_unlock_irq(&hdspm->lock); 1912 return change; 1913 } 1914 1915 /* Simple Mixer 1916 deprecated since to much faders ??? 1917 MIXER interface says output (source, destination, value) 1918 where source > MAX_channels are playback channels 1919 on MADICARD 1920 - playback mixer matrix: [channelout+64] [output] [value] 1921 - input(thru) mixer matrix: [channelin] [output] [value] 1922 (better do 2 kontrols for seperation ?) 1923 */ 1924 1925 #define HDSPM_MIXER(xname, xindex) \ 1926 { .iface = SNDRV_CTL_ELEM_IFACE_HWDEP, \ 1927 .name = xname, \ 1928 .index = xindex, \ 1929 .device = 0, \ 1930 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \ 1931 SNDRV_CTL_ELEM_ACCESS_VOLATILE, \ 1932 .info = snd_hdspm_info_mixer, \ 1933 .get = snd_hdspm_get_mixer, \ 1934 .put = snd_hdspm_put_mixer \ 1935 } 1936 1937 static int snd_hdspm_info_mixer(struct snd_kcontrol *kcontrol, 1938 struct snd_ctl_elem_info *uinfo) 1939 { 1940 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 1941 uinfo->count = 3; 1942 uinfo->value.integer.min = 0; 1943 uinfo->value.integer.max = 65535; 1944 uinfo->value.integer.step = 1; 1945 return 0; 1946 } 1947 1948 static int snd_hdspm_get_mixer(struct snd_kcontrol *kcontrol, 1949 struct snd_ctl_elem_value *ucontrol) 1950 { 1951 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol); 1952 int source; 1953 int destination; 1954 1955 source = ucontrol->value.integer.value[0]; 1956 if (source < 0) 1957 source = 0; 1958 else if (source >= 2 * HDSPM_MAX_CHANNELS) 1959 source = 2 * HDSPM_MAX_CHANNELS - 1; 1960 1961 destination = ucontrol->value.integer.value[1]; 1962 if (destination < 0) 1963 destination = 0; 1964 else if (destination >= HDSPM_MAX_CHANNELS) 1965 destination = HDSPM_MAX_CHANNELS - 1; 1966 1967 spin_lock_irq(&hdspm->lock); 1968 if (source >= HDSPM_MAX_CHANNELS) 1969 ucontrol->value.integer.value[2] = 1970 hdspm_read_pb_gain(hdspm, destination, 1971 source - HDSPM_MAX_CHANNELS); 1972 else 1973 ucontrol->value.integer.value[2] = 1974 hdspm_read_in_gain(hdspm, destination, source); 1975 1976 spin_unlock_irq(&hdspm->lock); 1977 1978 return 0; 1979 } 1980 1981 static int snd_hdspm_put_mixer(struct snd_kcontrol *kcontrol, 1982 struct snd_ctl_elem_value *ucontrol) 1983 { 1984 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol); 1985 int change; 1986 int source; 1987 int destination; 1988 int gain; 1989 1990 if (!snd_hdspm_use_is_exclusive(hdspm)) 1991 return -EBUSY; 1992 1993 source = ucontrol->value.integer.value[0]; 1994 destination = ucontrol->value.integer.value[1]; 1995 1996 if (source < 0 || source >= 2 * HDSPM_MAX_CHANNELS) 1997 return -1; 1998 if (destination < 0 || destination >= HDSPM_MAX_CHANNELS) 1999 return -1; 2000 2001 gain = ucontrol->value.integer.value[2]; 2002 2003 spin_lock_irq(&hdspm->lock); 2004 2005 if (source >= HDSPM_MAX_CHANNELS) 2006 change = gain != hdspm_read_pb_gain(hdspm, destination, 2007 source - 2008 HDSPM_MAX_CHANNELS); 2009 else 2010 change = 2011 gain != hdspm_read_in_gain(hdspm, destination, source); 2012 2013 if (change) { 2014 if (source >= HDSPM_MAX_CHANNELS) 2015 hdspm_write_pb_gain(hdspm, destination, 2016 source - HDSPM_MAX_CHANNELS, 2017 gain); 2018 else 2019 hdspm_write_in_gain(hdspm, destination, source, 2020 gain); 2021 } 2022 spin_unlock_irq(&hdspm->lock); 2023 2024 return change; 2025 } 2026 2027 /* The simple mixer control(s) provide gain control for the 2028 basic 1:1 mappings of playback streams to output 2029 streams. 2030 */ 2031 2032 #define HDSPM_PLAYBACK_MIXER \ 2033 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 2034 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_WRITE | \ 2035 SNDRV_CTL_ELEM_ACCESS_VOLATILE, \ 2036 .info = snd_hdspm_info_playback_mixer, \ 2037 .get = snd_hdspm_get_playback_mixer, \ 2038 .put = snd_hdspm_put_playback_mixer \ 2039 } 2040 2041 static int snd_hdspm_info_playback_mixer(struct snd_kcontrol *kcontrol, 2042 struct snd_ctl_elem_info *uinfo) 2043 { 2044 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 2045 uinfo->count = 1; 2046 uinfo->value.integer.min = 0; 2047 uinfo->value.integer.max = 65536; 2048 uinfo->value.integer.step = 1; 2049 return 0; 2050 } 2051 2052 static int snd_hdspm_get_playback_mixer(struct snd_kcontrol *kcontrol, 2053 struct snd_ctl_elem_value *ucontrol) 2054 { 2055 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol); 2056 int channel; 2057 int mapped_channel; 2058 2059 channel = ucontrol->id.index - 1; 2060 2061 snd_assert(channel >= 0 2062 || channel < HDSPM_MAX_CHANNELS, return -EINVAL); 2063 2064 if ((mapped_channel = hdspm->channel_map[channel]) < 0) 2065 return -EINVAL; 2066 2067 spin_lock_irq(&hdspm->lock); 2068 ucontrol->value.integer.value[0] = 2069 hdspm_read_pb_gain(hdspm, mapped_channel, mapped_channel); 2070 spin_unlock_irq(&hdspm->lock); 2071 2072 /* snd_printdd("get pb mixer index %d, channel %d, mapped_channel %d, value %d\n", 2073 ucontrol->id.index, channel, mapped_channel, ucontrol->value.integer.value[0]); 2074 */ 2075 2076 return 0; 2077 } 2078 2079 static int snd_hdspm_put_playback_mixer(struct snd_kcontrol *kcontrol, 2080 struct snd_ctl_elem_value *ucontrol) 2081 { 2082 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol); 2083 int change; 2084 int channel; 2085 int mapped_channel; 2086 int gain; 2087 2088 if (!snd_hdspm_use_is_exclusive(hdspm)) 2089 return -EBUSY; 2090 2091 channel = ucontrol->id.index - 1; 2092 2093 snd_assert(channel >= 0 2094 || channel < HDSPM_MAX_CHANNELS, return -EINVAL); 2095 2096 if ((mapped_channel = hdspm->channel_map[channel]) < 0) 2097 return -EINVAL; 2098 2099 gain = ucontrol->value.integer.value[0]; 2100 2101 spin_lock_irq(&hdspm->lock); 2102 change = 2103 gain != hdspm_read_pb_gain(hdspm, mapped_channel, 2104 mapped_channel); 2105 if (change) 2106 hdspm_write_pb_gain(hdspm, mapped_channel, mapped_channel, 2107 gain); 2108 spin_unlock_irq(&hdspm->lock); 2109 return change; 2110 } 2111 2112 #define HDSPM_WC_SYNC_CHECK(xname, xindex) \ 2113 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 2114 .name = xname, \ 2115 .index = xindex, \ 2116 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \ 2117 .info = snd_hdspm_info_sync_check, \ 2118 .get = snd_hdspm_get_wc_sync_check \ 2119 } 2120 2121 static int snd_hdspm_info_sync_check(struct snd_kcontrol *kcontrol, 2122 struct snd_ctl_elem_info *uinfo) 2123 { 2124 static char *texts[] = { "No Lock", "Lock", "Sync" }; 2125 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 2126 uinfo->count = 1; 2127 uinfo->value.enumerated.items = 3; 2128 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 2129 uinfo->value.enumerated.item = 2130 uinfo->value.enumerated.items - 1; 2131 strcpy(uinfo->value.enumerated.name, 2132 texts[uinfo->value.enumerated.item]); 2133 return 0; 2134 } 2135 2136 static int hdspm_wc_sync_check(struct hdspm * hdspm) 2137 { 2138 int status2 = hdspm_read(hdspm, HDSPM_statusRegister2); 2139 if (status2 & HDSPM_wcLock) { 2140 if (status2 & HDSPM_wcSync) 2141 return 2; 2142 else 2143 return 1; 2144 } 2145 return 0; 2146 } 2147 2148 static int snd_hdspm_get_wc_sync_check(struct snd_kcontrol *kcontrol, 2149 struct snd_ctl_elem_value *ucontrol) 2150 { 2151 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol); 2152 2153 ucontrol->value.enumerated.item[0] = hdspm_wc_sync_check(hdspm); 2154 return 0; 2155 } 2156 2157 2158 #define HDSPM_MADI_SYNC_CHECK(xname, xindex) \ 2159 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 2160 .name = xname, \ 2161 .index = xindex, \ 2162 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \ 2163 .info = snd_hdspm_info_sync_check, \ 2164 .get = snd_hdspm_get_madisync_sync_check \ 2165 } 2166 2167 static int hdspm_madisync_sync_check(struct hdspm * hdspm) 2168 { 2169 int status = hdspm_read(hdspm, HDSPM_statusRegister); 2170 if (status & HDSPM_madiLock) { 2171 if (status & HDSPM_madiSync) 2172 return 2; 2173 else 2174 return 1; 2175 } 2176 return 0; 2177 } 2178 2179 static int snd_hdspm_get_madisync_sync_check(struct snd_kcontrol *kcontrol, 2180 struct snd_ctl_elem_value * 2181 ucontrol) 2182 { 2183 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol); 2184 2185 ucontrol->value.enumerated.item[0] = 2186 hdspm_madisync_sync_check(hdspm); 2187 return 0; 2188 } 2189 2190 2191 2192 2193 static struct snd_kcontrol_new snd_hdspm_controls[] = { 2194 2195 HDSPM_MIXER("Mixer", 0), 2196 /* 'Sample Clock Source' complies with the alsa control naming scheme */ 2197 HDSPM_CLOCK_SOURCE("Sample Clock Source", 0), 2198 2199 HDSPM_SYSTEM_CLOCK_MODE("System Clock Mode", 0), 2200 HDSPM_PREF_SYNC_REF("Preferred Sync Reference", 0), 2201 HDSPM_AUTOSYNC_REF("AutoSync Reference", 0), 2202 HDSPM_SYSTEM_SAMPLE_RATE("System Sample Rate", 0), 2203 /* 'External Rate' complies with the alsa control naming scheme */ 2204 HDSPM_AUTOSYNC_SAMPLE_RATE("External Rate", 0), 2205 HDSPM_WC_SYNC_CHECK("Word Clock Lock Status", 0), 2206 HDSPM_MADI_SYNC_CHECK("MADI Sync Lock Status", 0), 2207 HDSPM_LINE_OUT("Line Out", 0), 2208 HDSPM_TX_64("TX 64 channels mode", 0), 2209 HDSPM_C_TMS("Clear Track Marker", 0), 2210 HDSPM_SAFE_MODE("Safe Mode", 0), 2211 HDSPM_INPUT_SELECT("Input Select", 0), 2212 }; 2213 2214 static struct snd_kcontrol_new snd_hdspm_playback_mixer = HDSPM_PLAYBACK_MIXER; 2215 2216 2217 static int hdspm_update_simple_mixer_controls(struct hdspm * hdspm) 2218 { 2219 int i; 2220 2221 for (i = hdspm->ds_channels; i < hdspm->ss_channels; ++i) { 2222 if (hdspm->system_sample_rate > 48000) { 2223 hdspm->playback_mixer_ctls[i]->vd[0].access = 2224 SNDRV_CTL_ELEM_ACCESS_INACTIVE | 2225 SNDRV_CTL_ELEM_ACCESS_READ | 2226 SNDRV_CTL_ELEM_ACCESS_VOLATILE; 2227 } else { 2228 hdspm->playback_mixer_ctls[i]->vd[0].access = 2229 SNDRV_CTL_ELEM_ACCESS_READWRITE | 2230 SNDRV_CTL_ELEM_ACCESS_VOLATILE; 2231 } 2232 snd_ctl_notify(hdspm->card, SNDRV_CTL_EVENT_MASK_VALUE | 2233 SNDRV_CTL_EVENT_MASK_INFO, 2234 &hdspm->playback_mixer_ctls[i]->id); 2235 } 2236 2237 return 0; 2238 } 2239 2240 2241 static int snd_hdspm_create_controls(struct snd_card *card, struct hdspm * hdspm) 2242 { 2243 unsigned int idx, limit; 2244 int err; 2245 struct snd_kcontrol *kctl; 2246 2247 /* add control list first */ 2248 2249 for (idx = 0; idx < ARRAY_SIZE(snd_hdspm_controls); idx++) { 2250 if ((err = 2251 snd_ctl_add(card, kctl = 2252 snd_ctl_new1(&snd_hdspm_controls[idx], 2253 hdspm))) < 0) { 2254 return err; 2255 } 2256 } 2257 2258 /* Channel playback mixer as default control 2259 Note: the whole matrix would be 128*HDSPM_MIXER_CHANNELS Faders, thats to big for any alsamixer 2260 they are accesible via special IOCTL on hwdep 2261 and the mixer 2dimensional mixer control */ 2262 2263 snd_hdspm_playback_mixer.name = "Chn"; 2264 limit = HDSPM_MAX_CHANNELS; 2265 2266 /* The index values are one greater than the channel ID so that alsamixer 2267 will display them correctly. We want to use the index for fast lookup 2268 of the relevant channel, but if we use it at all, most ALSA software 2269 does the wrong thing with it ... 2270 */ 2271 2272 for (idx = 0; idx < limit; ++idx) { 2273 snd_hdspm_playback_mixer.index = idx + 1; 2274 if ((err = snd_ctl_add(card, 2275 kctl = 2276 snd_ctl_new1 2277 (&snd_hdspm_playback_mixer, 2278 hdspm)))) { 2279 return err; 2280 } 2281 hdspm->playback_mixer_ctls[idx] = kctl; 2282 } 2283 2284 return 0; 2285 } 2286 2287 /*------------------------------------------------------------ 2288 /proc interface 2289 ------------------------------------------------------------*/ 2290 2291 static void 2292 snd_hdspm_proc_read(struct snd_info_entry * entry, struct snd_info_buffer *buffer) 2293 { 2294 struct hdspm *hdspm = (struct hdspm *) entry->private_data; 2295 unsigned int status; 2296 unsigned int status2; 2297 char *pref_sync_ref; 2298 char *autosync_ref; 2299 char *system_clock_mode; 2300 char *clock_source; 2301 char *insel; 2302 char *syncref; 2303 int x, x2; 2304 2305 status = hdspm_read(hdspm, HDSPM_statusRegister); 2306 status2 = hdspm_read(hdspm, HDSPM_statusRegister2); 2307 2308 snd_iprintf(buffer, "%s (Card #%d) Rev.%x Status2first3bits: %x\n", 2309 hdspm->card_name, hdspm->card->number + 1, 2310 hdspm->firmware_rev, 2311 (status2 & HDSPM_version0) | 2312 (status2 & HDSPM_version1) | (status2 & 2313 HDSPM_version2)); 2314 2315 snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n", 2316 hdspm->irq, hdspm->port, (unsigned long)hdspm->iobase); 2317 2318 snd_iprintf(buffer, "--- System ---\n"); 2319 2320 snd_iprintf(buffer, 2321 "IRQ Pending: Audio=%d, MIDI0=%d, MIDI1=%d, IRQcount=%d\n", 2322 status & HDSPM_audioIRQPending, 2323 (status & HDSPM_midi0IRQPending) ? 1 : 0, 2324 (status & HDSPM_midi1IRQPending) ? 1 : 0, 2325 hdspm->irq_count); 2326 snd_iprintf(buffer, 2327 "HW pointer: id = %d, rawptr = %d (%d->%d) estimated= %ld (bytes)\n", 2328 ((status & HDSPM_BufferID) ? 1 : 0), 2329 (status & HDSPM_BufferPositionMask), 2330 (status & HDSPM_BufferPositionMask) % (2 * 2331 (int)hdspm-> 2332 period_bytes), 2333 ((status & HDSPM_BufferPositionMask) - 2334 64) % (2 * (int)hdspm->period_bytes), 2335 (long) hdspm_hw_pointer(hdspm) * 4); 2336 2337 snd_iprintf(buffer, 2338 "MIDI FIFO: Out1=0x%x, Out2=0x%x, In1=0x%x, In2=0x%x \n", 2339 hdspm_read(hdspm, HDSPM_midiStatusOut0) & 0xFF, 2340 hdspm_read(hdspm, HDSPM_midiStatusOut1) & 0xFF, 2341 hdspm_read(hdspm, HDSPM_midiStatusIn0) & 0xFF, 2342 hdspm_read(hdspm, HDSPM_midiStatusIn1) & 0xFF); 2343 snd_iprintf(buffer, 2344 "Register: ctrl1=0x%x, ctrl2=0x%x, status1=0x%x, status2=0x%x\n", 2345 hdspm->control_register, hdspm->control2_register, 2346 status, status2); 2347 2348 snd_iprintf(buffer, "--- Settings ---\n"); 2349 2350 x = 1 << (6 + 2351 hdspm_decode_latency(hdspm-> 2352 control_register & 2353 HDSPM_LatencyMask)); 2354 2355 snd_iprintf(buffer, 2356 "Size (Latency): %d samples (2 periods of %lu bytes)\n", 2357 x, (unsigned long) hdspm->period_bytes); 2358 2359 snd_iprintf(buffer, "Line out: %s, Precise Pointer: %s\n", 2360 (hdspm-> 2361 control_register & HDSPM_LineOut) ? "on " : "off", 2362 (hdspm->precise_ptr) ? "on" : "off"); 2363 2364 switch (hdspm->control_register & HDSPM_InputMask) { 2365 case HDSPM_InputOptical: 2366 insel = "Optical"; 2367 break; 2368 case HDSPM_InputCoaxial: 2369 insel = "Coaxial"; 2370 break; 2371 default: 2372 insel = "Unkown"; 2373 } 2374 2375 switch (hdspm->control_register & HDSPM_SyncRefMask) { 2376 case HDSPM_SyncRef_Word: 2377 syncref = "WordClock"; 2378 break; 2379 case HDSPM_SyncRef_MADI: 2380 syncref = "MADI"; 2381 break; 2382 default: 2383 syncref = "Unkown"; 2384 } 2385 snd_iprintf(buffer, "Inputsel = %s, SyncRef = %s\n", insel, 2386 syncref); 2387 2388 snd_iprintf(buffer, 2389 "ClearTrackMarker = %s, Transmit in %s Channel Mode, Auto Input %s\n", 2390 (hdspm-> 2391 control_register & HDSPM_clr_tms) ? "on" : "off", 2392 (hdspm-> 2393 control_register & HDSPM_TX_64ch) ? "64" : "56", 2394 (hdspm-> 2395 control_register & HDSPM_AutoInp) ? "on" : "off"); 2396 2397 switch (hdspm_clock_source(hdspm)) { 2398 case HDSPM_CLOCK_SOURCE_AUTOSYNC: 2399 clock_source = "AutoSync"; 2400 break; 2401 case HDSPM_CLOCK_SOURCE_INTERNAL_32KHZ: 2402 clock_source = "Internal 32 kHz"; 2403 break; 2404 case HDSPM_CLOCK_SOURCE_INTERNAL_44_1KHZ: 2405 clock_source = "Internal 44.1 kHz"; 2406 break; 2407 case HDSPM_CLOCK_SOURCE_INTERNAL_48KHZ: 2408 clock_source = "Internal 48 kHz"; 2409 break; 2410 case HDSPM_CLOCK_SOURCE_INTERNAL_64KHZ: 2411 clock_source = "Internal 64 kHz"; 2412 break; 2413 case HDSPM_CLOCK_SOURCE_INTERNAL_88_2KHZ: 2414 clock_source = "Internal 88.2 kHz"; 2415 break; 2416 case HDSPM_CLOCK_SOURCE_INTERNAL_96KHZ: 2417 clock_source = "Internal 96 kHz"; 2418 break; 2419 default: 2420 clock_source = "Error"; 2421 } 2422 snd_iprintf(buffer, "Sample Clock Source: %s\n", clock_source); 2423 if (!(hdspm->control_register & HDSPM_ClockModeMaster)) { 2424 system_clock_mode = "Slave"; 2425 } else { 2426 system_clock_mode = "Master"; 2427 } 2428 snd_iprintf(buffer, "System Clock Mode: %s\n", system_clock_mode); 2429 2430 switch (hdspm_pref_sync_ref(hdspm)) { 2431 case HDSPM_SYNC_FROM_WORD: 2432 pref_sync_ref = "Word Clock"; 2433 break; 2434 case HDSPM_SYNC_FROM_MADI: 2435 pref_sync_ref = "MADI Sync"; 2436 break; 2437 default: 2438 pref_sync_ref = "XXXX Clock"; 2439 break; 2440 } 2441 snd_iprintf(buffer, "Preferred Sync Reference: %s\n", 2442 pref_sync_ref); 2443 2444 snd_iprintf(buffer, "System Clock Frequency: %d\n", 2445 hdspm->system_sample_rate); 2446 2447 2448 snd_iprintf(buffer, "--- Status:\n"); 2449 2450 x = status & HDSPM_madiSync; 2451 x2 = status2 & HDSPM_wcSync; 2452 2453 snd_iprintf(buffer, "Inputs MADI=%s, WordClock=%s\n", 2454 (status & HDSPM_madiLock) ? (x ? "Sync" : "Lock") : 2455 "NoLock", 2456 (status2 & HDSPM_wcLock) ? (x2 ? "Sync" : "Lock") : 2457 "NoLock"); 2458 2459 switch (hdspm_autosync_ref(hdspm)) { 2460 case HDSPM_AUTOSYNC_FROM_WORD: 2461 autosync_ref = "Word Clock"; 2462 break; 2463 case HDSPM_AUTOSYNC_FROM_MADI: 2464 autosync_ref = "MADI Sync"; 2465 break; 2466 case HDSPM_AUTOSYNC_FROM_NONE: 2467 autosync_ref = "Input not valid"; 2468 break; 2469 default: 2470 autosync_ref = "---"; 2471 break; 2472 } 2473 snd_iprintf(buffer, 2474 "AutoSync: Reference= %s, Freq=%d (MADI = %d, Word = %d)\n", 2475 autosync_ref, hdspm_external_sample_rate(hdspm), 2476 (status & HDSPM_madiFreqMask) >> 22, 2477 (status2 & HDSPM_wcFreqMask) >> 5); 2478 2479 snd_iprintf(buffer, "Input: %s, Mode=%s\n", 2480 (status & HDSPM_AB_int) ? "Coax" : "Optical", 2481 (status & HDSPM_RX_64ch) ? "64 channels" : 2482 "56 channels"); 2483 2484 snd_iprintf(buffer, "\n"); 2485 } 2486 2487 static void __devinit snd_hdspm_proc_init(struct hdspm * hdspm) 2488 { 2489 struct snd_info_entry *entry; 2490 2491 if (!snd_card_proc_new(hdspm->card, "hdspm", &entry)) 2492 snd_info_set_text_ops(entry, hdspm, 1024, 2493 snd_hdspm_proc_read); 2494 } 2495 2496 /*------------------------------------------------------------ 2497 hdspm intitialize 2498 ------------------------------------------------------------*/ 2499 2500 static int snd_hdspm_set_defaults(struct hdspm * hdspm) 2501 { 2502 unsigned int i; 2503 2504 /* ASSUMPTION: hdspm->lock is either held, or there is no need to 2505 hold it (e.g. during module initalization). 2506 */ 2507 2508 /* set defaults: */ 2509 2510 hdspm->control_register = HDSPM_ClockModeMaster | /* Master Cloack Mode on */ 2511 hdspm_encode_latency(7) | /* latency maximum = 8192 samples */ 2512 HDSPM_InputCoaxial | /* Input Coax not Optical */ 2513 HDSPM_SyncRef_MADI | /* Madi is syncclock */ 2514 HDSPM_LineOut | /* Analog output in */ 2515 HDSPM_TX_64ch | /* transmit in 64ch mode */ 2516 HDSPM_AutoInp; /* AutoInput chossing (takeover) */ 2517 2518 /* ! HDSPM_Frequency0|HDSPM_Frequency1 = 44.1khz */ 2519 /* ! HDSPM_DoubleSpeed HDSPM_QuadSpeed = normal speed */ 2520 /* ! HDSPM_clr_tms = do not clear bits in track marks */ 2521 2522 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register); 2523 2524 #ifdef SNDRV_BIG_ENDIAN 2525 hdspm->control2_register = HDSPM_BIGENDIAN_MODE; 2526 #else 2527 hdspm->control2_register = 0; 2528 #endif 2529 2530 hdspm_write(hdspm, HDSPM_control2Reg, hdspm->control2_register); 2531 hdspm_compute_period_size(hdspm); 2532 2533 /* silence everything */ 2534 2535 all_in_all_mixer(hdspm, 0 * UNITY_GAIN); 2536 2537 if (line_outs_monitor[hdspm->dev]) { 2538 2539 snd_printk(KERN_INFO "HDSPM: sending all playback streams to line outs.\n"); 2540 2541 for (i = 0; i < HDSPM_MIXER_CHANNELS; i++) { 2542 if (hdspm_write_pb_gain(hdspm, i, i, UNITY_GAIN)) 2543 return -EIO; 2544 } 2545 } 2546 2547 /* set a default rate so that the channel map is set up. */ 2548 hdspm->channel_map = channel_map_madi_ss; 2549 hdspm_set_rate(hdspm, 44100, 1); 2550 2551 return 0; 2552 } 2553 2554 2555 /*------------------------------------------------------------ 2556 interupt 2557 ------------------------------------------------------------*/ 2558 2559 static irqreturn_t snd_hdspm_interrupt(int irq, void *dev_id, 2560 struct pt_regs *regs) 2561 { 2562 struct hdspm *hdspm = (struct hdspm *) dev_id; 2563 unsigned int status; 2564 int audio; 2565 int midi0; 2566 int midi1; 2567 unsigned int midi0status; 2568 unsigned int midi1status; 2569 int schedule = 0; 2570 2571 status = hdspm_read(hdspm, HDSPM_statusRegister); 2572 2573 audio = status & HDSPM_audioIRQPending; 2574 midi0 = status & HDSPM_midi0IRQPending; 2575 midi1 = status & HDSPM_midi1IRQPending; 2576 2577 if (!audio && !midi0 && !midi1) 2578 return IRQ_NONE; 2579 2580 hdspm_write(hdspm, HDSPM_interruptConfirmation, 0); 2581 hdspm->irq_count++; 2582 2583 midi0status = hdspm_read(hdspm, HDSPM_midiStatusIn0) & 0xff; 2584 midi1status = hdspm_read(hdspm, HDSPM_midiStatusIn1) & 0xff; 2585 2586 if (audio) { 2587 2588 if (hdspm->capture_substream) 2589 snd_pcm_period_elapsed(hdspm->pcm-> 2590 streams 2591 [SNDRV_PCM_STREAM_CAPTURE]. 2592 substream); 2593 2594 if (hdspm->playback_substream) 2595 snd_pcm_period_elapsed(hdspm->pcm-> 2596 streams 2597 [SNDRV_PCM_STREAM_PLAYBACK]. 2598 substream); 2599 } 2600 2601 if (midi0 && midi0status) { 2602 /* we disable interrupts for this input until processing is done */ 2603 hdspm->control_register &= ~HDSPM_Midi0InterruptEnable; 2604 hdspm_write(hdspm, HDSPM_controlRegister, 2605 hdspm->control_register); 2606 hdspm->midi[0].pending = 1; 2607 schedule = 1; 2608 } 2609 if (midi1 && midi1status) { 2610 /* we disable interrupts for this input until processing is done */ 2611 hdspm->control_register &= ~HDSPM_Midi1InterruptEnable; 2612 hdspm_write(hdspm, HDSPM_controlRegister, 2613 hdspm->control_register); 2614 hdspm->midi[1].pending = 1; 2615 schedule = 1; 2616 } 2617 if (schedule) 2618 tasklet_hi_schedule(&hdspm->midi_tasklet); 2619 return IRQ_HANDLED; 2620 } 2621 2622 /*------------------------------------------------------------ 2623 pcm interface 2624 ------------------------------------------------------------*/ 2625 2626 2627 static snd_pcm_uframes_t snd_hdspm_hw_pointer(struct snd_pcm_substream * 2628 substream) 2629 { 2630 struct hdspm *hdspm = snd_pcm_substream_chip(substream); 2631 return hdspm_hw_pointer(hdspm); 2632 } 2633 2634 static char *hdspm_channel_buffer_location(struct hdspm * hdspm, 2635 int stream, int channel) 2636 { 2637 int mapped_channel; 2638 2639 snd_assert(channel >= 0 2640 || channel < HDSPM_MAX_CHANNELS, return NULL); 2641 2642 if ((mapped_channel = hdspm->channel_map[channel]) < 0) 2643 return NULL; 2644 2645 if (stream == SNDRV_PCM_STREAM_CAPTURE) { 2646 return hdspm->capture_buffer + 2647 mapped_channel * HDSPM_CHANNEL_BUFFER_BYTES; 2648 } else { 2649 return hdspm->playback_buffer + 2650 mapped_channel * HDSPM_CHANNEL_BUFFER_BYTES; 2651 } 2652 } 2653 2654 2655 /* dont know why need it ??? */ 2656 static int snd_hdspm_playback_copy(struct snd_pcm_substream *substream, 2657 int channel, snd_pcm_uframes_t pos, 2658 void __user *src, snd_pcm_uframes_t count) 2659 { 2660 struct hdspm *hdspm = snd_pcm_substream_chip(substream); 2661 char *channel_buf; 2662 2663 snd_assert(pos + count <= HDSPM_CHANNEL_BUFFER_BYTES / 4, 2664 return -EINVAL); 2665 2666 channel_buf = hdspm_channel_buffer_location(hdspm, 2667 substream->pstr-> 2668 stream, channel); 2669 2670 snd_assert(channel_buf != NULL, return -EIO); 2671 2672 return copy_from_user(channel_buf + pos * 4, src, count * 4); 2673 } 2674 2675 static int snd_hdspm_capture_copy(struct snd_pcm_substream *substream, 2676 int channel, snd_pcm_uframes_t pos, 2677 void __user *dst, snd_pcm_uframes_t count) 2678 { 2679 struct hdspm *hdspm = snd_pcm_substream_chip(substream); 2680 char *channel_buf; 2681 2682 snd_assert(pos + count <= HDSPM_CHANNEL_BUFFER_BYTES / 4, 2683 return -EINVAL); 2684 2685 channel_buf = hdspm_channel_buffer_location(hdspm, 2686 substream->pstr-> 2687 stream, channel); 2688 snd_assert(channel_buf != NULL, return -EIO); 2689 return copy_to_user(dst, channel_buf + pos * 4, count * 4); 2690 } 2691 2692 static int snd_hdspm_hw_silence(struct snd_pcm_substream *substream, 2693 int channel, snd_pcm_uframes_t pos, 2694 snd_pcm_uframes_t count) 2695 { 2696 struct hdspm *hdspm = snd_pcm_substream_chip(substream); 2697 char *channel_buf; 2698 2699 channel_buf = 2700 hdspm_channel_buffer_location(hdspm, substream->pstr->stream, 2701 channel); 2702 snd_assert(channel_buf != NULL, return -EIO); 2703 memset(channel_buf + pos * 4, 0, count * 4); 2704 return 0; 2705 } 2706 2707 static int snd_hdspm_reset(struct snd_pcm_substream *substream) 2708 { 2709 struct snd_pcm_runtime *runtime = substream->runtime; 2710 struct hdspm *hdspm = snd_pcm_substream_chip(substream); 2711 struct snd_pcm_substream *other; 2712 2713 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 2714 other = hdspm->capture_substream; 2715 else 2716 other = hdspm->playback_substream; 2717 2718 if (hdspm->running) 2719 runtime->status->hw_ptr = hdspm_hw_pointer(hdspm); 2720 else 2721 runtime->status->hw_ptr = 0; 2722 if (other) { 2723 struct list_head *pos; 2724 struct snd_pcm_substream *s; 2725 struct snd_pcm_runtime *oruntime = other->runtime; 2726 snd_pcm_group_for_each(pos, substream) { 2727 s = snd_pcm_group_substream_entry(pos); 2728 if (s == other) { 2729 oruntime->status->hw_ptr = 2730 runtime->status->hw_ptr; 2731 break; 2732 } 2733 } 2734 } 2735 return 0; 2736 } 2737 2738 static int snd_hdspm_hw_params(struct snd_pcm_substream *substream, 2739 struct snd_pcm_hw_params *params) 2740 { 2741 struct hdspm *hdspm = snd_pcm_substream_chip(substream); 2742 int err; 2743 int i; 2744 pid_t this_pid; 2745 pid_t other_pid; 2746 struct snd_sg_buf *sgbuf; 2747 2748 2749 spin_lock_irq(&hdspm->lock); 2750 2751 if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) { 2752 this_pid = hdspm->playback_pid; 2753 other_pid = hdspm->capture_pid; 2754 } else { 2755 this_pid = hdspm->capture_pid; 2756 other_pid = hdspm->playback_pid; 2757 } 2758 2759 if ((other_pid > 0) && (this_pid != other_pid)) { 2760 2761 /* The other stream is open, and not by the same 2762 task as this one. Make sure that the parameters 2763 that matter are the same. 2764 */ 2765 2766 if (params_rate(params) != hdspm->system_sample_rate) { 2767 spin_unlock_irq(&hdspm->lock); 2768 _snd_pcm_hw_param_setempty(params, 2769 SNDRV_PCM_HW_PARAM_RATE); 2770 return -EBUSY; 2771 } 2772 2773 if (params_period_size(params) != hdspm->period_bytes / 4) { 2774 spin_unlock_irq(&hdspm->lock); 2775 _snd_pcm_hw_param_setempty(params, 2776 SNDRV_PCM_HW_PARAM_PERIOD_SIZE); 2777 return -EBUSY; 2778 } 2779 2780 } 2781 /* We're fine. */ 2782 spin_unlock_irq(&hdspm->lock); 2783 2784 /* how to make sure that the rate matches an externally-set one ? */ 2785 2786 spin_lock_irq(&hdspm->lock); 2787 if ((err = hdspm_set_rate(hdspm, params_rate(params), 0)) < 0) { 2788 spin_unlock_irq(&hdspm->lock); 2789 _snd_pcm_hw_param_setempty(params, 2790 SNDRV_PCM_HW_PARAM_RATE); 2791 return err; 2792 } 2793 spin_unlock_irq(&hdspm->lock); 2794 2795 if ((err = 2796 hdspm_set_interrupt_interval(hdspm, 2797 params_period_size(params))) < 2798 0) { 2799 _snd_pcm_hw_param_setempty(params, 2800 SNDRV_PCM_HW_PARAM_PERIOD_SIZE); 2801 return err; 2802 } 2803 2804 /* Memory allocation, takashi's method, dont know if we should spinlock */ 2805 /* malloc all buffer even if not enabled to get sure */ 2806 /* malloc only needed bytes */ 2807 err = 2808 snd_pcm_lib_malloc_pages(substream, 2809 HDSPM_CHANNEL_BUFFER_BYTES * 2810 params_channels(params)); 2811 if (err < 0) 2812 return err; 2813 2814 sgbuf = snd_pcm_substream_sgbuf(substream); 2815 2816 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 2817 2818 hdspm_set_sgbuf(hdspm, sgbuf, HDSPM_pageAddressBufferOut, 2819 params_channels(params)); 2820 2821 for (i = 0; i < params_channels(params); ++i) 2822 snd_hdspm_enable_out(hdspm, i, 1); 2823 2824 hdspm->playback_buffer = 2825 (unsigned char *) substream->runtime->dma_area; 2826 } else { 2827 hdspm_set_sgbuf(hdspm, sgbuf, HDSPM_pageAddressBufferIn, 2828 params_channels(params)); 2829 2830 for (i = 0; i < params_channels(params); ++i) 2831 snd_hdspm_enable_in(hdspm, i, 1); 2832 2833 hdspm->capture_buffer = 2834 (unsigned char *) substream->runtime->dma_area; 2835 } 2836 return 0; 2837 } 2838 2839 static int snd_hdspm_hw_free(struct snd_pcm_substream *substream) 2840 { 2841 int i; 2842 struct hdspm *hdspm = snd_pcm_substream_chip(substream); 2843 2844 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 2845 2846 /* params_channels(params) should be enough, 2847 but to get sure in case of error */ 2848 for (i = 0; i < HDSPM_MAX_CHANNELS; ++i) 2849 snd_hdspm_enable_out(hdspm, i, 0); 2850 2851 hdspm->playback_buffer = NULL; 2852 } else { 2853 for (i = 0; i < HDSPM_MAX_CHANNELS; ++i) 2854 snd_hdspm_enable_in(hdspm, i, 0); 2855 2856 hdspm->capture_buffer = NULL; 2857 2858 } 2859 2860 snd_pcm_lib_free_pages(substream); 2861 2862 return 0; 2863 } 2864 2865 static int snd_hdspm_channel_info(struct snd_pcm_substream *substream, 2866 struct snd_pcm_channel_info * info) 2867 { 2868 struct hdspm *hdspm = snd_pcm_substream_chip(substream); 2869 int mapped_channel; 2870 2871 snd_assert(info->channel < HDSPM_MAX_CHANNELS, return -EINVAL); 2872 2873 if ((mapped_channel = hdspm->channel_map[info->channel]) < 0) 2874 return -EINVAL; 2875 2876 info->offset = mapped_channel * HDSPM_CHANNEL_BUFFER_BYTES; 2877 info->first = 0; 2878 info->step = 32; 2879 return 0; 2880 } 2881 2882 static int snd_hdspm_ioctl(struct snd_pcm_substream *substream, 2883 unsigned int cmd, void *arg) 2884 { 2885 switch (cmd) { 2886 case SNDRV_PCM_IOCTL1_RESET: 2887 { 2888 return snd_hdspm_reset(substream); 2889 } 2890 2891 case SNDRV_PCM_IOCTL1_CHANNEL_INFO: 2892 { 2893 struct snd_pcm_channel_info *info = arg; 2894 return snd_hdspm_channel_info(substream, info); 2895 } 2896 default: 2897 break; 2898 } 2899 2900 return snd_pcm_lib_ioctl(substream, cmd, arg); 2901 } 2902 2903 static int snd_hdspm_trigger(struct snd_pcm_substream *substream, int cmd) 2904 { 2905 struct hdspm *hdspm = snd_pcm_substream_chip(substream); 2906 struct snd_pcm_substream *other; 2907 int running; 2908 2909 spin_lock(&hdspm->lock); 2910 running = hdspm->running; 2911 switch (cmd) { 2912 case SNDRV_PCM_TRIGGER_START: 2913 running |= 1 << substream->stream; 2914 break; 2915 case SNDRV_PCM_TRIGGER_STOP: 2916 running &= ~(1 << substream->stream); 2917 break; 2918 default: 2919 snd_BUG(); 2920 spin_unlock(&hdspm->lock); 2921 return -EINVAL; 2922 } 2923 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 2924 other = hdspm->capture_substream; 2925 else 2926 other = hdspm->playback_substream; 2927 2928 if (other) { 2929 struct list_head *pos; 2930 struct snd_pcm_substream *s; 2931 snd_pcm_group_for_each(pos, substream) { 2932 s = snd_pcm_group_substream_entry(pos); 2933 if (s == other) { 2934 snd_pcm_trigger_done(s, substream); 2935 if (cmd == SNDRV_PCM_TRIGGER_START) 2936 running |= 1 << s->stream; 2937 else 2938 running &= ~(1 << s->stream); 2939 goto _ok; 2940 } 2941 } 2942 if (cmd == SNDRV_PCM_TRIGGER_START) { 2943 if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) 2944 && substream->stream == 2945 SNDRV_PCM_STREAM_CAPTURE) 2946 hdspm_silence_playback(hdspm); 2947 } else { 2948 if (running && 2949 substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 2950 hdspm_silence_playback(hdspm); 2951 } 2952 } else { 2953 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) 2954 hdspm_silence_playback(hdspm); 2955 } 2956 _ok: 2957 snd_pcm_trigger_done(substream, substream); 2958 if (!hdspm->running && running) 2959 hdspm_start_audio(hdspm); 2960 else if (hdspm->running && !running) 2961 hdspm_stop_audio(hdspm); 2962 hdspm->running = running; 2963 spin_unlock(&hdspm->lock); 2964 2965 return 0; 2966 } 2967 2968 static int snd_hdspm_prepare(struct snd_pcm_substream *substream) 2969 { 2970 return 0; 2971 } 2972 2973 static unsigned int period_sizes[] = 2974 { 64, 128, 256, 512, 1024, 2048, 4096, 8192 }; 2975 2976 static struct snd_pcm_hardware snd_hdspm_playback_subinfo = { 2977 .info = (SNDRV_PCM_INFO_MMAP | 2978 SNDRV_PCM_INFO_MMAP_VALID | 2979 SNDRV_PCM_INFO_NONINTERLEAVED | 2980 SNDRV_PCM_INFO_SYNC_START | SNDRV_PCM_INFO_DOUBLE), 2981 .formats = SNDRV_PCM_FMTBIT_S32_LE, 2982 .rates = (SNDRV_PCM_RATE_32000 | 2983 SNDRV_PCM_RATE_44100 | 2984 SNDRV_PCM_RATE_48000 | 2985 SNDRV_PCM_RATE_64000 | 2986 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000), 2987 .rate_min = 32000, 2988 .rate_max = 96000, 2989 .channels_min = 1, 2990 .channels_max = HDSPM_MAX_CHANNELS, 2991 .buffer_bytes_max = 2992 HDSPM_CHANNEL_BUFFER_BYTES * HDSPM_MAX_CHANNELS, 2993 .period_bytes_min = (64 * 4), 2994 .period_bytes_max = (8192 * 4) * HDSPM_MAX_CHANNELS, 2995 .periods_min = 2, 2996 .periods_max = 2, 2997 .fifo_size = 0 2998 }; 2999 3000 static struct snd_pcm_hardware snd_hdspm_capture_subinfo = { 3001 .info = (SNDRV_PCM_INFO_MMAP | 3002 SNDRV_PCM_INFO_MMAP_VALID | 3003 SNDRV_PCM_INFO_NONINTERLEAVED | 3004 SNDRV_PCM_INFO_SYNC_START), 3005 .formats = SNDRV_PCM_FMTBIT_S32_LE, 3006 .rates = (SNDRV_PCM_RATE_32000 | 3007 SNDRV_PCM_RATE_44100 | 3008 SNDRV_PCM_RATE_48000 | 3009 SNDRV_PCM_RATE_64000 | 3010 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000), 3011 .rate_min = 32000, 3012 .rate_max = 96000, 3013 .channels_min = 1, 3014 .channels_max = HDSPM_MAX_CHANNELS, 3015 .buffer_bytes_max = 3016 HDSPM_CHANNEL_BUFFER_BYTES * HDSPM_MAX_CHANNELS, 3017 .period_bytes_min = (64 * 4), 3018 .period_bytes_max = (8192 * 4) * HDSPM_MAX_CHANNELS, 3019 .periods_min = 2, 3020 .periods_max = 2, 3021 .fifo_size = 0 3022 }; 3023 3024 static struct snd_pcm_hw_constraint_list hw_constraints_period_sizes = { 3025 .count = ARRAY_SIZE(period_sizes), 3026 .list = period_sizes, 3027 .mask = 0 3028 }; 3029 3030 3031 static int snd_hdspm_hw_rule_channels_rate(struct snd_pcm_hw_params *params, 3032 struct snd_pcm_hw_rule * rule) 3033 { 3034 struct hdspm *hdspm = rule->private; 3035 struct snd_interval *c = 3036 hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); 3037 struct snd_interval *r = 3038 hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE); 3039 3040 if (r->min > 48000) { 3041 struct snd_interval t = { 3042 .min = 1, 3043 .max = hdspm->ds_channels, 3044 .integer = 1, 3045 }; 3046 return snd_interval_refine(c, &t); 3047 } else if (r->max < 64000) { 3048 struct snd_interval t = { 3049 .min = 1, 3050 .max = hdspm->ss_channels, 3051 .integer = 1, 3052 }; 3053 return snd_interval_refine(c, &t); 3054 } 3055 return 0; 3056 } 3057 3058 static int snd_hdspm_hw_rule_rate_channels(struct snd_pcm_hw_params *params, 3059 struct snd_pcm_hw_rule * rule) 3060 { 3061 struct hdspm *hdspm = rule->private; 3062 struct snd_interval *c = 3063 hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); 3064 struct snd_interval *r = 3065 hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE); 3066 3067 if (c->min <= hdspm->ss_channels) { 3068 struct snd_interval t = { 3069 .min = 32000, 3070 .max = 48000, 3071 .integer = 1, 3072 }; 3073 return snd_interval_refine(r, &t); 3074 } else if (c->max > hdspm->ss_channels) { 3075 struct snd_interval t = { 3076 .min = 64000, 3077 .max = 96000, 3078 .integer = 1, 3079 }; 3080 3081 return snd_interval_refine(r, &t); 3082 } 3083 return 0; 3084 } 3085 3086 static int snd_hdspm_playback_open(struct snd_pcm_substream *substream) 3087 { 3088 struct hdspm *hdspm = snd_pcm_substream_chip(substream); 3089 struct snd_pcm_runtime *runtime = substream->runtime; 3090 3091 snd_printdd("Open device substream %d\n", substream->stream); 3092 3093 spin_lock_irq(&hdspm->lock); 3094 3095 snd_pcm_set_sync(substream); 3096 3097 runtime->hw = snd_hdspm_playback_subinfo; 3098 3099 if (hdspm->capture_substream == NULL) 3100 hdspm_stop_audio(hdspm); 3101 3102 hdspm->playback_pid = current->pid; 3103 hdspm->playback_substream = substream; 3104 3105 spin_unlock_irq(&hdspm->lock); 3106 3107 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 3108 3109 snd_pcm_hw_constraint_list(runtime, 0, 3110 SNDRV_PCM_HW_PARAM_PERIOD_SIZE, 3111 &hw_constraints_period_sizes); 3112 3113 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 3114 snd_hdspm_hw_rule_channels_rate, hdspm, 3115 SNDRV_PCM_HW_PARAM_RATE, -1); 3116 3117 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 3118 snd_hdspm_hw_rule_rate_channels, hdspm, 3119 SNDRV_PCM_HW_PARAM_CHANNELS, -1); 3120 3121 return 0; 3122 } 3123 3124 static int snd_hdspm_playback_release(struct snd_pcm_substream *substream) 3125 { 3126 struct hdspm *hdspm = snd_pcm_substream_chip(substream); 3127 3128 spin_lock_irq(&hdspm->lock); 3129 3130 hdspm->playback_pid = -1; 3131 hdspm->playback_substream = NULL; 3132 3133 spin_unlock_irq(&hdspm->lock); 3134 3135 return 0; 3136 } 3137 3138 3139 static int snd_hdspm_capture_open(struct snd_pcm_substream *substream) 3140 { 3141 struct hdspm *hdspm = snd_pcm_substream_chip(substream); 3142 struct snd_pcm_runtime *runtime = substream->runtime; 3143 3144 spin_lock_irq(&hdspm->lock); 3145 snd_pcm_set_sync(substream); 3146 runtime->hw = snd_hdspm_capture_subinfo; 3147 3148 if (hdspm->playback_substream == NULL) 3149 hdspm_stop_audio(hdspm); 3150 3151 hdspm->capture_pid = current->pid; 3152 hdspm->capture_substream = substream; 3153 3154 spin_unlock_irq(&hdspm->lock); 3155 3156 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 3157 snd_pcm_hw_constraint_list(runtime, 0, 3158 SNDRV_PCM_HW_PARAM_PERIOD_SIZE, 3159 &hw_constraints_period_sizes); 3160 3161 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 3162 snd_hdspm_hw_rule_channels_rate, hdspm, 3163 SNDRV_PCM_HW_PARAM_RATE, -1); 3164 3165 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 3166 snd_hdspm_hw_rule_rate_channels, hdspm, 3167 SNDRV_PCM_HW_PARAM_CHANNELS, -1); 3168 return 0; 3169 } 3170 3171 static int snd_hdspm_capture_release(struct snd_pcm_substream *substream) 3172 { 3173 struct hdspm *hdspm = snd_pcm_substream_chip(substream); 3174 3175 spin_lock_irq(&hdspm->lock); 3176 3177 hdspm->capture_pid = -1; 3178 hdspm->capture_substream = NULL; 3179 3180 spin_unlock_irq(&hdspm->lock); 3181 return 0; 3182 } 3183 3184 static int snd_hdspm_hwdep_dummy_op(struct snd_hwdep * hw, struct file *file) 3185 { 3186 /* we have nothing to initialize but the call is required */ 3187 return 0; 3188 } 3189 3190 3191 static int snd_hdspm_hwdep_ioctl(struct snd_hwdep * hw, struct file *file, 3192 unsigned int cmd, unsigned long arg) 3193 { 3194 struct hdspm *hdspm = (struct hdspm *) hw->private_data; 3195 struct hdspm_mixer_ioctl mixer; 3196 struct hdspm_config_info info; 3197 struct hdspm_version hdspm_version; 3198 struct hdspm_peak_rms_ioctl rms; 3199 3200 switch (cmd) { 3201 3202 3203 case SNDRV_HDSPM_IOCTL_GET_PEAK_RMS: 3204 if (copy_from_user(&rms, (void __user *)arg, sizeof(rms))) 3205 return -EFAULT; 3206 /* maybe there is a chance to memorymap in future so dont touch just copy */ 3207 if(copy_to_user_fromio((void __user *)rms.peak, 3208 hdspm->iobase+HDSPM_MADI_peakrmsbase, 3209 sizeof(struct hdspm_peak_rms)) != 0 ) 3210 return -EFAULT; 3211 3212 break; 3213 3214 3215 case SNDRV_HDSPM_IOCTL_GET_CONFIG_INFO: 3216 3217 spin_lock_irq(&hdspm->lock); 3218 info.pref_sync_ref = 3219 (unsigned char) hdspm_pref_sync_ref(hdspm); 3220 info.wordclock_sync_check = 3221 (unsigned char) hdspm_wc_sync_check(hdspm); 3222 3223 info.system_sample_rate = hdspm->system_sample_rate; 3224 info.autosync_sample_rate = 3225 hdspm_external_sample_rate(hdspm); 3226 info.system_clock_mode = 3227 (unsigned char) hdspm_system_clock_mode(hdspm); 3228 info.clock_source = 3229 (unsigned char) hdspm_clock_source(hdspm); 3230 info.autosync_ref = 3231 (unsigned char) hdspm_autosync_ref(hdspm); 3232 info.line_out = (unsigned char) hdspm_line_out(hdspm); 3233 info.passthru = 0; 3234 spin_unlock_irq(&hdspm->lock); 3235 if (copy_to_user((void __user *) arg, &info, sizeof(info))) 3236 return -EFAULT; 3237 break; 3238 3239 case SNDRV_HDSPM_IOCTL_GET_VERSION: 3240 hdspm_version.firmware_rev = hdspm->firmware_rev; 3241 if (copy_to_user((void __user *) arg, &hdspm_version, 3242 sizeof(hdspm_version))) 3243 return -EFAULT; 3244 break; 3245 3246 case SNDRV_HDSPM_IOCTL_GET_MIXER: 3247 if (copy_from_user(&mixer, (void __user *)arg, sizeof(mixer))) 3248 return -EFAULT; 3249 if (copy_to_user 3250 ((void __user *)mixer.mixer, hdspm->mixer, sizeof(struct hdspm_mixer))) 3251 return -EFAULT; 3252 break; 3253 3254 default: 3255 return -EINVAL; 3256 } 3257 return 0; 3258 } 3259 3260 static struct snd_pcm_ops snd_hdspm_playback_ops = { 3261 .open = snd_hdspm_playback_open, 3262 .close = snd_hdspm_playback_release, 3263 .ioctl = snd_hdspm_ioctl, 3264 .hw_params = snd_hdspm_hw_params, 3265 .hw_free = snd_hdspm_hw_free, 3266 .prepare = snd_hdspm_prepare, 3267 .trigger = snd_hdspm_trigger, 3268 .pointer = snd_hdspm_hw_pointer, 3269 .copy = snd_hdspm_playback_copy, 3270 .silence = snd_hdspm_hw_silence, 3271 .page = snd_pcm_sgbuf_ops_page, 3272 }; 3273 3274 static struct snd_pcm_ops snd_hdspm_capture_ops = { 3275 .open = snd_hdspm_capture_open, 3276 .close = snd_hdspm_capture_release, 3277 .ioctl = snd_hdspm_ioctl, 3278 .hw_params = snd_hdspm_hw_params, 3279 .hw_free = snd_hdspm_hw_free, 3280 .prepare = snd_hdspm_prepare, 3281 .trigger = snd_hdspm_trigger, 3282 .pointer = snd_hdspm_hw_pointer, 3283 .copy = snd_hdspm_capture_copy, 3284 .page = snd_pcm_sgbuf_ops_page, 3285 }; 3286 3287 static int __devinit snd_hdspm_create_hwdep(struct snd_card *card, 3288 struct hdspm * hdspm) 3289 { 3290 struct snd_hwdep *hw; 3291 int err; 3292 3293 if ((err = snd_hwdep_new(card, "HDSPM hwdep", 0, &hw)) < 0) 3294 return err; 3295 3296 hdspm->hwdep = hw; 3297 hw->private_data = hdspm; 3298 strcpy(hw->name, "HDSPM hwdep interface"); 3299 3300 hw->ops.open = snd_hdspm_hwdep_dummy_op; 3301 hw->ops.ioctl = snd_hdspm_hwdep_ioctl; 3302 hw->ops.release = snd_hdspm_hwdep_dummy_op; 3303 3304 return 0; 3305 } 3306 3307 3308 /*------------------------------------------------------------ 3309 memory interface 3310 ------------------------------------------------------------*/ 3311 static int __devinit snd_hdspm_preallocate_memory(struct hdspm * hdspm) 3312 { 3313 int err; 3314 struct snd_pcm *pcm; 3315 size_t wanted; 3316 3317 pcm = hdspm->pcm; 3318 3319 wanted = HDSPM_DMA_AREA_BYTES + 4096; /* dont know why, but it works */ 3320 3321 if ((err = 3322 snd_pcm_lib_preallocate_pages_for_all(pcm, 3323 SNDRV_DMA_TYPE_DEV_SG, 3324 snd_dma_pci_data(hdspm->pci), 3325 wanted, 3326 wanted)) < 0) { 3327 snd_printdd("Could not preallocate %zd Bytes\n", wanted); 3328 3329 return err; 3330 } else 3331 snd_printdd(" Preallocated %zd Bytes\n", wanted); 3332 3333 return 0; 3334 } 3335 3336 static void hdspm_set_sgbuf(struct hdspm * hdspm, struct snd_sg_buf *sgbuf, 3337 unsigned int reg, int channels) 3338 { 3339 int i; 3340 for (i = 0; i < (channels * 16); i++) 3341 hdspm_write(hdspm, reg + 4 * i, 3342 snd_pcm_sgbuf_get_addr(sgbuf, 3343 (size_t) 4096 * i)); 3344 } 3345 3346 /* ------------- ALSA Devices ---------------------------- */ 3347 static int __devinit snd_hdspm_create_pcm(struct snd_card *card, 3348 struct hdspm * hdspm) 3349 { 3350 struct snd_pcm *pcm; 3351 int err; 3352 3353 if ((err = snd_pcm_new(card, hdspm->card_name, 0, 1, 1, &pcm)) < 0) 3354 return err; 3355 3356 hdspm->pcm = pcm; 3357 pcm->private_data = hdspm; 3358 strcpy(pcm->name, hdspm->card_name); 3359 3360 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, 3361 &snd_hdspm_playback_ops); 3362 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, 3363 &snd_hdspm_capture_ops); 3364 3365 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX; 3366 3367 if ((err = snd_hdspm_preallocate_memory(hdspm)) < 0) 3368 return err; 3369 3370 return 0; 3371 } 3372 3373 static inline void snd_hdspm_initialize_midi_flush(struct hdspm * hdspm) 3374 { 3375 snd_hdspm_flush_midi_input(hdspm, 0); 3376 snd_hdspm_flush_midi_input(hdspm, 1); 3377 } 3378 3379 static int __devinit snd_hdspm_create_alsa_devices(struct snd_card *card, 3380 struct hdspm * hdspm) 3381 { 3382 int err; 3383 3384 snd_printdd("Create card...\n"); 3385 if ((err = snd_hdspm_create_pcm(card, hdspm)) < 0) 3386 return err; 3387 3388 if ((err = snd_hdspm_create_midi(card, hdspm, 0)) < 0) 3389 return err; 3390 3391 if ((err = snd_hdspm_create_midi(card, hdspm, 1)) < 0) 3392 return err; 3393 3394 if ((err = snd_hdspm_create_controls(card, hdspm)) < 0) 3395 return err; 3396 3397 if ((err = snd_hdspm_create_hwdep(card, hdspm)) < 0) 3398 return err; 3399 3400 snd_printdd("proc init...\n"); 3401 snd_hdspm_proc_init(hdspm); 3402 3403 hdspm->system_sample_rate = -1; 3404 hdspm->last_external_sample_rate = -1; 3405 hdspm->last_internal_sample_rate = -1; 3406 hdspm->playback_pid = -1; 3407 hdspm->capture_pid = -1; 3408 hdspm->capture_substream = NULL; 3409 hdspm->playback_substream = NULL; 3410 3411 snd_printdd("Set defaults...\n"); 3412 if ((err = snd_hdspm_set_defaults(hdspm)) < 0) 3413 return err; 3414 3415 snd_printdd("Update mixer controls...\n"); 3416 hdspm_update_simple_mixer_controls(hdspm); 3417 3418 snd_printdd("Initializeing complete ???\n"); 3419 3420 if ((err = snd_card_register(card)) < 0) { 3421 snd_printk(KERN_ERR "HDSPM: error registering card\n"); 3422 return err; 3423 } 3424 3425 snd_printdd("... yes now\n"); 3426 3427 return 0; 3428 } 3429 3430 static int __devinit snd_hdspm_create(struct snd_card *card, struct hdspm * hdspm, 3431 int precise_ptr, int enable_monitor) 3432 { 3433 struct pci_dev *pci = hdspm->pci; 3434 int err; 3435 int i; 3436 3437 unsigned long io_extent; 3438 3439 hdspm->irq = -1; 3440 hdspm->irq_count = 0; 3441 3442 hdspm->midi[0].rmidi = NULL; 3443 hdspm->midi[1].rmidi = NULL; 3444 hdspm->midi[0].input = NULL; 3445 hdspm->midi[1].input = NULL; 3446 hdspm->midi[0].output = NULL; 3447 hdspm->midi[1].output = NULL; 3448 spin_lock_init(&hdspm->midi[0].lock); 3449 spin_lock_init(&hdspm->midi[1].lock); 3450 hdspm->iobase = NULL; 3451 hdspm->control_register = 0; 3452 hdspm->control2_register = 0; 3453 3454 hdspm->playback_buffer = NULL; 3455 hdspm->capture_buffer = NULL; 3456 3457 for (i = 0; i < HDSPM_MAX_CHANNELS; ++i) 3458 hdspm->playback_mixer_ctls[i] = NULL; 3459 hdspm->mixer = NULL; 3460 3461 hdspm->card = card; 3462 3463 spin_lock_init(&hdspm->lock); 3464 3465 tasklet_init(&hdspm->midi_tasklet, 3466 hdspm_midi_tasklet, (unsigned long) hdspm); 3467 3468 pci_read_config_word(hdspm->pci, 3469 PCI_CLASS_REVISION, &hdspm->firmware_rev); 3470 3471 strcpy(card->driver, "HDSPM"); 3472 strcpy(card->mixername, "Xilinx FPGA"); 3473 hdspm->card_name = "RME HDSPM MADI"; 3474 3475 if ((err = pci_enable_device(pci)) < 0) 3476 return err; 3477 3478 pci_set_master(hdspm->pci); 3479 3480 if ((err = pci_request_regions(pci, "hdspm")) < 0) 3481 return err; 3482 3483 hdspm->port = pci_resource_start(pci, 0); 3484 io_extent = pci_resource_len(pci, 0); 3485 3486 snd_printdd("grabbed memory region 0x%lx-0x%lx\n", 3487 hdspm->port, hdspm->port + io_extent - 1); 3488 3489 3490 if ((hdspm->iobase = ioremap_nocache(hdspm->port, io_extent)) == NULL) { 3491 snd_printk(KERN_ERR "HDSPM: unable to remap region 0x%lx-0x%lx\n", 3492 hdspm->port, hdspm->port + io_extent - 1); 3493 return -EBUSY; 3494 } 3495 snd_printdd("remapped region (0x%lx) 0x%lx-0x%lx\n", 3496 (unsigned long)hdspm->iobase, hdspm->port, 3497 hdspm->port + io_extent - 1); 3498 3499 if (request_irq(pci->irq, snd_hdspm_interrupt, 3500 SA_INTERRUPT | SA_SHIRQ, "hdspm", 3501 (void *) hdspm)) { 3502 snd_printk(KERN_ERR "HDSPM: unable to use IRQ %d\n", pci->irq); 3503 return -EBUSY; 3504 } 3505 3506 snd_printdd("use IRQ %d\n", pci->irq); 3507 3508 hdspm->irq = pci->irq; 3509 hdspm->precise_ptr = precise_ptr; 3510 3511 hdspm->monitor_outs = enable_monitor; 3512 3513 snd_printdd("kmalloc Mixer memory of %zd Bytes\n", 3514 sizeof(struct hdspm_mixer)); 3515 if ((hdspm->mixer = kmalloc(sizeof(struct hdspm_mixer), GFP_KERNEL)) 3516 == NULL) { 3517 snd_printk(KERN_ERR "HDSPM: unable to kmalloc Mixer memory of %d Bytes\n", 3518 (int)sizeof(struct hdspm_mixer)); 3519 return err; 3520 } 3521 3522 hdspm->ss_channels = MADI_SS_CHANNELS; 3523 hdspm->ds_channels = MADI_DS_CHANNELS; 3524 hdspm->qs_channels = MADI_QS_CHANNELS; 3525 3526 snd_printdd("create alsa devices.\n"); 3527 if ((err = snd_hdspm_create_alsa_devices(card, hdspm)) < 0) 3528 return err; 3529 3530 snd_hdspm_initialize_midi_flush(hdspm); 3531 3532 return 0; 3533 } 3534 3535 static int snd_hdspm_free(struct hdspm * hdspm) 3536 { 3537 3538 if (hdspm->port) { 3539 3540 /* stop th audio, and cancel all interrupts */ 3541 hdspm->control_register &= 3542 ~(HDSPM_Start | HDSPM_AudioInterruptEnable 3543 | HDSPM_Midi0InterruptEnable | 3544 HDSPM_Midi1InterruptEnable); 3545 hdspm_write(hdspm, HDSPM_controlRegister, 3546 hdspm->control_register); 3547 } 3548 3549 if (hdspm->irq >= 0) 3550 free_irq(hdspm->irq, (void *) hdspm); 3551 3552 3553 kfree(hdspm->mixer); 3554 3555 if (hdspm->iobase) 3556 iounmap(hdspm->iobase); 3557 3558 if (hdspm->port) 3559 pci_release_regions(hdspm->pci); 3560 3561 pci_disable_device(hdspm->pci); 3562 return 0; 3563 } 3564 3565 static void snd_hdspm_card_free(struct snd_card *card) 3566 { 3567 struct hdspm *hdspm = (struct hdspm *) card->private_data; 3568 3569 if (hdspm) 3570 snd_hdspm_free(hdspm); 3571 } 3572 3573 static int __devinit snd_hdspm_probe(struct pci_dev *pci, 3574 const struct pci_device_id *pci_id) 3575 { 3576 static int dev; 3577 struct hdspm *hdspm; 3578 struct snd_card *card; 3579 int err; 3580 3581 if (dev >= SNDRV_CARDS) 3582 return -ENODEV; 3583 if (!enable[dev]) { 3584 dev++; 3585 return -ENOENT; 3586 } 3587 3588 if (!(card = snd_card_new(index[dev], id[dev], 3589 THIS_MODULE, sizeof(struct hdspm)))) 3590 return -ENOMEM; 3591 3592 hdspm = (struct hdspm *) card->private_data; 3593 card->private_free = snd_hdspm_card_free; 3594 hdspm->dev = dev; 3595 hdspm->pci = pci; 3596 3597 if ((err = 3598 snd_hdspm_create(card, hdspm, precise_ptr[dev], 3599 enable_monitor[dev])) < 0) { 3600 snd_card_free(card); 3601 return err; 3602 } 3603 3604 strcpy(card->shortname, "HDSPM MADI"); 3605 sprintf(card->longname, "%s at 0x%lx, irq %d", hdspm->card_name, 3606 hdspm->port, hdspm->irq); 3607 3608 if ((err = snd_card_register(card)) < 0) { 3609 snd_card_free(card); 3610 return err; 3611 } 3612 3613 pci_set_drvdata(pci, card); 3614 3615 dev++; 3616 return 0; 3617 } 3618 3619 static void __devexit snd_hdspm_remove(struct pci_dev *pci) 3620 { 3621 snd_card_free(pci_get_drvdata(pci)); 3622 pci_set_drvdata(pci, NULL); 3623 } 3624 3625 static struct pci_driver driver = { 3626 .name = "RME Hammerfall DSP MADI", 3627 .id_table = snd_hdspm_ids, 3628 .probe = snd_hdspm_probe, 3629 .remove = __devexit_p(snd_hdspm_remove), 3630 }; 3631 3632 3633 static int __init alsa_card_hdspm_init(void) 3634 { 3635 return pci_register_driver(&driver); 3636 } 3637 3638 static void __exit alsa_card_hdspm_exit(void) 3639 { 3640 pci_unregister_driver(&driver); 3641 } 3642 3643 module_init(alsa_card_hdspm_init) 3644 module_exit(alsa_card_hdspm_exit) 3645