1 /* 2 * C-Media CMI8788 driver for Asus Xonar cards 3 * 4 * Copyright (c) Clemens Ladisch <clemens@ladisch.de> 5 * 6 * 7 * This driver is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License, version 2. 9 * 10 * This driver is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this driver; if not, write to the Free Software 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 18 */ 19 20 /* 21 * Xonar D2/D2X 22 * ------------ 23 * 24 * CMI8788: 25 * 26 * SPI 0 -> 1st PCM1796 (front) 27 * SPI 1 -> 2nd PCM1796 (surround) 28 * SPI 2 -> 3rd PCM1796 (center/LFE) 29 * SPI 4 -> 4th PCM1796 (back) 30 * 31 * GPIO 2 -> M0 of CS5381 32 * GPIO 3 -> M1 of CS5381 33 * GPIO 5 <- external power present (D2X only) 34 * GPIO 7 -> ALT 35 * GPIO 8 -> enable output to speakers 36 */ 37 38 /* 39 * Xonar DX 40 * -------- 41 * 42 * CMI8788: 43 * 44 * I²C <-> CS4398 (front) 45 * <-> CS4362A (surround, center/LFE, back) 46 * 47 * GPI 0 <- external power present 48 * 49 * GPIO 0 -> enable output to speakers 50 * GPIO 1 -> ? 51 * GPIO 2 -> M0 of CS5361 52 * GPIO 3 -> M1 of CS5361 53 * GPIO 8 -> route input jack to line-in (0) or mic-in (1) 54 * 55 * CS4398: 56 * 57 * AD0 <- 1 58 * AD1 <- 1 59 * 60 * CS4362A: 61 * 62 * AD0 <- 0 63 */ 64 65 #include <linux/pci.h> 66 #include <linux/delay.h> 67 #include <linux/mutex.h> 68 #include <sound/ac97_codec.h> 69 #include <sound/control.h> 70 #include <sound/core.h> 71 #include <sound/initval.h> 72 #include <sound/pcm.h> 73 #include <sound/tlv.h> 74 #include "oxygen.h" 75 #include "cm9780.h" 76 #include "pcm1796.h" 77 #include "cs4398.h" 78 #include "cs4362a.h" 79 80 MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>"); 81 MODULE_DESCRIPTION("Asus AVx00 driver"); 82 MODULE_LICENSE("GPL"); 83 MODULE_SUPPORTED_DEVICE("{{Asus,AV100},{Asus,AV200}}"); 84 85 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; 86 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; 87 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; 88 89 module_param_array(index, int, NULL, 0444); 90 MODULE_PARM_DESC(index, "card index"); 91 module_param_array(id, charp, NULL, 0444); 92 MODULE_PARM_DESC(id, "ID string"); 93 module_param_array(enable, bool, NULL, 0444); 94 MODULE_PARM_DESC(enable, "enable card"); 95 96 enum { 97 MODEL_D2, 98 MODEL_D2X, 99 MODEL_DX, 100 }; 101 102 static struct pci_device_id xonar_ids[] __devinitdata = { 103 { OXYGEN_PCI_SUBID(0x1043, 0x8269), .driver_data = MODEL_D2 }, 104 { OXYGEN_PCI_SUBID(0x1043, 0x8275), .driver_data = MODEL_DX }, 105 { OXYGEN_PCI_SUBID(0x1043, 0x82b7), .driver_data = MODEL_D2X }, 106 { } 107 }; 108 MODULE_DEVICE_TABLE(pci, xonar_ids); 109 110 111 #define GPIO_CS53x1_M_MASK 0x000c 112 #define GPIO_CS53x1_M_SINGLE 0x0000 113 #define GPIO_CS53x1_M_DOUBLE 0x0004 114 #define GPIO_CS53x1_M_QUAD 0x0008 115 116 #define GPIO_D2X_EXT_POWER 0x0020 117 #define GPIO_D2_ALT 0x0080 118 #define GPIO_D2_OUTPUT_ENABLE 0x0100 119 120 #define GPI_DX_EXT_POWER 0x01 121 #define GPIO_DX_OUTPUT_ENABLE 0x0001 122 #define GPIO_DX_UNKNOWN1 0x0002 123 #define GPIO_DX_INPUT_ROUTE 0x0100 124 125 #define I2C_DEVICE_CS4398 0x9e /* 10011, AD1=1, AD0=1, /W=0 */ 126 #define I2C_DEVICE_CS4362A 0x30 /* 001100, AD0=0, /W=0 */ 127 128 struct xonar_data { 129 unsigned int anti_pop_delay; 130 u16 output_enable_bit; 131 u8 ext_power_reg; 132 u8 ext_power_int_reg; 133 u8 ext_power_bit; 134 u8 has_power; 135 }; 136 137 static void pcm1796_write(struct oxygen *chip, unsigned int codec, 138 u8 reg, u8 value) 139 { 140 /* maps ALSA channel pair number to SPI output */ 141 static const u8 codec_map[4] = { 142 0, 1, 2, 4 143 }; 144 oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER | 145 OXYGEN_SPI_DATA_LENGTH_2 | 146 OXYGEN_SPI_CLOCK_160 | 147 (codec_map[codec] << OXYGEN_SPI_CODEC_SHIFT) | 148 OXYGEN_SPI_CEN_LATCH_CLOCK_HI, 149 (reg << 8) | value); 150 } 151 152 static void cs4398_write(struct oxygen *chip, u8 reg, u8 value) 153 { 154 oxygen_write_i2c(chip, I2C_DEVICE_CS4398, reg, value); 155 } 156 157 static void cs4362a_write(struct oxygen *chip, u8 reg, u8 value) 158 { 159 oxygen_write_i2c(chip, I2C_DEVICE_CS4362A, reg, value); 160 } 161 162 static void xonar_common_init(struct oxygen *chip) 163 { 164 struct xonar_data *data = chip->model_data; 165 166 if (data->ext_power_reg) { 167 oxygen_set_bits8(chip, data->ext_power_int_reg, 168 data->ext_power_bit); 169 chip->interrupt_mask |= OXYGEN_INT_GPIO; 170 data->has_power = !!(oxygen_read8(chip, data->ext_power_reg) 171 & data->ext_power_bit); 172 } 173 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CS53x1_M_MASK); 174 oxygen_write16_masked(chip, OXYGEN_GPIO_DATA, 175 GPIO_CS53x1_M_SINGLE, GPIO_CS53x1_M_MASK); 176 oxygen_ac97_set_bits(chip, 0, CM9780_JACK, CM9780_FMIC2MIC); 177 msleep(data->anti_pop_delay); 178 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, data->output_enable_bit); 179 oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, data->output_enable_bit); 180 } 181 182 static void xonar_d2_init(struct oxygen *chip) 183 { 184 struct xonar_data *data = chip->model_data; 185 unsigned int i; 186 187 data->anti_pop_delay = 300; 188 data->output_enable_bit = GPIO_D2_OUTPUT_ENABLE; 189 190 for (i = 0; i < 4; ++i) { 191 pcm1796_write(chip, i, 18, PCM1796_FMT_24_LJUST | PCM1796_ATLD); 192 pcm1796_write(chip, i, 19, PCM1796_FLT_SHARP | PCM1796_ATS_1); 193 pcm1796_write(chip, i, 20, PCM1796_OS_64); 194 pcm1796_write(chip, i, 21, 0); 195 pcm1796_write(chip, i, 16, 0xff); /* set ATL/ATR after ATLD */ 196 pcm1796_write(chip, i, 17, 0xff); 197 } 198 199 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_D2_ALT); 200 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_D2_ALT); 201 202 xonar_common_init(chip); 203 204 snd_component_add(chip->card, "PCM1796"); 205 snd_component_add(chip->card, "CS5381"); 206 } 207 208 static void xonar_d2x_init(struct oxygen *chip) 209 { 210 struct xonar_data *data = chip->model_data; 211 212 data->ext_power_reg = OXYGEN_GPIO_DATA; 213 data->ext_power_int_reg = OXYGEN_GPIO_INTERRUPT_MASK; 214 data->ext_power_bit = GPIO_D2X_EXT_POWER; 215 oxygen_clear_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_D2X_EXT_POWER); 216 xonar_d2_init(chip); 217 } 218 219 static void xonar_dx_init(struct oxygen *chip) 220 { 221 struct xonar_data *data = chip->model_data; 222 unsigned int i; 223 224 for (i = 0; i < 8; ++i) 225 chip->dac_volume[i] = 127; 226 data->anti_pop_delay = 800; 227 data->output_enable_bit = GPIO_DX_OUTPUT_ENABLE; 228 data->ext_power_reg = OXYGEN_GPI_DATA; 229 data->ext_power_int_reg = OXYGEN_GPI_INTERRUPT_MASK; 230 data->ext_power_bit = GPI_DX_EXT_POWER; 231 232 /* XXX the DACs' datasheets say fast mode is not allowed */ 233 oxygen_set_bits16(chip, OXYGEN_2WIRE_BUS_STATUS, 234 OXYGEN_2WIRE_SPEED_FAST); 235 236 /* set CPEN (control port mode) and power down */ 237 cs4398_write(chip, 8, CS4398_CPEN | CS4398_PDN); 238 cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN); 239 /* configure */ 240 cs4398_write(chip, 2, CS4398_FM_SINGLE | 241 CS4398_DEM_NONE | CS4398_DIF_LJUST); 242 cs4398_write(chip, 3, CS4398_ATAPI_B_R | CS4398_ATAPI_A_L); 243 cs4398_write(chip, 4, CS4398_MUTEP_LOW | CS4398_PAMUTE); 244 cs4398_write(chip, 5, 0); 245 cs4398_write(chip, 6, 0); 246 cs4398_write(chip, 7, CS4398_RMP_DN | CS4398_RMP_UP | 247 CS4398_ZERO_CROSS | CS4398_SOFT_RAMP); 248 cs4362a_write(chip, 0x02, CS4362A_DIF_LJUST); 249 cs4362a_write(chip, 0x03, CS4362A_MUTEC_6 | CS4362A_AMUTE | 250 CS4362A_RMP_UP | CS4362A_ZERO_CROSS | CS4362A_SOFT_RAMP); 251 cs4362a_write(chip, 0x04, CS4362A_RMP_DN | CS4362A_DEM_NONE); 252 cs4362a_write(chip, 0x05, 0); 253 cs4362a_write(chip, 0x06, CS4362A_FM_SINGLE | 254 CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L); 255 cs4362a_write(chip, 0x09, CS4362A_FM_SINGLE | 256 CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L); 257 cs4362a_write(chip, 0x0c, CS4362A_FM_SINGLE | 258 CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L); 259 cs4362a_write(chip, 0x07, 0); 260 cs4362a_write(chip, 0x08, 0); 261 cs4362a_write(chip, 0x0a, 0); 262 cs4362a_write(chip, 0x0b, 0); 263 cs4362a_write(chip, 0x0d, 0); 264 cs4362a_write(chip, 0x0e, 0); 265 /* clear power down */ 266 cs4398_write(chip, 8, CS4398_CPEN); 267 cs4362a_write(chip, 0x01, CS4362A_CPEN); 268 269 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, 270 GPIO_DX_UNKNOWN1 | GPIO_DX_INPUT_ROUTE); 271 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_DX_INPUT_ROUTE); 272 273 xonar_common_init(chip); 274 275 snd_component_add(chip->card, "CS4398"); 276 snd_component_add(chip->card, "CS4362A"); 277 snd_component_add(chip->card, "CS5361"); 278 } 279 280 static void xonar_cleanup(struct oxygen *chip) 281 { 282 struct xonar_data *data = chip->model_data; 283 284 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, data->output_enable_bit); 285 } 286 287 static void xonar_dx_cleanup(struct oxygen *chip) 288 { 289 xonar_cleanup(chip); 290 cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN); 291 oxygen_clear_bits8(chip, OXYGEN_FUNCTION, OXYGEN_FUNCTION_RESET_CODEC); 292 } 293 294 static void set_pcm1796_params(struct oxygen *chip, 295 struct snd_pcm_hw_params *params) 296 { 297 unsigned int i; 298 u8 value; 299 300 value = params_rate(params) >= 96000 ? PCM1796_OS_32 : PCM1796_OS_64; 301 for (i = 0; i < 4; ++i) 302 pcm1796_write(chip, i, 20, value); 303 } 304 305 static void update_pcm1796_volume(struct oxygen *chip) 306 { 307 unsigned int i; 308 309 for (i = 0; i < 4; ++i) { 310 pcm1796_write(chip, i, 16, chip->dac_volume[i * 2]); 311 pcm1796_write(chip, i, 17, chip->dac_volume[i * 2 + 1]); 312 } 313 } 314 315 static void update_pcm1796_mute(struct oxygen *chip) 316 { 317 unsigned int i; 318 u8 value; 319 320 value = PCM1796_FMT_24_LJUST | PCM1796_ATLD; 321 if (chip->dac_mute) 322 value |= PCM1796_MUTE; 323 for (i = 0; i < 4; ++i) 324 pcm1796_write(chip, i, 18, value); 325 } 326 327 static void set_cs53x1_params(struct oxygen *chip, 328 struct snd_pcm_hw_params *params) 329 { 330 unsigned int value; 331 332 if (params_rate(params) <= 54000) 333 value = GPIO_CS53x1_M_SINGLE; 334 else if (params_rate(params) <= 108000) 335 value = GPIO_CS53x1_M_DOUBLE; 336 else 337 value = GPIO_CS53x1_M_QUAD; 338 oxygen_write16_masked(chip, OXYGEN_GPIO_DATA, 339 value, GPIO_CS53x1_M_MASK); 340 } 341 342 static void set_cs43xx_params(struct oxygen *chip, 343 struct snd_pcm_hw_params *params) 344 { 345 u8 fm_cs4398, fm_cs4362a; 346 347 fm_cs4398 = CS4398_DEM_NONE | CS4398_DIF_LJUST; 348 fm_cs4362a = CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L; 349 if (params_rate(params) <= 50000) { 350 fm_cs4398 |= CS4398_FM_SINGLE; 351 fm_cs4362a |= CS4362A_FM_SINGLE; 352 } else if (params_rate(params) <= 100000) { 353 fm_cs4398 |= CS4398_FM_DOUBLE; 354 fm_cs4362a |= CS4362A_FM_DOUBLE; 355 } else { 356 fm_cs4398 |= CS4398_FM_QUAD; 357 fm_cs4362a |= CS4362A_FM_QUAD; 358 } 359 cs4398_write(chip, 2, fm_cs4398); 360 cs4362a_write(chip, 0x06, fm_cs4362a); 361 cs4362a_write(chip, 0x09, fm_cs4362a); 362 cs4362a_write(chip, 0x0c, fm_cs4362a); 363 } 364 365 static void update_cs4362a_volumes(struct oxygen *chip) 366 { 367 u8 mute; 368 369 mute = chip->dac_mute ? CS4362A_MUTE : 0; 370 cs4362a_write(chip, 7, (127 - chip->dac_volume[2]) | mute); 371 cs4362a_write(chip, 8, (127 - chip->dac_volume[3]) | mute); 372 cs4362a_write(chip, 10, (127 - chip->dac_volume[4]) | mute); 373 cs4362a_write(chip, 11, (127 - chip->dac_volume[5]) | mute); 374 cs4362a_write(chip, 13, (127 - chip->dac_volume[6]) | mute); 375 cs4362a_write(chip, 14, (127 - chip->dac_volume[7]) | mute); 376 } 377 378 static void update_cs43xx_volume(struct oxygen *chip) 379 { 380 cs4398_write(chip, 5, (127 - chip->dac_volume[0]) * 2); 381 cs4398_write(chip, 6, (127 - chip->dac_volume[1]) * 2); 382 update_cs4362a_volumes(chip); 383 } 384 385 static void update_cs43xx_mute(struct oxygen *chip) 386 { 387 u8 reg; 388 389 reg = CS4398_MUTEP_LOW | CS4398_PAMUTE; 390 if (chip->dac_mute) 391 reg |= CS4398_MUTE_B | CS4398_MUTE_A; 392 cs4398_write(chip, 4, reg); 393 update_cs4362a_volumes(chip); 394 } 395 396 static void xonar_gpio_changed(struct oxygen *chip) 397 { 398 struct xonar_data *data = chip->model_data; 399 u8 has_power; 400 401 has_power = !!(oxygen_read8(chip, data->ext_power_reg) 402 & data->ext_power_bit); 403 if (has_power != data->has_power) { 404 data->has_power = has_power; 405 if (has_power) { 406 snd_printk(KERN_NOTICE "power restored\n"); 407 } else { 408 snd_printk(KERN_CRIT 409 "Hey! Don't unplug the power cable!\n"); 410 /* TODO: stop PCMs */ 411 } 412 } 413 } 414 415 static int pcm1796_volume_info(struct snd_kcontrol *ctl, 416 struct snd_ctl_elem_info *info) 417 { 418 info->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 419 info->count = 8; 420 info->value.integer.min = 0x0f; 421 info->value.integer.max = 0xff; 422 return 0; 423 } 424 425 static int cs4362a_volume_info(struct snd_kcontrol *ctl, 426 struct snd_ctl_elem_info *info) 427 { 428 info->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 429 info->count = 8; 430 info->value.integer.min = 0; 431 info->value.integer.max = 127; 432 return 0; 433 } 434 435 static int alt_switch_get(struct snd_kcontrol *ctl, 436 struct snd_ctl_elem_value *value) 437 { 438 struct oxygen *chip = ctl->private_data; 439 440 value->value.integer.value[0] = 441 !!(oxygen_read16(chip, OXYGEN_GPIO_DATA) & GPIO_D2_ALT); 442 return 0; 443 } 444 445 static int alt_switch_put(struct snd_kcontrol *ctl, 446 struct snd_ctl_elem_value *value) 447 { 448 struct oxygen *chip = ctl->private_data; 449 u16 old_bits, new_bits; 450 int changed; 451 452 spin_lock_irq(&chip->reg_lock); 453 old_bits = oxygen_read16(chip, OXYGEN_GPIO_DATA); 454 if (value->value.integer.value[0]) 455 new_bits = old_bits | GPIO_D2_ALT; 456 else 457 new_bits = old_bits & ~GPIO_D2_ALT; 458 changed = new_bits != old_bits; 459 if (changed) 460 oxygen_write16(chip, OXYGEN_GPIO_DATA, new_bits); 461 spin_unlock_irq(&chip->reg_lock); 462 return changed; 463 } 464 465 static const struct snd_kcontrol_new alt_switch = { 466 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 467 .name = "Analog Loopback Switch", 468 .info = snd_ctl_boolean_mono_info, 469 .get = alt_switch_get, 470 .put = alt_switch_put, 471 }; 472 473 static void xonar_dx_ac97_switch(struct oxygen *chip, 474 unsigned int reg, unsigned int mute) 475 { 476 if (reg == AC97_LINE) { 477 spin_lock_irq(&chip->reg_lock); 478 oxygen_write16_masked(chip, OXYGEN_GPIO_DATA, 479 mute ? GPIO_DX_INPUT_ROUTE : 0, 480 GPIO_DX_INPUT_ROUTE); 481 spin_unlock_irq(&chip->reg_lock); 482 } 483 } 484 485 static const DECLARE_TLV_DB_SCALE(pcm1796_db_scale, -12000, 50, 0); 486 static const DECLARE_TLV_DB_SCALE(cs4362a_db_scale, -12700, 100, 0); 487 488 static int xonar_d2_control_filter(struct snd_kcontrol_new *template) 489 { 490 if (!strcmp(template->name, "Master Playback Volume")) { 491 template->access |= SNDRV_CTL_ELEM_ACCESS_TLV_READ; 492 template->info = pcm1796_volume_info; 493 template->tlv.p = pcm1796_db_scale; 494 } else if (!strncmp(template->name, "CD Capture ", 11)) { 495 /* CD in is actually connected to the video in pin */ 496 template->private_value ^= AC97_CD ^ AC97_VIDEO; 497 } 498 return 0; 499 } 500 501 static int xonar_dx_control_filter(struct snd_kcontrol_new *template) 502 { 503 if (!strcmp(template->name, "Master Playback Volume")) { 504 template->access |= SNDRV_CTL_ELEM_ACCESS_TLV_READ; 505 template->info = cs4362a_volume_info; 506 template->tlv.p = cs4362a_db_scale; 507 } else if (!strncmp(template->name, "CD Capture ", 11)) { 508 return 1; /* no CD input */ 509 } 510 return 0; 511 } 512 513 static int xonar_mixer_init(struct oxygen *chip) 514 { 515 return snd_ctl_add(chip->card, snd_ctl_new1(&alt_switch, chip)); 516 } 517 518 static const struct oxygen_model xonar_models[] = { 519 [MODEL_D2] = { 520 .shortname = "Xonar D2", 521 .longname = "Asus Virtuoso 200", 522 .chip = "AV200", 523 .owner = THIS_MODULE, 524 .init = xonar_d2_init, 525 .control_filter = xonar_d2_control_filter, 526 .mixer_init = xonar_mixer_init, 527 .cleanup = xonar_cleanup, 528 .set_dac_params = set_pcm1796_params, 529 .set_adc_params = set_cs53x1_params, 530 .update_dac_volume = update_pcm1796_volume, 531 .update_dac_mute = update_pcm1796_mute, 532 .model_data_size = sizeof(struct xonar_data), 533 .pcm_dev_cfg = PLAYBACK_0_TO_I2S | 534 PLAYBACK_1_TO_SPDIF | 535 CAPTURE_0_FROM_I2S_2 | 536 CAPTURE_1_FROM_SPDIF, 537 .dac_channels = 8, 538 .misc_flags = OXYGEN_MISC_MIDI, 539 .function_flags = OXYGEN_FUNCTION_SPI | 540 OXYGEN_FUNCTION_ENABLE_SPI_4_5, 541 .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST, 542 .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST, 543 }, 544 [MODEL_D2X] = { 545 .shortname = "Xonar D2X", 546 .longname = "Asus Virtuoso 200", 547 .chip = "AV200", 548 .owner = THIS_MODULE, 549 .init = xonar_d2x_init, 550 .control_filter = xonar_d2_control_filter, 551 .mixer_init = xonar_mixer_init, 552 .cleanup = xonar_cleanup, 553 .set_dac_params = set_pcm1796_params, 554 .set_adc_params = set_cs53x1_params, 555 .update_dac_volume = update_pcm1796_volume, 556 .update_dac_mute = update_pcm1796_mute, 557 .gpio_changed = xonar_gpio_changed, 558 .model_data_size = sizeof(struct xonar_data), 559 .pcm_dev_cfg = PLAYBACK_0_TO_I2S | 560 PLAYBACK_1_TO_SPDIF | 561 CAPTURE_0_FROM_I2S_2 | 562 CAPTURE_1_FROM_SPDIF, 563 .dac_channels = 8, 564 .misc_flags = OXYGEN_MISC_MIDI, 565 .function_flags = OXYGEN_FUNCTION_SPI | 566 OXYGEN_FUNCTION_ENABLE_SPI_4_5, 567 .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST, 568 .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST, 569 }, 570 [MODEL_DX] = { 571 .shortname = "Xonar DX", 572 .longname = "Asus Virtuoso 100", 573 .chip = "AV200", 574 .owner = THIS_MODULE, 575 .init = xonar_dx_init, 576 .control_filter = xonar_dx_control_filter, 577 .cleanup = xonar_dx_cleanup, 578 .set_dac_params = set_cs43xx_params, 579 .set_adc_params = set_cs53x1_params, 580 .update_dac_volume = update_cs43xx_volume, 581 .update_dac_mute = update_cs43xx_mute, 582 .gpio_changed = xonar_gpio_changed, 583 .ac97_switch = xonar_dx_ac97_switch, 584 .model_data_size = sizeof(struct xonar_data), 585 .pcm_dev_cfg = PLAYBACK_0_TO_I2S | 586 PLAYBACK_1_TO_SPDIF | 587 CAPTURE_0_FROM_I2S_2, 588 .dac_channels = 8, 589 .function_flags = OXYGEN_FUNCTION_2WIRE, 590 .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST, 591 .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST, 592 }, 593 }; 594 595 static int __devinit xonar_probe(struct pci_dev *pci, 596 const struct pci_device_id *pci_id) 597 { 598 static int dev; 599 int err; 600 601 if (dev >= SNDRV_CARDS) 602 return -ENODEV; 603 if (!enable[dev]) { 604 ++dev; 605 return -ENOENT; 606 } 607 err = oxygen_pci_probe(pci, index[dev], id[dev], 608 &xonar_models[pci_id->driver_data]); 609 if (err >= 0) 610 ++dev; 611 return err; 612 } 613 614 static struct pci_driver xonar_driver = { 615 .name = "AV200", 616 .id_table = xonar_ids, 617 .probe = xonar_probe, 618 .remove = __devexit_p(oxygen_pci_remove), 619 }; 620 621 static int __init alsa_card_xonar_init(void) 622 { 623 return pci_register_driver(&xonar_driver); 624 } 625 626 static void __exit alsa_card_xonar_exit(void) 627 { 628 pci_unregister_driver(&xonar_driver); 629 } 630 631 module_init(alsa_card_xonar_init) 632 module_exit(alsa_card_xonar_exit) 633