1 /* 2 * C-Media CMI8788 driver for Asus Xonar cards 3 * 4 * Copyright (c) Clemens Ladisch <clemens@ladisch.de> 5 * 6 * 7 * This driver is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License, version 2. 9 * 10 * This driver is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this driver; if not, write to the Free Software 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 18 */ 19 20 /* 21 * Xonar D2/D2X 22 * ------------ 23 * 24 * CMI8788: 25 * 26 * SPI 0 -> 1st PCM1796 (front) 27 * SPI 1 -> 2nd PCM1796 (surround) 28 * SPI 2 -> 3rd PCM1796 (center/LFE) 29 * SPI 4 -> 4th PCM1796 (back) 30 * 31 * GPIO 2 -> M0 of CS5381 32 * GPIO 3 -> M1 of CS5381 33 * GPIO 5 <- external power present (D2X only) 34 * GPIO 7 -> ALT 35 * GPIO 8 -> enable output to speakers 36 */ 37 38 /* 39 * Xonar DX 40 * -------- 41 * 42 * CMI8788: 43 * 44 * I²C <-> CS4398 (front) 45 * <-> CS4362A (surround, center/LFE, back) 46 * 47 * GPI 0 <- external power present 48 * 49 * GPIO 0 -> enable output to speakers 50 * GPIO 1 -> enable front panel I/O 51 * GPIO 2 -> M0 of CS5361 52 * GPIO 3 -> M1 of CS5361 53 * GPIO 8 -> route input jack to line-in (0) or mic-in (1) 54 * 55 * CS4398: 56 * 57 * AD0 <- 1 58 * AD1 <- 1 59 * 60 * CS4362A: 61 * 62 * AD0 <- 0 63 */ 64 65 #include <linux/pci.h> 66 #include <linux/delay.h> 67 #include <linux/mutex.h> 68 #include <sound/ac97_codec.h> 69 #include <sound/control.h> 70 #include <sound/core.h> 71 #include <sound/initval.h> 72 #include <sound/pcm.h> 73 #include <sound/tlv.h> 74 #include "oxygen.h" 75 #include "cm9780.h" 76 #include "pcm1796.h" 77 #include "cs4398.h" 78 #include "cs4362a.h" 79 80 MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>"); 81 MODULE_DESCRIPTION("Asus AVx00 driver"); 82 MODULE_LICENSE("GPL"); 83 MODULE_SUPPORTED_DEVICE("{{Asus,AV100},{Asus,AV200}}"); 84 85 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; 86 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; 87 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; 88 89 module_param_array(index, int, NULL, 0444); 90 MODULE_PARM_DESC(index, "card index"); 91 module_param_array(id, charp, NULL, 0444); 92 MODULE_PARM_DESC(id, "ID string"); 93 module_param_array(enable, bool, NULL, 0444); 94 MODULE_PARM_DESC(enable, "enable card"); 95 96 enum { 97 MODEL_D2, 98 MODEL_D2X, 99 MODEL_DX, 100 }; 101 102 static struct pci_device_id xonar_ids[] __devinitdata = { 103 { OXYGEN_PCI_SUBID(0x1043, 0x8269), .driver_data = MODEL_D2 }, 104 { OXYGEN_PCI_SUBID(0x1043, 0x8275), .driver_data = MODEL_DX }, 105 { OXYGEN_PCI_SUBID(0x1043, 0x82b7), .driver_data = MODEL_D2X }, 106 { } 107 }; 108 MODULE_DEVICE_TABLE(pci, xonar_ids); 109 110 111 #define GPIO_CS53x1_M_MASK 0x000c 112 #define GPIO_CS53x1_M_SINGLE 0x0000 113 #define GPIO_CS53x1_M_DOUBLE 0x0004 114 #define GPIO_CS53x1_M_QUAD 0x0008 115 116 #define GPIO_D2X_EXT_POWER 0x0020 117 #define GPIO_D2_ALT 0x0080 118 #define GPIO_D2_OUTPUT_ENABLE 0x0100 119 120 #define GPI_DX_EXT_POWER 0x01 121 #define GPIO_DX_OUTPUT_ENABLE 0x0001 122 #define GPIO_DX_FRONT_PANEL 0x0002 123 #define GPIO_DX_INPUT_ROUTE 0x0100 124 125 #define I2C_DEVICE_CS4398 0x9e /* 10011, AD1=1, AD0=1, /W=0 */ 126 #define I2C_DEVICE_CS4362A 0x30 /* 001100, AD0=0, /W=0 */ 127 128 struct xonar_data { 129 unsigned int anti_pop_delay; 130 u16 output_enable_bit; 131 u8 ext_power_reg; 132 u8 ext_power_int_reg; 133 u8 ext_power_bit; 134 u8 has_power; 135 }; 136 137 static void pcm1796_write(struct oxygen *chip, unsigned int codec, 138 u8 reg, u8 value) 139 { 140 /* maps ALSA channel pair number to SPI output */ 141 static const u8 codec_map[4] = { 142 0, 1, 2, 4 143 }; 144 oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER | 145 OXYGEN_SPI_DATA_LENGTH_2 | 146 OXYGEN_SPI_CLOCK_160 | 147 (codec_map[codec] << OXYGEN_SPI_CODEC_SHIFT) | 148 OXYGEN_SPI_CEN_LATCH_CLOCK_HI, 149 (reg << 8) | value); 150 } 151 152 static void cs4398_write(struct oxygen *chip, u8 reg, u8 value) 153 { 154 oxygen_write_i2c(chip, I2C_DEVICE_CS4398, reg, value); 155 } 156 157 static void cs4362a_write(struct oxygen *chip, u8 reg, u8 value) 158 { 159 oxygen_write_i2c(chip, I2C_DEVICE_CS4362A, reg, value); 160 } 161 162 static void xonar_common_init(struct oxygen *chip) 163 { 164 struct xonar_data *data = chip->model_data; 165 166 if (data->ext_power_reg) { 167 oxygen_set_bits8(chip, data->ext_power_int_reg, 168 data->ext_power_bit); 169 chip->interrupt_mask |= OXYGEN_INT_GPIO; 170 data->has_power = !!(oxygen_read8(chip, data->ext_power_reg) 171 & data->ext_power_bit); 172 } 173 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CS53x1_M_MASK); 174 oxygen_write16_masked(chip, OXYGEN_GPIO_DATA, 175 GPIO_CS53x1_M_SINGLE, GPIO_CS53x1_M_MASK); 176 oxygen_ac97_set_bits(chip, 0, CM9780_JACK, CM9780_FMIC2MIC); 177 msleep(data->anti_pop_delay); 178 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, data->output_enable_bit); 179 oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, data->output_enable_bit); 180 } 181 182 static void xonar_d2_init(struct oxygen *chip) 183 { 184 struct xonar_data *data = chip->model_data; 185 unsigned int i; 186 187 data->anti_pop_delay = 300; 188 data->output_enable_bit = GPIO_D2_OUTPUT_ENABLE; 189 190 for (i = 0; i < 4; ++i) { 191 pcm1796_write(chip, i, 18, PCM1796_FMT_24_LJUST | PCM1796_ATLD); 192 pcm1796_write(chip, i, 19, PCM1796_FLT_SHARP | PCM1796_ATS_1); 193 pcm1796_write(chip, i, 20, PCM1796_OS_64); 194 pcm1796_write(chip, i, 21, 0); 195 pcm1796_write(chip, i, 16, 0xff); /* set ATL/ATR after ATLD */ 196 pcm1796_write(chip, i, 17, 0xff); 197 } 198 199 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_D2_ALT); 200 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_D2_ALT); 201 202 xonar_common_init(chip); 203 204 snd_component_add(chip->card, "PCM1796"); 205 snd_component_add(chip->card, "CS5381"); 206 } 207 208 static void xonar_d2x_init(struct oxygen *chip) 209 { 210 struct xonar_data *data = chip->model_data; 211 212 data->ext_power_reg = OXYGEN_GPIO_DATA; 213 data->ext_power_int_reg = OXYGEN_GPIO_INTERRUPT_MASK; 214 data->ext_power_bit = GPIO_D2X_EXT_POWER; 215 oxygen_clear_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_D2X_EXT_POWER); 216 xonar_d2_init(chip); 217 } 218 219 static void xonar_dx_init(struct oxygen *chip) 220 { 221 struct xonar_data *data = chip->model_data; 222 223 data->anti_pop_delay = 800; 224 data->output_enable_bit = GPIO_DX_OUTPUT_ENABLE; 225 data->ext_power_reg = OXYGEN_GPI_DATA; 226 data->ext_power_int_reg = OXYGEN_GPI_INTERRUPT_MASK; 227 data->ext_power_bit = GPI_DX_EXT_POWER; 228 229 oxygen_write16(chip, OXYGEN_2WIRE_BUS_STATUS, 230 OXYGEN_2WIRE_LENGTH_8 | 231 OXYGEN_2WIRE_INTERRUPT_MASK | 232 OXYGEN_2WIRE_SPEED_FAST); 233 234 /* set CPEN (control port mode) and power down */ 235 cs4398_write(chip, 8, CS4398_CPEN | CS4398_PDN); 236 cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN); 237 /* configure */ 238 cs4398_write(chip, 2, CS4398_FM_SINGLE | 239 CS4398_DEM_NONE | CS4398_DIF_LJUST); 240 cs4398_write(chip, 3, CS4398_ATAPI_B_R | CS4398_ATAPI_A_L); 241 cs4398_write(chip, 4, CS4398_MUTEP_LOW | CS4398_PAMUTE); 242 cs4398_write(chip, 5, 0); 243 cs4398_write(chip, 6, 0); 244 cs4398_write(chip, 7, CS4398_RMP_DN | CS4398_RMP_UP | 245 CS4398_ZERO_CROSS | CS4398_SOFT_RAMP); 246 cs4362a_write(chip, 0x02, CS4362A_DIF_LJUST); 247 cs4362a_write(chip, 0x03, CS4362A_MUTEC_6 | CS4362A_AMUTE | 248 CS4362A_RMP_UP | CS4362A_ZERO_CROSS | CS4362A_SOFT_RAMP); 249 cs4362a_write(chip, 0x04, CS4362A_RMP_DN | CS4362A_DEM_NONE); 250 cs4362a_write(chip, 0x05, 0); 251 cs4362a_write(chip, 0x06, CS4362A_FM_SINGLE | 252 CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L); 253 cs4362a_write(chip, 0x09, CS4362A_FM_SINGLE | 254 CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L); 255 cs4362a_write(chip, 0x0c, CS4362A_FM_SINGLE | 256 CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L); 257 cs4362a_write(chip, 0x07, 0); 258 cs4362a_write(chip, 0x08, 0); 259 cs4362a_write(chip, 0x0a, 0); 260 cs4362a_write(chip, 0x0b, 0); 261 cs4362a_write(chip, 0x0d, 0); 262 cs4362a_write(chip, 0x0e, 0); 263 /* clear power down */ 264 cs4398_write(chip, 8, CS4398_CPEN); 265 cs4362a_write(chip, 0x01, CS4362A_CPEN); 266 267 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, 268 GPIO_DX_FRONT_PANEL | GPIO_DX_INPUT_ROUTE); 269 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, 270 GPIO_DX_FRONT_PANEL | GPIO_DX_INPUT_ROUTE); 271 272 xonar_common_init(chip); 273 274 snd_component_add(chip->card, "CS4398"); 275 snd_component_add(chip->card, "CS4362A"); 276 snd_component_add(chip->card, "CS5361"); 277 } 278 279 static void xonar_cleanup(struct oxygen *chip) 280 { 281 struct xonar_data *data = chip->model_data; 282 283 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, data->output_enable_bit); 284 } 285 286 static void xonar_dx_cleanup(struct oxygen *chip) 287 { 288 xonar_cleanup(chip); 289 cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN); 290 oxygen_clear_bits8(chip, OXYGEN_FUNCTION, OXYGEN_FUNCTION_RESET_CODEC); 291 } 292 293 static void set_pcm1796_params(struct oxygen *chip, 294 struct snd_pcm_hw_params *params) 295 { 296 unsigned int i; 297 u8 value; 298 299 value = params_rate(params) >= 96000 ? PCM1796_OS_32 : PCM1796_OS_64; 300 for (i = 0; i < 4; ++i) 301 pcm1796_write(chip, i, 20, value); 302 } 303 304 static void update_pcm1796_volume(struct oxygen *chip) 305 { 306 unsigned int i; 307 308 for (i = 0; i < 4; ++i) { 309 pcm1796_write(chip, i, 16, chip->dac_volume[i * 2]); 310 pcm1796_write(chip, i, 17, chip->dac_volume[i * 2 + 1]); 311 } 312 } 313 314 static void update_pcm1796_mute(struct oxygen *chip) 315 { 316 unsigned int i; 317 u8 value; 318 319 value = PCM1796_FMT_24_LJUST | PCM1796_ATLD; 320 if (chip->dac_mute) 321 value |= PCM1796_MUTE; 322 for (i = 0; i < 4; ++i) 323 pcm1796_write(chip, i, 18, value); 324 } 325 326 static void set_cs53x1_params(struct oxygen *chip, 327 struct snd_pcm_hw_params *params) 328 { 329 unsigned int value; 330 331 if (params_rate(params) <= 54000) 332 value = GPIO_CS53x1_M_SINGLE; 333 else if (params_rate(params) <= 108000) 334 value = GPIO_CS53x1_M_DOUBLE; 335 else 336 value = GPIO_CS53x1_M_QUAD; 337 oxygen_write16_masked(chip, OXYGEN_GPIO_DATA, 338 value, GPIO_CS53x1_M_MASK); 339 } 340 341 static void set_cs43xx_params(struct oxygen *chip, 342 struct snd_pcm_hw_params *params) 343 { 344 u8 fm_cs4398, fm_cs4362a; 345 346 fm_cs4398 = CS4398_DEM_NONE | CS4398_DIF_LJUST; 347 fm_cs4362a = CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L; 348 if (params_rate(params) <= 50000) { 349 fm_cs4398 |= CS4398_FM_SINGLE; 350 fm_cs4362a |= CS4362A_FM_SINGLE; 351 } else if (params_rate(params) <= 100000) { 352 fm_cs4398 |= CS4398_FM_DOUBLE; 353 fm_cs4362a |= CS4362A_FM_DOUBLE; 354 } else { 355 fm_cs4398 |= CS4398_FM_QUAD; 356 fm_cs4362a |= CS4362A_FM_QUAD; 357 } 358 cs4398_write(chip, 2, fm_cs4398); 359 cs4362a_write(chip, 0x06, fm_cs4362a); 360 cs4362a_write(chip, 0x09, fm_cs4362a); 361 cs4362a_write(chip, 0x0c, fm_cs4362a); 362 } 363 364 static void update_cs4362a_volumes(struct oxygen *chip) 365 { 366 u8 mute; 367 368 mute = chip->dac_mute ? CS4362A_MUTE : 0; 369 cs4362a_write(chip, 7, (127 - chip->dac_volume[2]) | mute); 370 cs4362a_write(chip, 8, (127 - chip->dac_volume[3]) | mute); 371 cs4362a_write(chip, 10, (127 - chip->dac_volume[4]) | mute); 372 cs4362a_write(chip, 11, (127 - chip->dac_volume[5]) | mute); 373 cs4362a_write(chip, 13, (127 - chip->dac_volume[6]) | mute); 374 cs4362a_write(chip, 14, (127 - chip->dac_volume[7]) | mute); 375 } 376 377 static void update_cs43xx_volume(struct oxygen *chip) 378 { 379 cs4398_write(chip, 5, (127 - chip->dac_volume[0]) * 2); 380 cs4398_write(chip, 6, (127 - chip->dac_volume[1]) * 2); 381 update_cs4362a_volumes(chip); 382 } 383 384 static void update_cs43xx_mute(struct oxygen *chip) 385 { 386 u8 reg; 387 388 reg = CS4398_MUTEP_LOW | CS4398_PAMUTE; 389 if (chip->dac_mute) 390 reg |= CS4398_MUTE_B | CS4398_MUTE_A; 391 cs4398_write(chip, 4, reg); 392 update_cs4362a_volumes(chip); 393 } 394 395 static void xonar_gpio_changed(struct oxygen *chip) 396 { 397 struct xonar_data *data = chip->model_data; 398 u8 has_power; 399 400 has_power = !!(oxygen_read8(chip, data->ext_power_reg) 401 & data->ext_power_bit); 402 if (has_power != data->has_power) { 403 data->has_power = has_power; 404 if (has_power) { 405 snd_printk(KERN_NOTICE "power restored\n"); 406 } else { 407 snd_printk(KERN_CRIT 408 "Hey! Don't unplug the power cable!\n"); 409 /* TODO: stop PCMs */ 410 } 411 } 412 } 413 414 static int alt_switch_get(struct snd_kcontrol *ctl, 415 struct snd_ctl_elem_value *value) 416 { 417 struct oxygen *chip = ctl->private_data; 418 419 value->value.integer.value[0] = 420 !!(oxygen_read16(chip, OXYGEN_GPIO_DATA) & GPIO_D2_ALT); 421 return 0; 422 } 423 424 static int alt_switch_put(struct snd_kcontrol *ctl, 425 struct snd_ctl_elem_value *value) 426 { 427 struct oxygen *chip = ctl->private_data; 428 u16 old_bits, new_bits; 429 int changed; 430 431 spin_lock_irq(&chip->reg_lock); 432 old_bits = oxygen_read16(chip, OXYGEN_GPIO_DATA); 433 if (value->value.integer.value[0]) 434 new_bits = old_bits | GPIO_D2_ALT; 435 else 436 new_bits = old_bits & ~GPIO_D2_ALT; 437 changed = new_bits != old_bits; 438 if (changed) 439 oxygen_write16(chip, OXYGEN_GPIO_DATA, new_bits); 440 spin_unlock_irq(&chip->reg_lock); 441 return changed; 442 } 443 444 static const struct snd_kcontrol_new alt_switch = { 445 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 446 .name = "Analog Loopback Switch", 447 .info = snd_ctl_boolean_mono_info, 448 .get = alt_switch_get, 449 .put = alt_switch_put, 450 }; 451 452 static int front_panel_get(struct snd_kcontrol *ctl, 453 struct snd_ctl_elem_value *value) 454 { 455 struct oxygen *chip = ctl->private_data; 456 457 value->value.integer.value[0] = 458 !!(oxygen_read16(chip, OXYGEN_GPIO_DATA) & GPIO_DX_FRONT_PANEL); 459 return 0; 460 } 461 462 static int front_panel_put(struct snd_kcontrol *ctl, 463 struct snd_ctl_elem_value *value) 464 { 465 struct oxygen *chip = ctl->private_data; 466 u16 old_reg, new_reg; 467 468 spin_lock_irq(&chip->reg_lock); 469 old_reg = oxygen_read16(chip, OXYGEN_GPIO_DATA); 470 if (value->value.integer.value[0]) 471 new_reg = old_reg | GPIO_DX_FRONT_PANEL; 472 else 473 new_reg = old_reg & ~GPIO_DX_FRONT_PANEL; 474 oxygen_write16(chip, OXYGEN_GPIO_DATA, new_reg); 475 spin_unlock_irq(&chip->reg_lock); 476 return old_reg != new_reg; 477 } 478 479 static const struct snd_kcontrol_new front_panel_switch = { 480 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 481 .name = "Front Panel Switch", 482 .info = snd_ctl_boolean_mono_info, 483 .get = front_panel_get, 484 .put = front_panel_put, 485 }; 486 487 static void xonar_dx_ac97_switch(struct oxygen *chip, 488 unsigned int reg, unsigned int mute) 489 { 490 if (reg == AC97_LINE) { 491 spin_lock_irq(&chip->reg_lock); 492 oxygen_write16_masked(chip, OXYGEN_GPIO_DATA, 493 mute ? GPIO_DX_INPUT_ROUTE : 0, 494 GPIO_DX_INPUT_ROUTE); 495 spin_unlock_irq(&chip->reg_lock); 496 } 497 } 498 499 static const DECLARE_TLV_DB_SCALE(pcm1796_db_scale, -12000, 50, 0); 500 static const DECLARE_TLV_DB_SCALE(cs4362a_db_scale, -12700, 100, 0); 501 502 static int xonar_d2_control_filter(struct snd_kcontrol_new *template) 503 { 504 if (!strcmp(template->name, "Master Playback Volume")) { 505 template->access |= SNDRV_CTL_ELEM_ACCESS_TLV_READ; 506 template->tlv.p = pcm1796_db_scale; 507 } else if (!strncmp(template->name, "CD Capture ", 11)) { 508 /* CD in is actually connected to the video in pin */ 509 template->private_value ^= AC97_CD ^ AC97_VIDEO; 510 } 511 return 0; 512 } 513 514 static int xonar_dx_control_filter(struct snd_kcontrol_new *template) 515 { 516 if (!strcmp(template->name, "Master Playback Volume")) { 517 template->access |= SNDRV_CTL_ELEM_ACCESS_TLV_READ; 518 template->tlv.p = cs4362a_db_scale; 519 } else if (!strncmp(template->name, "CD Capture ", 11)) { 520 return 1; /* no CD input */ 521 } 522 return 0; 523 } 524 525 static int xonar_mixer_init(struct oxygen *chip) 526 { 527 return snd_ctl_add(chip->card, snd_ctl_new1(&alt_switch, chip)); 528 } 529 530 static int xonar_dx_mixer_init(struct oxygen *chip) 531 { 532 return snd_ctl_add(chip->card, snd_ctl_new1(&front_panel_switch, chip)); 533 } 534 535 static const struct oxygen_model xonar_models[] = { 536 [MODEL_D2] = { 537 .shortname = "Xonar D2", 538 .longname = "Asus Virtuoso 200", 539 .chip = "AV200", 540 .owner = THIS_MODULE, 541 .init = xonar_d2_init, 542 .control_filter = xonar_d2_control_filter, 543 .mixer_init = xonar_mixer_init, 544 .cleanup = xonar_cleanup, 545 .set_dac_params = set_pcm1796_params, 546 .set_adc_params = set_cs53x1_params, 547 .update_dac_volume = update_pcm1796_volume, 548 .update_dac_mute = update_pcm1796_mute, 549 .model_data_size = sizeof(struct xonar_data), 550 .pcm_dev_cfg = PLAYBACK_0_TO_I2S | 551 PLAYBACK_1_TO_SPDIF | 552 CAPTURE_0_FROM_I2S_2 | 553 CAPTURE_1_FROM_SPDIF, 554 .dac_channels = 8, 555 .dac_volume_min = 0x0f, 556 .dac_volume_max = 0xff, 557 .misc_flags = OXYGEN_MISC_MIDI, 558 .function_flags = OXYGEN_FUNCTION_SPI | 559 OXYGEN_FUNCTION_ENABLE_SPI_4_5, 560 .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST, 561 .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST, 562 }, 563 [MODEL_D2X] = { 564 .shortname = "Xonar D2X", 565 .longname = "Asus Virtuoso 200", 566 .chip = "AV200", 567 .owner = THIS_MODULE, 568 .init = xonar_d2x_init, 569 .control_filter = xonar_d2_control_filter, 570 .mixer_init = xonar_mixer_init, 571 .cleanup = xonar_cleanup, 572 .set_dac_params = set_pcm1796_params, 573 .set_adc_params = set_cs53x1_params, 574 .update_dac_volume = update_pcm1796_volume, 575 .update_dac_mute = update_pcm1796_mute, 576 .gpio_changed = xonar_gpio_changed, 577 .model_data_size = sizeof(struct xonar_data), 578 .pcm_dev_cfg = PLAYBACK_0_TO_I2S | 579 PLAYBACK_1_TO_SPDIF | 580 CAPTURE_0_FROM_I2S_2 | 581 CAPTURE_1_FROM_SPDIF, 582 .dac_channels = 8, 583 .dac_volume_min = 0x0f, 584 .dac_volume_max = 0xff, 585 .misc_flags = OXYGEN_MISC_MIDI, 586 .function_flags = OXYGEN_FUNCTION_SPI | 587 OXYGEN_FUNCTION_ENABLE_SPI_4_5, 588 .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST, 589 .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST, 590 }, 591 [MODEL_DX] = { 592 .shortname = "Xonar DX", 593 .longname = "Asus Virtuoso 100", 594 .chip = "AV200", 595 .owner = THIS_MODULE, 596 .init = xonar_dx_init, 597 .control_filter = xonar_dx_control_filter, 598 .mixer_init = xonar_dx_mixer_init, 599 .cleanup = xonar_dx_cleanup, 600 .set_dac_params = set_cs43xx_params, 601 .set_adc_params = set_cs53x1_params, 602 .update_dac_volume = update_cs43xx_volume, 603 .update_dac_mute = update_cs43xx_mute, 604 .gpio_changed = xonar_gpio_changed, 605 .ac97_switch = xonar_dx_ac97_switch, 606 .model_data_size = sizeof(struct xonar_data), 607 .pcm_dev_cfg = PLAYBACK_0_TO_I2S | 608 PLAYBACK_1_TO_SPDIF | 609 CAPTURE_0_FROM_I2S_2, 610 .dac_channels = 8, 611 .dac_volume_min = 0, 612 .dac_volume_max = 127, 613 .function_flags = OXYGEN_FUNCTION_2WIRE, 614 .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST, 615 .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST, 616 }, 617 }; 618 619 static int __devinit xonar_probe(struct pci_dev *pci, 620 const struct pci_device_id *pci_id) 621 { 622 static int dev; 623 int err; 624 625 if (dev >= SNDRV_CARDS) 626 return -ENODEV; 627 if (!enable[dev]) { 628 ++dev; 629 return -ENOENT; 630 } 631 err = oxygen_pci_probe(pci, index[dev], id[dev], 632 &xonar_models[pci_id->driver_data]); 633 if (err >= 0) 634 ++dev; 635 return err; 636 } 637 638 static struct pci_driver xonar_driver = { 639 .name = "AV200", 640 .id_table = xonar_ids, 641 .probe = xonar_probe, 642 .remove = __devexit_p(oxygen_pci_remove), 643 }; 644 645 static int __init alsa_card_xonar_init(void) 646 { 647 return pci_register_driver(&xonar_driver); 648 } 649 650 static void __exit alsa_card_xonar_exit(void) 651 { 652 pci_unregister_driver(&xonar_driver); 653 } 654 655 module_init(alsa_card_xonar_init) 656 module_exit(alsa_card_xonar_exit) 657