1a9d3cc48SClemens Ladisch /* register 01h */ 2a9d3cc48SClemens Ladisch #define CS4362A_PDN 0x01 3a9d3cc48SClemens Ladisch #define CS4362A_DAC1_DIS 0x02 4a9d3cc48SClemens Ladisch #define CS4362A_DAC2_DIS 0x04 5a9d3cc48SClemens Ladisch #define CS4362A_DAC3_DIS 0x08 6a9d3cc48SClemens Ladisch #define CS4362A_MCLKDIV 0x20 7a9d3cc48SClemens Ladisch #define CS4362A_FREEZE 0x40 8a9d3cc48SClemens Ladisch #define CS4362A_CPEN 0x80 9a9d3cc48SClemens Ladisch /* register 02h */ 10a9d3cc48SClemens Ladisch #define CS4362A_DIF_MASK 0x70 11a9d3cc48SClemens Ladisch #define CS4362A_DIF_LJUST 0x00 12a9d3cc48SClemens Ladisch #define CS4362A_DIF_I2S 0x10 13a9d3cc48SClemens Ladisch #define CS4362A_DIF_RJUST_16 0x20 14a9d3cc48SClemens Ladisch #define CS4362A_DIF_RJUST_24 0x30 15a9d3cc48SClemens Ladisch #define CS4362A_DIF_RJUST_20 0x40 16a9d3cc48SClemens Ladisch #define CS4362A_DIF_RJUST_18 0x50 17a9d3cc48SClemens Ladisch /* register 03h */ 18a9d3cc48SClemens Ladisch #define CS4362A_MUTEC_MASK 0x03 19a9d3cc48SClemens Ladisch #define CS4362A_MUTEC_6 0x00 20a9d3cc48SClemens Ladisch #define CS4362A_MUTEC_1 0x01 21a9d3cc48SClemens Ladisch #define CS4362A_MUTEC_3 0x03 22a9d3cc48SClemens Ladisch #define CS4362A_AMUTE 0x04 23a9d3cc48SClemens Ladisch #define CS4362A_MUTEC_POL 0x08 24a9d3cc48SClemens Ladisch #define CS4362A_RMP_UP 0x10 25a9d3cc48SClemens Ladisch #define CS4362A_SNGLVOL 0x20 26a9d3cc48SClemens Ladisch #define CS4362A_ZERO_CROSS 0x40 27a9d3cc48SClemens Ladisch #define CS4362A_SOFT_RAMP 0x80 28a9d3cc48SClemens Ladisch /* register 04h */ 29a9d3cc48SClemens Ladisch #define CS4362A_RMP_DN 0x01 30a9d3cc48SClemens Ladisch #define CS4362A_DEM_MASK 0x06 31a9d3cc48SClemens Ladisch #define CS4362A_DEM_NONE 0x00 32a9d3cc48SClemens Ladisch #define CS4362A_DEM_44100 0x02 33a9d3cc48SClemens Ladisch #define CS4362A_DEM_48000 0x04 34a9d3cc48SClemens Ladisch #define CS4362A_DEM_32000 0x06 35a9d3cc48SClemens Ladisch #define CS4362A_FILT_SEL 0x10 36a9d3cc48SClemens Ladisch /* register 05h */ 37a9d3cc48SClemens Ladisch #define CS4362A_INV_A1 0x01 38a9d3cc48SClemens Ladisch #define CS4362A_INV_B1 0x02 39a9d3cc48SClemens Ladisch #define CS4362A_INV_A2 0x04 40a9d3cc48SClemens Ladisch #define CS4362A_INV_B2 0x08 41a9d3cc48SClemens Ladisch #define CS4362A_INV_A3 0x10 42a9d3cc48SClemens Ladisch #define CS4362A_INV_B3 0x20 43a9d3cc48SClemens Ladisch /* register 06h */ 44a9d3cc48SClemens Ladisch #define CS4362A_FM_MASK 0x03 45a9d3cc48SClemens Ladisch #define CS4362A_FM_SINGLE 0x00 46a9d3cc48SClemens Ladisch #define CS4362A_FM_DOUBLE 0x01 47a9d3cc48SClemens Ladisch #define CS4362A_FM_QUAD 0x02 48a9d3cc48SClemens Ladisch #define CS4362A_FM_DSD 0x03 49a9d3cc48SClemens Ladisch #define CS4362A_ATAPI_MASK 0x7c 50a9d3cc48SClemens Ladisch #define CS4362A_ATAPI_B_MUTE 0x00 51a9d3cc48SClemens Ladisch #define CS4362A_ATAPI_B_R 0x04 52a9d3cc48SClemens Ladisch #define CS4362A_ATAPI_B_L 0x08 53a9d3cc48SClemens Ladisch #define CS4362A_ATAPI_B_LR 0x0c 54a9d3cc48SClemens Ladisch #define CS4362A_ATAPI_A_MUTE 0x00 55a9d3cc48SClemens Ladisch #define CS4362A_ATAPI_A_R 0x10 56a9d3cc48SClemens Ladisch #define CS4362A_ATAPI_A_L 0x20 57a9d3cc48SClemens Ladisch #define CS4362A_ATAPI_A_LR 0x30 58a9d3cc48SClemens Ladisch #define CS4362A_ATAPI_MIX_LR_VOL 0x40 59a9d3cc48SClemens Ladisch #define CS4362A_A_EQ_B 0x80 60a9d3cc48SClemens Ladisch /* register 07h */ 61a9d3cc48SClemens Ladisch #define CS4362A_VOL_MASK 0x7f 62a9d3cc48SClemens Ladisch #define CS4362A_MUTE 0x80 63a9d3cc48SClemens Ladisch /* register 08h: like 07h */ 64a9d3cc48SClemens Ladisch /* registers 09h..0Bh: like 06h..08h */ 65a9d3cc48SClemens Ladisch /* registers 0Ch..0Eh: like 06h..08h */ 66a9d3cc48SClemens Ladisch /* register 12h */ 67a9d3cc48SClemens Ladisch #define CS4362A_REV_MASK 0x07 68a9d3cc48SClemens Ladisch #define CS4362A_PART_MASK 0xf8 69a9d3cc48SClemens Ladisch #define CS4362A_PART_CS4362A 0x50 70